2 * OpenFirmware bindings for Secure Digital Host Controller Interface.
4 * Copyright (c) 2007 Freescale Semiconductor, Inc.
5 * Copyright (c) 2009 MontaVista Software, Inc.
7 * Authors: Xiaobo Xie <X.Xie@freescale.com>
8 * Anton Vorontsov <avorontsov@ru.mvista.com>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or (at
13 * your option) any later version.
16 #include <linux/err.h>
17 #include <linux/module.h>
18 #include <linux/init.h>
20 #include <linux/interrupt.h>
21 #include <linux/delay.h>
23 #include <linux/of_platform.h>
24 #include <linux/of_address.h>
25 #include <linux/of_irq.h>
26 #include <linux/mmc/host.h>
28 #include <asm/machdep.h>
33 #ifdef CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
36 * These accessors are designed for big endian hosts doing I/O to
37 * little endian controllers incorporating a 32-bit hardware byte swapper.
40 u32 sdhci_be32bs_readl(struct sdhci_host *host, int reg)
42 return in_be32(host->ioaddr + reg);
45 u16 sdhci_be32bs_readw(struct sdhci_host *host, int reg)
47 return in_be16(host->ioaddr + (reg ^ 0x2));
50 u8 sdhci_be32bs_readb(struct sdhci_host *host, int reg)
52 return in_8(host->ioaddr + (reg ^ 0x3));
55 void sdhci_be32bs_writel(struct sdhci_host *host, u32 val, int reg)
57 out_be32(host->ioaddr + reg, val);
60 void sdhci_be32bs_writew(struct sdhci_host *host, u16 val, int reg)
62 struct sdhci_of_host *of_host = sdhci_priv(host);
63 int base = reg & ~0x3;
64 int shift = (reg & 0x2) * 8;
67 case SDHCI_TRANSFER_MODE:
69 * Postpone this write, we must do it together with a
70 * command write that is down below.
72 of_host->xfer_mode_shadow = val;
75 sdhci_be32bs_writel(host, val << 16 | of_host->xfer_mode_shadow,
79 clrsetbits_be32(host->ioaddr + base, 0xffff << shift, val << shift);
82 void sdhci_be32bs_writeb(struct sdhci_host *host, u8 val, int reg)
84 int base = reg & ~0x3;
85 int shift = (reg & 0x3) * 8;
87 clrsetbits_be32(host->ioaddr + base , 0xff << shift, val << shift);
89 #endif /* CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER */
93 static int sdhci_of_suspend(struct platform_device *ofdev, pm_message_t state)
95 struct sdhci_host *host = dev_get_drvdata(&ofdev->dev);
97 return mmc_suspend_host(host->mmc);
100 static int sdhci_of_resume(struct platform_device *ofdev)
102 struct sdhci_host *host = dev_get_drvdata(&ofdev->dev);
104 return mmc_resume_host(host->mmc);
109 #define sdhci_of_suspend NULL
110 #define sdhci_of_resume NULL
114 static bool __devinit sdhci_of_wp_inverted(struct device_node *np)
116 if (of_get_property(np, "sdhci,wp-inverted", NULL))
119 /* Old device trees don't have the wp-inverted property. */
121 return machine_is(mpc837x_rdb) || machine_is(mpc837x_mds);
127 static int __devinit sdhci_of_probe(struct platform_device *ofdev)
129 struct device_node *np = ofdev->dev.of_node;
130 struct sdhci_of_data *sdhci_of_data;
131 struct sdhci_host *host;
132 struct sdhci_of_host *of_host;
137 if (!ofdev->dev.of_match)
139 sdhci_of_data = ofdev->dev.of_match->data;
141 if (!of_device_is_available(np))
144 host = sdhci_alloc_host(&ofdev->dev, sizeof(*of_host));
148 of_host = sdhci_priv(host);
149 dev_set_drvdata(&ofdev->dev, host);
151 host->ioaddr = of_iomap(np, 0);
157 host->irq = irq_of_parse_and_map(np, 0);
163 host->hw_name = dev_name(&ofdev->dev);
165 host->quirks = sdhci_of_data->quirks;
166 host->ops = &sdhci_of_data->ops;
169 if (of_get_property(np, "sdhci,auto-cmd12", NULL))
170 host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12;
173 if (of_get_property(np, "sdhci,1-bit-only", NULL))
174 host->quirks |= SDHCI_QUIRK_FORCE_1_BIT_DATA;
176 if (sdhci_of_wp_inverted(np))
177 host->quirks |= SDHCI_QUIRK_INVERTED_WRITE_PROTECT;
179 clk = of_get_property(np, "clock-frequency", &size);
180 if (clk && size == sizeof(*clk) && *clk)
181 of_host->clock = be32_to_cpup(clk);
183 ret = sdhci_add_host(host);
190 irq_dispose_mapping(host->irq);
192 iounmap(host->ioaddr);
194 sdhci_free_host(host);
198 static int __devexit sdhci_of_remove(struct platform_device *ofdev)
200 struct sdhci_host *host = dev_get_drvdata(&ofdev->dev);
202 sdhci_remove_host(host, 0);
203 sdhci_free_host(host);
204 irq_dispose_mapping(host->irq);
205 iounmap(host->ioaddr);
209 static const struct of_device_id sdhci_of_match[] = {
210 #ifdef CONFIG_MMC_SDHCI_OF_ESDHC
211 { .compatible = "fsl,mpc8379-esdhc", .data = &sdhci_esdhc, },
212 { .compatible = "fsl,mpc8536-esdhc", .data = &sdhci_esdhc, },
213 { .compatible = "fsl,esdhc", .data = &sdhci_esdhc, },
215 #ifdef CONFIG_MMC_SDHCI_OF_HLWD
216 { .compatible = "nintendo,hollywood-sdhci", .data = &sdhci_hlwd, },
218 { .compatible = "generic-sdhci", },
221 MODULE_DEVICE_TABLE(of, sdhci_of_match);
223 static struct platform_driver sdhci_of_driver = {
226 .owner = THIS_MODULE,
227 .of_match_table = sdhci_of_match,
229 .probe = sdhci_of_probe,
230 .remove = __devexit_p(sdhci_of_remove),
231 .suspend = sdhci_of_suspend,
232 .resume = sdhci_of_resume,
235 static int __init sdhci_of_init(void)
237 return platform_driver_register(&sdhci_of_driver);
239 module_init(sdhci_of_init);
241 static void __exit sdhci_of_exit(void)
243 platform_driver_unregister(&sdhci_of_driver);
245 module_exit(sdhci_of_exit);
247 MODULE_DESCRIPTION("Secure Digital Host Controller Interface OF driver");
248 MODULE_AUTHOR("Xiaobo Xie <X.Xie@freescale.com>, "
249 "Anton Vorontsov <avorontsov@ru.mvista.com>");
250 MODULE_LICENSE("GPL");