2 * linux/drivers/mmc/host/pxa.c - PXA MMCI driver
4 * Copyright (C) 2003 Russell King, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This hardware is really sick:
11 * - No way to clear interrupts.
12 * - Have to turn off the clock whenever we touch the device.
13 * - Doesn't tell you how many data blocks were transferred.
16 * 1 and 3 byte data transfers not supported
17 * max block length up to 1023
19 #include <linux/module.h>
20 #include <linux/init.h>
21 #include <linux/ioport.h>
22 #include <linux/platform_device.h>
23 #include <linux/delay.h>
24 #include <linux/interrupt.h>
25 #include <linux/dma-mapping.h>
26 #include <linux/clk.h>
27 #include <linux/err.h>
28 #include <linux/mmc/host.h>
30 #include <linux/regulator/consumer.h>
31 #include <linux/gpio.h>
32 #include <linux/gfp.h>
34 #include <asm/sizes.h>
36 #include <mach/hardware.h>
42 #define DRIVER_NAME "pxa2xx-mci"
45 #define CLKRT_OFF (~0)
47 #define mmc_has_26MHz() (cpu_is_pxa300() || cpu_is_pxa310() \
56 unsigned long clkrate;
62 unsigned int power_mode;
63 struct pxamci_platform_data *pdata;
65 struct mmc_request *mrq;
66 struct mmc_command *cmd;
67 struct mmc_data *data;
70 struct pxa_dma_desc *sg_cpu;
74 unsigned int dma_drcmrrx;
75 unsigned int dma_drcmrtx;
77 struct regulator *vcc;
80 static inline void pxamci_init_ocr(struct pxamci_host *host)
82 #ifdef CONFIG_REGULATOR
83 host->vcc = regulator_get(mmc_dev(host->mmc), "vmmc");
85 if (IS_ERR(host->vcc))
88 host->mmc->ocr_avail = mmc_regulator_get_ocrmask(host->vcc);
89 if (host->pdata && host->pdata->ocr_mask)
90 dev_warn(mmc_dev(host->mmc),
91 "ocr_mask/setpower will not be used\n");
94 if (host->vcc == NULL) {
95 /* fall-back to platform data */
96 host->mmc->ocr_avail = host->pdata ?
97 host->pdata->ocr_mask :
98 MMC_VDD_32_33 | MMC_VDD_33_34;
102 static inline void pxamci_set_power(struct pxamci_host *host, unsigned int vdd)
106 #ifdef CONFIG_REGULATOR
108 mmc_regulator_set_ocr(host->vcc, vdd);
110 if (!host->vcc && host->pdata &&
111 gpio_is_valid(host->pdata->gpio_power)) {
112 on = ((1 << vdd) & host->pdata->ocr_mask);
113 gpio_set_value(host->pdata->gpio_power,
114 !!on ^ host->pdata->gpio_power_invert);
116 if (!host->vcc && host->pdata && host->pdata->setpower)
117 host->pdata->setpower(mmc_dev(host->mmc), vdd);
120 static void pxamci_stop_clock(struct pxamci_host *host)
122 if (readl(host->base + MMC_STAT) & STAT_CLK_EN) {
123 unsigned long timeout = 10000;
126 writel(STOP_CLOCK, host->base + MMC_STRPCL);
129 v = readl(host->base + MMC_STAT);
130 if (!(v & STAT_CLK_EN))
136 dev_err(mmc_dev(host->mmc), "unable to stop clock\n");
140 static void pxamci_enable_irq(struct pxamci_host *host, unsigned int mask)
144 spin_lock_irqsave(&host->lock, flags);
145 host->imask &= ~mask;
146 writel(host->imask, host->base + MMC_I_MASK);
147 spin_unlock_irqrestore(&host->lock, flags);
150 static void pxamci_disable_irq(struct pxamci_host *host, unsigned int mask)
154 spin_lock_irqsave(&host->lock, flags);
156 writel(host->imask, host->base + MMC_I_MASK);
157 spin_unlock_irqrestore(&host->lock, flags);
160 static void pxamci_setup_data(struct pxamci_host *host, struct mmc_data *data)
162 unsigned int nob = data->blocks;
163 unsigned long long clks;
164 unsigned int timeout;
171 if (data->flags & MMC_DATA_STREAM)
174 writel(nob, host->base + MMC_NOB);
175 writel(data->blksz, host->base + MMC_BLKLEN);
177 clks = (unsigned long long)data->timeout_ns * host->clkrate;
178 do_div(clks, 1000000000UL);
179 timeout = (unsigned int)clks + (data->timeout_clks << host->clkrt);
180 writel((timeout + 255) / 256, host->base + MMC_RDTO);
182 if (data->flags & MMC_DATA_READ) {
183 host->dma_dir = DMA_FROM_DEVICE;
184 dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC;
185 DRCMR(host->dma_drcmrtx) = 0;
186 DRCMR(host->dma_drcmrrx) = host->dma | DRCMR_MAPVLD;
188 host->dma_dir = DMA_TO_DEVICE;
189 dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG;
190 DRCMR(host->dma_drcmrrx) = 0;
191 DRCMR(host->dma_drcmrtx) = host->dma | DRCMR_MAPVLD;
194 dcmd |= DCMD_BURST32 | DCMD_WIDTH1;
196 host->dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len,
199 for (i = 0; i < host->dma_len; i++) {
200 unsigned int length = sg_dma_len(&data->sg[i]);
201 host->sg_cpu[i].dcmd = dcmd | length;
202 if (length & 31 && !(data->flags & MMC_DATA_READ))
203 host->sg_cpu[i].dcmd |= DCMD_ENDIRQEN;
204 /* Not aligned to 8-byte boundary? */
205 if (sg_dma_address(&data->sg[i]) & 0x7)
207 if (data->flags & MMC_DATA_READ) {
208 host->sg_cpu[i].dsadr = host->res->start + MMC_RXFIFO;
209 host->sg_cpu[i].dtadr = sg_dma_address(&data->sg[i]);
211 host->sg_cpu[i].dsadr = sg_dma_address(&data->sg[i]);
212 host->sg_cpu[i].dtadr = host->res->start + MMC_TXFIFO;
214 host->sg_cpu[i].ddadr = host->sg_dma + (i + 1) *
215 sizeof(struct pxa_dma_desc);
217 host->sg_cpu[host->dma_len - 1].ddadr = DDADR_STOP;
221 * The PXA27x DMA controller encounters overhead when working with
222 * unaligned (to 8-byte boundaries) data, so switch on byte alignment
223 * mode only if we have unaligned data.
226 DALGN |= (1 << host->dma);
228 DALGN &= ~(1 << host->dma);
229 DDADR(host->dma) = host->sg_dma;
232 * workaround for erratum #91:
233 * only start DMA now if we are doing a read,
234 * otherwise we wait until CMD/RESP has finished
235 * before starting DMA.
237 if (!cpu_is_pxa27x() || data->flags & MMC_DATA_READ)
238 DCSR(host->dma) = DCSR_RUN;
241 static void pxamci_start_cmd(struct pxamci_host *host, struct mmc_command *cmd, unsigned int cmdat)
243 WARN_ON(host->cmd != NULL);
246 if (cmd->flags & MMC_RSP_BUSY)
249 #define RSP_TYPE(x) ((x) & ~(MMC_RSP_BUSY|MMC_RSP_OPCODE))
250 switch (RSP_TYPE(mmc_resp_type(cmd))) {
251 case RSP_TYPE(MMC_RSP_R1): /* r1, r1b, r6, r7 */
252 cmdat |= CMDAT_RESP_SHORT;
254 case RSP_TYPE(MMC_RSP_R3):
255 cmdat |= CMDAT_RESP_R3;
257 case RSP_TYPE(MMC_RSP_R2):
258 cmdat |= CMDAT_RESP_R2;
264 writel(cmd->opcode, host->base + MMC_CMD);
265 writel(cmd->arg >> 16, host->base + MMC_ARGH);
266 writel(cmd->arg & 0xffff, host->base + MMC_ARGL);
267 writel(cmdat, host->base + MMC_CMDAT);
268 writel(host->clkrt, host->base + MMC_CLKRT);
270 writel(START_CLOCK, host->base + MMC_STRPCL);
272 pxamci_enable_irq(host, END_CMD_RES);
275 static void pxamci_finish_request(struct pxamci_host *host, struct mmc_request *mrq)
280 mmc_request_done(host->mmc, mrq);
283 static int pxamci_cmd_done(struct pxamci_host *host, unsigned int stat)
285 struct mmc_command *cmd = host->cmd;
295 * Did I mention this is Sick. We always need to
296 * discard the upper 8 bits of the first 16-bit word.
298 v = readl(host->base + MMC_RES) & 0xffff;
299 for (i = 0; i < 4; i++) {
300 u32 w1 = readl(host->base + MMC_RES) & 0xffff;
301 u32 w2 = readl(host->base + MMC_RES) & 0xffff;
302 cmd->resp[i] = v << 24 | w1 << 8 | w2 >> 8;
306 if (stat & STAT_TIME_OUT_RESPONSE) {
307 cmd->error = -ETIMEDOUT;
308 } else if (stat & STAT_RES_CRC_ERR && cmd->flags & MMC_RSP_CRC) {
310 * workaround for erratum #42:
311 * Intel PXA27x Family Processor Specification Update Rev 001
312 * A bogus CRC error can appear if the msb of a 136 bit
315 if (cpu_is_pxa27x() &&
316 (cmd->flags & MMC_RSP_136 && cmd->resp[0] & 0x80000000))
317 pr_debug("ignoring CRC from command %d - *risky*\n", cmd->opcode);
319 cmd->error = -EILSEQ;
322 pxamci_disable_irq(host, END_CMD_RES);
323 if (host->data && !cmd->error) {
324 pxamci_enable_irq(host, DATA_TRAN_DONE);
326 * workaround for erratum #91, if doing write
329 if (cpu_is_pxa27x() && host->data->flags & MMC_DATA_WRITE)
330 DCSR(host->dma) = DCSR_RUN;
332 pxamci_finish_request(host, host->mrq);
338 static int pxamci_data_done(struct pxamci_host *host, unsigned int stat)
340 struct mmc_data *data = host->data;
346 dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len,
349 if (stat & STAT_READ_TIME_OUT)
350 data->error = -ETIMEDOUT;
351 else if (stat & (STAT_CRC_READ_ERROR|STAT_CRC_WRITE_ERROR))
352 data->error = -EILSEQ;
355 * There appears to be a hardware design bug here. There seems to
356 * be no way to find out how much data was transferred to the card.
357 * This means that if there was an error on any block, we mark all
358 * data blocks as being in error.
361 data->bytes_xfered = data->blocks * data->blksz;
363 data->bytes_xfered = 0;
365 pxamci_disable_irq(host, DATA_TRAN_DONE);
368 if (host->mrq->stop) {
369 pxamci_stop_clock(host);
370 pxamci_start_cmd(host, host->mrq->stop, host->cmdat);
372 pxamci_finish_request(host, host->mrq);
378 static irqreturn_t pxamci_irq(int irq, void *devid)
380 struct pxamci_host *host = devid;
384 ireg = readl(host->base + MMC_I_REG) & ~readl(host->base + MMC_I_MASK);
387 unsigned stat = readl(host->base + MMC_STAT);
389 pr_debug("PXAMCI: irq %08x stat %08x\n", ireg, stat);
391 if (ireg & END_CMD_RES)
392 handled |= pxamci_cmd_done(host, stat);
393 if (ireg & DATA_TRAN_DONE)
394 handled |= pxamci_data_done(host, stat);
395 if (ireg & SDIO_INT) {
396 mmc_signal_sdio_irq(host->mmc);
401 return IRQ_RETVAL(handled);
404 static void pxamci_request(struct mmc_host *mmc, struct mmc_request *mrq)
406 struct pxamci_host *host = mmc_priv(mmc);
409 WARN_ON(host->mrq != NULL);
413 pxamci_stop_clock(host);
416 host->cmdat &= ~CMDAT_INIT;
419 pxamci_setup_data(host, mrq->data);
421 cmdat &= ~CMDAT_BUSY;
422 cmdat |= CMDAT_DATAEN | CMDAT_DMAEN;
423 if (mrq->data->flags & MMC_DATA_WRITE)
424 cmdat |= CMDAT_WRITE;
426 if (mrq->data->flags & MMC_DATA_STREAM)
427 cmdat |= CMDAT_STREAM;
430 pxamci_start_cmd(host, mrq->cmd, cmdat);
433 static int pxamci_get_ro(struct mmc_host *mmc)
435 struct pxamci_host *host = mmc_priv(mmc);
437 if (host->pdata && gpio_is_valid(host->pdata->gpio_card_ro)) {
438 if (host->pdata->gpio_card_ro_invert)
439 return !gpio_get_value(host->pdata->gpio_card_ro);
441 return gpio_get_value(host->pdata->gpio_card_ro);
443 if (host->pdata && host->pdata->get_ro)
444 return !!host->pdata->get_ro(mmc_dev(mmc));
446 * Board doesn't support read only detection; let the mmc core
452 static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
454 struct pxamci_host *host = mmc_priv(mmc);
457 unsigned long rate = host->clkrate;
458 unsigned int clk = rate / ios->clock;
460 if (host->clkrt == CLKRT_OFF)
461 clk_enable(host->clk);
463 if (ios->clock == 26000000) {
464 /* to support 26MHz */
467 /* to handle (19.5MHz, 26MHz) */
472 * clk might result in a lower divisor than we
473 * desire. check for that condition and adjust
476 if (rate / clk > ios->clock)
478 host->clkrt = fls(clk) - 1;
482 * we write clkrt on the next command
485 pxamci_stop_clock(host);
486 if (host->clkrt != CLKRT_OFF) {
487 host->clkrt = CLKRT_OFF;
488 clk_disable(host->clk);
492 if (host->power_mode != ios->power_mode) {
493 host->power_mode = ios->power_mode;
495 pxamci_set_power(host, ios->vdd);
497 if (ios->power_mode == MMC_POWER_ON)
498 host->cmdat |= CMDAT_INIT;
501 if (ios->bus_width == MMC_BUS_WIDTH_4)
502 host->cmdat |= CMDAT_SD_4DAT;
504 host->cmdat &= ~CMDAT_SD_4DAT;
506 pr_debug("PXAMCI: clkrt = %x cmdat = %x\n",
507 host->clkrt, host->cmdat);
510 static void pxamci_enable_sdio_irq(struct mmc_host *host, int enable)
512 struct pxamci_host *pxa_host = mmc_priv(host);
515 pxamci_enable_irq(pxa_host, SDIO_INT);
517 pxamci_disable_irq(pxa_host, SDIO_INT);
520 static const struct mmc_host_ops pxamci_ops = {
521 .request = pxamci_request,
522 .get_ro = pxamci_get_ro,
523 .set_ios = pxamci_set_ios,
524 .enable_sdio_irq = pxamci_enable_sdio_irq,
527 static void pxamci_dma_irq(int dma, void *devid)
529 struct pxamci_host *host = devid;
530 int dcsr = DCSR(dma);
531 DCSR(dma) = dcsr & ~DCSR_STOPIRQEN;
533 if (dcsr & DCSR_ENDINTR) {
534 writel(BUF_PART_FULL, host->base + MMC_PRTBUF);
536 printk(KERN_ERR "%s: DMA error on channel %d (DCSR=%#x)\n",
537 mmc_hostname(host->mmc), dma, dcsr);
538 host->data->error = -EIO;
539 pxamci_data_done(host, 0);
543 static irqreturn_t pxamci_detect_irq(int irq, void *devid)
545 struct pxamci_host *host = mmc_priv(devid);
547 mmc_detect_change(devid, host->pdata->detect_delay);
551 static int pxamci_probe(struct platform_device *pdev)
553 struct mmc_host *mmc;
554 struct pxamci_host *host = NULL;
555 struct resource *r, *dmarx, *dmatx;
556 int ret, irq, gpio_cd = -1, gpio_ro = -1, gpio_power = -1;
558 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
559 irq = platform_get_irq(pdev, 0);
563 r = request_mem_region(r->start, SZ_4K, DRIVER_NAME);
567 mmc = mmc_alloc_host(sizeof(struct pxamci_host), &pdev->dev);
573 mmc->ops = &pxamci_ops;
576 * We can do SG-DMA, but we don't because we never know how much
577 * data we successfully wrote to the card.
579 mmc->max_phys_segs = NR_SG;
582 * Our hardware DMA can handle a maximum of one page per SG entry.
584 mmc->max_seg_size = PAGE_SIZE;
587 * Block length register is only 10 bits before PXA27x.
589 mmc->max_blk_size = cpu_is_pxa25x() ? 1023 : 2048;
592 * Block count register is 16 bits.
594 mmc->max_blk_count = 65535;
596 host = mmc_priv(mmc);
599 host->pdata = pdev->dev.platform_data;
600 host->clkrt = CLKRT_OFF;
602 host->clk = clk_get(&pdev->dev, NULL);
603 if (IS_ERR(host->clk)) {
604 ret = PTR_ERR(host->clk);
609 host->clkrate = clk_get_rate(host->clk);
612 * Calculate minimum clock rate, rounding up.
614 mmc->f_min = (host->clkrate + 63) / 64;
615 mmc->f_max = (mmc_has_26MHz()) ? 26000000 : host->clkrate;
617 pxamci_init_ocr(host);
621 if (!cpu_is_pxa25x()) {
622 mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ;
623 host->cmdat |= CMDAT_SDIO_INT_EN;
625 mmc->caps |= MMC_CAP_MMC_HIGHSPEED |
626 MMC_CAP_SD_HIGHSPEED;
629 host->sg_cpu = dma_alloc_coherent(&pdev->dev, PAGE_SIZE, &host->sg_dma, GFP_KERNEL);
635 spin_lock_init(&host->lock);
638 host->imask = MMC_I_MASK_ALL;
640 host->base = ioremap(r->start, SZ_4K);
647 * Ensure that the host controller is shut down, and setup
650 pxamci_stop_clock(host);
651 writel(0, host->base + MMC_SPI);
652 writel(64, host->base + MMC_RESTO);
653 writel(host->imask, host->base + MMC_I_MASK);
655 host->dma = pxa_request_dma(DRIVER_NAME, DMA_PRIO_LOW,
656 pxamci_dma_irq, host);
662 ret = request_irq(host->irq, pxamci_irq, 0, DRIVER_NAME, host);
666 platform_set_drvdata(pdev, mmc);
668 dmarx = platform_get_resource(pdev, IORESOURCE_DMA, 0);
673 host->dma_drcmrrx = dmarx->start;
675 dmatx = platform_get_resource(pdev, IORESOURCE_DMA, 1);
680 host->dma_drcmrtx = dmatx->start;
683 gpio_cd = host->pdata->gpio_card_detect;
684 gpio_ro = host->pdata->gpio_card_ro;
685 gpio_power = host->pdata->gpio_power;
687 if (gpio_is_valid(gpio_power)) {
688 ret = gpio_request(gpio_power, "mmc card power");
690 dev_err(&pdev->dev, "Failed requesting gpio_power %d\n", gpio_power);
693 gpio_direction_output(gpio_power,
694 host->pdata->gpio_power_invert);
696 if (gpio_is_valid(gpio_ro)) {
697 ret = gpio_request(gpio_ro, "mmc card read only");
699 dev_err(&pdev->dev, "Failed requesting gpio_ro %d\n", gpio_ro);
702 gpio_direction_input(gpio_ro);
704 if (gpio_is_valid(gpio_cd)) {
705 ret = gpio_request(gpio_cd, "mmc card detect");
707 dev_err(&pdev->dev, "Failed requesting gpio_cd %d\n", gpio_cd);
710 gpio_direction_input(gpio_cd);
712 ret = request_irq(gpio_to_irq(gpio_cd), pxamci_detect_irq,
713 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
714 "mmc card detect", mmc);
716 dev_err(&pdev->dev, "failed to request card detect IRQ\n");
717 goto err_request_irq;
721 if (host->pdata && host->pdata->init)
722 host->pdata->init(&pdev->dev, pxamci_detect_irq, mmc);
724 if (gpio_is_valid(gpio_power) && host->pdata->setpower)
725 dev_warn(&pdev->dev, "gpio_power and setpower() both defined\n");
726 if (gpio_is_valid(gpio_ro) && host->pdata->get_ro)
727 dev_warn(&pdev->dev, "gpio_ro and get_ro() both defined\n");
738 gpio_free(gpio_power);
742 pxa_free_dma(host->dma);
746 dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma);
756 static int pxamci_remove(struct platform_device *pdev)
758 struct mmc_host *mmc = platform_get_drvdata(pdev);
759 int gpio_cd = -1, gpio_ro = -1, gpio_power = -1;
761 platform_set_drvdata(pdev, NULL);
764 struct pxamci_host *host = mmc_priv(mmc);
766 mmc_remove_host(mmc);
769 gpio_cd = host->pdata->gpio_card_detect;
770 gpio_ro = host->pdata->gpio_card_ro;
771 gpio_power = host->pdata->gpio_power;
773 if (gpio_is_valid(gpio_cd)) {
774 free_irq(gpio_to_irq(gpio_cd), mmc);
777 if (gpio_is_valid(gpio_ro))
779 if (gpio_is_valid(gpio_power))
780 gpio_free(gpio_power);
782 regulator_put(host->vcc);
784 if (host->pdata && host->pdata->exit)
785 host->pdata->exit(&pdev->dev, mmc);
787 pxamci_stop_clock(host);
788 writel(TXFIFO_WR_REQ|RXFIFO_RD_REQ|CLK_IS_OFF|STOP_CMD|
789 END_CMD_RES|PRG_DONE|DATA_TRAN_DONE,
790 host->base + MMC_I_MASK);
792 DRCMR(host->dma_drcmrrx) = 0;
793 DRCMR(host->dma_drcmrtx) = 0;
795 free_irq(host->irq, host);
796 pxa_free_dma(host->dma);
798 dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma);
802 release_resource(host->res);
810 static int pxamci_suspend(struct device *dev)
812 struct mmc_host *mmc = dev_get_drvdata(dev);
816 ret = mmc_suspend_host(mmc, PMSG_SUSPEND);
821 static int pxamci_resume(struct device *dev)
823 struct mmc_host *mmc = dev_get_drvdata(dev);
827 ret = mmc_resume_host(mmc);
832 static const struct dev_pm_ops pxamci_pm_ops = {
833 .suspend = pxamci_suspend,
834 .resume = pxamci_resume,
838 static struct platform_driver pxamci_driver = {
839 .probe = pxamci_probe,
840 .remove = pxamci_remove,
843 .owner = THIS_MODULE,
845 .pm = &pxamci_pm_ops,
850 static int __init pxamci_init(void)
852 return platform_driver_register(&pxamci_driver);
855 static void __exit pxamci_exit(void)
857 platform_driver_unregister(&pxamci_driver);
860 module_init(pxamci_init);
861 module_exit(pxamci_exit);
863 MODULE_DESCRIPTION("PXA Multimedia Card Interface Driver");
864 MODULE_LICENSE("GPL");
865 MODULE_ALIAS("platform:pxa2xx-mci");