2 * Atmel MultiMedia Card Interface driver
4 * Copyright (C) 2004-2008 Atmel Corporation
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 #include <linux/blkdev.h>
11 #include <linux/clk.h>
12 #include <linux/debugfs.h>
13 #include <linux/device.h>
14 #include <linux/dmaengine.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/err.h>
17 #include <linux/gpio.h>
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/ioport.h>
21 #include <linux/module.h>
22 #include <linux/platform_device.h>
23 #include <linux/scatterlist.h>
24 #include <linux/seq_file.h>
25 #include <linux/slab.h>
26 #include <linux/stat.h>
28 #include <linux/mmc/host.h>
30 #include <mach/atmel-mci.h>
31 #include <linux/atmel-mci.h>
34 #include <asm/unaligned.h>
37 #include <mach/board.h>
39 #include "atmel-mci-regs.h"
41 #define ATMCI_DATA_ERROR_FLAGS (MCI_DCRCE | MCI_DTOE | MCI_OVRE | MCI_UNRE)
42 #define ATMCI_DMA_THRESHOLD 16
45 EVENT_CMD_COMPLETE = 0,
51 enum atmel_mci_state {
60 struct atmel_mci_dma {
61 #ifdef CONFIG_MMC_ATMELMCI_DMA
62 struct dma_chan *chan;
63 struct dma_async_tx_descriptor *data_desc;
68 * struct atmel_mci - MMC controller state shared between all slots
69 * @lock: Spinlock protecting the queue and associated data.
70 * @regs: Pointer to MMIO registers.
71 * @sg: Scatterlist entry currently being processed by PIO code, if any.
72 * @pio_offset: Offset into the current scatterlist entry.
73 * @cur_slot: The slot which is currently using the controller.
74 * @mrq: The request currently being processed on @cur_slot,
75 * or NULL if the controller is idle.
76 * @cmd: The command currently being sent to the card, or NULL.
77 * @data: The data currently being transferred, or NULL if no data
78 * transfer is in progress.
79 * @dma: DMA client state.
80 * @data_chan: DMA channel being used for the current data transfer.
81 * @cmd_status: Snapshot of SR taken upon completion of the current
82 * command. Only valid when EVENT_CMD_COMPLETE is pending.
83 * @data_status: Snapshot of SR taken upon completion of the current
84 * data transfer. Only valid when EVENT_DATA_COMPLETE or
85 * EVENT_DATA_ERROR is pending.
86 * @stop_cmdr: Value to be loaded into CMDR when the stop command is
88 * @tasklet: Tasklet running the request state machine.
89 * @pending_events: Bitmask of events flagged by the interrupt handler
90 * to be processed by the tasklet.
91 * @completed_events: Bitmask of events which the state machine has
93 * @state: Tasklet state.
94 * @queue: List of slots waiting for access to the controller.
95 * @need_clock_update: Update the clock rate before the next request.
96 * @need_reset: Reset controller before next request.
97 * @mode_reg: Value of the MR register.
98 * @cfg_reg: Value of the CFG register.
99 * @bus_hz: The rate of @mck in Hz. This forms the basis for MMC bus
100 * rate and timeout calculations.
101 * @mapbase: Physical address of the MMIO registers.
102 * @mck: The peripheral bus clock hooked up to the MMC controller.
103 * @pdev: Platform device associated with the MMC controller.
104 * @slot: Slots sharing this MMC controller.
109 * @lock is a softirq-safe spinlock protecting @queue as well as
110 * @cur_slot, @mrq and @state. These must always be updated
111 * at the same time while holding @lock.
113 * @lock also protects mode_reg and need_clock_update since these are
114 * used to synchronize mode register updates with the queue
117 * The @mrq field of struct atmel_mci_slot is also protected by @lock,
118 * and must always be written at the same time as the slot is added to
121 * @pending_events and @completed_events are accessed using atomic bit
122 * operations, so they don't need any locking.
124 * None of the fields touched by the interrupt handler need any
125 * locking. However, ordering is important: Before EVENT_DATA_ERROR or
126 * EVENT_DATA_COMPLETE is set in @pending_events, all data-related
127 * interrupts must be disabled and @data_status updated with a
128 * snapshot of SR. Similarly, before EVENT_CMD_COMPLETE is set, the
129 * CMDRDY interupt must be disabled and @cmd_status updated with a
130 * snapshot of SR, and before EVENT_XFER_COMPLETE can be set, the
131 * bytes_xfered field of @data must be written. This is ensured by
138 struct scatterlist *sg;
139 unsigned int pio_offset;
141 struct atmel_mci_slot *cur_slot;
142 struct mmc_request *mrq;
143 struct mmc_command *cmd;
144 struct mmc_data *data;
146 struct atmel_mci_dma dma;
147 struct dma_chan *data_chan;
153 struct tasklet_struct tasklet;
154 unsigned long pending_events;
155 unsigned long completed_events;
156 enum atmel_mci_state state;
157 struct list_head queue;
159 bool need_clock_update;
163 unsigned long bus_hz;
164 unsigned long mapbase;
166 struct platform_device *pdev;
168 struct atmel_mci_slot *slot[ATMEL_MCI_MAX_NR_SLOTS];
172 * struct atmel_mci_slot - MMC slot state
173 * @mmc: The mmc_host representing this slot.
174 * @host: The MMC controller this slot is using.
175 * @sdc_reg: Value of SDCR to be written before using this slot.
176 * @mrq: mmc_request currently being processed or waiting to be
177 * processed, or NULL when the slot is idle.
178 * @queue_node: List node for placing this node in the @queue list of
180 * @clock: Clock rate configured by set_ios(). Protected by host->lock.
181 * @flags: Random state bits associated with the slot.
182 * @detect_pin: GPIO pin used for card detection, or negative if not
184 * @wp_pin: GPIO pin used for card write protect sending, or negative
186 * @detect_is_active_high: The state of the detect pin when it is active.
187 * @detect_timer: Timer used for debouncing @detect_pin interrupts.
189 struct atmel_mci_slot {
190 struct mmc_host *mmc;
191 struct atmel_mci *host;
195 struct mmc_request *mrq;
196 struct list_head queue_node;
200 #define ATMCI_CARD_PRESENT 0
201 #define ATMCI_CARD_NEED_INIT 1
202 #define ATMCI_SHUTDOWN 2
206 bool detect_is_active_high;
208 struct timer_list detect_timer;
211 #define atmci_test_and_clear_pending(host, event) \
212 test_and_clear_bit(event, &host->pending_events)
213 #define atmci_set_completed(host, event) \
214 set_bit(event, &host->completed_events)
215 #define atmci_set_pending(host, event) \
216 set_bit(event, &host->pending_events)
219 * Enable or disable features/registers based on
220 * whether the processor supports them
222 static bool mci_has_rwproof(void)
224 if (cpu_is_at91sam9261() || cpu_is_at91rm9200())
231 * The new MCI2 module isn't 100% compatible with the old MCI module,
232 * and it has a few nice features which we want to use...
234 static inline bool atmci_is_mci2(void)
236 if (cpu_is_at91sam9g45())
244 * The debugfs stuff below is mostly optimized away when
245 * CONFIG_DEBUG_FS is not set.
247 static int atmci_req_show(struct seq_file *s, void *v)
249 struct atmel_mci_slot *slot = s->private;
250 struct mmc_request *mrq;
251 struct mmc_command *cmd;
252 struct mmc_command *stop;
253 struct mmc_data *data;
255 /* Make sure we get a consistent snapshot */
256 spin_lock_bh(&slot->host->lock);
266 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
267 cmd->opcode, cmd->arg, cmd->flags,
268 cmd->resp[0], cmd->resp[1], cmd->resp[2],
269 cmd->resp[3], cmd->error);
271 seq_printf(s, "DATA %u / %u * %u flg %x err %d\n",
272 data->bytes_xfered, data->blocks,
273 data->blksz, data->flags, data->error);
276 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
277 stop->opcode, stop->arg, stop->flags,
278 stop->resp[0], stop->resp[1], stop->resp[2],
279 stop->resp[3], stop->error);
282 spin_unlock_bh(&slot->host->lock);
287 static int atmci_req_open(struct inode *inode, struct file *file)
289 return single_open(file, atmci_req_show, inode->i_private);
292 static const struct file_operations atmci_req_fops = {
293 .owner = THIS_MODULE,
294 .open = atmci_req_open,
297 .release = single_release,
300 static void atmci_show_status_reg(struct seq_file *s,
301 const char *regname, u32 value)
303 static const char *sr_bit[] = {
334 seq_printf(s, "%s:\t0x%08x", regname, value);
335 for (i = 0; i < ARRAY_SIZE(sr_bit); i++) {
336 if (value & (1 << i)) {
338 seq_printf(s, " %s", sr_bit[i]);
340 seq_puts(s, " UNKNOWN");
346 static int atmci_regs_show(struct seq_file *s, void *v)
348 struct atmel_mci *host = s->private;
351 buf = kmalloc(MCI_REGS_SIZE, GFP_KERNEL);
356 * Grab a more or less consistent snapshot. Note that we're
357 * not disabling interrupts, so IMR and SR may not be
360 spin_lock_bh(&host->lock);
361 clk_enable(host->mck);
362 memcpy_fromio(buf, host->regs, MCI_REGS_SIZE);
363 clk_disable(host->mck);
364 spin_unlock_bh(&host->lock);
366 seq_printf(s, "MR:\t0x%08x%s%s CLKDIV=%u\n",
368 buf[MCI_MR / 4] & MCI_MR_RDPROOF ? " RDPROOF" : "",
369 buf[MCI_MR / 4] & MCI_MR_WRPROOF ? " WRPROOF" : "",
370 buf[MCI_MR / 4] & 0xff);
371 seq_printf(s, "DTOR:\t0x%08x\n", buf[MCI_DTOR / 4]);
372 seq_printf(s, "SDCR:\t0x%08x\n", buf[MCI_SDCR / 4]);
373 seq_printf(s, "ARGR:\t0x%08x\n", buf[MCI_ARGR / 4]);
374 seq_printf(s, "BLKR:\t0x%08x BCNT=%u BLKLEN=%u\n",
376 buf[MCI_BLKR / 4] & 0xffff,
377 (buf[MCI_BLKR / 4] >> 16) & 0xffff);
379 seq_printf(s, "CSTOR:\t0x%08x\n", buf[MCI_CSTOR / 4]);
381 /* Don't read RSPR and RDR; it will consume the data there */
383 atmci_show_status_reg(s, "SR", buf[MCI_SR / 4]);
384 atmci_show_status_reg(s, "IMR", buf[MCI_IMR / 4]);
386 if (atmci_is_mci2()) {
389 val = buf[MCI_DMA / 4];
390 seq_printf(s, "DMA:\t0x%08x OFFSET=%u CHKSIZE=%u%s\n",
393 1 << (((val >> 4) & 3) + 1) : 1,
394 val & MCI_DMAEN ? " DMAEN" : "");
396 val = buf[MCI_CFG / 4];
397 seq_printf(s, "CFG:\t0x%08x%s%s%s%s\n",
399 val & MCI_CFG_FIFOMODE_1DATA ? " FIFOMODE_ONE_DATA" : "",
400 val & MCI_CFG_FERRCTRL_COR ? " FERRCTRL_CLEAR_ON_READ" : "",
401 val & MCI_CFG_HSMODE ? " HSMODE" : "",
402 val & MCI_CFG_LSYNC ? " LSYNC" : "");
410 static int atmci_regs_open(struct inode *inode, struct file *file)
412 return single_open(file, atmci_regs_show, inode->i_private);
415 static const struct file_operations atmci_regs_fops = {
416 .owner = THIS_MODULE,
417 .open = atmci_regs_open,
420 .release = single_release,
423 static void atmci_init_debugfs(struct atmel_mci_slot *slot)
425 struct mmc_host *mmc = slot->mmc;
426 struct atmel_mci *host = slot->host;
430 root = mmc->debugfs_root;
434 node = debugfs_create_file("regs", S_IRUSR, root, host,
441 node = debugfs_create_file("req", S_IRUSR, root, slot, &atmci_req_fops);
445 node = debugfs_create_u32("state", S_IRUSR, root, (u32 *)&host->state);
449 node = debugfs_create_x32("pending_events", S_IRUSR, root,
450 (u32 *)&host->pending_events);
454 node = debugfs_create_x32("completed_events", S_IRUSR, root,
455 (u32 *)&host->completed_events);
462 dev_err(&mmc->class_dev, "failed to initialize debugfs for slot\n");
465 static inline unsigned int ns_to_clocks(struct atmel_mci *host,
468 return (ns * (host->bus_hz / 1000000) + 999) / 1000;
471 static void atmci_set_timeout(struct atmel_mci *host,
472 struct atmel_mci_slot *slot, struct mmc_data *data)
474 static unsigned dtomul_to_shift[] = {
475 0, 4, 7, 8, 10, 12, 16, 20
481 timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks;
483 for (dtomul = 0; dtomul < 8; dtomul++) {
484 unsigned shift = dtomul_to_shift[dtomul];
485 dtocyc = (timeout + (1 << shift) - 1) >> shift;
495 dev_vdbg(&slot->mmc->class_dev, "setting timeout to %u cycles\n",
496 dtocyc << dtomul_to_shift[dtomul]);
497 mci_writel(host, DTOR, (MCI_DTOMUL(dtomul) | MCI_DTOCYC(dtocyc)));
501 * Return mask with command flags to be enabled for this command.
503 static u32 atmci_prepare_command(struct mmc_host *mmc,
504 struct mmc_command *cmd)
506 struct mmc_data *data;
509 cmd->error = -EINPROGRESS;
511 cmdr = MCI_CMDR_CMDNB(cmd->opcode);
513 if (cmd->flags & MMC_RSP_PRESENT) {
514 if (cmd->flags & MMC_RSP_136)
515 cmdr |= MCI_CMDR_RSPTYP_136BIT;
517 cmdr |= MCI_CMDR_RSPTYP_48BIT;
521 * This should really be MAXLAT_5 for CMD2 and ACMD41, but
522 * it's too difficult to determine whether this is an ACMD or
523 * not. Better make it 64.
525 cmdr |= MCI_CMDR_MAXLAT_64CYC;
527 if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN)
528 cmdr |= MCI_CMDR_OPDCMD;
532 cmdr |= MCI_CMDR_START_XFER;
533 if (data->flags & MMC_DATA_STREAM)
534 cmdr |= MCI_CMDR_STREAM;
535 else if (data->blocks > 1)
536 cmdr |= MCI_CMDR_MULTI_BLOCK;
538 cmdr |= MCI_CMDR_BLOCK;
540 if (data->flags & MMC_DATA_READ)
541 cmdr |= MCI_CMDR_TRDIR_READ;
547 static void atmci_start_command(struct atmel_mci *host,
548 struct mmc_command *cmd, u32 cmd_flags)
553 dev_vdbg(&host->pdev->dev,
554 "start command: ARGR=0x%08x CMDR=0x%08x\n",
555 cmd->arg, cmd_flags);
557 mci_writel(host, ARGR, cmd->arg);
558 mci_writel(host, CMDR, cmd_flags);
561 static void send_stop_cmd(struct atmel_mci *host, struct mmc_data *data)
563 atmci_start_command(host, data->stop, host->stop_cmdr);
564 mci_writel(host, IER, MCI_CMDRDY);
567 #ifdef CONFIG_MMC_ATMELMCI_DMA
568 static void atmci_dma_cleanup(struct atmel_mci *host)
570 struct mmc_data *data = host->data;
573 dma_unmap_sg(&host->pdev->dev, data->sg, data->sg_len,
574 ((data->flags & MMC_DATA_WRITE)
575 ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
578 static void atmci_stop_dma(struct atmel_mci *host)
580 struct dma_chan *chan = host->data_chan;
583 chan->device->device_control(chan, DMA_TERMINATE_ALL, 0);
584 atmci_dma_cleanup(host);
586 /* Data transfer was stopped by the interrupt handler */
587 atmci_set_pending(host, EVENT_XFER_COMPLETE);
588 mci_writel(host, IER, MCI_NOTBUSY);
592 /* This function is called by the DMA driver from tasklet context. */
593 static void atmci_dma_complete(void *arg)
595 struct atmel_mci *host = arg;
596 struct mmc_data *data = host->data;
598 dev_vdbg(&host->pdev->dev, "DMA complete\n");
601 /* Disable DMA hardware handshaking on MCI */
602 mci_writel(host, DMA, mci_readl(host, DMA) & ~MCI_DMAEN);
604 atmci_dma_cleanup(host);
607 * If the card was removed, data will be NULL. No point trying
608 * to send the stop command or waiting for NBUSY in this case.
611 atmci_set_pending(host, EVENT_XFER_COMPLETE);
612 tasklet_schedule(&host->tasklet);
615 * Regardless of what the documentation says, we have
616 * to wait for NOTBUSY even after block read
619 * When the DMA transfer is complete, the controller
620 * may still be reading the CRC from the card, i.e.
621 * the data transfer is still in progress and we
622 * haven't seen all the potential error bits yet.
624 * The interrupt handler will schedule a different
625 * tasklet to finish things up when the data transfer
626 * is completely done.
628 * We may not complete the mmc request here anyway
629 * because the mmc layer may call back and cause us to
630 * violate the "don't submit new operations from the
631 * completion callback" rule of the dma engine
634 mci_writel(host, IER, MCI_NOTBUSY);
639 atmci_prepare_data_dma(struct atmel_mci *host, struct mmc_data *data)
641 struct dma_chan *chan;
642 struct dma_async_tx_descriptor *desc;
643 struct scatterlist *sg;
645 enum dma_data_direction direction;
649 * We don't do DMA on "complex" transfers, i.e. with
650 * non-word-aligned buffers or lengths. Also, we don't bother
651 * with all the DMA setup overhead for short transfers.
653 if (data->blocks * data->blksz < ATMCI_DMA_THRESHOLD)
658 for_each_sg(data->sg, sg, data->sg_len, i) {
659 if (sg->offset & 3 || sg->length & 3)
663 /* If we don't have a channel, we can't do DMA */
664 chan = host->dma.chan;
666 host->data_chan = chan;
672 mci_writel(host, DMA, MCI_DMA_CHKSIZE(3) | MCI_DMAEN);
674 if (data->flags & MMC_DATA_READ)
675 direction = DMA_FROM_DEVICE;
677 direction = DMA_TO_DEVICE;
679 sglen = dma_map_sg(&host->pdev->dev, data->sg, data->sg_len, direction);
680 if (sglen != data->sg_len)
682 desc = chan->device->device_prep_slave_sg(chan,
683 data->sg, data->sg_len, direction,
684 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
688 host->dma.data_desc = desc;
689 desc->callback = atmci_dma_complete;
690 desc->callback_param = host;
694 dma_unmap_sg(&host->pdev->dev, data->sg, sglen, direction);
698 static void atmci_submit_data(struct atmel_mci *host)
700 struct dma_chan *chan = host->data_chan;
701 struct dma_async_tx_descriptor *desc = host->dma.data_desc;
704 desc->tx_submit(desc);
705 chan->device->device_issue_pending(chan);
709 #else /* CONFIG_MMC_ATMELMCI_DMA */
711 static int atmci_prepare_data_dma(struct atmel_mci *host, struct mmc_data *data)
716 static void atmci_submit_data(struct atmel_mci *host) {}
718 static void atmci_stop_dma(struct atmel_mci *host)
720 /* Data transfer was stopped by the interrupt handler */
721 atmci_set_pending(host, EVENT_XFER_COMPLETE);
722 mci_writel(host, IER, MCI_NOTBUSY);
725 #endif /* CONFIG_MMC_ATMELMCI_DMA */
728 * Returns a mask of interrupt flags to be enabled after the whole
729 * request has been prepared.
731 static u32 atmci_prepare_data(struct atmel_mci *host, struct mmc_data *data)
735 data->error = -EINPROGRESS;
741 iflags = ATMCI_DATA_ERROR_FLAGS;
742 if (atmci_prepare_data_dma(host, data)) {
743 host->data_chan = NULL;
746 * Errata: MMC data write operation with less than 12
747 * bytes is impossible.
749 * Errata: MCI Transmit Data Register (TDR) FIFO
750 * corruption when length is not multiple of 4.
752 if (data->blocks * data->blksz < 12
753 || (data->blocks * data->blksz) & 3)
754 host->need_reset = true;
757 host->pio_offset = 0;
758 if (data->flags & MMC_DATA_READ)
767 static void atmci_start_request(struct atmel_mci *host,
768 struct atmel_mci_slot *slot)
770 struct mmc_request *mrq;
771 struct mmc_command *cmd;
772 struct mmc_data *data;
777 host->cur_slot = slot;
780 host->pending_events = 0;
781 host->completed_events = 0;
782 host->data_status = 0;
784 if (host->need_reset) {
785 mci_writel(host, CR, MCI_CR_SWRST);
786 mci_writel(host, CR, MCI_CR_MCIEN);
787 mci_writel(host, MR, host->mode_reg);
789 mci_writel(host, CFG, host->cfg_reg);
790 host->need_reset = false;
792 mci_writel(host, SDCR, slot->sdc_reg);
794 iflags = mci_readl(host, IMR);
796 dev_warn(&slot->mmc->class_dev, "WARNING: IMR=0x%08x\n",
799 if (unlikely(test_and_clear_bit(ATMCI_CARD_NEED_INIT, &slot->flags))) {
800 /* Send init sequence (74 clock cycles) */
801 mci_writel(host, CMDR, MCI_CMDR_SPCMD_INIT);
802 while (!(mci_readl(host, SR) & MCI_CMDRDY))
808 atmci_set_timeout(host, slot, data);
810 /* Must set block count/size before sending command */
811 mci_writel(host, BLKR, MCI_BCNT(data->blocks)
812 | MCI_BLKLEN(data->blksz));
813 dev_vdbg(&slot->mmc->class_dev, "BLKR=0x%08x\n",
814 MCI_BCNT(data->blocks) | MCI_BLKLEN(data->blksz));
816 iflags |= atmci_prepare_data(host, data);
819 iflags |= MCI_CMDRDY;
821 cmdflags = atmci_prepare_command(slot->mmc, cmd);
822 atmci_start_command(host, cmd, cmdflags);
825 atmci_submit_data(host);
828 host->stop_cmdr = atmci_prepare_command(slot->mmc, mrq->stop);
829 host->stop_cmdr |= MCI_CMDR_STOP_XFER;
830 if (!(data->flags & MMC_DATA_WRITE))
831 host->stop_cmdr |= MCI_CMDR_TRDIR_READ;
832 if (data->flags & MMC_DATA_STREAM)
833 host->stop_cmdr |= MCI_CMDR_STREAM;
835 host->stop_cmdr |= MCI_CMDR_MULTI_BLOCK;
839 * We could have enabled interrupts earlier, but I suspect
840 * that would open up a nice can of interesting race
841 * conditions (e.g. command and data complete, but stop not
844 mci_writel(host, IER, iflags);
847 static void atmci_queue_request(struct atmel_mci *host,
848 struct atmel_mci_slot *slot, struct mmc_request *mrq)
850 dev_vdbg(&slot->mmc->class_dev, "queue request: state=%d\n",
853 spin_lock_bh(&host->lock);
855 if (host->state == STATE_IDLE) {
856 host->state = STATE_SENDING_CMD;
857 atmci_start_request(host, slot);
859 list_add_tail(&slot->queue_node, &host->queue);
861 spin_unlock_bh(&host->lock);
864 static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
866 struct atmel_mci_slot *slot = mmc_priv(mmc);
867 struct atmel_mci *host = slot->host;
868 struct mmc_data *data;
873 * We may "know" the card is gone even though there's still an
874 * electrical connection. If so, we really need to communicate
875 * this to the MMC core since there won't be any more
876 * interrupts as the card is completely removed. Otherwise,
877 * the MMC core might believe the card is still there even
878 * though the card was just removed very slowly.
880 if (!test_bit(ATMCI_CARD_PRESENT, &slot->flags)) {
881 mrq->cmd->error = -ENOMEDIUM;
882 mmc_request_done(mmc, mrq);
886 /* We don't support multiple blocks of weird lengths. */
888 if (data && data->blocks > 1 && data->blksz & 3) {
889 mrq->cmd->error = -EINVAL;
890 mmc_request_done(mmc, mrq);
893 atmci_queue_request(host, slot, mrq);
896 static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
898 struct atmel_mci_slot *slot = mmc_priv(mmc);
899 struct atmel_mci *host = slot->host;
902 slot->sdc_reg &= ~MCI_SDCBUS_MASK;
903 switch (ios->bus_width) {
904 case MMC_BUS_WIDTH_1:
905 slot->sdc_reg |= MCI_SDCBUS_1BIT;
907 case MMC_BUS_WIDTH_4:
908 slot->sdc_reg |= MCI_SDCBUS_4BIT;
913 unsigned int clock_min = ~0U;
916 spin_lock_bh(&host->lock);
917 if (!host->mode_reg) {
918 clk_enable(host->mck);
919 mci_writel(host, CR, MCI_CR_SWRST);
920 mci_writel(host, CR, MCI_CR_MCIEN);
922 mci_writel(host, CFG, host->cfg_reg);
926 * Use mirror of ios->clock to prevent race with mmc
927 * core ios update when finding the minimum.
929 slot->clock = ios->clock;
930 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
931 if (host->slot[i] && host->slot[i]->clock
932 && host->slot[i]->clock < clock_min)
933 clock_min = host->slot[i]->clock;
936 /* Calculate clock divider */
937 clkdiv = DIV_ROUND_UP(host->bus_hz, 2 * clock_min) - 1;
939 dev_warn(&mmc->class_dev,
940 "clock %u too slow; using %lu\n",
941 clock_min, host->bus_hz / (2 * 256));
945 host->mode_reg = MCI_MR_CLKDIV(clkdiv);
948 * WRPROOF and RDPROOF prevent overruns/underruns by
949 * stopping the clock when the FIFO is full/empty.
950 * This state is not expected to last for long.
952 if (mci_has_rwproof())
953 host->mode_reg |= (MCI_MR_WRPROOF | MCI_MR_RDPROOF);
955 if (atmci_is_mci2()) {
956 /* setup High Speed mode in relation with card capacity */
957 if (ios->timing == MMC_TIMING_SD_HS)
958 host->cfg_reg |= MCI_CFG_HSMODE;
960 host->cfg_reg &= ~MCI_CFG_HSMODE;
963 if (list_empty(&host->queue)) {
964 mci_writel(host, MR, host->mode_reg);
966 mci_writel(host, CFG, host->cfg_reg);
968 host->need_clock_update = true;
971 spin_unlock_bh(&host->lock);
973 bool any_slot_active = false;
975 spin_lock_bh(&host->lock);
977 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
978 if (host->slot[i] && host->slot[i]->clock) {
979 any_slot_active = true;
983 if (!any_slot_active) {
984 mci_writel(host, CR, MCI_CR_MCIDIS);
985 if (host->mode_reg) {
987 clk_disable(host->mck);
991 spin_unlock_bh(&host->lock);
994 switch (ios->power_mode) {
996 set_bit(ATMCI_CARD_NEED_INIT, &slot->flags);
1000 * TODO: None of the currently available AVR32-based
1001 * boards allow MMC power to be turned off. Implement
1002 * power control when this can be tested properly.
1004 * We also need to hook this into the clock management
1005 * somehow so that newly inserted cards aren't
1006 * subjected to a fast clock before we have a chance
1007 * to figure out what the maximum rate is. Currently,
1008 * there's no way to avoid this, and there never will
1009 * be for boards that don't support power control.
1015 static int atmci_get_ro(struct mmc_host *mmc)
1017 int read_only = -ENOSYS;
1018 struct atmel_mci_slot *slot = mmc_priv(mmc);
1020 if (gpio_is_valid(slot->wp_pin)) {
1021 read_only = gpio_get_value(slot->wp_pin);
1022 dev_dbg(&mmc->class_dev, "card is %s\n",
1023 read_only ? "read-only" : "read-write");
1029 static int atmci_get_cd(struct mmc_host *mmc)
1031 int present = -ENOSYS;
1032 struct atmel_mci_slot *slot = mmc_priv(mmc);
1034 if (gpio_is_valid(slot->detect_pin)) {
1035 present = !(gpio_get_value(slot->detect_pin) ^
1036 slot->detect_is_active_high);
1037 dev_dbg(&mmc->class_dev, "card is %spresent\n",
1038 present ? "" : "not ");
1044 static const struct mmc_host_ops atmci_ops = {
1045 .request = atmci_request,
1046 .set_ios = atmci_set_ios,
1047 .get_ro = atmci_get_ro,
1048 .get_cd = atmci_get_cd,
1051 /* Called with host->lock held */
1052 static void atmci_request_end(struct atmel_mci *host, struct mmc_request *mrq)
1053 __releases(&host->lock)
1054 __acquires(&host->lock)
1056 struct atmel_mci_slot *slot = NULL;
1057 struct mmc_host *prev_mmc = host->cur_slot->mmc;
1059 WARN_ON(host->cmd || host->data);
1062 * Update the MMC clock rate if necessary. This may be
1063 * necessary if set_ios() is called when a different slot is
1064 * busy transfering data.
1066 if (host->need_clock_update) {
1067 mci_writel(host, MR, host->mode_reg);
1068 if (atmci_is_mci2())
1069 mci_writel(host, CFG, host->cfg_reg);
1072 host->cur_slot->mrq = NULL;
1074 if (!list_empty(&host->queue)) {
1075 slot = list_entry(host->queue.next,
1076 struct atmel_mci_slot, queue_node);
1077 list_del(&slot->queue_node);
1078 dev_vdbg(&host->pdev->dev, "list not empty: %s is next\n",
1079 mmc_hostname(slot->mmc));
1080 host->state = STATE_SENDING_CMD;
1081 atmci_start_request(host, slot);
1083 dev_vdbg(&host->pdev->dev, "list empty\n");
1084 host->state = STATE_IDLE;
1087 spin_unlock(&host->lock);
1088 mmc_request_done(prev_mmc, mrq);
1089 spin_lock(&host->lock);
1092 static void atmci_command_complete(struct atmel_mci *host,
1093 struct mmc_command *cmd)
1095 u32 status = host->cmd_status;
1097 /* Read the response from the card (up to 16 bytes) */
1098 cmd->resp[0] = mci_readl(host, RSPR);
1099 cmd->resp[1] = mci_readl(host, RSPR);
1100 cmd->resp[2] = mci_readl(host, RSPR);
1101 cmd->resp[3] = mci_readl(host, RSPR);
1103 if (status & MCI_RTOE)
1104 cmd->error = -ETIMEDOUT;
1105 else if ((cmd->flags & MMC_RSP_CRC) && (status & MCI_RCRCE))
1106 cmd->error = -EILSEQ;
1107 else if (status & (MCI_RINDE | MCI_RDIRE | MCI_RENDE))
1113 dev_dbg(&host->pdev->dev,
1114 "command error: status=0x%08x\n", status);
1117 atmci_stop_dma(host);
1119 mci_writel(host, IDR, MCI_NOTBUSY
1120 | MCI_TXRDY | MCI_RXRDY
1121 | ATMCI_DATA_ERROR_FLAGS);
1126 static void atmci_detect_change(unsigned long data)
1128 struct atmel_mci_slot *slot = (struct atmel_mci_slot *)data;
1133 * atmci_cleanup_slot() sets the ATMCI_SHUTDOWN flag before
1134 * freeing the interrupt. We must not re-enable the interrupt
1135 * if it has been freed, and if we're shutting down, it
1136 * doesn't really matter whether the card is present or not.
1139 if (test_bit(ATMCI_SHUTDOWN, &slot->flags))
1142 enable_irq(gpio_to_irq(slot->detect_pin));
1143 present = !(gpio_get_value(slot->detect_pin) ^
1144 slot->detect_is_active_high);
1145 present_old = test_bit(ATMCI_CARD_PRESENT, &slot->flags);
1147 dev_vdbg(&slot->mmc->class_dev, "detect change: %d (was %d)\n",
1148 present, present_old);
1150 if (present != present_old) {
1151 struct atmel_mci *host = slot->host;
1152 struct mmc_request *mrq;
1154 dev_dbg(&slot->mmc->class_dev, "card %s\n",
1155 present ? "inserted" : "removed");
1157 spin_lock(&host->lock);
1160 clear_bit(ATMCI_CARD_PRESENT, &slot->flags);
1162 set_bit(ATMCI_CARD_PRESENT, &slot->flags);
1164 /* Clean up queue if present */
1167 if (mrq == host->mrq) {
1169 * Reset controller to terminate any ongoing
1170 * commands or data transfers.
1172 mci_writel(host, CR, MCI_CR_SWRST);
1173 mci_writel(host, CR, MCI_CR_MCIEN);
1174 mci_writel(host, MR, host->mode_reg);
1175 if (atmci_is_mci2())
1176 mci_writel(host, CFG, host->cfg_reg);
1181 switch (host->state) {
1184 case STATE_SENDING_CMD:
1185 mrq->cmd->error = -ENOMEDIUM;
1189 case STATE_SENDING_DATA:
1190 mrq->data->error = -ENOMEDIUM;
1191 atmci_stop_dma(host);
1193 case STATE_DATA_BUSY:
1194 case STATE_DATA_ERROR:
1195 if (mrq->data->error == -EINPROGRESS)
1196 mrq->data->error = -ENOMEDIUM;
1200 case STATE_SENDING_STOP:
1201 mrq->stop->error = -ENOMEDIUM;
1205 atmci_request_end(host, mrq);
1207 list_del(&slot->queue_node);
1208 mrq->cmd->error = -ENOMEDIUM;
1210 mrq->data->error = -ENOMEDIUM;
1212 mrq->stop->error = -ENOMEDIUM;
1214 spin_unlock(&host->lock);
1215 mmc_request_done(slot->mmc, mrq);
1216 spin_lock(&host->lock);
1219 spin_unlock(&host->lock);
1221 mmc_detect_change(slot->mmc, 0);
1225 static void atmci_tasklet_func(unsigned long priv)
1227 struct atmel_mci *host = (struct atmel_mci *)priv;
1228 struct mmc_request *mrq = host->mrq;
1229 struct mmc_data *data = host->data;
1230 struct mmc_command *cmd = host->cmd;
1231 enum atmel_mci_state state = host->state;
1232 enum atmel_mci_state prev_state;
1235 spin_lock(&host->lock);
1237 state = host->state;
1239 dev_vdbg(&host->pdev->dev,
1240 "tasklet: state %u pending/completed/mask %lx/%lx/%x\n",
1241 state, host->pending_events, host->completed_events,
1242 mci_readl(host, IMR));
1251 case STATE_SENDING_CMD:
1252 if (!atmci_test_and_clear_pending(host,
1253 EVENT_CMD_COMPLETE))
1257 atmci_set_completed(host, EVENT_CMD_COMPLETE);
1258 atmci_command_complete(host, mrq->cmd);
1259 if (!mrq->data || cmd->error) {
1260 atmci_request_end(host, host->mrq);
1264 prev_state = state = STATE_SENDING_DATA;
1267 case STATE_SENDING_DATA:
1268 if (atmci_test_and_clear_pending(host,
1269 EVENT_DATA_ERROR)) {
1270 atmci_stop_dma(host);
1272 send_stop_cmd(host, data);
1273 state = STATE_DATA_ERROR;
1277 if (!atmci_test_and_clear_pending(host,
1278 EVENT_XFER_COMPLETE))
1281 atmci_set_completed(host, EVENT_XFER_COMPLETE);
1282 prev_state = state = STATE_DATA_BUSY;
1285 case STATE_DATA_BUSY:
1286 if (!atmci_test_and_clear_pending(host,
1287 EVENT_DATA_COMPLETE))
1291 atmci_set_completed(host, EVENT_DATA_COMPLETE);
1292 status = host->data_status;
1293 if (unlikely(status & ATMCI_DATA_ERROR_FLAGS)) {
1294 if (status & MCI_DTOE) {
1295 dev_dbg(&host->pdev->dev,
1296 "data timeout error\n");
1297 data->error = -ETIMEDOUT;
1298 } else if (status & MCI_DCRCE) {
1299 dev_dbg(&host->pdev->dev,
1300 "data CRC error\n");
1301 data->error = -EILSEQ;
1303 dev_dbg(&host->pdev->dev,
1304 "data FIFO error (status=%08x)\n",
1309 data->bytes_xfered = data->blocks * data->blksz;
1311 mci_writel(host, IDR, ATMCI_DATA_ERROR_FLAGS);
1315 atmci_request_end(host, host->mrq);
1319 prev_state = state = STATE_SENDING_STOP;
1321 send_stop_cmd(host, data);
1324 case STATE_SENDING_STOP:
1325 if (!atmci_test_and_clear_pending(host,
1326 EVENT_CMD_COMPLETE))
1330 atmci_command_complete(host, mrq->stop);
1331 atmci_request_end(host, host->mrq);
1334 case STATE_DATA_ERROR:
1335 if (!atmci_test_and_clear_pending(host,
1336 EVENT_XFER_COMPLETE))
1339 state = STATE_DATA_BUSY;
1342 } while (state != prev_state);
1344 host->state = state;
1347 spin_unlock(&host->lock);
1350 static void atmci_read_data_pio(struct atmel_mci *host)
1352 struct scatterlist *sg = host->sg;
1353 void *buf = sg_virt(sg);
1354 unsigned int offset = host->pio_offset;
1355 struct mmc_data *data = host->data;
1358 unsigned int nbytes = 0;
1361 value = mci_readl(host, RDR);
1362 if (likely(offset + 4 <= sg->length)) {
1363 put_unaligned(value, (u32 *)(buf + offset));
1368 if (offset == sg->length) {
1369 flush_dcache_page(sg_page(sg));
1370 host->sg = sg = sg_next(sg);
1378 unsigned int remaining = sg->length - offset;
1379 memcpy(buf + offset, &value, remaining);
1380 nbytes += remaining;
1382 flush_dcache_page(sg_page(sg));
1383 host->sg = sg = sg_next(sg);
1387 offset = 4 - remaining;
1389 memcpy(buf, (u8 *)&value + remaining, offset);
1393 status = mci_readl(host, SR);
1394 if (status & ATMCI_DATA_ERROR_FLAGS) {
1395 mci_writel(host, IDR, (MCI_NOTBUSY | MCI_RXRDY
1396 | ATMCI_DATA_ERROR_FLAGS));
1397 host->data_status = status;
1398 data->bytes_xfered += nbytes;
1400 atmci_set_pending(host, EVENT_DATA_ERROR);
1401 tasklet_schedule(&host->tasklet);
1404 } while (status & MCI_RXRDY);
1406 host->pio_offset = offset;
1407 data->bytes_xfered += nbytes;
1412 mci_writel(host, IDR, MCI_RXRDY);
1413 mci_writel(host, IER, MCI_NOTBUSY);
1414 data->bytes_xfered += nbytes;
1416 atmci_set_pending(host, EVENT_XFER_COMPLETE);
1419 static void atmci_write_data_pio(struct atmel_mci *host)
1421 struct scatterlist *sg = host->sg;
1422 void *buf = sg_virt(sg);
1423 unsigned int offset = host->pio_offset;
1424 struct mmc_data *data = host->data;
1427 unsigned int nbytes = 0;
1430 if (likely(offset + 4 <= sg->length)) {
1431 value = get_unaligned((u32 *)(buf + offset));
1432 mci_writel(host, TDR, value);
1436 if (offset == sg->length) {
1437 host->sg = sg = sg_next(sg);
1445 unsigned int remaining = sg->length - offset;
1448 memcpy(&value, buf + offset, remaining);
1449 nbytes += remaining;
1451 host->sg = sg = sg_next(sg);
1453 mci_writel(host, TDR, value);
1457 offset = 4 - remaining;
1459 memcpy((u8 *)&value + remaining, buf, offset);
1460 mci_writel(host, TDR, value);
1464 status = mci_readl(host, SR);
1465 if (status & ATMCI_DATA_ERROR_FLAGS) {
1466 mci_writel(host, IDR, (MCI_NOTBUSY | MCI_TXRDY
1467 | ATMCI_DATA_ERROR_FLAGS));
1468 host->data_status = status;
1469 data->bytes_xfered += nbytes;
1471 atmci_set_pending(host, EVENT_DATA_ERROR);
1472 tasklet_schedule(&host->tasklet);
1475 } while (status & MCI_TXRDY);
1477 host->pio_offset = offset;
1478 data->bytes_xfered += nbytes;
1483 mci_writel(host, IDR, MCI_TXRDY);
1484 mci_writel(host, IER, MCI_NOTBUSY);
1485 data->bytes_xfered += nbytes;
1487 atmci_set_pending(host, EVENT_XFER_COMPLETE);
1490 static void atmci_cmd_interrupt(struct atmel_mci *host, u32 status)
1492 mci_writel(host, IDR, MCI_CMDRDY);
1494 host->cmd_status = status;
1496 atmci_set_pending(host, EVENT_CMD_COMPLETE);
1497 tasklet_schedule(&host->tasklet);
1500 static irqreturn_t atmci_interrupt(int irq, void *dev_id)
1502 struct atmel_mci *host = dev_id;
1503 u32 status, mask, pending;
1504 unsigned int pass_count = 0;
1507 status = mci_readl(host, SR);
1508 mask = mci_readl(host, IMR);
1509 pending = status & mask;
1513 if (pending & ATMCI_DATA_ERROR_FLAGS) {
1514 mci_writel(host, IDR, ATMCI_DATA_ERROR_FLAGS
1515 | MCI_RXRDY | MCI_TXRDY);
1516 pending &= mci_readl(host, IMR);
1518 host->data_status = status;
1520 atmci_set_pending(host, EVENT_DATA_ERROR);
1521 tasklet_schedule(&host->tasklet);
1523 if (pending & MCI_NOTBUSY) {
1524 mci_writel(host, IDR,
1525 ATMCI_DATA_ERROR_FLAGS | MCI_NOTBUSY);
1526 if (!host->data_status)
1527 host->data_status = status;
1529 atmci_set_pending(host, EVENT_DATA_COMPLETE);
1530 tasklet_schedule(&host->tasklet);
1532 if (pending & MCI_RXRDY)
1533 atmci_read_data_pio(host);
1534 if (pending & MCI_TXRDY)
1535 atmci_write_data_pio(host);
1537 if (pending & MCI_CMDRDY)
1538 atmci_cmd_interrupt(host, status);
1539 } while (pass_count++ < 5);
1541 return pass_count ? IRQ_HANDLED : IRQ_NONE;
1544 static irqreturn_t atmci_detect_interrupt(int irq, void *dev_id)
1546 struct atmel_mci_slot *slot = dev_id;
1549 * Disable interrupts until the pin has stabilized and check
1550 * the state then. Use mod_timer() since we may be in the
1551 * middle of the timer routine when this interrupt triggers.
1553 disable_irq_nosync(irq);
1554 mod_timer(&slot->detect_timer, jiffies + msecs_to_jiffies(20));
1559 static int __init atmci_init_slot(struct atmel_mci *host,
1560 struct mci_slot_pdata *slot_data, unsigned int id,
1563 struct mmc_host *mmc;
1564 struct atmel_mci_slot *slot;
1566 mmc = mmc_alloc_host(sizeof(struct atmel_mci_slot), &host->pdev->dev);
1570 slot = mmc_priv(mmc);
1573 slot->detect_pin = slot_data->detect_pin;
1574 slot->wp_pin = slot_data->wp_pin;
1575 slot->detect_is_active_high = slot_data->detect_is_active_high;
1576 slot->sdc_reg = sdc_reg;
1578 mmc->ops = &atmci_ops;
1579 mmc->f_min = DIV_ROUND_UP(host->bus_hz, 512);
1580 mmc->f_max = host->bus_hz / 2;
1581 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
1582 if (atmci_is_mci2())
1583 mmc->caps |= MMC_CAP_SD_HIGHSPEED;
1584 if (slot_data->bus_width >= 4)
1585 mmc->caps |= MMC_CAP_4_BIT_DATA;
1587 mmc->max_hw_segs = 64;
1588 mmc->max_phys_segs = 64;
1589 mmc->max_req_size = 32768 * 512;
1590 mmc->max_blk_size = 32768;
1591 mmc->max_blk_count = 512;
1593 /* Assume card is present initially */
1594 set_bit(ATMCI_CARD_PRESENT, &slot->flags);
1595 if (gpio_is_valid(slot->detect_pin)) {
1596 if (gpio_request(slot->detect_pin, "mmc_detect")) {
1597 dev_dbg(&mmc->class_dev, "no detect pin available\n");
1598 slot->detect_pin = -EBUSY;
1599 } else if (gpio_get_value(slot->detect_pin) ^
1600 slot->detect_is_active_high) {
1601 clear_bit(ATMCI_CARD_PRESENT, &slot->flags);
1605 if (!gpio_is_valid(slot->detect_pin))
1606 mmc->caps |= MMC_CAP_NEEDS_POLL;
1608 if (gpio_is_valid(slot->wp_pin)) {
1609 if (gpio_request(slot->wp_pin, "mmc_wp")) {
1610 dev_dbg(&mmc->class_dev, "no WP pin available\n");
1611 slot->wp_pin = -EBUSY;
1615 host->slot[id] = slot;
1618 if (gpio_is_valid(slot->detect_pin)) {
1621 setup_timer(&slot->detect_timer, atmci_detect_change,
1622 (unsigned long)slot);
1624 ret = request_irq(gpio_to_irq(slot->detect_pin),
1625 atmci_detect_interrupt,
1626 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
1627 "mmc-detect", slot);
1629 dev_dbg(&mmc->class_dev,
1630 "could not request IRQ %d for detect pin\n",
1631 gpio_to_irq(slot->detect_pin));
1632 gpio_free(slot->detect_pin);
1633 slot->detect_pin = -EBUSY;
1637 atmci_init_debugfs(slot);
1642 static void __exit atmci_cleanup_slot(struct atmel_mci_slot *slot,
1645 /* Debugfs stuff is cleaned up by mmc core */
1647 set_bit(ATMCI_SHUTDOWN, &slot->flags);
1650 mmc_remove_host(slot->mmc);
1652 if (gpio_is_valid(slot->detect_pin)) {
1653 int pin = slot->detect_pin;
1655 free_irq(gpio_to_irq(pin), slot);
1656 del_timer_sync(&slot->detect_timer);
1659 if (gpio_is_valid(slot->wp_pin))
1660 gpio_free(slot->wp_pin);
1662 slot->host->slot[id] = NULL;
1663 mmc_free_host(slot->mmc);
1666 #ifdef CONFIG_MMC_ATMELMCI_DMA
1667 static bool filter(struct dma_chan *chan, void *slave)
1669 struct mci_dma_data *sl = slave;
1671 if (sl && find_slave_dev(sl) == chan->device->dev) {
1672 chan->private = slave_data_ptr(sl);
1679 static void atmci_configure_dma(struct atmel_mci *host)
1681 struct mci_platform_data *pdata;
1686 pdata = host->pdev->dev.platform_data;
1688 if (pdata && find_slave_dev(pdata->dma_slave)) {
1689 dma_cap_mask_t mask;
1691 setup_dma_addr(pdata->dma_slave,
1692 host->mapbase + MCI_TDR,
1693 host->mapbase + MCI_RDR);
1695 /* Try to grab a DMA channel */
1697 dma_cap_set(DMA_SLAVE, mask);
1699 dma_request_channel(mask, filter, pdata->dma_slave);
1701 if (!host->dma.chan)
1702 dev_notice(&host->pdev->dev, "DMA not available, using PIO\n");
1704 dev_info(&host->pdev->dev,
1705 "Using %s for DMA transfers\n",
1706 dma_chan_name(host->dma.chan));
1709 static void atmci_configure_dma(struct atmel_mci *host) {}
1712 static int __init atmci_probe(struct platform_device *pdev)
1714 struct mci_platform_data *pdata;
1715 struct atmel_mci *host;
1716 struct resource *regs;
1717 unsigned int nr_slots;
1721 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1724 pdata = pdev->dev.platform_data;
1727 irq = platform_get_irq(pdev, 0);
1731 host = kzalloc(sizeof(struct atmel_mci), GFP_KERNEL);
1736 spin_lock_init(&host->lock);
1737 INIT_LIST_HEAD(&host->queue);
1739 host->mck = clk_get(&pdev->dev, "mci_clk");
1740 if (IS_ERR(host->mck)) {
1741 ret = PTR_ERR(host->mck);
1746 host->regs = ioremap(regs->start, regs->end - regs->start + 1);
1750 clk_enable(host->mck);
1751 mci_writel(host, CR, MCI_CR_SWRST);
1752 host->bus_hz = clk_get_rate(host->mck);
1753 clk_disable(host->mck);
1755 host->mapbase = regs->start;
1757 tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)host);
1759 ret = request_irq(irq, atmci_interrupt, 0, dev_name(&pdev->dev), host);
1761 goto err_request_irq;
1763 atmci_configure_dma(host);
1765 platform_set_drvdata(pdev, host);
1767 /* We need at least one slot to succeed */
1770 if (pdata->slot[0].bus_width) {
1771 ret = atmci_init_slot(host, &pdata->slot[0],
1772 0, MCI_SDCSEL_SLOT_A);
1776 if (pdata->slot[1].bus_width) {
1777 ret = atmci_init_slot(host, &pdata->slot[1],
1778 1, MCI_SDCSEL_SLOT_B);
1784 dev_err(&pdev->dev, "init failed: no slot defined\n");
1788 dev_info(&pdev->dev,
1789 "Atmel MCI controller at 0x%08lx irq %d, %u slots\n",
1790 host->mapbase, irq, nr_slots);
1795 #ifdef CONFIG_MMC_ATMELMCI_DMA
1797 dma_release_channel(host->dma.chan);
1799 free_irq(irq, host);
1801 iounmap(host->regs);
1809 static int __exit atmci_remove(struct platform_device *pdev)
1811 struct atmel_mci *host = platform_get_drvdata(pdev);
1814 platform_set_drvdata(pdev, NULL);
1816 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
1818 atmci_cleanup_slot(host->slot[i], i);
1821 clk_enable(host->mck);
1822 mci_writel(host, IDR, ~0UL);
1823 mci_writel(host, CR, MCI_CR_MCIDIS);
1824 mci_readl(host, SR);
1825 clk_disable(host->mck);
1827 #ifdef CONFIG_MMC_ATMELMCI_DMA
1829 dma_release_channel(host->dma.chan);
1832 free_irq(platform_get_irq(pdev, 0), host);
1833 iounmap(host->regs);
1841 static struct platform_driver atmci_driver = {
1842 .remove = __exit_p(atmci_remove),
1844 .name = "atmel_mci",
1848 static int __init atmci_init(void)
1850 return platform_driver_probe(&atmci_driver, atmci_probe);
1853 static void __exit atmci_exit(void)
1855 platform_driver_unregister(&atmci_driver);
1858 late_initcall(atmci_init); /* try to load after dma driver when built-in */
1859 module_exit(atmci_exit);
1861 MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
1862 MODULE_AUTHOR("Haavard Skinnemoen <haavard.skinnemoen@atmel.com>");
1863 MODULE_LICENSE("GPL v2");