2 * SN Platform GRU Driver
4 * FAULT HANDLER FOR GRU DETECTED TLB MISSES
6 * This file contains code that handles TLB misses within the GRU.
7 * These misses are reported either via interrupts or user polling of
10 * Copyright (c) 2008 Silicon Graphics, Inc. All Rights Reserved.
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
27 #include <linux/kernel.h>
28 #include <linux/errno.h>
29 #include <linux/spinlock.h>
31 #include <linux/hugetlb.h>
32 #include <linux/device.h>
34 #include <linux/uaccess.h>
35 #include <linux/security.h>
36 #include <asm/pgtable.h>
38 #include "grutables.h"
40 #include "gru_instructions.h"
41 #include <asm/uv/uv_hub.h>
43 /* Return codes for vtop functions */
44 #define VTOP_SUCCESS 0
45 #define VTOP_INVALID -1
50 * Test if a physical address is a valid GRU GSEG address
52 static inline int is_gru_paddr(unsigned long paddr)
54 return paddr >= gru_start_paddr && paddr < gru_end_paddr;
58 * Find the vma of a GRU segment. Caller must hold mmap_sem.
60 struct vm_area_struct *gru_find_vma(unsigned long vaddr)
62 struct vm_area_struct *vma;
64 vma = find_vma(current->mm, vaddr);
65 if (vma && vma->vm_start <= vaddr && vma->vm_ops == &gru_vm_ops)
71 * Find and lock the gts that contains the specified user vaddr.
74 * - *gts with the mmap_sem locked for read and the GTS locked.
75 * - NULL if vaddr invalid OR is not a valid GSEG vaddr.
78 static struct gru_thread_state *gru_find_lock_gts(unsigned long vaddr)
80 struct mm_struct *mm = current->mm;
81 struct vm_area_struct *vma;
82 struct gru_thread_state *gts = NULL;
84 down_read(&mm->mmap_sem);
85 vma = gru_find_vma(vaddr);
87 gts = gru_find_thread_state(vma, TSID(vaddr, vma));
89 mutex_lock(>s->ts_ctxlock);
91 up_read(&mm->mmap_sem);
95 static struct gru_thread_state *gru_alloc_locked_gts(unsigned long vaddr)
97 struct mm_struct *mm = current->mm;
98 struct vm_area_struct *vma;
99 struct gru_thread_state *gts = ERR_PTR(-EINVAL);
101 down_write(&mm->mmap_sem);
102 vma = gru_find_vma(vaddr);
106 gts = gru_alloc_thread_state(vma, TSID(vaddr, vma));
109 mutex_lock(>s->ts_ctxlock);
110 downgrade_write(&mm->mmap_sem);
114 up_write(&mm->mmap_sem);
119 * Unlock a GTS that was previously locked with gru_find_lock_gts().
121 static void gru_unlock_gts(struct gru_thread_state *gts)
123 mutex_unlock(>s->ts_ctxlock);
124 up_read(¤t->mm->mmap_sem);
128 * Set a CB.istatus to active using a user virtual address. This must be done
129 * just prior to a TFH RESTART. The new cb.istatus is an in-cache status ONLY.
130 * If the line is evicted, the status may be lost. The in-cache update
131 * is necessary to prevent the user from seeing a stale cb.istatus that will
132 * change as soon as the TFH restart is complete. Races may cause an
133 * occasional failure to clear the cb.istatus, but that is ok.
135 static void gru_cb_set_istatus_active(struct gru_instruction_bits *cbk)
138 cbk->istatus = CBS_ACTIVE;
145 * The GRU has an array of fault maps. A map is private to a cpu
146 * Only one cpu will be accessing a cpu's fault map.
148 * This function scans the cpu-private fault map & clears all bits that
149 * are set. The function returns a bitmap that indicates the bits that
150 * were cleared. Note that sense the maps may be updated asynchronously by
151 * the GRU, atomic operations must be used to clear bits.
153 static void get_clear_fault_map(struct gru_state *gru,
154 struct gru_tlb_fault_map *imap,
155 struct gru_tlb_fault_map *dmap)
158 struct gru_tlb_fault_map *tfm;
160 tfm = get_tfm_for_cpu(gru, gru_cpu_fault_map_id());
161 prefetchw(tfm); /* Helps on hardware, required for emulator */
162 for (i = 0; i < BITS_TO_LONGS(GRU_NUM_CBE); i++) {
163 k = tfm->fault_bits[i];
165 k = xchg(&tfm->fault_bits[i], 0UL);
166 imap->fault_bits[i] = k;
167 k = tfm->done_bits[i];
169 k = xchg(&tfm->done_bits[i], 0UL);
170 dmap->fault_bits[i] = k;
174 * Not functionally required but helps performance. (Required
177 gru_flush_cache(tfm);
181 * Atomic (interrupt context) & non-atomic (user context) functions to
182 * convert a vaddr into a physical address. The size of the page
183 * is returned in pageshift.
187 * 1 - (atomic only) try again in non-atomic context
189 static int non_atomic_pte_lookup(struct vm_area_struct *vma,
190 unsigned long vaddr, int write,
191 unsigned long *paddr, int *pageshift)
195 /* ZZZ Need to handle HUGE pages */
196 if (is_vm_hugetlb_page(vma))
198 *pageshift = PAGE_SHIFT;
200 (current, current->mm, vaddr, 1, write, 0, &page, NULL) <= 0)
202 *paddr = page_to_phys(page);
210 * Convert a user virtual address to a physical address
211 * Only supports Intel large pages (2MB only) on x86_64.
212 * ZZZ - hugepage support is incomplete
214 * NOTE: mmap_sem is already held on entry to this function. This
215 * guarantees existence of the page tables.
217 static int atomic_pte_lookup(struct vm_area_struct *vma, unsigned long vaddr,
218 int write, unsigned long *paddr, int *pageshift)
225 pgdp = pgd_offset(vma->vm_mm, vaddr);
226 if (unlikely(pgd_none(*pgdp)))
229 pudp = pud_offset(pgdp, vaddr);
230 if (unlikely(pud_none(*pudp)))
233 pmdp = pmd_offset(pudp, vaddr);
234 if (unlikely(pmd_none(*pmdp)))
237 if (unlikely(pmd_large(*pmdp)))
238 pte = *(pte_t *) pmdp;
241 pte = *pte_offset_kernel(pmdp, vaddr);
243 if (unlikely(!pte_present(pte) ||
244 (write && (!pte_write(pte) || !pte_dirty(pte)))))
247 *paddr = pte_pfn(pte) << PAGE_SHIFT;
248 #ifdef CONFIG_HUGETLB_PAGE
249 *pageshift = is_vm_hugetlb_page(vma) ? HPAGE_SHIFT : PAGE_SHIFT;
251 *pageshift = PAGE_SHIFT;
259 static int gru_vtop(struct gru_thread_state *gts, unsigned long vaddr,
260 int write, int atomic, unsigned long *gpa, int *pageshift)
262 struct mm_struct *mm = gts->ts_mm;
263 struct vm_area_struct *vma;
267 vma = find_vma(mm, vaddr);
272 * Atomic lookup is faster & usually works even if called in non-atomic
275 rmb(); /* Must/check ms_range_active before loading PTEs */
276 ret = atomic_pte_lookup(vma, vaddr, write, &paddr, &ps);
280 if (non_atomic_pte_lookup(vma, vaddr, write, &paddr, &ps))
283 if (is_gru_paddr(paddr))
285 paddr = paddr & ~((1UL << ps) - 1);
286 *gpa = uv_soc_phys_ram_to_gpa(paddr);
298 * Flush a CBE from cache. The CBE is clean in the cache. Dirty the
299 * CBE cacheline so that the line will be written back to home agent.
300 * Otherwise the line may be silently dropped. This has no impact
301 * except on performance.
303 static void gru_flush_cache_cbe(struct gru_control_block_extended *cbe)
306 cbe->cbrexecstatus = 0; /* make CL dirty */
307 gru_flush_cache(cbe);
312 * Preload the TLB with entries that may be required. Currently, preloading
313 * is implemented only for BCOPY. Preload <tlb_preload_count> pages OR to
314 * the end of the bcopy tranfer, whichever is smaller.
316 static void gru_preload_tlb(struct gru_state *gru,
317 struct gru_thread_state *gts, int atomic,
318 unsigned long fault_vaddr, int asid, int write,
319 unsigned char tlb_preload_count,
320 struct gru_tlb_fault_handle *tfh,
321 struct gru_control_block_extended *cbe)
323 unsigned long vaddr = 0, gpa;
326 if (cbe->opccpy != OP_BCOPY)
329 if (fault_vaddr == cbe->cbe_baddr0)
330 vaddr = fault_vaddr + GRU_CACHE_LINE_BYTES * cbe->cbe_src_cl - 1;
331 else if (fault_vaddr == cbe->cbe_baddr1)
332 vaddr = fault_vaddr + (1 << cbe->xtypecpy) * cbe->cbe_nelemcur - 1;
334 fault_vaddr &= PAGE_MASK;
336 vaddr = min(vaddr, fault_vaddr + tlb_preload_count * PAGE_SIZE);
338 while (vaddr > fault_vaddr) {
339 ret = gru_vtop(gts, vaddr, write, atomic, &gpa, &pageshift);
340 if (ret || tfh_write_only(tfh, gpa, GAA_RAM, vaddr, asid, write,
341 GRU_PAGESIZE(pageshift)))
344 "%s: gid %d, gts 0x%p, tfh 0x%p, vaddr 0x%lx, asid 0x%x, rw %d, ps %d, gpa 0x%lx\n",
345 atomic ? "atomic" : "non-atomic", gru->gs_gid, gts, tfh,
346 vaddr, asid, write, pageshift, gpa);
348 STAT(tlb_preload_page);
353 * Drop a TLB entry into the GRU. The fault is described by info in an TFH.
355 * cb Address of user CBR. Null if not running in user context
357 * 0 = dropin, exception, or switch to UPM successful
358 * 1 = range invalidate active
362 static int gru_try_dropin(struct gru_thread_state *gts,
363 struct gru_tlb_fault_handle *tfh,
364 struct gru_instruction_bits *cbk)
366 struct gru_control_block_extended *cbe = NULL;
367 unsigned char tlb_preload_count = gts->ts_tlb_preload_count;
368 int pageshift = 0, asid, write, ret, atomic = !cbk, indexway;
369 unsigned long gpa = 0, vaddr = 0;
372 * NOTE: The GRU contains magic hardware that eliminates races between
373 * TLB invalidates and TLB dropins. If an invalidate occurs
374 * in the window between reading the TFH and the subsequent TLB dropin,
375 * the dropin is ignored. This eliminates the need for additional locks.
379 * Prefetch the CBE if doing TLB preloading
381 if (unlikely(tlb_preload_count)) {
382 cbe = gru_tfh_to_cbe(tfh);
387 * Error if TFH state is IDLE or FMM mode & the user issuing a UPM call.
388 * Might be a hardware race OR a stupid user. Ignore FMM because FMM
389 * is a transient state.
391 if (tfh->status != TFHSTATUS_EXCEPTION) {
392 gru_flush_cache(tfh);
394 if (tfh->status != TFHSTATUS_EXCEPTION)
395 goto failnoexception;
396 STAT(tfh_stale_on_fault);
398 if (tfh->state == TFHSTATE_IDLE)
400 if (tfh->state == TFHSTATE_MISS_FMM && cbk)
403 write = (tfh->cause & TFHCAUSE_TLB_MOD) != 0;
404 vaddr = tfh->missvaddr;
405 asid = tfh->missasid;
406 indexway = tfh->indexway;
410 rmb(); /* TFH must be cache resident before reading ms_range_active */
413 * TFH is cache resident - at least briefly. Fail the dropin
414 * if a range invalidate is active.
416 if (atomic_read(>s->ts_gms->ms_range_active))
419 ret = gru_vtop(gts, vaddr, write, atomic, &gpa, &pageshift);
420 if (ret == VTOP_INVALID)
422 if (ret == VTOP_RETRY)
425 if (!(gts->ts_sizeavail & GRU_SIZEAVAIL(pageshift))) {
426 gts->ts_sizeavail |= GRU_SIZEAVAIL(pageshift);
427 if (atomic || !gru_update_cch(gts)) {
428 gts->ts_force_cch_reload = 1;
433 if (unlikely(cbe) && pageshift == PAGE_SHIFT) {
434 gru_preload_tlb(gts->ts_gru, gts, atomic, vaddr, asid, write, tlb_preload_count, tfh, cbe);
435 gru_flush_cache_cbe(cbe);
438 gru_cb_set_istatus_active(cbk);
439 tfh_write_restart(tfh, gpa, GAA_RAM, vaddr, asid, write,
440 GRU_PAGESIZE(pageshift));
442 "%s: gid %d, gts 0x%p, tfh 0x%p, vaddr 0x%lx, asid 0x%x, indexway 0x%x,"
443 " rw %d, ps %d, gpa 0x%lx\n",
444 atomic ? "atomic" : "non-atomic", gts->ts_gru->gs_gid, gts, tfh, vaddr, asid,
445 indexway, write, pageshift, gpa);
450 /* No asid (delayed unload). */
451 STAT(tlb_dropin_fail_no_asid);
452 gru_dbg(grudev, "FAILED no_asid tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr);
454 tfh_user_polling_mode(tfh);
456 gru_flush_cache(tfh);
457 gru_flush_cache_cbe(cbe);
461 /* Atomic failure switch CBR to UPM */
462 tfh_user_polling_mode(tfh);
463 gru_flush_cache_cbe(cbe);
464 STAT(tlb_dropin_fail_upm);
465 gru_dbg(grudev, "FAILED upm tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr);
469 /* FMM state on UPM call */
470 gru_flush_cache(tfh);
471 gru_flush_cache_cbe(cbe);
472 STAT(tlb_dropin_fail_fmm);
473 gru_dbg(grudev, "FAILED fmm tfh: 0x%p, state %d\n", tfh, tfh->state);
477 /* TFH status did not show exception pending */
478 gru_flush_cache(tfh);
479 gru_flush_cache_cbe(cbe);
481 gru_flush_cache(cbk);
482 STAT(tlb_dropin_fail_no_exception);
483 gru_dbg(grudev, "FAILED non-exception tfh: 0x%p, status %d, state %d\n",
484 tfh, tfh->status, tfh->state);
488 /* TFH state was idle - no miss pending */
489 gru_flush_cache(tfh);
490 gru_flush_cache_cbe(cbe);
492 gru_flush_cache(cbk);
493 STAT(tlb_dropin_fail_idle);
494 gru_dbg(grudev, "FAILED idle tfh: 0x%p, state %d\n", tfh, tfh->state);
498 /* All errors (atomic & non-atomic) switch CBR to EXCEPTION state */
500 gru_flush_cache_cbe(cbe);
501 STAT(tlb_dropin_fail_invalid);
502 gru_dbg(grudev, "FAILED inval tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr);
506 /* Range invalidate active. Switch to UPM iff atomic */
508 tfh_user_polling_mode(tfh);
510 gru_flush_cache(tfh);
511 gru_flush_cache_cbe(cbe);
512 STAT(tlb_dropin_fail_range_active);
513 gru_dbg(grudev, "FAILED range active: tfh 0x%p, vaddr 0x%lx\n",
519 * Process an external interrupt from the GRU. This interrupt is
520 * caused by a TLB miss.
521 * Note that this is the interrupt handler that is registered with linux
522 * interrupt handlers.
524 static irqreturn_t gru_intr(int chiplet, int blade)
526 struct gru_state *gru;
527 struct gru_tlb_fault_map imap, dmap;
528 struct gru_thread_state *gts;
529 struct gru_tlb_fault_handle *tfh = NULL;
534 gru = &gru_base[blade]->bs_grus[chiplet];
536 dev_err(grudev, "GRU: invalid interrupt: cpu %d, chiplet %d\n",
537 raw_smp_processor_id(), chiplet);
540 get_clear_fault_map(gru, &imap, &dmap);
542 "cpu %d, chiplet %d, gid %d, imap %016lx %016lx, dmap %016lx %016lx\n",
543 smp_processor_id(), chiplet, gru->gs_gid,
544 imap.fault_bits[0], imap.fault_bits[1],
545 dmap.fault_bits[0], dmap.fault_bits[1]);
547 for_each_cbr_in_tfm(cbrnum, dmap.fault_bits) {
549 complete(gru->gs_blade->bs_async_wq);
550 gru_dbg(grudev, "gid %d, cbr_done %d, done %d\n",
551 gru->gs_gid, cbrnum, gru->gs_blade->bs_async_wq->done);
554 for_each_cbr_in_tfm(cbrnum, imap.fault_bits) {
556 tfh = get_tfh_by_index(gru, cbrnum);
557 prefetchw(tfh); /* Helps on hdw, required for emulator */
560 * When hardware sets a bit in the faultmap, it implicitly
561 * locks the GRU context so that it cannot be unloaded.
562 * The gts cannot change until a TFH start/writestart command
565 ctxnum = tfh->ctxnum;
566 gts = gru->gs_gts[ctxnum];
569 * This is running in interrupt context. Trylock the mmap_sem.
570 * If it fails, retry the fault in user context.
572 if (!gts->ts_force_cch_reload &&
573 down_read_trylock(>s->ts_mm->mmap_sem)) {
574 gts->ustats.fmm_tlbdropin++;
575 gru_try_dropin(gts, tfh, NULL);
576 up_read(>s->ts_mm->mmap_sem);
578 tfh_user_polling_mode(tfh);
579 STAT(intr_mm_lock_failed);
585 irqreturn_t gru0_intr(int irq, void *dev_id)
587 return gru_intr(0, uv_numa_blade_id());
590 irqreturn_t gru1_intr(int irq, void *dev_id)
592 return gru_intr(1, uv_numa_blade_id());
595 irqreturn_t gru_intr_mblade(int irq, void *dev_id)
599 for_each_possible_blade(blade) {
600 if (uv_blade_nr_possible_cpus(blade))
609 static int gru_user_dropin(struct gru_thread_state *gts,
610 struct gru_tlb_fault_handle *tfh,
613 struct gru_mm_struct *gms = gts->ts_gms;
616 gts->ustats.upm_tlbdropin++;
618 wait_event(gms->ms_wait_queue,
619 atomic_read(&gms->ms_range_active) == 0);
620 prefetchw(tfh); /* Helps on hdw, required for emulator */
621 ret = gru_try_dropin(gts, tfh, cb);
624 STAT(call_os_wait_queue);
629 * This interface is called as a result of a user detecting a "call OS" bit
630 * in a user CB. Normally means that a TLB fault has occurred.
631 * cb - user virtual address of the CB
633 int gru_handle_user_call_os(unsigned long cb)
635 struct gru_tlb_fault_handle *tfh;
636 struct gru_thread_state *gts;
638 int ucbnum, cbrnum, ret = -EINVAL;
642 /* sanity check the cb pointer */
643 ucbnum = get_cb_number((void *)cb);
644 if ((cb & (GRU_HANDLE_STRIDE - 1)) || ucbnum >= GRU_NUM_CB)
647 gts = gru_find_lock_gts(cb);
650 gru_dbg(grudev, "address 0x%lx, gid %d, gts 0x%p\n", cb, gts->ts_gru ? gts->ts_gru->gs_gid : -1, gts);
652 if (ucbnum >= gts->ts_cbr_au_count * GRU_CBR_AU_SIZE)
655 gru_check_context_placement(gts);
658 * CCH may contain stale data if ts_force_cch_reload is set.
660 if (gts->ts_gru && gts->ts_force_cch_reload) {
661 gts->ts_force_cch_reload = 0;
666 cbrnum = thread_cbr_number(gts, ucbnum);
668 tfh = get_tfh_by_index(gts->ts_gru, cbrnum);
669 cbk = get_gseg_base_address_cb(gts->ts_gru->gs_gru_base_vaddr,
670 gts->ts_ctxnum, ucbnum);
671 ret = gru_user_dropin(gts, tfh, cbk);
679 * Fetch the exception detail information for a CB that terminated with
682 int gru_get_exception_detail(unsigned long arg)
684 struct control_block_extended_exc_detail excdet;
685 struct gru_control_block_extended *cbe;
686 struct gru_thread_state *gts;
687 int ucbnum, cbrnum, ret;
689 STAT(user_exception);
690 if (copy_from_user(&excdet, (void __user *)arg, sizeof(excdet)))
693 gts = gru_find_lock_gts(excdet.cb);
697 gru_dbg(grudev, "address 0x%lx, gid %d, gts 0x%p\n", excdet.cb, gts->ts_gru ? gts->ts_gru->gs_gid : -1, gts);
698 ucbnum = get_cb_number((void *)excdet.cb);
699 if (ucbnum >= gts->ts_cbr_au_count * GRU_CBR_AU_SIZE) {
701 } else if (gts->ts_gru) {
702 cbrnum = thread_cbr_number(gts, ucbnum);
703 cbe = get_cbe_by_index(gts->ts_gru, cbrnum);
704 gru_flush_cache(cbe); /* CBE not coherent */
705 sync_core(); /* make sure we are have current data */
706 excdet.opc = cbe->opccpy;
707 excdet.exopc = cbe->exopccpy;
708 excdet.ecause = cbe->ecause;
709 excdet.exceptdet0 = cbe->idef1upd;
710 excdet.exceptdet1 = cbe->idef3upd;
711 excdet.cbrstate = cbe->cbrstate;
712 excdet.cbrexecstatus = cbe->cbrexecstatus;
713 gru_flush_cache_cbe(cbe);
721 "cb 0x%lx, op %d, exopc %d, cbrstate %d, cbrexecstatus 0x%x, ecause 0x%x, "
722 "exdet0 0x%lx, exdet1 0x%x\n",
723 excdet.cb, excdet.opc, excdet.exopc, excdet.cbrstate, excdet.cbrexecstatus,
724 excdet.ecause, excdet.exceptdet0, excdet.exceptdet1);
725 if (!ret && copy_to_user((void __user *)arg, &excdet, sizeof(excdet)))
731 * User request to unload a context. Content is saved for possible reload.
733 static int gru_unload_all_contexts(void)
735 struct gru_thread_state *gts;
736 struct gru_state *gru;
739 if (!capable(CAP_SYS_ADMIN))
742 gru = GID_TO_GRU(gid);
743 spin_lock(&gru->gs_lock);
744 for (ctxnum = 0; ctxnum < GRU_NUM_CCH; ctxnum++) {
745 gts = gru->gs_gts[ctxnum];
746 if (gts && mutex_trylock(>s->ts_ctxlock)) {
747 spin_unlock(&gru->gs_lock);
748 gru_unload_context(gts, 1);
749 mutex_unlock(>s->ts_ctxlock);
750 spin_lock(&gru->gs_lock);
753 spin_unlock(&gru->gs_lock);
758 int gru_user_unload_context(unsigned long arg)
760 struct gru_thread_state *gts;
761 struct gru_unload_context_req req;
763 STAT(user_unload_context);
764 if (copy_from_user(&req, (void __user *)arg, sizeof(req)))
767 gru_dbg(grudev, "gseg 0x%lx\n", req.gseg);
770 return gru_unload_all_contexts();
772 gts = gru_find_lock_gts(req.gseg);
777 gru_unload_context(gts, 1);
784 * User request to flush a range of virtual addresses from the GRU TLB
785 * (Mainly for testing).
787 int gru_user_flush_tlb(unsigned long arg)
789 struct gru_thread_state *gts;
790 struct gru_flush_tlb_req req;
791 struct gru_mm_struct *gms;
793 STAT(user_flush_tlb);
794 if (copy_from_user(&req, (void __user *)arg, sizeof(req)))
797 gru_dbg(grudev, "gseg 0x%lx, vaddr 0x%lx, len 0x%lx\n", req.gseg,
800 gts = gru_find_lock_gts(req.gseg);
806 gru_flush_tlb_range(gms, req.vaddr, req.len);
812 * Fetch GSEG statisticss
814 long gru_get_gseg_statistics(unsigned long arg)
816 struct gru_thread_state *gts;
817 struct gru_get_gseg_statistics_req req;
819 if (copy_from_user(&req, (void __user *)arg, sizeof(req)))
823 * The library creates arrays of contexts for threaded programs.
824 * If no gts exists in the array, the context has never been used & all
825 * statistics are implicitly 0.
827 gts = gru_find_lock_gts(req.gseg);
829 memcpy(&req.stats, >s->ustats, sizeof(gts->ustats));
832 memset(&req.stats, 0, sizeof(gts->ustats));
835 if (copy_to_user((void __user *)arg, &req, sizeof(req)))
842 * Register the current task as the user of the GSEG slice.
843 * Needed for TLB fault interrupt targeting.
845 int gru_set_context_option(unsigned long arg)
847 struct gru_thread_state *gts;
848 struct gru_set_context_option_req req;
851 STAT(set_context_option);
852 if (copy_from_user(&req, (void __user *)arg, sizeof(req)))
854 gru_dbg(grudev, "op %d, gseg 0x%lx, value1 0x%lx\n", req.op, req.gseg, req.val1);
856 gts = gru_find_lock_gts(req.gseg);
858 gts = gru_alloc_locked_gts(req.gseg);
864 case sco_blade_chiplet:
865 /* Select blade/chiplet for GRU context */
866 if (req.val1 < -1 || req.val1 >= GRU_MAX_BLADES || !gru_base[req.val1] ||
867 req.val0 < -1 || req.val0 >= GRU_CHIPLETS_PER_HUB) {
870 gts->ts_user_blade_id = req.val1;
871 gts->ts_user_chiplet_id = req.val0;
872 gru_check_context_placement(gts);
876 /* Register the current task as the GSEG owner */
877 gts->ts_tgid_owner = current->tgid;
879 case sco_cch_req_slice:
880 /* Set the CCH slice option */
881 gts->ts_cch_req_slice = req.val1 & 3;