ARM: debug: qcom: add UART addresses to Kconfig help for APQ8084
[pandora-kernel.git] / drivers / misc / genwqe / card_dev.c
1 /**
2  * IBM Accelerator Family 'GenWQE'
3  *
4  * (C) Copyright IBM Corp. 2013
5  *
6  * Author: Frank Haverkamp <haver@linux.vnet.ibm.com>
7  * Author: Joerg-Stephan Vogt <jsvogt@de.ibm.com>
8  * Author: Michael Jung <mijung@de.ibm.com>
9  * Author: Michael Ruettger <michael@ibmra.de>
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License (version 2 only)
13  * as published by the Free Software Foundation.
14  *
15  * This program is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18  * GNU General Public License for more details.
19  */
20
21 /*
22  * Character device representation of the GenWQE device. This allows
23  * user-space applications to communicate with the card.
24  */
25
26 #include <linux/kernel.h>
27 #include <linux/types.h>
28 #include <linux/module.h>
29 #include <linux/pci.h>
30 #include <linux/string.h>
31 #include <linux/fs.h>
32 #include <linux/sched.h>
33 #include <linux/wait.h>
34 #include <linux/delay.h>
35 #include <linux/atomic.h>
36
37 #include "card_base.h"
38 #include "card_ddcb.h"
39
40 static int genwqe_open_files(struct genwqe_dev *cd)
41 {
42         int rc;
43         unsigned long flags;
44
45         spin_lock_irqsave(&cd->file_lock, flags);
46         rc = list_empty(&cd->file_list);
47         spin_unlock_irqrestore(&cd->file_lock, flags);
48         return !rc;
49 }
50
51 static void genwqe_add_file(struct genwqe_dev *cd, struct genwqe_file *cfile)
52 {
53         unsigned long flags;
54
55         cfile->owner = current;
56         spin_lock_irqsave(&cd->file_lock, flags);
57         list_add(&cfile->list, &cd->file_list);
58         spin_unlock_irqrestore(&cd->file_lock, flags);
59 }
60
61 static int genwqe_del_file(struct genwqe_dev *cd, struct genwqe_file *cfile)
62 {
63         unsigned long flags;
64
65         spin_lock_irqsave(&cd->file_lock, flags);
66         list_del(&cfile->list);
67         spin_unlock_irqrestore(&cd->file_lock, flags);
68
69         return 0;
70 }
71
72 static void genwqe_add_pin(struct genwqe_file *cfile, struct dma_mapping *m)
73 {
74         unsigned long flags;
75
76         spin_lock_irqsave(&cfile->pin_lock, flags);
77         list_add(&m->pin_list, &cfile->pin_list);
78         spin_unlock_irqrestore(&cfile->pin_lock, flags);
79 }
80
81 static int genwqe_del_pin(struct genwqe_file *cfile, struct dma_mapping *m)
82 {
83         unsigned long flags;
84
85         spin_lock_irqsave(&cfile->pin_lock, flags);
86         list_del(&m->pin_list);
87         spin_unlock_irqrestore(&cfile->pin_lock, flags);
88
89         return 0;
90 }
91
92 /**
93  * genwqe_search_pin() - Search for the mapping for a userspace address
94  * @cfile:      Descriptor of opened file
95  * @u_addr:     User virtual address
96  * @size:       Size of buffer
97  * @dma_addr:   DMA address to be updated
98  *
99  * Return: Pointer to the corresponding mapping NULL if not found
100  */
101 static struct dma_mapping *genwqe_search_pin(struct genwqe_file *cfile,
102                                             unsigned long u_addr,
103                                             unsigned int size,
104                                             void **virt_addr)
105 {
106         unsigned long flags;
107         struct dma_mapping *m;
108
109         spin_lock_irqsave(&cfile->pin_lock, flags);
110
111         list_for_each_entry(m, &cfile->pin_list, pin_list) {
112                 if ((((u64)m->u_vaddr) <= (u_addr)) &&
113                     (((u64)m->u_vaddr + m->size) >= (u_addr + size))) {
114
115                         if (virt_addr)
116                                 *virt_addr = m->k_vaddr +
117                                         (u_addr - (u64)m->u_vaddr);
118
119                         spin_unlock_irqrestore(&cfile->pin_lock, flags);
120                         return m;
121                 }
122         }
123         spin_unlock_irqrestore(&cfile->pin_lock, flags);
124         return NULL;
125 }
126
127 static void __genwqe_add_mapping(struct genwqe_file *cfile,
128                               struct dma_mapping *dma_map)
129 {
130         unsigned long flags;
131
132         spin_lock_irqsave(&cfile->map_lock, flags);
133         list_add(&dma_map->card_list, &cfile->map_list);
134         spin_unlock_irqrestore(&cfile->map_lock, flags);
135 }
136
137 static void __genwqe_del_mapping(struct genwqe_file *cfile,
138                               struct dma_mapping *dma_map)
139 {
140         unsigned long flags;
141
142         spin_lock_irqsave(&cfile->map_lock, flags);
143         list_del(&dma_map->card_list);
144         spin_unlock_irqrestore(&cfile->map_lock, flags);
145 }
146
147
148 /**
149  * __genwqe_search_mapping() - Search for the mapping for a userspace address
150  * @cfile:      descriptor of opened file
151  * @u_addr:     user virtual address
152  * @size:       size of buffer
153  * @dma_addr:   DMA address to be updated
154  * Return: Pointer to the corresponding mapping NULL if not found
155  */
156 static struct dma_mapping *__genwqe_search_mapping(struct genwqe_file *cfile,
157                                                    unsigned long u_addr,
158                                                    unsigned int size,
159                                                    dma_addr_t *dma_addr,
160                                                    void **virt_addr)
161 {
162         unsigned long flags;
163         struct dma_mapping *m;
164         struct pci_dev *pci_dev = cfile->cd->pci_dev;
165
166         spin_lock_irqsave(&cfile->map_lock, flags);
167         list_for_each_entry(m, &cfile->map_list, card_list) {
168
169                 if ((((u64)m->u_vaddr) <= (u_addr)) &&
170                     (((u64)m->u_vaddr + m->size) >= (u_addr + size))) {
171
172                         /* match found: current is as expected and
173                            addr is in range */
174                         if (dma_addr)
175                                 *dma_addr = m->dma_addr +
176                                         (u_addr - (u64)m->u_vaddr);
177
178                         if (virt_addr)
179                                 *virt_addr = m->k_vaddr +
180                                         (u_addr - (u64)m->u_vaddr);
181
182                         spin_unlock_irqrestore(&cfile->map_lock, flags);
183                         return m;
184                 }
185         }
186         spin_unlock_irqrestore(&cfile->map_lock, flags);
187
188         dev_err(&pci_dev->dev,
189                 "[%s] Entry not found: u_addr=%lx, size=%x\n",
190                 __func__, u_addr, size);
191
192         return NULL;
193 }
194
195 static void genwqe_remove_mappings(struct genwqe_file *cfile)
196 {
197         int i = 0;
198         struct list_head *node, *next;
199         struct dma_mapping *dma_map;
200         struct genwqe_dev *cd = cfile->cd;
201         struct pci_dev *pci_dev = cfile->cd->pci_dev;
202
203         list_for_each_safe(node, next, &cfile->map_list) {
204                 dma_map = list_entry(node, struct dma_mapping, card_list);
205
206                 list_del_init(&dma_map->card_list);
207
208                 /*
209                  * This is really a bug, because those things should
210                  * have been already tidied up.
211                  *
212                  * GENWQE_MAPPING_RAW should have been removed via mmunmap().
213                  * GENWQE_MAPPING_SGL_TEMP should be removed by tidy up code.
214                  */
215                 dev_err(&pci_dev->dev,
216                         "[%s] %d. cleanup mapping: u_vaddr=%p "
217                         "u_kaddr=%016lx dma_addr=%lx\n", __func__, i++,
218                         dma_map->u_vaddr, (unsigned long)dma_map->k_vaddr,
219                         (unsigned long)dma_map->dma_addr);
220
221                 if (dma_map->type == GENWQE_MAPPING_RAW) {
222                         /* we allocated this dynamically */
223                         __genwqe_free_consistent(cd, dma_map->size,
224                                                 dma_map->k_vaddr,
225                                                 dma_map->dma_addr);
226                         kfree(dma_map);
227                 } else if (dma_map->type == GENWQE_MAPPING_SGL_TEMP) {
228                         /* we use dma_map statically from the request */
229                         genwqe_user_vunmap(cd, dma_map, NULL);
230                 }
231         }
232 }
233
234 static void genwqe_remove_pinnings(struct genwqe_file *cfile)
235 {
236         struct list_head *node, *next;
237         struct dma_mapping *dma_map;
238         struct genwqe_dev *cd = cfile->cd;
239
240         list_for_each_safe(node, next, &cfile->pin_list) {
241                 dma_map = list_entry(node, struct dma_mapping, pin_list);
242
243                 /*
244                  * This is not a bug, because a killed processed might
245                  * not call the unpin ioctl, which is supposed to free
246                  * the resources.
247                  *
248                  * Pinnings are dymically allocated and need to be
249                  * deleted.
250                  */
251                 list_del_init(&dma_map->pin_list);
252                 genwqe_user_vunmap(cd, dma_map, NULL);
253                 kfree(dma_map);
254         }
255 }
256
257 /**
258  * genwqe_kill_fasync() - Send signal to all processes with open GenWQE files
259  *
260  * E.g. genwqe_send_signal(cd, SIGIO);
261  */
262 static int genwqe_kill_fasync(struct genwqe_dev *cd, int sig)
263 {
264         unsigned int files = 0;
265         unsigned long flags;
266         struct genwqe_file *cfile;
267
268         spin_lock_irqsave(&cd->file_lock, flags);
269         list_for_each_entry(cfile, &cd->file_list, list) {
270                 if (cfile->async_queue)
271                         kill_fasync(&cfile->async_queue, sig, POLL_HUP);
272                 files++;
273         }
274         spin_unlock_irqrestore(&cd->file_lock, flags);
275         return files;
276 }
277
278 static int genwqe_force_sig(struct genwqe_dev *cd, int sig)
279 {
280         unsigned int files = 0;
281         unsigned long flags;
282         struct genwqe_file *cfile;
283
284         spin_lock_irqsave(&cd->file_lock, flags);
285         list_for_each_entry(cfile, &cd->file_list, list) {
286                 force_sig(sig, cfile->owner);
287                 files++;
288         }
289         spin_unlock_irqrestore(&cd->file_lock, flags);
290         return files;
291 }
292
293 /**
294  * genwqe_open() - file open
295  * @inode:      file system information
296  * @filp:       file handle
297  *
298  * This function is executed whenever an application calls
299  * open("/dev/genwqe",..).
300  *
301  * Return: 0 if successful or <0 if errors
302  */
303 static int genwqe_open(struct inode *inode, struct file *filp)
304 {
305         struct genwqe_dev *cd;
306         struct genwqe_file *cfile;
307         struct pci_dev *pci_dev;
308
309         cfile = kzalloc(sizeof(*cfile), GFP_KERNEL);
310         if (cfile == NULL)
311                 return -ENOMEM;
312
313         cd = container_of(inode->i_cdev, struct genwqe_dev, cdev_genwqe);
314         pci_dev = cd->pci_dev;
315         cfile->cd = cd;
316         cfile->filp = filp;
317         cfile->client = NULL;
318
319         spin_lock_init(&cfile->map_lock);  /* list of raw memory allocations */
320         INIT_LIST_HEAD(&cfile->map_list);
321
322         spin_lock_init(&cfile->pin_lock);  /* list of user pinned memory */
323         INIT_LIST_HEAD(&cfile->pin_list);
324
325         filp->private_data = cfile;
326
327         genwqe_add_file(cd, cfile);
328         return 0;
329 }
330
331 /**
332  * genwqe_fasync() - Setup process to receive SIGIO.
333  * @fd:        file descriptor
334  * @filp:      file handle
335  * @mode:      file mode
336  *
337  * Sending a signal is working as following:
338  *
339  * if (cdev->async_queue)
340  *         kill_fasync(&cdev->async_queue, SIGIO, POLL_IN);
341  *
342  * Some devices also implement asynchronous notification to indicate
343  * when the device can be written; in this case, of course,
344  * kill_fasync must be called with a mode of POLL_OUT.
345  */
346 static int genwqe_fasync(int fd, struct file *filp, int mode)
347 {
348         struct genwqe_file *cdev = (struct genwqe_file *)filp->private_data;
349         return fasync_helper(fd, filp, mode, &cdev->async_queue);
350 }
351
352
353 /**
354  * genwqe_release() - file close
355  * @inode:      file system information
356  * @filp:       file handle
357  *
358  * This function is executed whenever an application calls 'close(fd_genwqe)'
359  *
360  * Return: always 0
361  */
362 static int genwqe_release(struct inode *inode, struct file *filp)
363 {
364         struct genwqe_file *cfile = (struct genwqe_file *)filp->private_data;
365         struct genwqe_dev *cd = cfile->cd;
366
367         /* there must be no entries in these lists! */
368         genwqe_remove_mappings(cfile);
369         genwqe_remove_pinnings(cfile);
370
371         /* remove this filp from the asynchronously notified filp's */
372         genwqe_fasync(-1, filp, 0);
373
374         /*
375          * For this to work we must not release cd when this cfile is
376          * not yet released, otherwise the list entry is invalid,
377          * because the list itself gets reinstantiated!
378          */
379         genwqe_del_file(cd, cfile);
380         kfree(cfile);
381         return 0;
382 }
383
384 static void genwqe_vma_open(struct vm_area_struct *vma)
385 {
386         /* nothing ... */
387 }
388
389 /**
390  * genwqe_vma_close() - Called each time when vma is unmapped
391  *
392  * Free memory which got allocated by GenWQE mmap().
393  */
394 static void genwqe_vma_close(struct vm_area_struct *vma)
395 {
396         unsigned long vsize = vma->vm_end - vma->vm_start;
397         struct inode *inode = vma->vm_file->f_dentry->d_inode;
398         struct dma_mapping *dma_map;
399         struct genwqe_dev *cd = container_of(inode->i_cdev, struct genwqe_dev,
400                                             cdev_genwqe);
401         struct pci_dev *pci_dev = cd->pci_dev;
402         dma_addr_t d_addr = 0;
403         struct genwqe_file *cfile = vma->vm_private_data;
404
405         dma_map = __genwqe_search_mapping(cfile, vma->vm_start, vsize,
406                                          &d_addr, NULL);
407         if (dma_map == NULL) {
408                 dev_err(&pci_dev->dev,
409                         "  [%s] err: mapping not found: v=%lx, p=%lx s=%lx\n",
410                         __func__, vma->vm_start, vma->vm_pgoff << PAGE_SHIFT,
411                         vsize);
412                 return;
413         }
414         __genwqe_del_mapping(cfile, dma_map);
415         __genwqe_free_consistent(cd, dma_map->size, dma_map->k_vaddr,
416                                  dma_map->dma_addr);
417         kfree(dma_map);
418 }
419
420 static struct vm_operations_struct genwqe_vma_ops = {
421         .open   = genwqe_vma_open,
422         .close  = genwqe_vma_close,
423 };
424
425 /**
426  * genwqe_mmap() - Provide contignous buffers to userspace
427  *
428  * We use mmap() to allocate contignous buffers used for DMA
429  * transfers. After the buffer is allocated we remap it to user-space
430  * and remember a reference to our dma_mapping data structure, where
431  * we store the associated DMA address and allocated size.
432  *
433  * When we receive a DDCB execution request with the ATS bits set to
434  * plain buffer, we lookup our dma_mapping list to find the
435  * corresponding DMA address for the associated user-space address.
436  */
437 static int genwqe_mmap(struct file *filp, struct vm_area_struct *vma)
438 {
439         int rc;
440         unsigned long pfn, vsize = vma->vm_end - vma->vm_start;
441         struct genwqe_file *cfile = (struct genwqe_file *)filp->private_data;
442         struct genwqe_dev *cd = cfile->cd;
443         struct dma_mapping *dma_map;
444
445         if (vsize == 0)
446                 return -EINVAL;
447
448         if (get_order(vsize) > MAX_ORDER)
449                 return -ENOMEM;
450
451         dma_map = kzalloc(sizeof(struct dma_mapping), GFP_ATOMIC);
452         if (dma_map == NULL)
453                 return -ENOMEM;
454
455         genwqe_mapping_init(dma_map, GENWQE_MAPPING_RAW);
456         dma_map->u_vaddr = (void *)vma->vm_start;
457         dma_map->size = vsize;
458         dma_map->nr_pages = DIV_ROUND_UP(vsize, PAGE_SIZE);
459         dma_map->k_vaddr = __genwqe_alloc_consistent(cd, vsize,
460                                                      &dma_map->dma_addr);
461         if (dma_map->k_vaddr == NULL) {
462                 rc = -ENOMEM;
463                 goto free_dma_map;
464         }
465
466         if (capable(CAP_SYS_ADMIN) && (vsize > sizeof(dma_addr_t)))
467                 *(dma_addr_t *)dma_map->k_vaddr = dma_map->dma_addr;
468
469         pfn = virt_to_phys(dma_map->k_vaddr) >> PAGE_SHIFT;
470         rc = remap_pfn_range(vma,
471                              vma->vm_start,
472                              pfn,
473                              vsize,
474                              vma->vm_page_prot);
475         if (rc != 0) {
476                 rc = -EFAULT;
477                 goto free_dma_mem;
478         }
479
480         vma->vm_private_data = cfile;
481         vma->vm_ops = &genwqe_vma_ops;
482         __genwqe_add_mapping(cfile, dma_map);
483
484         return 0;
485
486  free_dma_mem:
487         __genwqe_free_consistent(cd, dma_map->size,
488                                 dma_map->k_vaddr,
489                                 dma_map->dma_addr);
490  free_dma_map:
491         kfree(dma_map);
492         return rc;
493 }
494
495 /**
496  * do_flash_update() - Excute flash update (write image or CVPD)
497  * @cd:        genwqe device
498  * @load:      details about image load
499  *
500  * Return: 0 if successful
501  */
502
503 #define FLASH_BLOCK     0x40000 /* we use 256k blocks */
504
505 static int do_flash_update(struct genwqe_file *cfile,
506                            struct genwqe_bitstream *load)
507 {
508         int rc = 0;
509         int blocks_to_flash;
510         dma_addr_t dma_addr;
511         u64 flash = 0;
512         size_t tocopy = 0;
513         u8 __user *buf;
514         u8 *xbuf;
515         u32 crc;
516         u8 cmdopts;
517         struct genwqe_dev *cd = cfile->cd;
518         struct pci_dev *pci_dev = cd->pci_dev;
519
520         if ((load->size & 0x3) != 0)
521                 return -EINVAL;
522
523         if (((unsigned long)(load->data_addr) & ~PAGE_MASK) != 0)
524                 return -EINVAL;
525
526         /* FIXME Bits have changed for new service layer! */
527         switch ((char)load->partition) {
528         case '0':
529                 cmdopts = 0x14;
530                 break;          /* download/erase_first/part_0 */
531         case '1':
532                 cmdopts = 0x1C;
533                 break;          /* download/erase_first/part_1 */
534         case 'v':               /* cmdopts = 0x0c (VPD) */
535         default:
536                 return -EINVAL;
537         }
538
539         buf = (u8 __user *)load->data_addr;
540         xbuf = __genwqe_alloc_consistent(cd, FLASH_BLOCK, &dma_addr);
541         if (xbuf == NULL)
542                 return -ENOMEM;
543
544         blocks_to_flash = load->size / FLASH_BLOCK;
545         while (load->size) {
546                 struct genwqe_ddcb_cmd *req;
547
548                 /*
549                  * We must be 4 byte aligned. Buffer must be 0 appened
550                  * to have defined values when calculating CRC.
551                  */
552                 tocopy = min_t(size_t, load->size, FLASH_BLOCK);
553
554                 rc = copy_from_user(xbuf, buf, tocopy);
555                 if (rc) {
556                         rc = -EFAULT;
557                         goto free_buffer;
558                 }
559                 crc = genwqe_crc32(xbuf, tocopy, 0xffffffff);
560
561                 dev_dbg(&pci_dev->dev,
562                         "[%s] DMA: %lx CRC: %08x SZ: %ld %d\n",
563                         __func__, (unsigned long)dma_addr, crc, tocopy,
564                         blocks_to_flash);
565
566                 /* prepare DDCB for SLU process */
567                 req = ddcb_requ_alloc();
568                 if (req == NULL) {
569                         rc = -ENOMEM;
570                         goto free_buffer;
571                 }
572
573                 req->cmd = SLCMD_MOVE_FLASH;
574                 req->cmdopts = cmdopts;
575
576                 /* prepare invariant values */
577                 if (genwqe_get_slu_id(cd) <= 0x2) {
578                         *(__be64 *)&req->__asiv[0]  = cpu_to_be64(dma_addr);
579                         *(__be64 *)&req->__asiv[8]  = cpu_to_be64(tocopy);
580                         *(__be64 *)&req->__asiv[16] = cpu_to_be64(flash);
581                         *(__be32 *)&req->__asiv[24] = cpu_to_be32(0);
582                         req->__asiv[24]        = load->uid;
583                         *(__be32 *)&req->__asiv[28] = cpu_to_be32(crc);
584
585                         /* for simulation only */
586                         *(__be64 *)&req->__asiv[88] = cpu_to_be64(load->slu_id);
587                         *(__be64 *)&req->__asiv[96] = cpu_to_be64(load->app_id);
588                         req->asiv_length = 32; /* bytes included in crc calc */
589                 } else {        /* setup DDCB for ATS architecture */
590                         *(__be64 *)&req->asiv[0]  = cpu_to_be64(dma_addr);
591                         *(__be32 *)&req->asiv[8]  = cpu_to_be32(tocopy);
592                         *(__be32 *)&req->asiv[12] = cpu_to_be32(0); /* resvd */
593                         *(__be64 *)&req->asiv[16] = cpu_to_be64(flash);
594                         *(__be32 *)&req->asiv[24] = cpu_to_be32(load->uid<<24);
595                         *(__be32 *)&req->asiv[28] = cpu_to_be32(crc);
596
597                         /* for simulation only */
598                         *(__be64 *)&req->asiv[80] = cpu_to_be64(load->slu_id);
599                         *(__be64 *)&req->asiv[88] = cpu_to_be64(load->app_id);
600
601                         /* Rd only */
602                         req->ats = 0x4ULL << 44;
603                         req->asiv_length = 40; /* bytes included in crc calc */
604                 }
605                 req->asv_length  = 8;
606
607                 /* For Genwqe5 we get back the calculated CRC */
608                 *(u64 *)&req->asv[0] = 0ULL;                    /* 0x80 */
609
610                 rc = __genwqe_execute_raw_ddcb(cd, req);
611
612                 load->retc = req->retc;
613                 load->attn = req->attn;
614                 load->progress = req->progress;
615
616                 if (rc < 0) {
617                         ddcb_requ_free(req);
618                         goto free_buffer;
619                 }
620
621                 if (req->retc != DDCB_RETC_COMPLETE) {
622                         rc = -EIO;
623                         ddcb_requ_free(req);
624                         goto free_buffer;
625                 }
626
627                 load->size  -= tocopy;
628                 flash += tocopy;
629                 buf += tocopy;
630                 blocks_to_flash--;
631                 ddcb_requ_free(req);
632         }
633
634  free_buffer:
635         __genwqe_free_consistent(cd, FLASH_BLOCK, xbuf, dma_addr);
636         return rc;
637 }
638
639 static int do_flash_read(struct genwqe_file *cfile,
640                          struct genwqe_bitstream *load)
641 {
642         int rc, blocks_to_flash;
643         dma_addr_t dma_addr;
644         u64 flash = 0;
645         size_t tocopy = 0;
646         u8 __user *buf;
647         u8 *xbuf;
648         u8 cmdopts;
649         struct genwqe_dev *cd = cfile->cd;
650         struct pci_dev *pci_dev = cd->pci_dev;
651         struct genwqe_ddcb_cmd *cmd;
652
653         if ((load->size & 0x3) != 0)
654                 return -EINVAL;
655
656         if (((unsigned long)(load->data_addr) & ~PAGE_MASK) != 0)
657                 return -EINVAL;
658
659         /* FIXME Bits have changed for new service layer! */
660         switch ((char)load->partition) {
661         case '0':
662                 cmdopts = 0x12;
663                 break;          /* upload/part_0 */
664         case '1':
665                 cmdopts = 0x1A;
666                 break;          /* upload/part_1 */
667         case 'v':
668         default:
669                 return -EINVAL;
670         }
671
672         buf = (u8 __user *)load->data_addr;
673         xbuf = __genwqe_alloc_consistent(cd, FLASH_BLOCK, &dma_addr);
674         if (xbuf == NULL)
675                 return -ENOMEM;
676
677         blocks_to_flash = load->size / FLASH_BLOCK;
678         while (load->size) {
679                 /*
680                  * We must be 4 byte aligned. Buffer must be 0 appened
681                  * to have defined values when calculating CRC.
682                  */
683                 tocopy = min_t(size_t, load->size, FLASH_BLOCK);
684
685                 dev_dbg(&pci_dev->dev,
686                         "[%s] DMA: %lx SZ: %ld %d\n",
687                         __func__, (unsigned long)dma_addr, tocopy,
688                         blocks_to_flash);
689
690                 /* prepare DDCB for SLU process */
691                 cmd = ddcb_requ_alloc();
692                 if (cmd == NULL) {
693                         rc = -ENOMEM;
694                         goto free_buffer;
695                 }
696                 cmd->cmd = SLCMD_MOVE_FLASH;
697                 cmd->cmdopts = cmdopts;
698
699                 /* prepare invariant values */
700                 if (genwqe_get_slu_id(cd) <= 0x2) {
701                         *(__be64 *)&cmd->__asiv[0]  = cpu_to_be64(dma_addr);
702                         *(__be64 *)&cmd->__asiv[8]  = cpu_to_be64(tocopy);
703                         *(__be64 *)&cmd->__asiv[16] = cpu_to_be64(flash);
704                         *(__be32 *)&cmd->__asiv[24] = cpu_to_be32(0);
705                         cmd->__asiv[24] = load->uid;
706                         *(__be32 *)&cmd->__asiv[28] = cpu_to_be32(0) /* CRC */;
707                         cmd->asiv_length = 32; /* bytes included in crc calc */
708                 } else {        /* setup DDCB for ATS architecture */
709                         *(__be64 *)&cmd->asiv[0]  = cpu_to_be64(dma_addr);
710                         *(__be32 *)&cmd->asiv[8]  = cpu_to_be32(tocopy);
711                         *(__be32 *)&cmd->asiv[12] = cpu_to_be32(0); /* resvd */
712                         *(__be64 *)&cmd->asiv[16] = cpu_to_be64(flash);
713                         *(__be32 *)&cmd->asiv[24] = cpu_to_be32(load->uid<<24);
714                         *(__be32 *)&cmd->asiv[28] = cpu_to_be32(0); /* CRC */
715
716                         /* rd/wr */
717                         cmd->ats = 0x5ULL << 44;
718                         cmd->asiv_length = 40; /* bytes included in crc calc */
719                 }
720                 cmd->asv_length  = 8;
721
722                 /* we only get back the calculated CRC */
723                 *(u64 *)&cmd->asv[0] = 0ULL;    /* 0x80 */
724
725                 rc = __genwqe_execute_raw_ddcb(cd, cmd);
726
727                 load->retc = cmd->retc;
728                 load->attn = cmd->attn;
729                 load->progress = cmd->progress;
730
731                 if ((rc < 0) && (rc != -EBADMSG)) {
732                         ddcb_requ_free(cmd);
733                         goto free_buffer;
734                 }
735
736                 rc = copy_to_user(buf, xbuf, tocopy);
737                 if (rc) {
738                         rc = -EFAULT;
739                         ddcb_requ_free(cmd);
740                         goto free_buffer;
741                 }
742
743                 /* We know that we can get retc 0x104 with CRC err */
744                 if (((cmd->retc == DDCB_RETC_FAULT) &&
745                      (cmd->attn != 0x02)) ||  /* Normally ignore CRC error */
746                     ((cmd->retc == DDCB_RETC_COMPLETE) &&
747                      (cmd->attn != 0x00))) {  /* Everything was fine */
748                         rc = -EIO;
749                         ddcb_requ_free(cmd);
750                         goto free_buffer;
751                 }
752
753                 load->size  -= tocopy;
754                 flash += tocopy;
755                 buf += tocopy;
756                 blocks_to_flash--;
757                 ddcb_requ_free(cmd);
758         }
759         rc = 0;
760
761  free_buffer:
762         __genwqe_free_consistent(cd, FLASH_BLOCK, xbuf, dma_addr);
763         return rc;
764 }
765
766 static int genwqe_pin_mem(struct genwqe_file *cfile, struct genwqe_mem *m)
767 {
768         int rc;
769         struct genwqe_dev *cd = cfile->cd;
770         struct pci_dev *pci_dev = cfile->cd->pci_dev;
771         struct dma_mapping *dma_map;
772         unsigned long map_addr;
773         unsigned long map_size;
774
775         if ((m->addr == 0x0) || (m->size == 0))
776                 return -EINVAL;
777
778         map_addr = (m->addr & PAGE_MASK);
779         map_size = round_up(m->size + (m->addr & ~PAGE_MASK), PAGE_SIZE);
780
781         dma_map = kzalloc(sizeof(struct dma_mapping), GFP_ATOMIC);
782         if (dma_map == NULL)
783                 return -ENOMEM;
784
785         genwqe_mapping_init(dma_map, GENWQE_MAPPING_SGL_PINNED);
786         rc = genwqe_user_vmap(cd, dma_map, (void *)map_addr, map_size, NULL);
787         if (rc != 0) {
788                 dev_err(&pci_dev->dev,
789                         "[%s] genwqe_user_vmap rc=%d\n", __func__, rc);
790                 kfree(dma_map);
791                 return rc;
792         }
793
794         genwqe_add_pin(cfile, dma_map);
795         return 0;
796 }
797
798 static int genwqe_unpin_mem(struct genwqe_file *cfile, struct genwqe_mem *m)
799 {
800         struct genwqe_dev *cd = cfile->cd;
801         struct dma_mapping *dma_map;
802         unsigned long map_addr;
803         unsigned long map_size;
804
805         if (m->addr == 0x0)
806                 return -EINVAL;
807
808         map_addr = (m->addr & PAGE_MASK);
809         map_size = round_up(m->size + (m->addr & ~PAGE_MASK), PAGE_SIZE);
810
811         dma_map = genwqe_search_pin(cfile, map_addr, map_size, NULL);
812         if (dma_map == NULL)
813                 return -ENOENT;
814
815         genwqe_del_pin(cfile, dma_map);
816         genwqe_user_vunmap(cd, dma_map, NULL);
817         kfree(dma_map);
818         return 0;
819 }
820
821 /**
822  * ddcb_cmd_cleanup() - Remove dynamically created fixup entries
823  *
824  * Only if there are any. Pinnings are not removed.
825  */
826 static int ddcb_cmd_cleanup(struct genwqe_file *cfile, struct ddcb_requ *req)
827 {
828         unsigned int i;
829         struct dma_mapping *dma_map;
830         struct genwqe_dev *cd = cfile->cd;
831
832         for (i = 0; i < DDCB_FIXUPS; i++) {
833                 dma_map = &req->dma_mappings[i];
834
835                 if (dma_mapping_used(dma_map)) {
836                         __genwqe_del_mapping(cfile, dma_map);
837                         genwqe_user_vunmap(cd, dma_map, req);
838                 }
839                 if (req->sgl[i] != NULL) {
840                         genwqe_free_sgl(cd, req->sgl[i],
841                                        req->sgl_dma_addr[i],
842                                        req->sgl_size[i]);
843                         req->sgl[i] = NULL;
844                         req->sgl_dma_addr[i] = 0x0;
845                         req->sgl_size[i] = 0;
846                 }
847
848         }
849         return 0;
850 }
851
852 /**
853  * ddcb_cmd_fixups() - Establish DMA fixups/sglists for user memory references
854  *
855  * Before the DDCB gets executed we need to handle the fixups. We
856  * replace the user-space addresses with DMA addresses or do
857  * additional setup work e.g. generating a scatter-gather list which
858  * is used to describe the memory referred to in the fixup.
859  */
860 static int ddcb_cmd_fixups(struct genwqe_file *cfile, struct ddcb_requ *req)
861 {
862         int rc;
863         unsigned int asiv_offs, i;
864         struct genwqe_dev *cd = cfile->cd;
865         struct genwqe_ddcb_cmd *cmd = &req->cmd;
866         struct dma_mapping *m;
867         const char *type = "UNKNOWN";
868
869         for (i = 0, asiv_offs = 0x00; asiv_offs <= 0x58;
870              i++, asiv_offs += 0x08) {
871
872                 u64 u_addr;
873                 dma_addr_t d_addr;
874                 u32 u_size = 0;
875                 u64 ats_flags;
876
877                 ats_flags = ATS_GET_FLAGS(cmd->ats, asiv_offs);
878
879                 switch (ats_flags) {
880
881                 case ATS_TYPE_DATA:
882                         break;  /* nothing to do here */
883
884                 case ATS_TYPE_FLAT_RDWR:
885                 case ATS_TYPE_FLAT_RD: {
886                         u_addr = be64_to_cpu(*((__be64 *)&cmd->
887                                                asiv[asiv_offs]));
888                         u_size = be32_to_cpu(*((__be32 *)&cmd->
889                                                asiv[asiv_offs + 0x08]));
890
891                         /*
892                          * No data available. Ignore u_addr in this
893                          * case and set addr to 0. Hardware must not
894                          * fetch the buffer.
895                          */
896                         if (u_size == 0x0) {
897                                 *((__be64 *)&cmd->asiv[asiv_offs]) =
898                                         cpu_to_be64(0x0);
899                                 break;
900                         }
901
902                         m = __genwqe_search_mapping(cfile, u_addr, u_size,
903                                                    &d_addr, NULL);
904                         if (m == NULL) {
905                                 rc = -EFAULT;
906                                 goto err_out;
907                         }
908
909                         *((__be64 *)&cmd->asiv[asiv_offs]) =
910                                 cpu_to_be64(d_addr);
911                         break;
912                 }
913
914                 case ATS_TYPE_SGL_RDWR:
915                 case ATS_TYPE_SGL_RD: {
916                         int page_offs, nr_pages, offs;
917
918                         u_addr = be64_to_cpu(*((__be64 *)
919                                                &cmd->asiv[asiv_offs]));
920                         u_size = be32_to_cpu(*((__be32 *)
921                                                &cmd->asiv[asiv_offs + 0x08]));
922
923                         /*
924                          * No data available. Ignore u_addr in this
925                          * case and set addr to 0. Hardware must not
926                          * fetch the empty sgl.
927                          */
928                         if (u_size == 0x0) {
929                                 *((__be64 *)&cmd->asiv[asiv_offs]) =
930                                         cpu_to_be64(0x0);
931                                 break;
932                         }
933
934                         m = genwqe_search_pin(cfile, u_addr, u_size, NULL);
935                         if (m != NULL) {
936                                 type = "PINNING";
937                                 page_offs = (u_addr -
938                                              (u64)m->u_vaddr)/PAGE_SIZE;
939                         } else {
940                                 type = "MAPPING";
941                                 m = &req->dma_mappings[i];
942
943                                 genwqe_mapping_init(m,
944                                                     GENWQE_MAPPING_SGL_TEMP);
945                                 rc = genwqe_user_vmap(cd, m, (void *)u_addr,
946                                                       u_size, req);
947                                 if (rc != 0)
948                                         goto err_out;
949
950                                 __genwqe_add_mapping(cfile, m);
951                                 page_offs = 0;
952                         }
953
954                         offs = offset_in_page(u_addr);
955                         nr_pages = DIV_ROUND_UP(offs + u_size, PAGE_SIZE);
956
957                         /* create genwqe style scatter gather list */
958                         req->sgl[i] = genwqe_alloc_sgl(cd, m->nr_pages,
959                                                       &req->sgl_dma_addr[i],
960                                                       &req->sgl_size[i]);
961                         if (req->sgl[i] == NULL) {
962                                 rc = -ENOMEM;
963                                 goto err_out;
964                         }
965                         genwqe_setup_sgl(cd, offs, u_size,
966                                         req->sgl[i],
967                                         req->sgl_dma_addr[i],
968                                         req->sgl_size[i],
969                                         m->dma_list,
970                                         page_offs,
971                                         nr_pages);
972
973                         *((__be64 *)&cmd->asiv[asiv_offs]) =
974                                 cpu_to_be64(req->sgl_dma_addr[i]);
975
976                         break;
977                 }
978                 default:
979                         rc = -EINVAL;
980                         goto err_out;
981                 }
982         }
983         return 0;
984
985  err_out:
986         ddcb_cmd_cleanup(cfile, req);
987         return rc;
988 }
989
990 /**
991  * genwqe_execute_ddcb() - Execute DDCB using userspace address fixups
992  *
993  * The code will build up the translation tables or lookup the
994  * contignous memory allocation table to find the right translations
995  * and DMA addresses.
996  */
997 static int genwqe_execute_ddcb(struct genwqe_file *cfile,
998                                struct genwqe_ddcb_cmd *cmd)
999 {
1000         int rc;
1001         struct genwqe_dev *cd = cfile->cd;
1002         struct ddcb_requ *req = container_of(cmd, struct ddcb_requ, cmd);
1003
1004         rc = ddcb_cmd_fixups(cfile, req);
1005         if (rc != 0)
1006                 return rc;
1007
1008         rc = __genwqe_execute_raw_ddcb(cd, cmd);
1009         ddcb_cmd_cleanup(cfile, req);
1010         return rc;
1011 }
1012
1013 static int do_execute_ddcb(struct genwqe_file *cfile,
1014                            unsigned long arg, int raw)
1015 {
1016         int rc;
1017         struct genwqe_ddcb_cmd *cmd;
1018         struct ddcb_requ *req;
1019         struct genwqe_dev *cd = cfile->cd;
1020
1021         cmd = ddcb_requ_alloc();
1022         if (cmd == NULL)
1023                 return -ENOMEM;
1024
1025         req = container_of(cmd, struct ddcb_requ, cmd);
1026
1027         if (copy_from_user(cmd, (void __user *)arg, sizeof(*cmd))) {
1028                 ddcb_requ_free(cmd);
1029                 return -EFAULT;
1030         }
1031
1032         if (!raw)
1033                 rc = genwqe_execute_ddcb(cfile, cmd);
1034         else
1035                 rc = __genwqe_execute_raw_ddcb(cd, cmd);
1036
1037         /* Copy back only the modifed fields. Do not copy ASIV
1038            back since the copy got modified by the driver. */
1039         if (copy_to_user((void __user *)arg, cmd,
1040                          sizeof(*cmd) - DDCB_ASIV_LENGTH)) {
1041                 ddcb_requ_free(cmd);
1042                 return -EFAULT;
1043         }
1044
1045         ddcb_requ_free(cmd);
1046         return rc;
1047 }
1048
1049 /**
1050  * genwqe_ioctl() - IO control
1051  * @filp:       file handle
1052  * @cmd:        command identifier (passed from user)
1053  * @arg:        argument (passed from user)
1054  *
1055  * Return: 0 success
1056  */
1057 static long genwqe_ioctl(struct file *filp, unsigned int cmd,
1058                          unsigned long arg)
1059 {
1060         int rc = 0;
1061         struct genwqe_file *cfile = (struct genwqe_file *)filp->private_data;
1062         struct genwqe_dev *cd = cfile->cd;
1063         struct genwqe_reg_io __user *io;
1064         u64 val;
1065         u32 reg_offs;
1066
1067         if (_IOC_TYPE(cmd) != GENWQE_IOC_CODE)
1068                 return -EINVAL;
1069
1070         switch (cmd) {
1071
1072         case GENWQE_GET_CARD_STATE:
1073                 put_user(cd->card_state, (enum genwqe_card_state __user *)arg);
1074                 return 0;
1075
1076                 /* Register access */
1077         case GENWQE_READ_REG64: {
1078                 io = (struct genwqe_reg_io __user *)arg;
1079
1080                 if (get_user(reg_offs, &io->num))
1081                         return -EFAULT;
1082
1083                 if ((reg_offs >= cd->mmio_len) || (reg_offs & 0x7))
1084                         return -EINVAL;
1085
1086                 val = __genwqe_readq(cd, reg_offs);
1087                 put_user(val, &io->val64);
1088                 return 0;
1089         }
1090
1091         case GENWQE_WRITE_REG64: {
1092                 io = (struct genwqe_reg_io __user *)arg;
1093
1094                 if (!capable(CAP_SYS_ADMIN))
1095                         return -EPERM;
1096
1097                 if ((filp->f_flags & O_ACCMODE) == O_RDONLY)
1098                         return -EPERM;
1099
1100                 if (get_user(reg_offs, &io->num))
1101                         return -EFAULT;
1102
1103                 if ((reg_offs >= cd->mmio_len) || (reg_offs & 0x7))
1104                         return -EINVAL;
1105
1106                 if (get_user(val, &io->val64))
1107                         return -EFAULT;
1108
1109                 __genwqe_writeq(cd, reg_offs, val);
1110                 return 0;
1111         }
1112
1113         case GENWQE_READ_REG32: {
1114                 io = (struct genwqe_reg_io __user *)arg;
1115
1116                 if (get_user(reg_offs, &io->num))
1117                         return -EFAULT;
1118
1119                 if ((reg_offs >= cd->mmio_len) || (reg_offs & 0x3))
1120                         return -EINVAL;
1121
1122                 val = __genwqe_readl(cd, reg_offs);
1123                 put_user(val, &io->val64);
1124                 return 0;
1125         }
1126
1127         case GENWQE_WRITE_REG32: {
1128                 io = (struct genwqe_reg_io __user *)arg;
1129
1130                 if (!capable(CAP_SYS_ADMIN))
1131                         return -EPERM;
1132
1133                 if ((filp->f_flags & O_ACCMODE) == O_RDONLY)
1134                         return -EPERM;
1135
1136                 if (get_user(reg_offs, &io->num))
1137                         return -EFAULT;
1138
1139                 if ((reg_offs >= cd->mmio_len) || (reg_offs & 0x3))
1140                         return -EINVAL;
1141
1142                 if (get_user(val, &io->val64))
1143                         return -EFAULT;
1144
1145                 __genwqe_writel(cd, reg_offs, val);
1146                 return 0;
1147         }
1148
1149                 /* Flash update/reading */
1150         case GENWQE_SLU_UPDATE: {
1151                 struct genwqe_bitstream load;
1152
1153                 if (!genwqe_is_privileged(cd))
1154                         return -EPERM;
1155
1156                 if ((filp->f_flags & O_ACCMODE) == O_RDONLY)
1157                         return -EPERM;
1158
1159                 if (copy_from_user(&load, (void __user *)arg,
1160                                    sizeof(load)))
1161                         return -EFAULT;
1162
1163                 rc = do_flash_update(cfile, &load);
1164
1165                 if (copy_to_user((void __user *)arg, &load, sizeof(load)))
1166                         return -EFAULT;
1167
1168                 return rc;
1169         }
1170
1171         case GENWQE_SLU_READ: {
1172                 struct genwqe_bitstream load;
1173
1174                 if (!genwqe_is_privileged(cd))
1175                         return -EPERM;
1176
1177                 if (genwqe_flash_readback_fails(cd))
1178                         return -ENOSPC;  /* known to fail for old versions */
1179
1180                 if (copy_from_user(&load, (void __user *)arg, sizeof(load)))
1181                         return -EFAULT;
1182
1183                 rc = do_flash_read(cfile, &load);
1184
1185                 if (copy_to_user((void __user *)arg, &load, sizeof(load)))
1186                         return -EFAULT;
1187
1188                 return rc;
1189         }
1190
1191                 /* memory pinning and unpinning */
1192         case GENWQE_PIN_MEM: {
1193                 struct genwqe_mem m;
1194
1195                 if (copy_from_user(&m, (void __user *)arg, sizeof(m)))
1196                         return -EFAULT;
1197
1198                 return genwqe_pin_mem(cfile, &m);
1199         }
1200
1201         case GENWQE_UNPIN_MEM: {
1202                 struct genwqe_mem m;
1203
1204                 if (copy_from_user(&m, (void __user *)arg, sizeof(m)))
1205                         return -EFAULT;
1206
1207                 return genwqe_unpin_mem(cfile, &m);
1208         }
1209
1210                 /* launch an DDCB and wait for completion */
1211         case GENWQE_EXECUTE_DDCB:
1212                 return do_execute_ddcb(cfile, arg, 0);
1213
1214         case GENWQE_EXECUTE_RAW_DDCB: {
1215
1216                 if (!capable(CAP_SYS_ADMIN))
1217                         return -EPERM;
1218
1219                 return do_execute_ddcb(cfile, arg, 1);
1220         }
1221
1222         default:
1223                 return -EINVAL;
1224         }
1225
1226         return rc;
1227 }
1228
1229 #if defined(CONFIG_COMPAT)
1230 /**
1231  * genwqe_compat_ioctl() - Compatibility ioctl
1232  *
1233  * Called whenever a 32-bit process running under a 64-bit kernel
1234  * performs an ioctl on /dev/genwqe<n>_card.
1235  *
1236  * @filp:        file pointer.
1237  * @cmd:         command.
1238  * @arg:         user argument.
1239  * Return:       zero on success or negative number on failure.
1240  */
1241 static long genwqe_compat_ioctl(struct file *filp, unsigned int cmd,
1242                                 unsigned long arg)
1243 {
1244         return genwqe_ioctl(filp, cmd, arg);
1245 }
1246 #endif /* defined(CONFIG_COMPAT) */
1247
1248 static const struct file_operations genwqe_fops = {
1249         .owner          = THIS_MODULE,
1250         .open           = genwqe_open,
1251         .fasync         = genwqe_fasync,
1252         .mmap           = genwqe_mmap,
1253         .unlocked_ioctl = genwqe_ioctl,
1254 #if defined(CONFIG_COMPAT)
1255         .compat_ioctl   = genwqe_compat_ioctl,
1256 #endif
1257         .release        = genwqe_release,
1258 };
1259
1260 static int genwqe_device_initialized(struct genwqe_dev *cd)
1261 {
1262         return cd->dev != NULL;
1263 }
1264
1265 /**
1266  * genwqe_device_create() - Create and configure genwqe char device
1267  * @cd:      genwqe device descriptor
1268  *
1269  * This function must be called before we create any more genwqe
1270  * character devices, because it is allocating the major and minor
1271  * number which are supposed to be used by the client drivers.
1272  */
1273 int genwqe_device_create(struct genwqe_dev *cd)
1274 {
1275         int rc;
1276         struct pci_dev *pci_dev = cd->pci_dev;
1277
1278         /*
1279          * Here starts the individual setup per client. It must
1280          * initialize its own cdev data structure with its own fops.
1281          * The appropriate devnum needs to be created. The ranges must
1282          * not overlap.
1283          */
1284         rc = alloc_chrdev_region(&cd->devnum_genwqe, 0,
1285                                  GENWQE_MAX_MINOR, GENWQE_DEVNAME);
1286         if (rc < 0) {
1287                 dev_err(&pci_dev->dev, "err: alloc_chrdev_region failed\n");
1288                 goto err_dev;
1289         }
1290
1291         cdev_init(&cd->cdev_genwqe, &genwqe_fops);
1292         cd->cdev_genwqe.owner = THIS_MODULE;
1293
1294         rc = cdev_add(&cd->cdev_genwqe, cd->devnum_genwqe, 1);
1295         if (rc < 0) {
1296                 dev_err(&pci_dev->dev, "err: cdev_add failed\n");
1297                 goto err_add;
1298         }
1299
1300         /*
1301          * Finally the device in /dev/... must be created. The rule is
1302          * to use card%d_clientname for each created device.
1303          */
1304         cd->dev = device_create_with_groups(cd->class_genwqe,
1305                                             &cd->pci_dev->dev,
1306                                             cd->devnum_genwqe, cd,
1307                                             genwqe_attribute_groups,
1308                                             GENWQE_DEVNAME "%u_card",
1309                                             cd->card_idx);
1310         if (IS_ERR(cd->dev)) {
1311                 rc = PTR_ERR(cd->dev);
1312                 goto err_cdev;
1313         }
1314
1315         rc = genwqe_init_debugfs(cd);
1316         if (rc != 0)
1317                 goto err_debugfs;
1318
1319         return 0;
1320
1321  err_debugfs:
1322         device_destroy(cd->class_genwqe, cd->devnum_genwqe);
1323  err_cdev:
1324         cdev_del(&cd->cdev_genwqe);
1325  err_add:
1326         unregister_chrdev_region(cd->devnum_genwqe, GENWQE_MAX_MINOR);
1327  err_dev:
1328         cd->dev = NULL;
1329         return rc;
1330 }
1331
1332 static int genwqe_inform_and_stop_processes(struct genwqe_dev *cd)
1333 {
1334         int rc;
1335         unsigned int i;
1336         struct pci_dev *pci_dev = cd->pci_dev;
1337
1338         if (!genwqe_open_files(cd))
1339                 return 0;
1340
1341         dev_warn(&pci_dev->dev, "[%s] send SIGIO and wait ...\n", __func__);
1342
1343         rc = genwqe_kill_fasync(cd, SIGIO);
1344         if (rc > 0) {
1345                 /* give kill_timeout seconds to close file descriptors ... */
1346                 for (i = 0; (i < genwqe_kill_timeout) &&
1347                              genwqe_open_files(cd); i++) {
1348                         dev_info(&pci_dev->dev, "  %d sec ...", i);
1349
1350                         cond_resched();
1351                         msleep(1000);
1352                 }
1353
1354                 /* if no open files we can safely continue, else ... */
1355                 if (!genwqe_open_files(cd))
1356                         return 0;
1357
1358                 dev_warn(&pci_dev->dev,
1359                          "[%s] send SIGKILL and wait ...\n", __func__);
1360
1361                 rc = genwqe_force_sig(cd, SIGKILL); /* force terminate */
1362                 if (rc) {
1363                         /* Give kill_timout more seconds to end processes */
1364                         for (i = 0; (i < genwqe_kill_timeout) &&
1365                                      genwqe_open_files(cd); i++) {
1366                                 dev_warn(&pci_dev->dev, "  %d sec ...", i);
1367
1368                                 cond_resched();
1369                                 msleep(1000);
1370                         }
1371                 }
1372         }
1373         return 0;
1374 }
1375
1376 /**
1377  * genwqe_device_remove() - Remove genwqe's char device
1378  *
1379  * This function must be called after the client devices are removed
1380  * because it will free the major/minor number range for the genwqe
1381  * drivers.
1382  *
1383  * This function must be robust enough to be called twice.
1384  */
1385 int genwqe_device_remove(struct genwqe_dev *cd)
1386 {
1387         int rc;
1388         struct pci_dev *pci_dev = cd->pci_dev;
1389
1390         if (!genwqe_device_initialized(cd))
1391                 return 1;
1392
1393         genwqe_inform_and_stop_processes(cd);
1394
1395         /*
1396          * We currently do wait until all filedescriptors are
1397          * closed. This leads to a problem when we abort the
1398          * application which will decrease this reference from
1399          * 1/unused to 0/illegal and not from 2/used 1/empty.
1400          */
1401         rc = atomic_read(&cd->cdev_genwqe.kobj.kref.refcount);
1402         if (rc != 1) {
1403                 dev_err(&pci_dev->dev,
1404                         "[%s] err: cdev_genwqe...refcount=%d\n", __func__, rc);
1405                 panic("Fatal err: cannot free resources with pending references!");
1406         }
1407
1408         genqwe_exit_debugfs(cd);
1409         device_destroy(cd->class_genwqe, cd->devnum_genwqe);
1410         cdev_del(&cd->cdev_genwqe);
1411         unregister_chrdev_region(cd->devnum_genwqe, GENWQE_MAX_MINOR);
1412         cd->dev = NULL;
1413
1414         return 0;
1415 }