2 * twl6030-irq.c - TWL6030 irq support
4 * Copyright (C) 2005-2009 Texas Instruments, Inc.
6 * Modifications to defer interrupt handling to a kernel thread:
7 * Copyright (C) 2006 MontaVista Software, Inc.
9 * Based on tlv320aic23.c:
10 * Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
12 * Code cleanup and modifications to IRQ handler.
13 * by syed khasim <x0khasim@ti.com>
15 * TWL6030 specific code and IRQ handling changes by
16 * Jagadeesh Bhaskar Pakaravoor <j-pakaravoor@ti.com>
17 * Balaji T K <balajitk@ti.com>
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License as published by
21 * the Free Software Foundation; either version 2 of the License, or
22 * (at your option) any later version.
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
34 #include <linux/init.h>
35 #include <linux/export.h>
36 #include <linux/interrupt.h>
37 #include <linux/irq.h>
38 #include <linux/kthread.h>
39 #include <linux/i2c/twl.h>
40 #include <linux/platform_device.h>
45 * TWL6030 (unlike its predecessors, which had two level interrupt handling)
46 * three interrupt registers INT_STS_A, INT_STS_B and INT_STS_C.
47 * It exposes status bits saying who has raised an interrupt. There are
48 * three mask registers that corresponds to these status registers, that
49 * enables/disables these interrupts.
51 * We set up IRQs starting at a platform-specified base. An interrupt map table,
52 * specifies mapping between interrupt number and the associated module.
56 static int twl6030_interrupt_mapping[24] = {
57 PWR_INTR_OFFSET, /* Bit 0 PWRON */
58 PWR_INTR_OFFSET, /* Bit 1 RPWRON */
59 PWR_INTR_OFFSET, /* Bit 2 BAT_VLOW */
60 RTC_INTR_OFFSET, /* Bit 3 RTC_ALARM */
61 RTC_INTR_OFFSET, /* Bit 4 RTC_PERIOD */
62 HOTDIE_INTR_OFFSET, /* Bit 5 HOT_DIE */
63 SMPSLDO_INTR_OFFSET, /* Bit 6 VXXX_SHORT */
64 SMPSLDO_INTR_OFFSET, /* Bit 7 VMMC_SHORT */
66 SMPSLDO_INTR_OFFSET, /* Bit 8 VUSIM_SHORT */
67 BATDETECT_INTR_OFFSET, /* Bit 9 BAT */
68 SIMDETECT_INTR_OFFSET, /* Bit 10 SIM */
69 MMCDETECT_INTR_OFFSET, /* Bit 11 MMC */
70 RSV_INTR_OFFSET, /* Bit 12 Reserved */
71 MADC_INTR_OFFSET, /* Bit 13 GPADC_RT_EOC */
72 MADC_INTR_OFFSET, /* Bit 14 GPADC_SW_EOC */
73 GASGAUGE_INTR_OFFSET, /* Bit 15 CC_AUTOCAL */
75 USBOTG_INTR_OFFSET, /* Bit 16 ID_WKUP */
76 USBOTG_INTR_OFFSET, /* Bit 17 VBUS_WKUP */
77 USBOTG_INTR_OFFSET, /* Bit 18 ID */
78 USB_PRES_INTR_OFFSET, /* Bit 19 VBUS */
79 CHARGER_INTR_OFFSET, /* Bit 20 CHRG_CTRL */
80 CHARGERFAULT_INTR_OFFSET, /* Bit 21 EXT_CHRG */
81 CHARGERFAULT_INTR_OFFSET, /* Bit 22 INT_CHRG */
82 RSV_INTR_OFFSET, /* Bit 23 Reserved */
84 /*----------------------------------------------------------------------*/
86 static unsigned twl6030_irq_base;
88 static struct completion irq_event;
91 * This thread processes interrupts reported by the Primary Interrupt Handler.
93 static int twl6030_irq_thread(void *data)
95 long irq = (long)data;
96 static unsigned i2c_errors;
97 static const unsigned max_i2c_errors = 100;
100 current->flags |= PF_NOFREEZE;
102 while (!kthread_should_stop()) {
109 /* Wait for IRQ, then read PIH irq status (also blocking) */
110 wait_for_completion_interruptible(&irq_event);
112 /* read INT_STS_A, B and C in one shot using a burst read */
113 ret = twl_i2c_read(TWL_MODULE_PIH, sts.bytes,
116 pr_warning("twl6030: I2C error %d reading PIH ISR\n",
118 if (++i2c_errors >= max_i2c_errors) {
119 printk(KERN_ERR "Maximum I2C error count"
120 " exceeded. Terminating %s.\n",
124 complete(&irq_event);
130 sts.bytes[3] = 0; /* Only 24 bits are valid*/
133 * Since VBUS status bit is not reliable for VBUS disconnect
134 * use CHARGER VBUS detection status bit instead.
136 if (sts.bytes[2] & 0x10)
137 sts.bytes[2] |= 0x08;
139 for (i = 0; sts.int_sts; sts.int_sts >>= 1, i++) {
141 if (sts.int_sts & 0x1) {
142 int module_irq = twl6030_irq_base +
143 twl6030_interrupt_mapping[i];
144 generic_handle_irq(module_irq);
149 ret = twl_i2c_write(TWL_MODULE_PIH, sts.bytes,
150 REG_INT_STS_A, 3); /* clear INT_STS_A */
152 pr_warning("twl6030: I2C error in clearing PIH ISR\n");
161 * handle_twl6030_int() is the desc->handle method for the twl6030 interrupt.
162 * This is a chained interrupt, so there is no desc->action method for it.
163 * Now we need to query the interrupt controller in the twl6030 to determine
164 * which module is generating the interrupt request. However, we can't do i2c
165 * transactions in interrupt context, so we must defer that work to a kernel
166 * thread. All we do here is acknowledge and mask the interrupt and wakeup
169 static irqreturn_t handle_twl6030_pih(int irq, void *devid)
171 disable_irq_nosync(irq);
176 /*----------------------------------------------------------------------*/
178 static inline void activate_irq(int irq)
181 /* ARM requires an extra step to clear IRQ_NOREQUEST, which it
182 * sets on behalf of every irq_chip. Also sets IRQ_NOPROBE.
184 set_irq_flags(irq, IRQF_VALID);
186 /* same effect on other architectures */
187 irq_set_noprobe(irq);
191 /*----------------------------------------------------------------------*/
193 static unsigned twl6030_irq_next;
195 /*----------------------------------------------------------------------*/
196 int twl6030_interrupt_unmask(u8 bit_mask, u8 offset)
200 ret = twl_i2c_read_u8(TWL_MODULE_PIH, &unmask_value,
201 REG_INT_STS_A + offset);
202 unmask_value &= (~(bit_mask));
203 ret |= twl_i2c_write_u8(TWL_MODULE_PIH, unmask_value,
204 REG_INT_STS_A + offset); /* unmask INT_MSK_A/B/C */
207 EXPORT_SYMBOL(twl6030_interrupt_unmask);
209 int twl6030_interrupt_mask(u8 bit_mask, u8 offset)
213 ret = twl_i2c_read_u8(TWL_MODULE_PIH, &mask_value,
214 REG_INT_STS_A + offset);
215 mask_value |= (bit_mask);
216 ret |= twl_i2c_write_u8(TWL_MODULE_PIH, mask_value,
217 REG_INT_STS_A + offset); /* mask INT_MSK_A/B/C */
220 EXPORT_SYMBOL(twl6030_interrupt_mask);
222 int twl6030_mmc_card_detect_config(void)
227 /* Unmasking the Card detect Interrupt line for MMC1 from Phoenix */
228 twl6030_interrupt_unmask(TWL6030_MMCDETECT_INT_MASK,
230 twl6030_interrupt_unmask(TWL6030_MMCDETECT_INT_MASK,
233 * Initially Configuring MMC_CTRL for receiving interrupts &
234 * Card status on TWL6030 for MMC1
236 ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, ®_val, TWL6030_MMCCTRL);
238 pr_err("twl6030: Failed to read MMCCTRL, error %d\n", ret);
241 reg_val &= ~VMMC_AUTO_OFF;
243 ret = twl_i2c_write_u8(TWL6030_MODULE_ID0, reg_val, TWL6030_MMCCTRL);
245 pr_err("twl6030: Failed to write MMCCTRL, error %d\n", ret);
249 /* Configuring PullUp-PullDown register */
250 ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, ®_val,
251 TWL6030_CFG_INPUT_PUPD3);
253 pr_err("twl6030: Failed to read CFG_INPUT_PUPD3, error %d\n",
257 reg_val &= ~(MMC_PU | MMC_PD);
258 ret = twl_i2c_write_u8(TWL6030_MODULE_ID0, reg_val,
259 TWL6030_CFG_INPUT_PUPD3);
261 pr_err("twl6030: Failed to write CFG_INPUT_PUPD3, error %d\n",
267 EXPORT_SYMBOL(twl6030_mmc_card_detect_config);
269 int twl6030_mmc_card_detect(struct device *dev, int slot)
273 struct platform_device *pdev = to_platform_device(dev);
276 /* TWL6030 provide's Card detect support for
277 * only MMC1 controller.
279 pr_err("Unknown MMC controller %d in %s\n", pdev->id, __func__);
283 * BIT0 of MMC_CTRL on TWL6030 provides card status for MMC1
284 * 0 - Card not present ,1 - Card present
286 ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &read_reg,
289 ret = read_reg & STS_MMC;
292 EXPORT_SYMBOL(twl6030_mmc_card_detect);
294 int twl6030_init_irq(int irq_num, unsigned irq_base, unsigned irq_end)
299 struct task_struct *task;
303 static struct irq_chip twl6030_irq_chip;
307 ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0],
308 REG_INT_MSK_LINE_A, 3); /* MASK ALL INT LINES */
309 ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0],
310 REG_INT_MSK_STS_A, 3); /* MASK ALL INT STS */
311 ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0],
312 REG_INT_STS_A, 3); /* clear INT_STS_A,B,C */
314 twl6030_irq_base = irq_base;
316 /* install an irq handler for each of the modules;
317 * clone dummy irq_chip since PIH can't *do* anything
319 twl6030_irq_chip = dummy_irq_chip;
320 twl6030_irq_chip.name = "twl6030";
321 twl6030_irq_chip.irq_set_type = NULL;
323 for (i = irq_base; i < irq_end; i++) {
324 irq_set_chip_and_handler(i, &twl6030_irq_chip,
329 twl6030_irq_next = i;
330 pr_info("twl6030: %s (irq %d) chaining IRQs %d..%d\n", "PIH",
331 irq_num, irq_base, twl6030_irq_next - 1);
333 /* install an irq handler to demultiplex the TWL6030 interrupt */
334 init_completion(&irq_event);
335 task = kthread_run(twl6030_irq_thread, (void *)irq_num, "twl6030-irq");
337 pr_err("twl6030: could not create irq %d thread!\n", irq_num);
338 status = PTR_ERR(task);
342 status = request_irq(irq_num, handle_twl6030_pih, IRQF_DISABLED,
343 "TWL6030-PIH", &irq_event);
345 pr_err("twl6030: could not claim irq%d: %d\n", irq_num, status);
350 free_irq(irq_num, &irq_event);
353 for (i = irq_base; i < irq_end; i++)
354 irq_set_chip_and_handler(i, NULL, NULL);
358 int twl6030_exit_irq(void)
361 if (twl6030_irq_base) {
362 pr_err("twl6030: can't yet clean up IRQs?\n");