2 * Support for the GPIO/IRQ expander chips present on several HTC phones.
3 * These are implemented in CPLD chips present on the board.
5 * Copyright (c) 2007 Kevin O'Connor <kevin@koconnor.net>
6 * Copyright (c) 2007 Philipp Zabel <philipp.zabel@gmail.com>
8 * This file may be distributed under the terms of the GNU GPL license.
11 #include <linux/kernel.h>
12 #include <linux/errno.h>
13 #include <linux/interrupt.h>
14 #include <linux/irq.h>
16 #include <linux/spinlock.h>
17 #include <linux/platform_device.h>
18 #include <linux/slab.h>
19 #include <linux/module.h>
20 #include <linux/mfd/htc-egpio.h>
27 struct gpio_chip chip;
34 void __iomem *base_addr;
35 int bus_shift; /* byte shift */
36 int reg_shift; /* bit shift */
48 struct egpio_chip *chip;
52 static inline void egpio_writew(u16 value, struct egpio_info *ei, int reg)
54 writew(value, ei->base_addr + (reg << ei->bus_shift));
57 static inline u16 egpio_readw(struct egpio_info *ei, int reg)
59 return readw(ei->base_addr + (reg << ei->bus_shift));
66 static inline void ack_irqs(struct egpio_info *ei)
68 egpio_writew(ei->ack_write, ei, ei->ack_register);
69 pr_debug("EGPIO ack - write %x to base+%x\n",
70 ei->ack_write, ei->ack_register << ei->bus_shift);
73 static void egpio_ack(struct irq_data *data)
77 /* There does not appear to be a way to proactively mask interrupts
78 * on the egpio chip itself. So, we simply ignore interrupts that
80 static void egpio_mask(struct irq_data *data)
82 struct egpio_info *ei = irq_data_get_irq_chip_data(data);
83 ei->irqs_enabled &= ~(1 << (data->irq - ei->irq_start));
84 pr_debug("EGPIO mask %d %04x\n", data->irq, ei->irqs_enabled);
87 static void egpio_unmask(struct irq_data *data)
89 struct egpio_info *ei = irq_data_get_irq_chip_data(data);
90 ei->irqs_enabled |= 1 << (data->irq - ei->irq_start);
91 pr_debug("EGPIO unmask %d %04x\n", data->irq, ei->irqs_enabled);
94 static struct irq_chip egpio_muxed_chip = {
97 .irq_mask = egpio_mask,
98 .irq_unmask = egpio_unmask,
101 static void egpio_handler(unsigned int irq, struct irq_desc *desc)
103 struct egpio_info *ei = irq_desc_get_handler_data(desc);
106 /* Read current pins. */
107 unsigned long readval = egpio_readw(ei, ei->ack_register);
108 pr_debug("IRQ reg: %x\n", (unsigned int)readval);
109 /* Ack/unmask interrupts. */
111 /* Process all set pins. */
112 readval &= ei->irqs_enabled;
113 for_each_set_bit(irqpin, &readval, ei->nirqs) {
114 /* Run irq handler */
115 pr_debug("got IRQ %d\n", irqpin);
116 generic_handle_irq(ei->irq_start + irqpin);
120 int htc_egpio_get_wakeup_irq(struct device *dev)
122 struct egpio_info *ei = dev_get_drvdata(dev);
124 /* Read current pins. */
125 u16 readval = egpio_readw(ei, ei->ack_register);
126 /* Ack/unmask interrupts. */
128 /* Return first set pin. */
129 readval &= ei->irqs_enabled;
130 return ei->irq_start + ffs(readval) - 1;
132 EXPORT_SYMBOL(htc_egpio_get_wakeup_irq);
134 static inline int egpio_pos(struct egpio_info *ei, int bit)
136 return bit >> ei->reg_shift;
139 static inline int egpio_bit(struct egpio_info *ei, int bit)
141 return 1 << (bit & ((1 << ei->reg_shift)-1));
148 static int egpio_get(struct gpio_chip *chip, unsigned offset)
150 struct egpio_chip *egpio;
151 struct egpio_info *ei;
156 pr_debug("egpio_get_value(%d)\n", chip->base + offset);
158 egpio = container_of(chip, struct egpio_chip, chip);
159 ei = dev_get_drvdata(egpio->dev);
160 bit = egpio_bit(ei, offset);
161 reg = egpio->reg_start + egpio_pos(ei, offset);
163 value = egpio_readw(ei, reg);
164 pr_debug("readw(%p + %x) = %x\n",
165 ei->base_addr, reg << ei->bus_shift, value);
169 static int egpio_direction_input(struct gpio_chip *chip, unsigned offset)
171 struct egpio_chip *egpio;
173 egpio = container_of(chip, struct egpio_chip, chip);
174 return test_bit(offset, &egpio->is_out) ? -EINVAL : 0;
182 static void egpio_set(struct gpio_chip *chip, unsigned offset, int value)
185 struct egpio_chip *egpio;
186 struct egpio_info *ei;
192 pr_debug("egpio_set(%s, %d(%d), %d)\n",
193 chip->label, offset, offset+chip->base, value);
195 egpio = container_of(chip, struct egpio_chip, chip);
196 ei = dev_get_drvdata(egpio->dev);
197 bit = egpio_bit(ei, offset);
198 pos = egpio_pos(ei, offset);
199 reg = egpio->reg_start + pos;
200 shift = pos << ei->reg_shift;
202 pr_debug("egpio %s: reg %d = 0x%04x\n", value ? "set" : "clear",
203 reg, (egpio->cached_values >> shift) & ei->reg_mask);
205 spin_lock_irqsave(&ei->lock, flag);
207 egpio->cached_values |= (1 << offset);
209 egpio->cached_values &= ~(1 << offset);
210 egpio_writew((egpio->cached_values >> shift) & ei->reg_mask, ei, reg);
211 spin_unlock_irqrestore(&ei->lock, flag);
214 static int egpio_direction_output(struct gpio_chip *chip,
215 unsigned offset, int value)
217 struct egpio_chip *egpio;
219 egpio = container_of(chip, struct egpio_chip, chip);
220 if (test_bit(offset, &egpio->is_out)) {
221 egpio_set(chip, offset, value);
228 static void egpio_write_cache(struct egpio_info *ei)
231 struct egpio_chip *egpio;
234 for (i = 0; i < ei->nchips; i++) {
235 egpio = &(ei->chip[i]);
239 for (shift = 0; shift < egpio->chip.ngpio;
240 shift += (1<<ei->reg_shift)) {
242 int reg = egpio->reg_start + egpio_pos(ei, shift);
244 if (!((egpio->is_out >> shift) & ei->reg_mask))
247 pr_debug("EGPIO: setting %x to %x, was %x\n", reg,
248 (egpio->cached_values >> shift) & ei->reg_mask,
249 egpio_readw(ei, reg));
251 egpio_writew((egpio->cached_values >> shift)
252 & ei->reg_mask, ei, reg);
262 static int __init egpio_probe(struct platform_device *pdev)
264 struct htc_egpio_platform_data *pdata = pdev->dev.platform_data;
265 struct resource *res;
266 struct egpio_info *ei;
267 struct gpio_chip *chip;
268 unsigned int irq, irq_end;
272 /* Initialize ei data structure. */
273 ei = kzalloc(sizeof(*ei), GFP_KERNEL);
277 spin_lock_init(&ei->lock);
279 /* Find chained irq */
281 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
283 ei->chained_irq = res->start;
285 /* Map egpio chip into virtual address space. */
286 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
289 ei->base_addr = ioremap_nocache(res->start, resource_size(res));
292 pr_debug("EGPIO phys=%08x virt=%p\n", (u32)res->start, ei->base_addr);
294 if ((pdata->bus_width != 16) && (pdata->bus_width != 32))
296 ei->bus_shift = fls(pdata->bus_width - 1) - 3;
297 pr_debug("bus_shift = %d\n", ei->bus_shift);
299 if ((pdata->reg_width != 8) && (pdata->reg_width != 16))
301 ei->reg_shift = fls(pdata->reg_width - 1);
302 pr_debug("reg_shift = %d\n", ei->reg_shift);
304 ei->reg_mask = (1 << pdata->reg_width) - 1;
306 platform_set_drvdata(pdev, ei);
308 ei->nchips = pdata->num_chips;
309 ei->chip = kzalloc(sizeof(struct egpio_chip) * ei->nchips, GFP_KERNEL);
314 for (i = 0; i < ei->nchips; i++) {
315 ei->chip[i].reg_start = pdata->chip[i].reg_start;
316 ei->chip[i].cached_values = pdata->chip[i].initial_values;
317 ei->chip[i].is_out = pdata->chip[i].direction;
318 ei->chip[i].dev = &(pdev->dev);
319 chip = &(ei->chip[i].chip);
320 chip->label = "htc-egpio";
321 chip->dev = &pdev->dev;
322 chip->owner = THIS_MODULE;
323 chip->get = egpio_get;
324 chip->set = egpio_set;
325 chip->direction_input = egpio_direction_input;
326 chip->direction_output = egpio_direction_output;
327 chip->base = pdata->chip[i].gpio_base;
328 chip->ngpio = pdata->chip[i].num_gpios;
333 /* Set initial pin values */
334 egpio_write_cache(ei);
336 ei->irq_start = pdata->irq_base;
337 ei->nirqs = pdata->num_irqs;
338 ei->ack_register = pdata->ack_register;
340 if (ei->chained_irq) {
341 /* Setup irq handlers */
342 ei->ack_write = 0xFFFF;
343 if (pdata->invert_acks)
345 irq_end = ei->irq_start + ei->nirqs;
346 for (irq = ei->irq_start; irq < irq_end; irq++) {
347 irq_set_chip_and_handler(irq, &egpio_muxed_chip,
349 irq_set_chip_data(irq, ei);
350 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
352 irq_set_irq_type(ei->chained_irq, IRQ_TYPE_EDGE_RISING);
353 irq_set_handler_data(ei->chained_irq, ei);
354 irq_set_chained_handler(ei->chained_irq, egpio_handler);
357 device_init_wakeup(&pdev->dev, 1);
363 printk(KERN_ERR "EGPIO failed to setup\n");
368 static int __exit egpio_remove(struct platform_device *pdev)
370 struct egpio_info *ei = platform_get_drvdata(pdev);
371 unsigned int irq, irq_end;
373 if (ei->chained_irq) {
374 irq_end = ei->irq_start + ei->nirqs;
375 for (irq = ei->irq_start; irq < irq_end; irq++) {
376 irq_set_chip_and_handler(irq, NULL, NULL);
377 set_irq_flags(irq, 0);
379 irq_set_chained_handler(ei->chained_irq, NULL);
380 device_init_wakeup(&pdev->dev, 0);
382 iounmap(ei->base_addr);
390 static int egpio_suspend(struct platform_device *pdev, pm_message_t state)
392 struct egpio_info *ei = platform_get_drvdata(pdev);
394 if (ei->chained_irq && device_may_wakeup(&pdev->dev))
395 enable_irq_wake(ei->chained_irq);
399 static int egpio_resume(struct platform_device *pdev)
401 struct egpio_info *ei = platform_get_drvdata(pdev);
403 if (ei->chained_irq && device_may_wakeup(&pdev->dev))
404 disable_irq_wake(ei->chained_irq);
406 /* Update registers from the cache, in case
407 the CPLD was powered off during suspend */
408 egpio_write_cache(ei);
412 #define egpio_suspend NULL
413 #define egpio_resume NULL
417 static struct platform_driver egpio_driver = {
421 .remove = __exit_p(egpio_remove),
422 .suspend = egpio_suspend,
423 .resume = egpio_resume,
426 static int __init egpio_init(void)
428 return platform_driver_probe(&egpio_driver, egpio_probe);
431 static void __exit egpio_exit(void)
433 platform_driver_unregister(&egpio_driver);
436 /* start early for dependencies */
437 subsys_initcall(egpio_init);
438 module_exit(egpio_exit)
440 MODULE_LICENSE("GPL");
441 MODULE_AUTHOR("Kevin O'Connor <kevin@koconnor.net>");