[media] V4L: ov9740: support the new mbus-config subdev ops
[pandora-kernel.git] / drivers / media / video / ov9740.c
1 /*
2  * OmniVision OV9740 Camera Driver
3  *
4  * Copyright (C) 2011 NVIDIA Corporation
5  *
6  * Based on ov9640 camera driver.
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/i2c.h>
16 #include <linux/slab.h>
17
18 #include <media/soc_camera.h>
19 #include <media/soc_mediabus.h>
20 #include <media/v4l2-chip-ident.h>
21
22 #define to_ov9740(sd)           container_of(sd, struct ov9740_priv, subdev)
23
24 /* General Status Registers */
25 #define OV9740_MODEL_ID_HI              0x0000
26 #define OV9740_MODEL_ID_LO              0x0001
27 #define OV9740_REVISION_NUMBER          0x0002
28 #define OV9740_MANUFACTURER_ID          0x0003
29 #define OV9740_SMIA_VERSION             0x0004
30
31 /* General Setup Registers */
32 #define OV9740_MODE_SELECT              0x0100
33 #define OV9740_IMAGE_ORT                0x0101
34 #define OV9740_SOFTWARE_RESET           0x0103
35 #define OV9740_GRP_PARAM_HOLD           0x0104
36 #define OV9740_MSK_CORRUP_FM            0x0105
37
38 /* Timing Setting */
39 #define OV9740_FRM_LENGTH_LN_HI         0x0340 /* VTS */
40 #define OV9740_FRM_LENGTH_LN_LO         0x0341 /* VTS */
41 #define OV9740_LN_LENGTH_PCK_HI         0x0342 /* HTS */
42 #define OV9740_LN_LENGTH_PCK_LO         0x0343 /* HTS */
43 #define OV9740_X_ADDR_START_HI          0x0344
44 #define OV9740_X_ADDR_START_LO          0x0345
45 #define OV9740_Y_ADDR_START_HI          0x0346
46 #define OV9740_Y_ADDR_START_LO          0x0347
47 #define OV9740_X_ADDR_END_HI            0x0348
48 #define OV9740_X_ADDR_END_LO            0x0349
49 #define OV9740_Y_ADDR_END_HI            0x034a
50 #define OV9740_Y_ADDR_END_LO            0x034b
51 #define OV9740_X_OUTPUT_SIZE_HI         0x034c
52 #define OV9740_X_OUTPUT_SIZE_LO         0x034d
53 #define OV9740_Y_OUTPUT_SIZE_HI         0x034e
54 #define OV9740_Y_OUTPUT_SIZE_LO         0x034f
55
56 /* IO Control Registers */
57 #define OV9740_IO_CREL00                0x3002
58 #define OV9740_IO_CREL01                0x3004
59 #define OV9740_IO_CREL02                0x3005
60 #define OV9740_IO_OUTPUT_SEL01          0x3026
61 #define OV9740_IO_OUTPUT_SEL02          0x3027
62
63 /* AWB Registers */
64 #define OV9740_AWB_MANUAL_CTRL          0x3406
65
66 /* Analog Control Registers */
67 #define OV9740_ANALOG_CTRL01            0x3601
68 #define OV9740_ANALOG_CTRL02            0x3602
69 #define OV9740_ANALOG_CTRL03            0x3603
70 #define OV9740_ANALOG_CTRL04            0x3604
71 #define OV9740_ANALOG_CTRL10            0x3610
72 #define OV9740_ANALOG_CTRL12            0x3612
73 #define OV9740_ANALOG_CTRL15            0x3615
74 #define OV9740_ANALOG_CTRL20            0x3620
75 #define OV9740_ANALOG_CTRL21            0x3621
76 #define OV9740_ANALOG_CTRL22            0x3622
77 #define OV9740_ANALOG_CTRL30            0x3630
78 #define OV9740_ANALOG_CTRL31            0x3631
79 #define OV9740_ANALOG_CTRL32            0x3632
80 #define OV9740_ANALOG_CTRL33            0x3633
81
82 /* Sensor Control */
83 #define OV9740_SENSOR_CTRL03            0x3703
84 #define OV9740_SENSOR_CTRL04            0x3704
85 #define OV9740_SENSOR_CTRL05            0x3705
86 #define OV9740_SENSOR_CTRL07            0x3707
87
88 /* Timing Control */
89 #define OV9740_TIMING_CTRL17            0x3817
90 #define OV9740_TIMING_CTRL19            0x3819
91 #define OV9740_TIMING_CTRL33            0x3833
92 #define OV9740_TIMING_CTRL35            0x3835
93
94 /* Banding Filter */
95 #define OV9740_AEC_MAXEXPO_60_H         0x3a02
96 #define OV9740_AEC_MAXEXPO_60_L         0x3a03
97 #define OV9740_AEC_B50_STEP_HI          0x3a08
98 #define OV9740_AEC_B50_STEP_LO          0x3a09
99 #define OV9740_AEC_B60_STEP_HI          0x3a0a
100 #define OV9740_AEC_B60_STEP_LO          0x3a0b
101 #define OV9740_AEC_CTRL0D               0x3a0d
102 #define OV9740_AEC_CTRL0E               0x3a0e
103 #define OV9740_AEC_MAXEXPO_50_H         0x3a14
104 #define OV9740_AEC_MAXEXPO_50_L         0x3a15
105
106 /* AEC/AGC Control */
107 #define OV9740_AEC_ENABLE               0x3503
108 #define OV9740_GAIN_CEILING_01          0x3a18
109 #define OV9740_GAIN_CEILING_02          0x3a19
110 #define OV9740_AEC_HI_THRESHOLD         0x3a11
111 #define OV9740_AEC_3A1A                 0x3a1a
112 #define OV9740_AEC_CTRL1B_WPT2          0x3a1b
113 #define OV9740_AEC_CTRL0F_WPT           0x3a0f
114 #define OV9740_AEC_CTRL10_BPT           0x3a10
115 #define OV9740_AEC_CTRL1E_BPT2          0x3a1e
116 #define OV9740_AEC_LO_THRESHOLD         0x3a1f
117
118 /* BLC Control */
119 #define OV9740_BLC_AUTO_ENABLE          0x4002
120 #define OV9740_BLC_MODE                 0x4005
121
122 /* VFIFO */
123 #define OV9740_VFIFO_READ_START_HI      0x4608
124 #define OV9740_VFIFO_READ_START_LO      0x4609
125
126 /* DVP Control */
127 #define OV9740_DVP_VSYNC_CTRL02         0x4702
128 #define OV9740_DVP_VSYNC_MODE           0x4704
129 #define OV9740_DVP_VSYNC_CTRL06         0x4706
130
131 /* PLL Setting */
132 #define OV9740_PLL_MODE_CTRL01          0x3104
133 #define OV9740_PRE_PLL_CLK_DIV          0x0305
134 #define OV9740_PLL_MULTIPLIER           0x0307
135 #define OV9740_VT_SYS_CLK_DIV           0x0303
136 #define OV9740_VT_PIX_CLK_DIV           0x0301
137 #define OV9740_PLL_CTRL3010             0x3010
138 #define OV9740_VFIFO_CTRL00             0x460e
139
140 /* ISP Control */
141 #define OV9740_ISP_CTRL00               0x5000
142 #define OV9740_ISP_CTRL01               0x5001
143 #define OV9740_ISP_CTRL03               0x5003
144 #define OV9740_ISP_CTRL05               0x5005
145 #define OV9740_ISP_CTRL12               0x5012
146 #define OV9740_ISP_CTRL19               0x5019
147 #define OV9740_ISP_CTRL1A               0x501a
148 #define OV9740_ISP_CTRL1E               0x501e
149 #define OV9740_ISP_CTRL1F               0x501f
150 #define OV9740_ISP_CTRL20               0x5020
151 #define OV9740_ISP_CTRL21               0x5021
152
153 /* AWB */
154 #define OV9740_AWB_CTRL00               0x5180
155 #define OV9740_AWB_CTRL01               0x5181
156 #define OV9740_AWB_CTRL02               0x5182
157 #define OV9740_AWB_CTRL03               0x5183
158 #define OV9740_AWB_ADV_CTRL01           0x5184
159 #define OV9740_AWB_ADV_CTRL02           0x5185
160 #define OV9740_AWB_ADV_CTRL03           0x5186
161 #define OV9740_AWB_ADV_CTRL04           0x5187
162 #define OV9740_AWB_ADV_CTRL05           0x5188
163 #define OV9740_AWB_ADV_CTRL06           0x5189
164 #define OV9740_AWB_ADV_CTRL07           0x518a
165 #define OV9740_AWB_ADV_CTRL08           0x518b
166 #define OV9740_AWB_ADV_CTRL09           0x518c
167 #define OV9740_AWB_ADV_CTRL10           0x518d
168 #define OV9740_AWB_ADV_CTRL11           0x518e
169 #define OV9740_AWB_CTRL0F               0x518f
170 #define OV9740_AWB_CTRL10               0x5190
171 #define OV9740_AWB_CTRL11               0x5191
172 #define OV9740_AWB_CTRL12               0x5192
173 #define OV9740_AWB_CTRL13               0x5193
174 #define OV9740_AWB_CTRL14               0x5194
175
176 /* MIPI Control */
177 #define OV9740_MIPI_CTRL00              0x4800
178 #define OV9740_MIPI_3837                0x3837
179 #define OV9740_MIPI_CTRL01              0x4801
180 #define OV9740_MIPI_CTRL03              0x4803
181 #define OV9740_MIPI_CTRL05              0x4805
182 #define OV9740_VFIFO_RD_CTRL            0x4601
183 #define OV9740_MIPI_CTRL_3012           0x3012
184 #define OV9740_SC_CMMM_MIPI_CTR         0x3014
185
186 #define OV9740_MAX_WIDTH                1280
187 #define OV9740_MAX_HEIGHT               720
188
189 /* Misc. structures */
190 struct ov9740_reg {
191         u16                             reg;
192         u8                              val;
193 };
194
195 struct ov9740_priv {
196         struct v4l2_subdev              subdev;
197
198         int                             ident;
199         u16                             model;
200         u8                              revision;
201         u8                              manid;
202         u8                              smiaver;
203
204         bool                            flag_vflip;
205         bool                            flag_hflip;
206
207         /* For suspend/resume. */
208         struct v4l2_mbus_framefmt       current_mf;
209         bool                            current_enable;
210 };
211
212 static const struct ov9740_reg ov9740_defaults[] = {
213         /* Software Reset */
214         { OV9740_SOFTWARE_RESET,        0x01 },
215
216         /* Banding Filter */
217         { OV9740_AEC_B50_STEP_HI,       0x00 },
218         { OV9740_AEC_B50_STEP_LO,       0xe8 },
219         { OV9740_AEC_CTRL0E,            0x03 },
220         { OV9740_AEC_MAXEXPO_50_H,      0x15 },
221         { OV9740_AEC_MAXEXPO_50_L,      0xc6 },
222         { OV9740_AEC_B60_STEP_HI,       0x00 },
223         { OV9740_AEC_B60_STEP_LO,       0xc0 },
224         { OV9740_AEC_CTRL0D,            0x04 },
225         { OV9740_AEC_MAXEXPO_60_H,      0x18 },
226         { OV9740_AEC_MAXEXPO_60_L,      0x20 },
227
228         /* LC */
229         { 0x5842, 0x02 }, { 0x5843, 0x5e }, { 0x5844, 0x04 }, { 0x5845, 0x32 },
230         { 0x5846, 0x03 }, { 0x5847, 0x29 }, { 0x5848, 0x02 }, { 0x5849, 0xcc },
231
232         /* Un-documented OV9740 registers */
233         { 0x5800, 0x29 }, { 0x5801, 0x25 }, { 0x5802, 0x20 }, { 0x5803, 0x21 },
234         { 0x5804, 0x26 }, { 0x5805, 0x2e }, { 0x5806, 0x11 }, { 0x5807, 0x0c },
235         { 0x5808, 0x09 }, { 0x5809, 0x0a }, { 0x580a, 0x0e }, { 0x580b, 0x16 },
236         { 0x580c, 0x06 }, { 0x580d, 0x02 }, { 0x580e, 0x00 }, { 0x580f, 0x00 },
237         { 0x5810, 0x04 }, { 0x5811, 0x0a }, { 0x5812, 0x05 }, { 0x5813, 0x02 },
238         { 0x5814, 0x00 }, { 0x5815, 0x00 }, { 0x5816, 0x03 }, { 0x5817, 0x09 },
239         { 0x5818, 0x0f }, { 0x5819, 0x0a }, { 0x581a, 0x07 }, { 0x581b, 0x08 },
240         { 0x581c, 0x0b }, { 0x581d, 0x14 }, { 0x581e, 0x28 }, { 0x581f, 0x23 },
241         { 0x5820, 0x1d }, { 0x5821, 0x1e }, { 0x5822, 0x24 }, { 0x5823, 0x2a },
242         { 0x5824, 0x4f }, { 0x5825, 0x6f }, { 0x5826, 0x5f }, { 0x5827, 0x7f },
243         { 0x5828, 0x9f }, { 0x5829, 0x5f }, { 0x582a, 0x8f }, { 0x582b, 0x9e },
244         { 0x582c, 0x8f }, { 0x582d, 0x9f }, { 0x582e, 0x4f }, { 0x582f, 0x87 },
245         { 0x5830, 0x86 }, { 0x5831, 0x97 }, { 0x5832, 0xae }, { 0x5833, 0x3f },
246         { 0x5834, 0x8e }, { 0x5835, 0x7c }, { 0x5836, 0x7e }, { 0x5837, 0xaf },
247         { 0x5838, 0x8f }, { 0x5839, 0x8f }, { 0x583a, 0x9f }, { 0x583b, 0x7f },
248         { 0x583c, 0x5f },
249
250         /* Y Gamma */
251         { 0x5480, 0x07 }, { 0x5481, 0x18 }, { 0x5482, 0x2c }, { 0x5483, 0x4e },
252         { 0x5484, 0x5e }, { 0x5485, 0x6b }, { 0x5486, 0x77 }, { 0x5487, 0x82 },
253         { 0x5488, 0x8c }, { 0x5489, 0x95 }, { 0x548a, 0xa4 }, { 0x548b, 0xb1 },
254         { 0x548c, 0xc6 }, { 0x548d, 0xd8 }, { 0x548e, 0xe9 },
255
256         /* UV Gamma */
257         { 0x5490, 0x0f }, { 0x5491, 0xff }, { 0x5492, 0x0d }, { 0x5493, 0x05 },
258         { 0x5494, 0x07 }, { 0x5495, 0x1a }, { 0x5496, 0x04 }, { 0x5497, 0x01 },
259         { 0x5498, 0x03 }, { 0x5499, 0x53 }, { 0x549a, 0x02 }, { 0x549b, 0xeb },
260         { 0x549c, 0x02 }, { 0x549d, 0xa0 }, { 0x549e, 0x02 }, { 0x549f, 0x67 },
261         { 0x54a0, 0x02 }, { 0x54a1, 0x3b }, { 0x54a2, 0x02 }, { 0x54a3, 0x18 },
262         { 0x54a4, 0x01 }, { 0x54a5, 0xe7 }, { 0x54a6, 0x01 }, { 0x54a7, 0xc3 },
263         { 0x54a8, 0x01 }, { 0x54a9, 0x94 }, { 0x54aa, 0x01 }, { 0x54ab, 0x72 },
264         { 0x54ac, 0x01 }, { 0x54ad, 0x57 },
265
266         /* AWB */
267         { OV9740_AWB_CTRL00,            0xf0 },
268         { OV9740_AWB_CTRL01,            0x00 },
269         { OV9740_AWB_CTRL02,            0x41 },
270         { OV9740_AWB_CTRL03,            0x42 },
271         { OV9740_AWB_ADV_CTRL01,        0x8a },
272         { OV9740_AWB_ADV_CTRL02,        0x61 },
273         { OV9740_AWB_ADV_CTRL03,        0xce },
274         { OV9740_AWB_ADV_CTRL04,        0xa8 },
275         { OV9740_AWB_ADV_CTRL05,        0x17 },
276         { OV9740_AWB_ADV_CTRL06,        0x1f },
277         { OV9740_AWB_ADV_CTRL07,        0x27 },
278         { OV9740_AWB_ADV_CTRL08,        0x41 },
279         { OV9740_AWB_ADV_CTRL09,        0x34 },
280         { OV9740_AWB_ADV_CTRL10,        0xf0 },
281         { OV9740_AWB_ADV_CTRL11,        0x10 },
282         { OV9740_AWB_CTRL0F,            0xff },
283         { OV9740_AWB_CTRL10,            0x00 },
284         { OV9740_AWB_CTRL11,            0xff },
285         { OV9740_AWB_CTRL12,            0x00 },
286         { OV9740_AWB_CTRL13,            0xff },
287         { OV9740_AWB_CTRL14,            0x00 },
288
289         /* CIP */
290         { 0x530d, 0x12 },
291
292         /* CMX */
293         { 0x5380, 0x01 }, { 0x5381, 0x00 }, { 0x5382, 0x00 }, { 0x5383, 0x17 },
294         { 0x5384, 0x00 }, { 0x5385, 0x01 }, { 0x5386, 0x00 }, { 0x5387, 0x00 },
295         { 0x5388, 0x00 }, { 0x5389, 0xe0 }, { 0x538a, 0x00 }, { 0x538b, 0x20 },
296         { 0x538c, 0x00 }, { 0x538d, 0x00 }, { 0x538e, 0x00 }, { 0x538f, 0x16 },
297         { 0x5390, 0x00 }, { 0x5391, 0x9c }, { 0x5392, 0x00 }, { 0x5393, 0xa0 },
298         { 0x5394, 0x18 },
299
300         /* 50/60 Detection */
301         { 0x3c0a, 0x9c }, { 0x3c0b, 0x3f },
302
303         /* Output Select */
304         { OV9740_IO_OUTPUT_SEL01,       0x00 },
305         { OV9740_IO_OUTPUT_SEL02,       0x00 },
306         { OV9740_IO_CREL00,             0x00 },
307         { OV9740_IO_CREL01,             0x00 },
308         { OV9740_IO_CREL02,             0x00 },
309
310         /* AWB Control */
311         { OV9740_AWB_MANUAL_CTRL,       0x00 },
312
313         /* Analog Control */
314         { OV9740_ANALOG_CTRL03,         0xaa },
315         { OV9740_ANALOG_CTRL32,         0x2f },
316         { OV9740_ANALOG_CTRL20,         0x66 },
317         { OV9740_ANALOG_CTRL21,         0xc0 },
318         { OV9740_ANALOG_CTRL31,         0x52 },
319         { OV9740_ANALOG_CTRL33,         0x50 },
320         { OV9740_ANALOG_CTRL30,         0xca },
321         { OV9740_ANALOG_CTRL04,         0x0c },
322         { OV9740_ANALOG_CTRL01,         0x40 },
323         { OV9740_ANALOG_CTRL02,         0x16 },
324         { OV9740_ANALOG_CTRL10,         0xa1 },
325         { OV9740_ANALOG_CTRL12,         0x24 },
326         { OV9740_ANALOG_CTRL22,         0x9f },
327         { OV9740_ANALOG_CTRL15,         0xf0 },
328
329         /* Sensor Control */
330         { OV9740_SENSOR_CTRL03,         0x42 },
331         { OV9740_SENSOR_CTRL04,         0x10 },
332         { OV9740_SENSOR_CTRL05,         0x45 },
333         { OV9740_SENSOR_CTRL07,         0x14 },
334
335         /* Timing Control */
336         { OV9740_TIMING_CTRL33,         0x04 },
337         { OV9740_TIMING_CTRL35,         0x02 },
338         { OV9740_TIMING_CTRL19,         0x6e },
339         { OV9740_TIMING_CTRL17,         0x94 },
340
341         /* AEC/AGC Control */
342         { OV9740_AEC_ENABLE,            0x10 },
343         { OV9740_GAIN_CEILING_01,       0x00 },
344         { OV9740_GAIN_CEILING_02,       0x7f },
345         { OV9740_AEC_HI_THRESHOLD,      0xa0 },
346         { OV9740_AEC_3A1A,              0x05 },
347         { OV9740_AEC_CTRL1B_WPT2,       0x50 },
348         { OV9740_AEC_CTRL0F_WPT,        0x50 },
349         { OV9740_AEC_CTRL10_BPT,        0x4c },
350         { OV9740_AEC_CTRL1E_BPT2,       0x4c },
351         { OV9740_AEC_LO_THRESHOLD,      0x26 },
352
353         /* BLC Control */
354         { OV9740_BLC_AUTO_ENABLE,       0x45 },
355         { OV9740_BLC_MODE,              0x18 },
356
357         /* DVP Control */
358         { OV9740_DVP_VSYNC_CTRL02,      0x04 },
359         { OV9740_DVP_VSYNC_MODE,        0x00 },
360         { OV9740_DVP_VSYNC_CTRL06,      0x08 },
361
362         /* PLL Setting */
363         { OV9740_PLL_MODE_CTRL01,       0x20 },
364         { OV9740_PRE_PLL_CLK_DIV,       0x03 },
365         { OV9740_PLL_MULTIPLIER,        0x4c },
366         { OV9740_VT_SYS_CLK_DIV,        0x01 },
367         { OV9740_VT_PIX_CLK_DIV,        0x08 },
368         { OV9740_PLL_CTRL3010,          0x01 },
369         { OV9740_VFIFO_CTRL00,          0x82 },
370
371         /* Timing Setting */
372         /* VTS */
373         { OV9740_FRM_LENGTH_LN_HI,      0x03 },
374         { OV9740_FRM_LENGTH_LN_LO,      0x07 },
375         /* HTS */
376         { OV9740_LN_LENGTH_PCK_HI,      0x06 },
377         { OV9740_LN_LENGTH_PCK_LO,      0x62 },
378
379         /* MIPI Control */
380         { OV9740_MIPI_CTRL00,           0x44 }, /* 0x64 for discontinuous clk */
381         { OV9740_MIPI_3837,             0x01 },
382         { OV9740_MIPI_CTRL01,           0x0f },
383         { OV9740_MIPI_CTRL03,           0x05 },
384         { OV9740_MIPI_CTRL05,           0x10 },
385         { OV9740_VFIFO_RD_CTRL,         0x16 },
386         { OV9740_MIPI_CTRL_3012,        0x70 },
387         { OV9740_SC_CMMM_MIPI_CTR,      0x01 },
388
389         /* YUYV order */
390         { OV9740_ISP_CTRL19,            0x02 },
391 };
392
393 static enum v4l2_mbus_pixelcode ov9740_codes[] = {
394         V4L2_MBUS_FMT_YUYV8_2X8,
395 };
396
397 static const struct v4l2_queryctrl ov9740_controls[] = {
398         {
399                 .id             = V4L2_CID_VFLIP,
400                 .type           = V4L2_CTRL_TYPE_BOOLEAN,
401                 .name           = "Flip Vertically",
402                 .minimum        = 0,
403                 .maximum        = 1,
404                 .step           = 1,
405                 .default_value  = 0,
406         },
407         {
408                 .id             = V4L2_CID_HFLIP,
409                 .type           = V4L2_CTRL_TYPE_BOOLEAN,
410                 .name           = "Flip Horizontally",
411                 .minimum        = 0,
412                 .maximum        = 1,
413                 .step           = 1,
414                 .default_value  = 0,
415         },
416 };
417
418 /* read a register */
419 static int ov9740_reg_read(struct i2c_client *client, u16 reg, u8 *val)
420 {
421         int ret;
422         struct i2c_msg msg[] = {
423                 {
424                         .addr   = client->addr,
425                         .flags  = 0,
426                         .len    = 2,
427                         .buf    = (u8 *)&reg,
428                 },
429                 {
430                         .addr   = client->addr,
431                         .flags  = I2C_M_RD,
432                         .len    = 1,
433                         .buf    = val,
434                 },
435         };
436
437         reg = swab16(reg);
438
439         ret = i2c_transfer(client->adapter, msg, 2);
440         if (ret < 0) {
441                 dev_err(&client->dev, "Failed reading register 0x%04x!\n", reg);
442                 return ret;
443         }
444
445         return 0;
446 }
447
448 /* write a register */
449 static int ov9740_reg_write(struct i2c_client *client, u16 reg, u8 val)
450 {
451         struct i2c_msg msg;
452         struct {
453                 u16 reg;
454                 u8 val;
455         } __packed buf;
456         int ret;
457
458         reg = swab16(reg);
459
460         buf.reg = reg;
461         buf.val = val;
462
463         msg.addr        = client->addr;
464         msg.flags       = 0;
465         msg.len         = 3;
466         msg.buf         = (u8 *)&buf;
467
468         ret = i2c_transfer(client->adapter, &msg, 1);
469         if (ret < 0) {
470                 dev_err(&client->dev, "Failed writing register 0x%04x!\n", reg);
471                 return ret;
472         }
473
474         return 0;
475 }
476
477
478 /* Read a register, alter its bits, write it back */
479 static int ov9740_reg_rmw(struct i2c_client *client, u16 reg, u8 set, u8 unset)
480 {
481         u8 val;
482         int ret;
483
484         ret = ov9740_reg_read(client, reg, &val);
485         if (ret < 0) {
486                 dev_err(&client->dev,
487                         "[Read]-Modify-Write of register 0x%04x failed!\n",
488                         reg);
489                 return ret;
490         }
491
492         val |= set;
493         val &= ~unset;
494
495         ret = ov9740_reg_write(client, reg, val);
496         if (ret < 0) {
497                 dev_err(&client->dev,
498                         "Read-Modify-[Write] of register 0x%04x failed!\n",
499                         reg);
500                 return ret;
501         }
502
503         return 0;
504 }
505
506 static int ov9740_reg_write_array(struct i2c_client *client,
507                                   const struct ov9740_reg *regarray,
508                                   int regarraylen)
509 {
510         int i;
511         int ret;
512
513         for (i = 0; i < regarraylen; i++) {
514                 ret = ov9740_reg_write(client,
515                                        regarray[i].reg, regarray[i].val);
516                 if (ret < 0)
517                         return ret;
518         }
519
520         return 0;
521 }
522
523 /* Start/Stop streaming from the device */
524 static int ov9740_s_stream(struct v4l2_subdev *sd, int enable)
525 {
526         struct i2c_client *client = v4l2_get_subdevdata(sd);
527         struct ov9740_priv *priv = to_ov9740(sd);
528         int ret;
529
530         /* Program orientation register. */
531         if (priv->flag_vflip)
532                 ret = ov9740_reg_rmw(client, OV9740_IMAGE_ORT, 0x2, 0);
533         else
534                 ret = ov9740_reg_rmw(client, OV9740_IMAGE_ORT, 0, 0x2);
535         if (ret < 0)
536                 return ret;
537
538         if (priv->flag_hflip)
539                 ret = ov9740_reg_rmw(client, OV9740_IMAGE_ORT, 0x1, 0);
540         else
541                 ret = ov9740_reg_rmw(client, OV9740_IMAGE_ORT, 0, 0x1);
542         if (ret < 0)
543                 return ret;
544
545         if (enable) {
546                 dev_dbg(&client->dev, "Enabling Streaming\n");
547                 /* Start Streaming */
548                 ret = ov9740_reg_write(client, OV9740_MODE_SELECT, 0x01);
549
550         } else {
551                 dev_dbg(&client->dev, "Disabling Streaming\n");
552                 /* Software Reset */
553                 ret = ov9740_reg_write(client, OV9740_SOFTWARE_RESET, 0x01);
554                 if (!ret)
555                         /* Setting Streaming to Standby */
556                         ret = ov9740_reg_write(client, OV9740_MODE_SELECT,
557                                                0x00);
558         }
559
560         priv->current_enable = enable;
561
562         return ret;
563 }
564
565 /* Alter bus settings on camera side */
566 static int ov9740_set_bus_param(struct soc_camera_device *icd,
567                                 unsigned long flags)
568 {
569         return 0;
570 }
571
572 /* Request bus settings on camera side */
573 static unsigned long ov9740_query_bus_param(struct soc_camera_device *icd)
574 {
575         struct soc_camera_link *icl = to_soc_camera_link(icd);
576
577         unsigned long flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_MASTER |
578                 SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_HSYNC_ACTIVE_HIGH |
579                 SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8;
580
581         return soc_camera_apply_sensor_flags(icl, flags);
582 }
583
584 /* select nearest higher resolution for capture */
585 static void ov9740_res_roundup(u32 *width, u32 *height)
586 {
587         /* Width must be a multiple of 4 pixels. */
588         *width = ALIGN(*width, 4);
589
590         /* Max resolution is 1280x720 (720p). */
591         if (*width > OV9740_MAX_WIDTH)
592                 *width = OV9740_MAX_WIDTH;
593
594         if (*height > OV9740_MAX_HEIGHT)
595                 *height = OV9740_MAX_HEIGHT;
596 }
597
598 /* Setup registers according to resolution and color encoding */
599 static int ov9740_set_res(struct i2c_client *client, u32 width, u32 height)
600 {
601         u32 x_start;
602         u32 y_start;
603         u32 x_end;
604         u32 y_end;
605         bool scaling = 0;
606         u32 scale_input_x;
607         u32 scale_input_y;
608         int ret;
609
610         if ((width != OV9740_MAX_WIDTH) || (height != OV9740_MAX_HEIGHT))
611                 scaling = 1;
612
613         /*
614          * Try to use as much of the sensor area as possible when supporting
615          * smaller resolutions.  Depending on the aspect ratio of the
616          * chosen resolution, we can either use the full width of the sensor,
617          * or the full height of the sensor (or both if the aspect ratio is
618          * the same as 1280x720.
619          */
620         if ((OV9740_MAX_WIDTH * height) > (OV9740_MAX_HEIGHT * width)) {
621                 scale_input_x = (OV9740_MAX_HEIGHT * width) / height;
622                 scale_input_y = OV9740_MAX_HEIGHT;
623         } else {
624                 scale_input_x = OV9740_MAX_WIDTH;
625                 scale_input_y = (OV9740_MAX_WIDTH * height) / width;
626         }
627
628         /* These describe the area of the sensor to use. */
629         x_start = (OV9740_MAX_WIDTH - scale_input_x) / 2;
630         y_start = (OV9740_MAX_HEIGHT - scale_input_y) / 2;
631         x_end = x_start + scale_input_x - 1;
632         y_end = y_start + scale_input_y - 1;
633
634         ret = ov9740_reg_write(client, OV9740_X_ADDR_START_HI, x_start >> 8);
635         if (ret)
636                 goto done;
637         ret = ov9740_reg_write(client, OV9740_X_ADDR_START_LO, x_start & 0xff);
638         if (ret)
639                 goto done;
640         ret = ov9740_reg_write(client, OV9740_Y_ADDR_START_HI, y_start >> 8);
641         if (ret)
642                 goto done;
643         ret = ov9740_reg_write(client, OV9740_Y_ADDR_START_LO, y_start & 0xff);
644         if (ret)
645                 goto done;
646
647         ret = ov9740_reg_write(client, OV9740_X_ADDR_END_HI, x_end >> 8);
648         if (ret)
649                 goto done;
650         ret = ov9740_reg_write(client, OV9740_X_ADDR_END_LO, x_end & 0xff);
651         if (ret)
652                 goto done;
653         ret = ov9740_reg_write(client, OV9740_Y_ADDR_END_HI, y_end >> 8);
654         if (ret)
655                 goto done;
656         ret = ov9740_reg_write(client, OV9740_Y_ADDR_END_LO, y_end & 0xff);
657         if (ret)
658                 goto done;
659
660         ret = ov9740_reg_write(client, OV9740_X_OUTPUT_SIZE_HI, width >> 8);
661         if (ret)
662                 goto done;
663         ret = ov9740_reg_write(client, OV9740_X_OUTPUT_SIZE_LO, width & 0xff);
664         if (ret)
665                 goto done;
666         ret = ov9740_reg_write(client, OV9740_Y_OUTPUT_SIZE_HI, height >> 8);
667         if (ret)
668                 goto done;
669         ret = ov9740_reg_write(client, OV9740_Y_OUTPUT_SIZE_LO, height & 0xff);
670         if (ret)
671                 goto done;
672
673         ret = ov9740_reg_write(client, OV9740_ISP_CTRL1E, scale_input_x >> 8);
674         if (ret)
675                 goto done;
676         ret = ov9740_reg_write(client, OV9740_ISP_CTRL1F, scale_input_x & 0xff);
677         if (ret)
678                 goto done;
679         ret = ov9740_reg_write(client, OV9740_ISP_CTRL20, scale_input_y >> 8);
680         if (ret)
681                 goto done;
682         ret = ov9740_reg_write(client, OV9740_ISP_CTRL21, scale_input_y & 0xff);
683         if (ret)
684                 goto done;
685
686         ret = ov9740_reg_write(client, OV9740_VFIFO_READ_START_HI,
687                                (scale_input_x - width) >> 8);
688         if (ret)
689                 goto done;
690         ret = ov9740_reg_write(client, OV9740_VFIFO_READ_START_LO,
691                                (scale_input_x - width) & 0xff);
692         if (ret)
693                 goto done;
694
695         ret = ov9740_reg_write(client, OV9740_ISP_CTRL00, 0xff);
696         if (ret)
697                 goto done;
698         ret = ov9740_reg_write(client, OV9740_ISP_CTRL01, 0xef |
699                                                           (scaling << 4));
700         if (ret)
701                 goto done;
702         ret = ov9740_reg_write(client, OV9740_ISP_CTRL03, 0xff);
703
704 done:
705         return ret;
706 }
707
708 /* set the format we will capture in */
709 static int ov9740_s_fmt(struct v4l2_subdev *sd,
710                         struct v4l2_mbus_framefmt *mf)
711 {
712         struct i2c_client *client = v4l2_get_subdevdata(sd);
713         struct ov9740_priv *priv = to_ov9740(sd);
714         enum v4l2_colorspace cspace;
715         enum v4l2_mbus_pixelcode code = mf->code;
716         int ret;
717
718         ov9740_res_roundup(&mf->width, &mf->height);
719
720         switch (code) {
721         case V4L2_MBUS_FMT_YUYV8_2X8:
722                 cspace = V4L2_COLORSPACE_SRGB;
723                 break;
724         default:
725                 return -EINVAL;
726         }
727
728         ret = ov9740_reg_write_array(client, ov9740_defaults,
729                                      ARRAY_SIZE(ov9740_defaults));
730         if (ret < 0)
731                 return ret;
732
733         ret = ov9740_set_res(client, mf->width, mf->height);
734         if (ret < 0)
735                 return ret;
736
737         mf->code        = code;
738         mf->colorspace  = cspace;
739
740         memcpy(&priv->current_mf, mf, sizeof(struct v4l2_mbus_framefmt));
741
742         return ret;
743 }
744
745 static int ov9740_try_fmt(struct v4l2_subdev *sd,
746                           struct v4l2_mbus_framefmt *mf)
747 {
748         ov9740_res_roundup(&mf->width, &mf->height);
749
750         mf->field = V4L2_FIELD_NONE;
751         mf->code = V4L2_MBUS_FMT_YUYV8_2X8;
752         mf->colorspace = V4L2_COLORSPACE_SRGB;
753
754         return 0;
755 }
756
757 static int ov9740_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
758                            enum v4l2_mbus_pixelcode *code)
759 {
760         if (index >= ARRAY_SIZE(ov9740_codes))
761                 return -EINVAL;
762
763         *code = ov9740_codes[index];
764
765         return 0;
766 }
767
768 static int ov9740_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
769 {
770         a->bounds.left          = 0;
771         a->bounds.top           = 0;
772         a->bounds.width         = OV9740_MAX_WIDTH;
773         a->bounds.height        = OV9740_MAX_HEIGHT;
774         a->defrect              = a->bounds;
775         a->type                 = V4L2_BUF_TYPE_VIDEO_CAPTURE;
776         a->pixelaspect.numerator        = 1;
777         a->pixelaspect.denominator      = 1;
778
779         return 0;
780 }
781
782 static int ov9740_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
783 {
784         a->c.left               = 0;
785         a->c.top                = 0;
786         a->c.width              = OV9740_MAX_WIDTH;
787         a->c.height             = OV9740_MAX_HEIGHT;
788         a->type                 = V4L2_BUF_TYPE_VIDEO_CAPTURE;
789
790         return 0;
791 }
792
793 /* Get status of additional camera capabilities */
794 static int ov9740_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
795 {
796         struct ov9740_priv *priv = to_ov9740(sd);
797
798         switch (ctrl->id) {
799         case V4L2_CID_VFLIP:
800                 ctrl->value = priv->flag_vflip;
801                 break;
802         case V4L2_CID_HFLIP:
803                 ctrl->value = priv->flag_hflip;
804                 break;
805         default:
806                 return -EINVAL;
807         }
808
809         return 0;
810 }
811
812 /* Set status of additional camera capabilities */
813 static int ov9740_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
814 {
815         struct ov9740_priv *priv = to_ov9740(sd);
816
817         switch (ctrl->id) {
818         case V4L2_CID_VFLIP:
819                 priv->flag_vflip = ctrl->value;
820                 break;
821         case V4L2_CID_HFLIP:
822                 priv->flag_hflip = ctrl->value;
823                 break;
824         default:
825                 return -EINVAL;
826         }
827
828         return 0;
829 }
830
831 /* Get chip identification */
832 static int ov9740_g_chip_ident(struct v4l2_subdev *sd,
833                                struct v4l2_dbg_chip_ident *id)
834 {
835         struct ov9740_priv *priv = to_ov9740(sd);
836
837         id->ident = priv->ident;
838         id->revision = priv->revision;
839
840         return 0;
841 }
842
843 static int ov9740_s_power(struct v4l2_subdev *sd, int on)
844 {
845         struct ov9740_priv *priv = to_ov9740(sd);
846
847         if (!priv->current_enable)
848                 return 0;
849
850         if (on) {
851                 ov9740_s_fmt(sd, &priv->current_mf);
852                 ov9740_s_stream(sd, priv->current_enable);
853         } else {
854                 ov9740_s_stream(sd, 0);
855                 priv->current_enable = true;
856         }
857
858         return 0;
859 }
860
861 #ifdef CONFIG_VIDEO_ADV_DEBUG
862 static int ov9740_get_register(struct v4l2_subdev *sd,
863                                struct v4l2_dbg_register *reg)
864 {
865         struct i2c_client *client = v4l2_get_subdevdata(sd);
866         int ret;
867         u8 val;
868
869         if (reg->reg & ~0xffff)
870                 return -EINVAL;
871
872         reg->size = 2;
873
874         ret = ov9740_reg_read(client, reg->reg, &val);
875         if (ret)
876                 return ret;
877
878         reg->val = (__u64)val;
879
880         return ret;
881 }
882
883 static int ov9740_set_register(struct v4l2_subdev *sd,
884                                struct v4l2_dbg_register *reg)
885 {
886         struct i2c_client *client = v4l2_get_subdevdata(sd);
887
888         if (reg->reg & ~0xffff || reg->val & ~0xff)
889                 return -EINVAL;
890
891         return ov9740_reg_write(client, reg->reg, reg->val);
892 }
893 #endif
894
895 static int ov9740_video_probe(struct soc_camera_device *icd,
896                               struct i2c_client *client)
897 {
898         struct v4l2_subdev *sd = i2c_get_clientdata(client);
899         struct ov9740_priv *priv = to_ov9740(sd);
900         u8 modelhi, modello;
901         int ret;
902
903         /* We must have a parent by now. And it cannot be a wrong one. */
904         BUG_ON(!icd->parent ||
905                to_soc_camera_host(icd->parent)->nr != icd->iface);
906
907         /*
908          * check and show product ID and manufacturer ID
909          */
910         ret = ov9740_reg_read(client, OV9740_MODEL_ID_HI, &modelhi);
911         if (ret < 0)
912                 goto err;
913
914         ret = ov9740_reg_read(client, OV9740_MODEL_ID_LO, &modello);
915         if (ret < 0)
916                 goto err;
917
918         priv->model = (modelhi << 8) | modello;
919
920         ret = ov9740_reg_read(client, OV9740_REVISION_NUMBER, &priv->revision);
921         if (ret < 0)
922                 goto err;
923
924         ret = ov9740_reg_read(client, OV9740_MANUFACTURER_ID, &priv->manid);
925         if (ret < 0)
926                 goto err;
927
928         ret = ov9740_reg_read(client, OV9740_SMIA_VERSION, &priv->smiaver);
929         if (ret < 0)
930                 goto err;
931
932         if (priv->model != 0x9740) {
933                 ret = -ENODEV;
934                 goto err;
935         }
936
937         priv->ident = V4L2_IDENT_OV9740;
938
939         dev_info(&client->dev, "ov9740 Model ID 0x%04x, Revision 0x%02x, "
940                  "Manufacturer 0x%02x, SMIA Version 0x%02x\n",
941                  priv->model, priv->revision, priv->manid, priv->smiaver);
942
943 err:
944         return ret;
945 }
946
947 static struct soc_camera_ops ov9740_ops = {
948         .set_bus_param          = ov9740_set_bus_param,
949         .query_bus_param        = ov9740_query_bus_param,
950         .controls               = ov9740_controls,
951         .num_controls           = ARRAY_SIZE(ov9740_controls),
952 };
953
954 static int ov9740_g_mbus_config(struct v4l2_subdev *sd,
955                                 struct v4l2_mbus_config *cfg)
956 {
957         struct i2c_client *client = v4l2_get_subdevdata(sd);
958         struct soc_camera_device *icd = client->dev.platform_data;
959         struct soc_camera_link *icl = to_soc_camera_link(icd);
960
961         cfg->flags = V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_MASTER |
962                 V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_HIGH |
963                 V4L2_MBUS_DATA_ACTIVE_HIGH;
964         cfg->type = V4L2_MBUS_PARALLEL;
965         cfg->flags = soc_camera_apply_board_flags(icl, cfg);
966
967         return 0;
968 }
969
970 static struct v4l2_subdev_video_ops ov9740_video_ops = {
971         .s_stream       = ov9740_s_stream,
972         .s_mbus_fmt     = ov9740_s_fmt,
973         .try_mbus_fmt   = ov9740_try_fmt,
974         .enum_mbus_fmt  = ov9740_enum_fmt,
975         .cropcap        = ov9740_cropcap,
976         .g_crop         = ov9740_g_crop,
977         .g_mbus_config  = ov9740_g_mbus_config,
978 };
979
980 static struct v4l2_subdev_core_ops ov9740_core_ops = {
981         .g_ctrl                 = ov9740_g_ctrl,
982         .s_ctrl                 = ov9740_s_ctrl,
983         .g_chip_ident           = ov9740_g_chip_ident,
984         .s_power                = ov9740_s_power,
985 #ifdef CONFIG_VIDEO_ADV_DEBUG
986         .g_register             = ov9740_get_register,
987         .s_register             = ov9740_set_register,
988 #endif
989 };
990
991 static struct v4l2_subdev_ops ov9740_subdev_ops = {
992         .core                   = &ov9740_core_ops,
993         .video                  = &ov9740_video_ops,
994 };
995
996 /*
997  * i2c_driver function
998  */
999 static int ov9740_probe(struct i2c_client *client,
1000                         const struct i2c_device_id *did)
1001 {
1002         struct ov9740_priv *priv;
1003         struct soc_camera_device *icd   = client->dev.platform_data;
1004         struct soc_camera_link *icl;
1005         int ret;
1006
1007         if (!icd) {
1008                 dev_err(&client->dev, "Missing soc-camera data!\n");
1009                 return -EINVAL;
1010         }
1011
1012         icl = to_soc_camera_link(icd);
1013         if (!icl) {
1014                 dev_err(&client->dev, "Missing platform_data for driver\n");
1015                 return -EINVAL;
1016         }
1017
1018         priv = kzalloc(sizeof(struct ov9740_priv), GFP_KERNEL);
1019         if (!priv) {
1020                 dev_err(&client->dev, "Failed to allocate private data!\n");
1021                 return -ENOMEM;
1022         }
1023
1024         v4l2_i2c_subdev_init(&priv->subdev, client, &ov9740_subdev_ops);
1025
1026         icd->ops = &ov9740_ops;
1027
1028         ret = ov9740_video_probe(icd, client);
1029         if (ret < 0) {
1030                 icd->ops = NULL;
1031                 kfree(priv);
1032         }
1033
1034         return ret;
1035 }
1036
1037 static int ov9740_remove(struct i2c_client *client)
1038 {
1039         struct ov9740_priv *priv = i2c_get_clientdata(client);
1040
1041         kfree(priv);
1042
1043         return 0;
1044 }
1045
1046 static const struct i2c_device_id ov9740_id[] = {
1047         { "ov9740", 0 },
1048         { }
1049 };
1050 MODULE_DEVICE_TABLE(i2c, ov9740_id);
1051
1052 static struct i2c_driver ov9740_i2c_driver = {
1053         .driver = {
1054                 .name = "ov9740",
1055         },
1056         .probe    = ov9740_probe,
1057         .remove   = ov9740_remove,
1058         .id_table = ov9740_id,
1059 };
1060
1061 static int __init ov9740_module_init(void)
1062 {
1063         return i2c_add_driver(&ov9740_i2c_driver);
1064 }
1065
1066 static void __exit ov9740_module_exit(void)
1067 {
1068         i2c_del_driver(&ov9740_i2c_driver);
1069 }
1070
1071 module_init(ov9740_module_init);
1072 module_exit(ov9740_module_exit);
1073
1074 MODULE_DESCRIPTION("SoC Camera driver for OmniVision OV9740");
1075 MODULE_AUTHOR("Andrew Chew <achew@nvidia.com>");
1076 MODULE_LICENSE("GPL v2");