drivers/media/video/gspca/ov519.c

   1 /**
   2  * OV519 driver
   3  *
   4  * Copyright (C) 2008 Jean-Francois Moine (http://moinejf.free.fr)
   5  * Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com>
   6  *
   7  * This module is adapted from the ov51x-jpeg package, which itself
   8  * was adapted from the ov511 driver.
   9  *
  10  * Original copyright for the ov511 driver is:
  11  *
  12  * Copyright (c) 1999-2006 Mark W. McClelland
  13  * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach
  14  * Many improvements by Bret Wallach <bwallac1@san.rr.com>
  15  * Color fixes by by Orion Sky Lawlor <olawlor@acm.org> (2/26/2000)
  16  * OV7620 fixes by Charl P. Botha <cpbotha@ieee.org>
  17  * Changes by Claudio Matsuoka <claudio@conectiva.com>
  18  *
  19  * ov51x-jpeg original copyright is:
  20  *
  21  * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org>
  22  * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com>
  23  *
  24  * This program is free software; you can redistribute it and/or modify
  25  * it under the terms of the GNU General Public License as published by
  26  * the Free Software Foundation; either version 2 of the License, or
  27  * any later version.
  28  *
  29  * This program is distributed in the hope that it will be useful,
  30  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  31  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  32  * GNU General Public License for more details.
  33  *
  34  * You should have received a copy of the GNU General Public License
  35  * along with this program; if not, write to the Free Software
  36  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  37  *
  38  */
  39 #define MODULE_NAME "ov519"
  40
  41 #include <linux/input.h>
  42 #include "gspca.h"
  43
  44 /* The jpeg_hdr is used by w996Xcf only */
  45 /* The CONEX_CAM define for jpeg.h needs renaming, now its used here too */
  46 #define CONEX_CAM
  47 #include "jpeg.h"
  48
  49 MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
  50 MODULE_DESCRIPTION("OV519 USB Camera Driver");
  51 MODULE_LICENSE("GPL");
  52
  53 /* global parameters */
  54 static int frame_rate;
  55
  56 /* Number of times to retry a failed I2C transaction. Increase this if you
  57  * are getting "Failed to read sensor ID..." */
  58 static int i2c_detect_tries = 10;
  59
  60 /* controls */
  61 enum e_ctrl {
  62         BRIGHTNESS,
  63         CONTRAST,
  64         COLORS,
  65         HFLIP,
  66         VFLIP,
  67         AUTOBRIGHT,
  68         FREQ,
  69         NCTRL           /* number of controls */
  70 };
  71
  72 /* ov519 device descriptor */
  73 struct sd {
  74         struct gspca_dev gspca_dev;             /* !! must be the first item */
  75
  76         struct gspca_ctrl ctrls[NCTRL];
  77
  78         u8 packet_nr;
  79
  80         char bridge;
  81 #define BRIDGE_OV511            0
  82 #define BRIDGE_OV511PLUS        1
  83 #define BRIDGE_OV518            2
  84 #define BRIDGE_OV518PLUS        3
  85 #define BRIDGE_OV519            4               /* = ov530 */
  86 #define BRIDGE_OVFX2            5
  87 #define BRIDGE_W9968CF          6
  88 #define BRIDGE_MASK             7
  89
  90         char invert_led;
  91 #define BRIDGE_INVERT_LED       8
  92
  93         char snapshot_pressed;
  94         char snapshot_needs_reset;
  95
  96         /* Determined by sensor type */
  97         u8 sif;
  98
  99         u8 quality;
 100 #define QUALITY_MIN 50
 101 #define QUALITY_MAX 70
 102 #define QUALITY_DEF 50
 103
 104         u8 stopped;             /* Streaming is temporarily paused */
 105         u8 first_frame;
 106
 107         u8 frame_rate;          /* current Framerate */
 108         u8 clockdiv;            /* clockdiv override */
 109
 110         s8 sensor;              /* Type of image sensor chip (SEN_*) */
 111
 112         u8 sensor_addr;
 113         u16 sensor_width;
 114         u16 sensor_height;
 115         s16 sensor_reg_cache[256];
 116
 117         u8 jpeg_hdr[JPEG_HDR_SZ];
 118 };
 119 enum sensors {
 120         SEN_OV2610,
 121         SEN_OV2610AE,
 122         SEN_OV3610,
 123         SEN_OV6620,
 124         SEN_OV6630,
 125         SEN_OV66308AF,
 126         SEN_OV7610,
 127         SEN_OV7620,
 128         SEN_OV7620AE,
 129         SEN_OV7640,
 130         SEN_OV7648,
 131         SEN_OV7660,
 132         SEN_OV7670,
 133         SEN_OV76BE,
 134         SEN_OV8610,
 135 };
 136
 137 /* Note this is a bit of a hack, but the w9968cf driver needs the code for all
 138    the ov sensors which is already present here. When we have the time we
 139    really should move the sensor drivers to v4l2 sub drivers. */
 140 #include "w996Xcf.c"
 141
 142 /* V4L2 controls supported by the driver */
 143 static void setbrightness(struct gspca_dev *gspca_dev);
 144 static void setcontrast(struct gspca_dev *gspca_dev);
 145 static void setcolors(struct gspca_dev *gspca_dev);
 146 static void sethvflip(struct gspca_dev *gspca_dev);
 147 static void setautobright(struct gspca_dev *gspca_dev);
 148 static void setfreq(struct gspca_dev *gspca_dev);
 149 static void setfreq_i(struct sd *sd);
 150
 151 static const struct ctrl sd_ctrls[] = {
 152 [BRIGHTNESS] = {
 153             {
 154                 .id      = V4L2_CID_BRIGHTNESS,
 155                 .type    = V4L2_CTRL_TYPE_INTEGER,
 156                 .name    = "Brightness",
 157                 .minimum = 0,
 158                 .maximum = 255,
 159                 .step    = 1,
 160                 .default_value = 127,
 161             },
 162             .set_control = setbrightness,
 163         },
 164 [CONTRAST] = {
 165             {
 166                 .id      = V4L2_CID_CONTRAST,
 167                 .type    = V4L2_CTRL_TYPE_INTEGER,
 168                 .name    = "Contrast",
 169                 .minimum = 0,
 170                 .maximum = 255,
 171                 .step    = 1,
 172                 .default_value = 127,
 173             },
 174             .set_control = setcontrast,
 175         },
 176 [COLORS] = {
 177             {
 178                 .id      = V4L2_CID_SATURATION,
 179                 .type    = V4L2_CTRL_TYPE_INTEGER,
 180                 .name    = "Color",
 181                 .minimum = 0,
 182                 .maximum = 255,
 183                 .step    = 1,
 184                 .default_value = 127,
 185             },
 186             .set_control = setcolors,
 187         },
 188 /* The flip controls work for sensors ov7660 and ov7670 only */
 189 [HFLIP] = {
 190             {
 191                 .id      = V4L2_CID_HFLIP,
 192                 .type    = V4L2_CTRL_TYPE_BOOLEAN,
 193                 .name    = "Mirror",
 194                 .minimum = 0,
 195                 .maximum = 1,
 196                 .step    = 1,
 197                 .default_value = 0,
 198             },
 199             .set_control = sethvflip,
 200         },
 201 [VFLIP] = {
 202             {
 203                 .id      = V4L2_CID_VFLIP,
 204                 .type    = V4L2_CTRL_TYPE_BOOLEAN,
 205                 .name    = "Vflip",
 206                 .minimum = 0,
 207                 .maximum = 1,
 208                 .step    = 1,
 209                 .default_value = 0,
 210             },
 211             .set_control = sethvflip,
 212         },
 213 [AUTOBRIGHT] = {
 214             {
 215                 .id      = V4L2_CID_AUTOBRIGHTNESS,
 216                 .type    = V4L2_CTRL_TYPE_BOOLEAN,
 217                 .name    = "Auto Brightness",
 218                 .minimum = 0,
 219                 .maximum = 1,
 220                 .step    = 1,
 221                 .default_value = 1,
 222             },
 223             .set_control = setautobright,
 224         },
 225 [FREQ] = {
 226             {
 227                 .id      = V4L2_CID_POWER_LINE_FREQUENCY,
 228                 .type    = V4L2_CTRL_TYPE_MENU,
 229                 .name    = "Light frequency filter",
 230                 .minimum = 0,
 231                 .maximum = 2,   /* 0: no flicker, 1: 50Hz, 2:60Hz, 3: auto */
 232                 .step    = 1,
 233                 .default_value = 0,
 234             },
 235             .set_control = setfreq,
 236         },
 237 };
 238
 239 /* table of the disabled controls */
 240 static const unsigned ctrl_dis[] = {
 241 [SEN_OV2610] =          (1 << NCTRL) - 1,       /* no control */
 242
 243 [SEN_OV2610AE] =        (1 << NCTRL) - 1,       /* no control */
 244
 245 [SEN_OV3610] =          (1 << NCTRL) - 1,       /* no control */
 246
 247 [SEN_OV6620] =          (1 << HFLIP) |
 248                         (1 << VFLIP),
 249
 250 [SEN_OV6630] =          (1 << HFLIP) |
 251                         (1 << VFLIP),
 252
 253 [SEN_OV66308AF] =       (1 << HFLIP) |
 254                         (1 << VFLIP),
 255
 256 [SEN_OV7610] =          (1 << HFLIP) |
 257                         (1 << VFLIP),
 258
 259 [SEN_OV7620] =          (1 << HFLIP) |
 260                         (1 << VFLIP),
 261
 262 [SEN_OV7620AE] =        (1 << HFLIP) |
 263                         (1 << VFLIP),
 264
 265 [SEN_OV7640] =          (1 << HFLIP) |
 266                         (1 << VFLIP) |
 267                         (1 << AUTOBRIGHT) |
 268                         (1 << CONTRAST),
 269
 270 [SEN_OV7648] =          (1 << HFLIP) |
 271                         (1 << VFLIP) |
 272                         (1 << AUTOBRIGHT) |
 273                         (1 << CONTRAST),
 274
 275 [SEN_OV7660] =          (1 << AUTOBRIGHT),
 276
 277 [SEN_OV7670] =          (1 << COLORS) |
 278                         (1 << AUTOBRIGHT),
 279
 280 [SEN_OV76BE] =          (1 << HFLIP) |
 281                         (1 << VFLIP),
 282
 283 [SEN_OV8610] =          (1 << HFLIP) |
 284                         (1 << VFLIP) |
 285                         (1 << FREQ),
 286 };
 287
 288 static const struct v4l2_pix_format ov519_vga_mode[] = {
 289         {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 290                 .bytesperline = 320,
 291                 .sizeimage = 320 * 240 * 3 / 8 + 590,
 292                 .colorspace = V4L2_COLORSPACE_JPEG,
 293                 .priv = 1},
 294         {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 295                 .bytesperline = 640,
 296                 .sizeimage = 640 * 480 * 3 / 8 + 590,
 297                 .colorspace = V4L2_COLORSPACE_JPEG,
 298                 .priv = 0},
 299 };
 300 static const struct v4l2_pix_format ov519_sif_mode[] = {
 301         {160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 302                 .bytesperline = 160,
 303                 .sizeimage = 160 * 120 * 3 / 8 + 590,
 304                 .colorspace = V4L2_COLORSPACE_JPEG,
 305                 .priv = 3},
 306         {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 307                 .bytesperline = 176,
 308                 .sizeimage = 176 * 144 * 3 / 8 + 590,
 309                 .colorspace = V4L2_COLORSPACE_JPEG,
 310                 .priv = 1},
 311         {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 312                 .bytesperline = 320,
 313                 .sizeimage = 320 * 240 * 3 / 8 + 590,
 314                 .colorspace = V4L2_COLORSPACE_JPEG,
 315                 .priv = 2},
 316         {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 317                 .bytesperline = 352,
 318                 .sizeimage = 352 * 288 * 3 / 8 + 590,
 319                 .colorspace = V4L2_COLORSPACE_JPEG,
 320                 .priv = 0},
 321 };
 322
 323 /* Note some of the sizeimage values for the ov511 / ov518 may seem
 324    larger then necessary, however they need to be this big as the ov511 /
 325    ov518 always fills the entire isoc frame, using 0 padding bytes when
 326    it doesn't have any data. So with low framerates the amount of data
 327    transfered can become quite large (libv4l will remove all the 0 padding
 328    in userspace). */
 329 static const struct v4l2_pix_format ov518_vga_mode[] = {
 330         {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
 331                 .bytesperline = 320,
 332                 .sizeimage = 320 * 240 * 3,
 333                 .colorspace = V4L2_COLORSPACE_JPEG,
 334                 .priv = 1},
 335         {640, 480, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
 336                 .bytesperline = 640,
 337                 .sizeimage = 640 * 480 * 2,
 338                 .colorspace = V4L2_COLORSPACE_JPEG,
 339                 .priv = 0},
 340 };
 341 static const struct v4l2_pix_format ov518_sif_mode[] = {
 342         {160, 120, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
 343                 .bytesperline = 160,
 344                 .sizeimage = 70000,
 345                 .colorspace = V4L2_COLORSPACE_JPEG,
 346                 .priv = 3},
 347         {176, 144, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
 348                 .bytesperline = 176,
 349                 .sizeimage = 70000,
 350                 .colorspace = V4L2_COLORSPACE_JPEG,
 351                 .priv = 1},
 352         {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
 353                 .bytesperline = 320,
 354                 .sizeimage = 320 * 240 * 3,
 355                 .colorspace = V4L2_COLORSPACE_JPEG,
 356                 .priv = 2},
 357         {352, 288, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
 358                 .bytesperline = 352,
 359                 .sizeimage = 352 * 288 * 3,
 360                 .colorspace = V4L2_COLORSPACE_JPEG,
 361                 .priv = 0},
 362 };
 363
 364 static const struct v4l2_pix_format ov511_vga_mode[] = {
 365         {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
 366                 .bytesperline = 320,
 367                 .sizeimage = 320 * 240 * 3,
 368                 .colorspace = V4L2_COLORSPACE_JPEG,
 369                 .priv = 1},
 370         {640, 480, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
 371                 .bytesperline = 640,
 372                 .sizeimage = 640 * 480 * 2,
 373                 .colorspace = V4L2_COLORSPACE_JPEG,
 374                 .priv = 0},
 375 };
 376 static const struct v4l2_pix_format ov511_sif_mode[] = {
 377         {160, 120, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
 378                 .bytesperline = 160,
 379                 .sizeimage = 70000,
 380                 .colorspace = V4L2_COLORSPACE_JPEG,
 381                 .priv = 3},
 382         {176, 144, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
 383                 .bytesperline = 176,
 384                 .sizeimage = 70000,
 385                 .colorspace = V4L2_COLORSPACE_JPEG,
 386                 .priv = 1},
 387         {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
 388                 .bytesperline = 320,
 389                 .sizeimage = 320 * 240 * 3,
 390                 .colorspace = V4L2_COLORSPACE_JPEG,
 391                 .priv = 2},
 392         {352, 288, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
 393                 .bytesperline = 352,
 394                 .sizeimage = 352 * 288 * 3,
 395                 .colorspace = V4L2_COLORSPACE_JPEG,
 396                 .priv = 0},
 397 };
 398
 399 static const struct v4l2_pix_format ovfx2_vga_mode[] = {
 400         {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 401                 .bytesperline = 320,
 402                 .sizeimage = 320 * 240,
 403                 .colorspace = V4L2_COLORSPACE_SRGB,
 404                 .priv = 1},
 405         {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 406                 .bytesperline = 640,
 407                 .sizeimage = 640 * 480,
 408                 .colorspace = V4L2_COLORSPACE_SRGB,
 409                 .priv = 0},
 410 };
 411 static const struct v4l2_pix_format ovfx2_cif_mode[] = {
 412         {160, 120, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 413                 .bytesperline = 160,
 414                 .sizeimage = 160 * 120,
 415                 .colorspace = V4L2_COLORSPACE_SRGB,
 416                 .priv = 3},
 417         {176, 144, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 418                 .bytesperline = 176,
 419                 .sizeimage = 176 * 144,
 420                 .colorspace = V4L2_COLORSPACE_SRGB,
 421                 .priv = 1},
 422         {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 423                 .bytesperline = 320,
 424                 .sizeimage = 320 * 240,
 425                 .colorspace = V4L2_COLORSPACE_SRGB,
 426                 .priv = 2},
 427         {352, 288, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 428                 .bytesperline = 352,
 429                 .sizeimage = 352 * 288,
 430                 .colorspace = V4L2_COLORSPACE_SRGB,
 431                 .priv = 0},
 432 };
 433 static const struct v4l2_pix_format ovfx2_ov2610_mode[] = {
 434         {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 435                 .bytesperline = 1600,
 436                 .sizeimage = 1600 * 1200,
 437                 .colorspace = V4L2_COLORSPACE_SRGB},
 438 };
 439 static const struct v4l2_pix_format ovfx2_ov3610_mode[] = {
 440         {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 441                 .bytesperline = 640,
 442                 .sizeimage = 640 * 480,
 443                 .colorspace = V4L2_COLORSPACE_SRGB,
 444                 .priv = 1},
 445         {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 446                 .bytesperline = 800,
 447                 .sizeimage = 800 * 600,
 448                 .colorspace = V4L2_COLORSPACE_SRGB,
 449                 .priv = 1},
 450         {1024, 768, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 451                 .bytesperline = 1024,
 452                 .sizeimage = 1024 * 768,
 453                 .colorspace = V4L2_COLORSPACE_SRGB,
 454                 .priv = 1},
 455         {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 456                 .bytesperline = 1600,
 457                 .sizeimage = 1600 * 1200,
 458                 .colorspace = V4L2_COLORSPACE_SRGB,
 459                 .priv = 0},
 460         {2048, 1536, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 461                 .bytesperline = 2048,
 462                 .sizeimage = 2048 * 1536,
 463                 .colorspace = V4L2_COLORSPACE_SRGB,
 464                 .priv = 0},
 465 };
 466
 467 /* Registers common to OV511 / OV518 */
 468 #define R51x_FIFO_PSIZE                 0x30    /* 2 bytes wide w/ OV518(+) */
 469 #define R51x_SYS_RESET                  0x50
 470         /* Reset type flags */
 471         #define OV511_RESET_OMNICE      0x08
 472 #define R51x_SYS_INIT                   0x53
 473 #define R51x_SYS_SNAP                   0x52
 474 #define R51x_SYS_CUST_ID                0x5f
 475 #define R51x_COMP_LUT_BEGIN             0x80
 476
 477 /* OV511 Camera interface register numbers */
 478 #define R511_CAM_DELAY                  0x10
 479 #define R511_CAM_EDGE                   0x11
 480 #define R511_CAM_PXCNT                  0x12
 481 #define R511_CAM_LNCNT                  0x13
 482 #define R511_CAM_PXDIV                  0x14
 483 #define R511_CAM_LNDIV                  0x15
 484 #define R511_CAM_UV_EN                  0x16
 485 #define R511_CAM_LINE_MODE              0x17
 486 #define R511_CAM_OPTS                   0x18
 487
 488 #define R511_SNAP_FRAME                 0x19
 489 #define R511_SNAP_PXCNT                 0x1a
 490 #define R511_SNAP_LNCNT                 0x1b
 491 #define R511_SNAP_PXDIV                 0x1c
 492 #define R511_SNAP_LNDIV                 0x1d
 493 #define R511_SNAP_UV_EN                 0x1e
 494 #define R511_SNAP_OPTS                  0x1f
 495
 496 #define R511_DRAM_FLOW_CTL              0x20
 497 #define R511_FIFO_OPTS                  0x31
 498 #define R511_I2C_CTL                    0x40
 499 #define R511_SYS_LED_CTL                0x55    /* OV511+ only */
 500 #define R511_COMP_EN                    0x78
 501 #define R511_COMP_LUT_EN                0x79
 502
 503 /* OV518 Camera interface register numbers */
 504 #define R518_GPIO_OUT                   0x56    /* OV518(+) only */
 505 #define R518_GPIO_CTL                   0x57    /* OV518(+) only */
 506
 507 /* OV519 Camera interface register numbers */
 508 #define OV519_R10_H_SIZE                0x10
 509 #define OV519_R11_V_SIZE                0x11
 510 #define OV519_R12_X_OFFSETL             0x12
 511 #define OV519_R13_X_OFFSETH             0x13
 512 #define OV519_R14_Y_OFFSETL             0x14
 513 #define OV519_R15_Y_OFFSETH             0x15
 514 #define OV519_R16_DIVIDER               0x16
 515 #define OV519_R20_DFR                   0x20
 516 #define OV519_R25_FORMAT                0x25
 517
 518 /* OV519 System Controller register numbers */
 519 #define OV519_R51_RESET1                0x51
 520 #define OV519_R54_EN_CLK1               0x54
 521 #define OV519_R57_SNAPSHOT              0x57
 522
 523 #define OV519_GPIO_DATA_OUT0            0x71
 524 #define OV519_GPIO_IO_CTRL0             0x72
 525
 526 /*#define OV511_ENDPOINT_ADDRESS 1       * Isoc endpoint number */
 527
 528 /*
 529  * The FX2 chip does not give us a zero length read at end of frame.
 530  * It does, however, give a short read at the end of a frame, if
 531  * necessary, rather than run two frames together.
 532  *
 533  * By choosing the right bulk transfer size, we are guaranteed to always
 534  * get a short read for the last read of each frame.  Frame sizes are
 535  * always a composite number (width * height, or a multiple) so if we
 536  * choose a prime number, we are guaranteed that the last read of a
 537  * frame will be short.
 538  *
 539  * But it isn't that easy: the 2.6 kernel requires a multiple of 4KB,
 540  * otherwise EOVERFLOW "babbling" errors occur.  I have not been able
 541  * to figure out why.  [PMiller]
 542  *
 543  * The constant (13 * 4096) is the largest "prime enough" number less than 64KB.
 544  *
 545  * It isn't enough to know the number of bytes per frame, in case we
 546  * have data dropouts or buffer overruns (even though the FX2 double
 547  * buffers, there are some pretty strict real time constraints for
 548  * isochronous transfer for larger frame sizes).
 549  */
 550 #define OVFX2_BULK_SIZE (13 * 4096)
 551
 552 /* I2C registers */
 553 #define R51x_I2C_W_SID          0x41
 554 #define R51x_I2C_SADDR_3        0x42
 555 #define R51x_I2C_SADDR_2        0x43
 556 #define R51x_I2C_R_SID          0x44
 557 #define R51x_I2C_DATA           0x45
 558 #define R518_I2C_CTL            0x47    /* OV518(+) only */
 559 #define OVFX2_I2C_ADDR          0x00
 560
 561 /* I2C ADDRESSES */
 562 #define OV7xx0_SID   0x42
 563 #define OV_HIRES_SID 0x60               /* OV9xxx / OV2xxx / OV3xxx */
 564 #define OV8xx0_SID   0xa0
 565 #define OV6xx0_SID   0xc0
 566
 567 /* OV7610 registers */
 568 #define OV7610_REG_GAIN         0x00    /* gain setting (5:0) */
 569 #define OV7610_REG_BLUE         0x01    /* blue channel balance */
 570 #define OV7610_REG_RED          0x02    /* red channel balance */
 571 #define OV7610_REG_SAT          0x03    /* saturation */
 572 #define OV8610_REG_HUE          0x04    /* 04 reserved */
 573 #define OV7610_REG_CNT          0x05    /* Y contrast */
 574 #define OV7610_REG_BRT          0x06    /* Y brightness */
 575 #define OV7610_REG_COM_C        0x14    /* misc common regs */
 576 #define OV7610_REG_ID_HIGH      0x1c    /* manufacturer ID MSB */
 577 #define OV7610_REG_ID_LOW       0x1d    /* manufacturer ID LSB */
 578 #define OV7610_REG_COM_I        0x29    /* misc settings */
 579
 580 /* OV7660 and OV7670 registers */
 581 #define OV7670_R00_GAIN         0x00    /* Gain lower 8 bits (rest in vref) */
 582 #define OV7670_R01_BLUE         0x01    /* blue gain */
 583 #define OV7670_R02_RED          0x02    /* red gain */
 584 #define OV7670_R03_VREF         0x03    /* Pieces of GAIN, VSTART, VSTOP */
 585 #define OV7670_R04_COM1         0x04    /* Control 1 */
 586 /*#define OV7670_R07_AECHH      0x07     * AEC MS 5 bits */
 587 #define OV7670_R0C_COM3         0x0c    /* Control 3 */
 588 #define OV7670_R0D_COM4         0x0d    /* Control 4 */
 589 #define OV7670_R0E_COM5         0x0e    /* All "reserved" */
 590 #define OV7670_R0F_COM6         0x0f    /* Control 6 */
 591 #define OV7670_R10_AECH         0x10    /* More bits of AEC value */
 592 #define OV7670_R11_CLKRC        0x11    /* Clock control */
 593 #define OV7670_R12_COM7         0x12    /* Control 7 */
 594 #define   OV7670_COM7_FMT_VGA    0x00
 595 /*#define   OV7670_COM7_YUV      0x00    * YUV */
 596 #define   OV7670_COM7_FMT_QVGA   0x10   /* QVGA format */
 597 #define   OV7670_COM7_FMT_MASK   0x38
 598 #define   OV7670_COM7_RESET      0x80   /* Register reset */
 599 #define OV7670_R13_COM8         0x13    /* Control 8 */
 600 #define   OV7670_COM8_AEC        0x01   /* Auto exposure enable */
 601 #define   OV7670_COM8_AWB        0x02   /* White balance enable */
 602 #define   OV7670_COM8_AGC        0x04   /* Auto gain enable */
 603 #define   OV7670_COM8_BFILT      0x20   /* Band filter enable */
 604 #define   OV7670_COM8_AECSTEP    0x40   /* Unlimited AEC step size */
 605 #define   OV7670_COM8_FASTAEC    0x80   /* Enable fast AGC/AEC */
 606 #define OV7670_R14_COM9         0x14    /* Control 9 - gain ceiling */
 607 #define OV7670_R15_COM10        0x15    /* Control 10 */
 608 #define OV7670_R17_HSTART       0x17    /* Horiz start high bits */
 609 #define OV7670_R18_HSTOP        0x18    /* Horiz stop high bits */
 610 #define OV7670_R19_VSTART       0x19    /* Vert start high bits */
 611 #define OV7670_R1A_VSTOP        0x1a    /* Vert stop high bits */
 612 #define OV7670_R1E_MVFP         0x1e    /* Mirror / vflip */
 613 #define   OV7670_MVFP_VFLIP      0x10   /* vertical flip */
 614 #define   OV7670_MVFP_MIRROR     0x20   /* Mirror image */
 615 #define OV7670_R24_AEW          0x24    /* AGC upper limit */
 616 #define OV7670_R25_AEB          0x25    /* AGC lower limit */
 617 #define OV7670_R26_VPT          0x26    /* AGC/AEC fast mode op region */
 618 #define OV7670_R32_HREF         0x32    /* HREF pieces */
 619 #define OV7670_R3A_TSLB         0x3a    /* lots of stuff */
 620 #define OV7670_R3B_COM11        0x3b    /* Control 11 */
 621 #define   OV7670_COM11_EXP       0x02
 622 #define   OV7670_COM11_HZAUTO    0x10   /* Auto detect 50/60 Hz */
 623 #define OV7670_R3C_COM12        0x3c    /* Control 12 */
 624 #define OV7670_R3D_COM13        0x3d    /* Control 13 */
 625 #define   OV7670_COM13_GAMMA     0x80   /* Gamma enable */
 626 #define   OV7670_COM13_UVSAT     0x40   /* UV saturation auto adjustment */
 627 #define OV7670_R3E_COM14        0x3e    /* Control 14 */
 628 #define OV7670_R3F_EDGE         0x3f    /* Edge enhancement factor */
 629 #define OV7670_R40_COM15        0x40    /* Control 15 */
 630 /*#define   OV7670_COM15_R00FF   0xc0    *      00 to FF */
 631 #define OV7670_R41_COM16        0x41    /* Control 16 */
 632 #define   OV7670_COM16_AWBGAIN   0x08   /* AWB gain enable */
 633 /* end of ov7660 common registers */
 634 #define OV7670_R55_BRIGHT       0x55    /* Brightness */
 635 #define OV7670_R56_CONTRAS      0x56    /* Contrast control */
 636 #define OV7670_R69_GFIX         0x69    /* Fix gain control */
 637 /*#define OV7670_R8C_RGB444     0x8c     * RGB 444 control */
 638 #define OV7670_R9F_HAECC1       0x9f    /* Hist AEC/AGC control 1 */
 639 #define OV7670_RA0_HAECC2       0xa0    /* Hist AEC/AGC control 2 */
 640 #define OV7670_RA5_BD50MAX      0xa5    /* 50hz banding step limit */
 641 #define OV7670_RA6_HAECC3       0xa6    /* Hist AEC/AGC control 3 */
 642 #define OV7670_RA7_HAECC4       0xa7    /* Hist AEC/AGC control 4 */
 643 #define OV7670_RA8_HAECC5       0xa8    /* Hist AEC/AGC control 5 */
 644 #define OV7670_RA9_HAECC6       0xa9    /* Hist AEC/AGC control 6 */
 645 #define OV7670_RAA_HAECC7       0xaa    /* Hist AEC/AGC control 7 */
 646 #define OV7670_RAB_BD60MAX      0xab    /* 60hz banding step limit */
 647
 648 struct ov_regvals {
 649         u8 reg;
 650         u8 val;
 651 };
 652 struct ov_i2c_regvals {
 653         u8 reg;
 654         u8 val;
 655 };
 656
 657 /* Settings for OV2610 camera chip */
 658 static const struct ov_i2c_regvals norm_2610[] = {
 659         { 0x12, 0x80 }, /* reset */
 660 };
 661
 662 static const struct ov_i2c_regvals norm_2610ae[] = {
 663         {0x12, 0x80},   /* reset */
 664         {0x13, 0xcd},
 665         {0x09, 0x01},
 666         {0x0d, 0x00},
 667         {0x11, 0x80},
 668         {0x12, 0x20},   /* 1600x1200 */
 669         {0x33, 0x0c},
 670         {0x35, 0x90},
 671         {0x36, 0x37},
 672 /* ms-win traces */
 673         {0x11, 0x83},   /* clock / 3 ? */
 674         {0x2d, 0x00},   /* 60 Hz filter */
 675         {0x24, 0xb0},   /* normal colors */
 676         {0x25, 0x90},
 677         {0x10, 0x43},
 678 };
 679
 680 static const struct ov_i2c_regvals norm_3620b[] = {
 681         /*
 682          * From the datasheet: "Note that after writing to register COMH
 683          * (0x12) to change the sensor mode, registers related to the
 684          * sensor’s cropping window will be reset back to their default
 685          * values."
 686          *
 687          * "wait 4096 external clock ... to make sure the sensor is
 688          * stable and ready to access registers" i.e. 160us at 24MHz
 689          */
 690         { 0x12, 0x80 }, /* COMH reset */
 691         { 0x12, 0x00 }, /* QXGA, master */
 692
 693         /*
 694          * 11 CLKRC "Clock Rate Control"
 695          * [7] internal frequency doublers: on
 696          * [6] video port mode: master
 697          * [5:0] clock divider: 1
 698          */
 699         { 0x11, 0x80 },
 700
 701         /*
 702          * 13 COMI "Common Control I"
 703          *                  = 192 (0xC0) 11000000
 704          *    COMI[7] "AEC speed selection"
 705          *                  =   1 (0x01) 1....... "Faster AEC correction"
 706          *    COMI[6] "AEC speed step selection"
 707          *                  =   1 (0x01) .1...... "Big steps, fast"
 708          *    COMI[5] "Banding filter on off"
 709          *                  =   0 (0x00) ..0..... "Off"
 710          *    COMI[4] "Banding filter option"
 711          *                  =   0 (0x00) ...0.... "Main clock is 48 MHz and
 712          *                                         the PLL is ON"
 713          *    COMI[3] "Reserved"
 714          *                  =   0 (0x00) ....0...
 715          *    COMI[2] "AGC auto manual control selection"
 716          *                  =   0 (0x00) .....0.. "Manual"
 717          *    COMI[1] "AWB auto manual control selection"
 718          *                  =   0 (0x00) ......0. "Manual"
 719          *    COMI[0] "Exposure control"
 720          *                  =   0 (0x00) .......0 "Manual"
 721          */
 722         { 0x13, 0xc0 },
 723
 724         /*
 725          * 09 COMC "Common Control C"
 726          *                  =   8 (0x08) 00001000
 727          *    COMC[7:5] "Reserved"
 728          *                  =   0 (0x00) 000.....
 729          *    COMC[4] "Sleep Mode Enable"
 730          *                  =   0 (0x00) ...0.... "Normal mode"
 731          *    COMC[3:2] "Sensor sampling reset timing selection"
 732          *                  =   2 (0x02) ....10.. "Longer reset time"
 733          *    COMC[1:0] "Output drive current select"
 734          *                  =   0 (0x00) ......00 "Weakest"
 735          */
 736         { 0x09, 0x08 },
 737
 738         /*
 739          * 0C COMD "Common Control D"
 740          *                  =   8 (0x08) 00001000
 741          *    COMD[7] "Reserved"
 742          *                  =   0 (0x00) 0.......
 743          *    COMD[6] "Swap MSB and LSB at the output port"
 744          *                  =   0 (0x00) .0...... "False"
 745          *    COMD[5:3] "Reserved"
 746          *                  =   1 (0x01) ..001...
 747          *    COMD[2] "Output Average On Off"
 748          *                  =   0 (0x00) .....0.. "Output Normal"
 749          *    COMD[1] "Sensor precharge voltage selection"
 750          *                  =   0 (0x00) ......0. "Selects internal
 751          *                                         reference precharge
 752          *                                         voltage"
 753          *    COMD[0] "Snapshot option"
 754          *                  =   0 (0x00) .......0 "Enable live video output
 755          *                                         after snapshot sequence"
 756          */
 757         { 0x0c, 0x08 },
 758
 759         /*
 760          * 0D COME "Common Control E"
 761          *                  = 161 (0xA1) 10100001
 762          *    COME[7] "Output average option"
 763          *                  =   1 (0x01) 1....... "Output average of 4 pixels"
 764          *    COME[6] "Anti-blooming control"
 765          *                  =   0 (0x00) .0...... "Off"
 766          *    COME[5:3] "Reserved"
 767          *                  =   4 (0x04) ..100...
 768          *    COME[2] "Clock output power down pin status"
 769          *                  =   0 (0x00) .....0.. "Tri-state data output pin
 770          *                                         on power down"
 771          *    COME[1] "Data output pin status selection at power down"
 772          *                  =   0 (0x00) ......0. "Tri-state VSYNC, PCLK,
 773          *                                         HREF, and CHSYNC pins on
 774          *                                         power down"
 775          *    COME[0] "Auto zero circuit select"
 776          *                  =   1 (0x01) .......1 "On"
 777          */
 778         { 0x0d, 0xa1 },
 779
 780         /*
 781          * 0E COMF "Common Control F"
 782          *                  = 112 (0x70) 01110000
 783          *    COMF[7] "System clock selection"
 784          *                  =   0 (0x00) 0....... "Use 24 MHz system clock"
 785          *    COMF[6:4] "Reserved"
 786          *                  =   7 (0x07) .111....
 787          *    COMF[3] "Manual auto negative offset canceling selection"
 788          *                  =   0 (0x00) ....0... "Auto detect negative
 789          *                                         offset and cancel it"
 790          *    COMF[2:0] "Reserved"
 791          *                  =   0 (0x00) .....000
 792          */
 793         { 0x0e, 0x70 },
 794
 795         /*
 796          * 0F COMG "Common Control G"
 797          *                  =  66 (0x42) 01000010
 798          *    COMG[7] "Optical black output selection"
 799          *                  =   0 (0x00) 0....... "Disable"
 800          *    COMG[6] "Black level calibrate selection"
 801          *                  =   1 (0x01) .1...... "Use optical black pixels
 802          *                                         to calibrate"
 803          *    COMG[5:4] "Reserved"
 804          *                  =   0 (0x00) ..00....
 805          *    COMG[3] "Channel offset adjustment"
 806          *                  =   0 (0x00) ....0... "Disable offset adjustment"
 807          *    COMG[2] "ADC black level calibration option"
 808          *                  =   0 (0x00) .....0.. "Use B/G line and G/R
 809          *                                         line to calibrate each
 810          *                                         channel's black level"
 811          *    COMG[1] "Reserved"
 812          *                  =   1 (0x01) ......1.
 813          *    COMG[0] "ADC black level calibration enable"
 814          *                  =   0 (0x00) .......0 "Disable"
 815          */
 816         { 0x0f, 0x42 },
 817
 818         /*
 819          * 14 COMJ "Common Control J"
 820          *                  = 198 (0xC6) 11000110
 821          *    COMJ[7:6] "AGC gain ceiling"
 822          *                  =   3 (0x03) 11...... "8x"
 823          *    COMJ[5:4] "Reserved"
 824          *                  =   0 (0x00) ..00....
 825          *    COMJ[3] "Auto banding filter"
 826          *                  =   0 (0x00) ....0... "Banding filter is always
 827          *                                         on off depending on
 828          *                                         COMI[5] setting"
 829          *    COMJ[2] "VSYNC drop option"
 830          *                  =   1 (0x01) .....1.. "SYNC is dropped if frame
 831          *                                         data is dropped"
 832          *    COMJ[1] "Frame data drop"
 833          *                  =   1 (0x01) ......1. "Drop frame data if
 834          *                                         exposure is not within
 835          *                                         tolerance.  In AEC mode,
 836          *                                         data is normally dropped
 837          *                                         when data is out of
 838          *                                         range."
 839          *    COMJ[0] "Reserved"
 840          *                  =   0 (0x00) .......0
 841          */
 842         { 0x14, 0xc6 },
 843
 844         /*
 845          * 15 COMK "Common Control K"
 846          *                  =   2 (0x02) 00000010
 847          *    COMK[7] "CHSYNC pin output swap"
 848          *                  =   0 (0x00) 0....... "CHSYNC"
 849          *    COMK[6] "HREF pin output swap"
 850          *                  =   0 (0x00) .0...... "HREF"
 851          *    COMK[5] "PCLK output selection"
 852          *                  =   0 (0x00) ..0..... "PCLK always output"
 853          *    COMK[4] "PCLK edge selection"
 854          *                  =   0 (0x00) ...0.... "Data valid on falling edge"
 855          *    COMK[3] "HREF output polarity"
 856          *                  =   0 (0x00) ....0... "positive"
 857          *    COMK[2] "Reserved"
 858          *                  =   0 (0x00) .....0..
 859          *    COMK[1] "VSYNC polarity"
 860          *                  =   1 (0x01) ......1. "negative"
 861          *    COMK[0] "HSYNC polarity"
 862          *                  =   0 (0x00) .......0 "positive"
 863          */
 864         { 0x15, 0x02 },
 865
 866         /*
 867          * 33 CHLF "Current Control"
 868          *                  =   9 (0x09) 00001001
 869          *    CHLF[7:6] "Sensor current control"
 870          *                  =   0 (0x00) 00......
 871          *    CHLF[5] "Sensor current range control"
 872          *                  =   0 (0x00) ..0..... "normal range"
 873          *    CHLF[4] "Sensor current"
 874          *                  =   0 (0x00) ...0.... "normal current"
 875          *    CHLF[3] "Sensor buffer current control"
 876          *                  =   1 (0x01) ....1... "half current"
 877          *    CHLF[2] "Column buffer current control"
 878          *                  =   0 (0x00) .....0.. "normal current"
 879          *    CHLF[1] "Analog DSP current control"
 880          *                  =   0 (0x00) ......0. "normal current"
 881          *    CHLF[1] "ADC current control"
 882          *                  =   0 (0x00) ......0. "normal current"
 883          */
 884         { 0x33, 0x09 },
 885
 886         /*
 887          * 34 VBLM "Blooming Control"
 888          *                  =  80 (0x50) 01010000
 889          *    VBLM[7] "Hard soft reset switch"
 890          *                  =   0 (0x00) 0....... "Hard reset"
 891          *    VBLM[6:4] "Blooming voltage selection"
 892          *                  =   5 (0x05) .101....
 893          *    VBLM[3:0] "Sensor current control"
 894          *                  =   0 (0x00) ....0000
 895          */
 896         { 0x34, 0x50 },
 897
 898         /*
 899          * 36 VCHG "Sensor Precharge Voltage Control"
 900          *                  =   0 (0x00) 00000000
 901          *    VCHG[7] "Reserved"
 902          *                  =   0 (0x00) 0.......
 903          *    VCHG[6:4] "Sensor precharge voltage control"
 904          *                  =   0 (0x00) .000....
 905          *    VCHG[3:0] "Sensor array common reference"
 906          *                  =   0 (0x00) ....0000
 907          */
 908         { 0x36, 0x00 },
 909
 910         /*
 911          * 37 ADC "ADC Reference Control"
 912          *                  =   4 (0x04) 00000100
 913          *    ADC[7:4] "Reserved"
 914          *                  =   0 (0x00) 0000....
 915          *    ADC[3] "ADC input signal range"
 916          *                  =   0 (0x00) ....0... "Input signal 1.0x"
 917          *    ADC[2:0] "ADC range control"
 918          *                  =   4 (0x04) .....100
 919          */
 920         { 0x37, 0x04 },
 921
 922         /*
 923          * 38 ACOM "Analog Common Ground"
 924          *                  =  82 (0x52) 01010010
 925          *    ACOM[7] "Analog gain control"
 926          *                  =   0 (0x00) 0....... "Gain 1x"
 927          *    ACOM[6] "Analog black level calibration"
 928          *                  =   1 (0x01) .1...... "On"
 929          *    ACOM[5:0] "Reserved"
 930          *                  =  18 (0x12) ..010010
 931          */
 932         { 0x38, 0x52 },
 933
 934         /*
 935          * 3A FREFA "Internal Reference Adjustment"
 936          *                  =   0 (0x00) 00000000
 937          *    FREFA[7:0] "Range"
 938          *                  =   0 (0x00) 00000000
 939          */
 940         { 0x3a, 0x00 },
 941
 942         /*
 943          * 3C FVOPT "Internal Reference Adjustment"
 944          *                  =  31 (0x1F) 00011111
 945          *    FVOPT[7:0] "Range"
 946          *                  =  31 (0x1F) 00011111
 947          */
 948         { 0x3c, 0x1f },
 949
 950         /*
 951          * 44 Undocumented  =   0 (0x00) 00000000
 952          *    44[7:0] "It's a secret"
 953          *                  =   0 (0x00) 00000000
 954          */
 955         { 0x44, 0x00 },
 956
 957         /*
 958          * 40 Undocumented  =   0 (0x00) 00000000
 959          *    40[7:0] "It's a secret"
 960          *                  =   0 (0x00) 00000000
 961          */
 962         { 0x40, 0x00 },
 963
 964         /*
 965          * 41 Undocumented  =   0 (0x00) 00000000
 966          *    41[7:0] "It's a secret"
 967          *                  =   0 (0x00) 00000000
 968          */
 969         { 0x41, 0x00 },
 970
 971         /*
 972          * 42 Undocumented  =   0 (0x00) 00000000
 973          *    42[7:0] "It's a secret"
 974          *                  =   0 (0x00) 00000000
 975          */
 976         { 0x42, 0x00 },
 977
 978         /*
 979          * 43 Undocumented  =   0 (0x00) 00000000
 980          *    43[7:0] "It's a secret"
 981          *                  =   0 (0x00) 00000000
 982          */
 983         { 0x43, 0x00 },
 984
 985         /*
 986          * 45 Undocumented  = 128 (0x80) 10000000
 987          *    45[7:0] "It's a secret"
 988          *                  = 128 (0x80) 10000000
 989          */
 990         { 0x45, 0x80 },
 991
 992         /*
 993          * 48 Undocumented  = 192 (0xC0) 11000000
 994          *    48[7:0] "It's a secret"
 995          *                  = 192 (0xC0) 11000000
 996          */
 997         { 0x48, 0xc0 },
 998
 999         /*
1000          * 49 Undocumented  =  25 (0x19) 00011001
1001          *    49[7:0] "It's a secret"
1002          *                  =  25 (0x19) 00011001
1003          */
1004         { 0x49, 0x19 },
1005
1006         /*
1007          * 4B Undocumented  = 128 (0x80) 10000000
1008          *    4B[7:0] "It's a secret"
1009          *                  = 128 (0x80) 10000000
1010          */
1011         { 0x4b, 0x80 },
1012
1013         /*
1014          * 4D Undocumented  = 196 (0xC4) 11000100
1015          *    4D[7:0] "It's a secret"
1016          *                  = 196 (0xC4) 11000100
1017          */
1018         { 0x4d, 0xc4 },
1019
1020         /*
1021          * 35 VREF "Reference Voltage Control"
1022          *                  =  76 (0x4c) 01001100
1023          *    VREF[7:5] "Column high reference control"
1024          *                  =   2 (0x02) 010..... "higher voltage"
1025          *    VREF[4:2] "Column low reference control"
1026          *                  =   3 (0x03) ...011.. "Highest voltage"
1027          *    VREF[1:0] "Reserved"
1028          *                  =   0 (0x00) ......00
1029          */
1030         { 0x35, 0x4c },
1031
1032         /*
1033          * 3D Undocumented  =   0 (0x00) 00000000
1034          *    3D[7:0] "It's a secret"
1035          *                  =   0 (0x00) 00000000
1036          */
1037         { 0x3d, 0x00 },
1038
1039         /*
1040          * 3E Undocumented  =   0 (0x00) 00000000
1041          *    3E[7:0] "It's a secret"
1042          *                  =   0 (0x00) 00000000
1043          */
1044         { 0x3e, 0x00 },
1045
1046         /*
1047          * 3B FREFB "Internal Reference Adjustment"
1048          *                  =  24 (0x18) 00011000
1049          *    FREFB[7:0] "Range"
1050          *                  =  24 (0x18) 00011000
1051          */
1052         { 0x3b, 0x18 },
1053
1054         /*
1055          * 33 CHLF "Current Control"
1056          *                  =  25 (0x19) 00011001
1057          *    CHLF[7:6] "Sensor current control"
1058          *                  =   0 (0x00) 00......
1059          *    CHLF[5] "Sensor current range control"
1060          *                  =   0 (0x00) ..0..... "normal range"
1061          *    CHLF[4] "Sensor current"
1062          *                  =   1 (0x01) ...1.... "double current"
1063          *    CHLF[3] "Sensor buffer current control"
1064          *                  =   1 (0x01) ....1... "half current"
1065          *    CHLF[2] "Column buffer current control"
1066          *                  =   0 (0x00) .....0.. "normal current"
1067          *    CHLF[1] "Analog DSP current control"
1068          *                  =   0 (0x00) ......0. "normal current"
1069          *    CHLF[1] "ADC current control"
1070          *                  =   0 (0x00) ......0. "normal current"
1071          */
1072         { 0x33, 0x19 },
1073
1074         /*
1075          * 34 VBLM "Blooming Control"
1076          *                  =  90 (0x5A) 01011010
1077          *    VBLM[7] "Hard soft reset switch"
1078          *                  =   0 (0x00) 0....... "Hard reset"
1079          *    VBLM[6:4] "Blooming voltage selection"
1080          *                  =   5 (0x05) .101....
1081          *    VBLM[3:0] "Sensor current control"
1082          *                  =  10 (0x0A) ....1010
1083          */
1084         { 0x34, 0x5a },
1085
1086         /*
1087          * 3B FREFB "Internal Reference Adjustment"
1088          *                  =   0 (0x00) 00000000
1089          *    FREFB[7:0] "Range"
1090          *                  =   0 (0x00) 00000000
1091          */
1092         { 0x3b, 0x00 },
1093
1094         /*
1095          * 33 CHLF "Current Control"
1096          *                  =   9 (0x09) 00001001
1097          *    CHLF[7:6] "Sensor current control"
1098          *                  =   0 (0x00) 00......
1099          *    CHLF[5] "Sensor current range control"
1100          *                  =   0 (0x00) ..0..... "normal range"
1101          *    CHLF[4] "Sensor current"
1102          *                  =   0 (0x00) ...0.... "normal current"
1103          *    CHLF[3] "Sensor buffer current control"
1104          *                  =   1 (0x01) ....1... "half current"
1105          *    CHLF[2] "Column buffer current control"
1106          *                  =   0 (0x00) .....0.. "normal current"
1107          *    CHLF[1] "Analog DSP current control"
1108          *                  =   0 (0x00) ......0. "normal current"
1109          *    CHLF[1] "ADC current control"
1110          *                  =   0 (0x00) ......0. "normal current"
1111          */
1112         { 0x33, 0x09 },
1113
1114         /*
1115          * 34 VBLM "Blooming Control"
1116          *                  =  80 (0x50) 01010000
1117          *    VBLM[7] "Hard soft reset switch"
1118          *                  =   0 (0x00) 0....... "Hard reset"
1119          *    VBLM[6:4] "Blooming voltage selection"
1120          *                  =   5 (0x05) .101....
1121          *    VBLM[3:0] "Sensor current control"
1122          *                  =   0 (0x00) ....0000
1123          */
1124         { 0x34, 0x50 },
1125
1126         /*
1127          * 12 COMH "Common Control H"
1128          *                  =  64 (0x40) 01000000
1129          *    COMH[7] "SRST"
1130          *                  =   0 (0x00) 0....... "No-op"
1131          *    COMH[6:4] "Resolution selection"
1132          *                  =   4 (0x04) .100.... "XGA"
1133          *    COMH[3] "Master slave selection"
1134          *                  =   0 (0x00) ....0... "Master mode"
1135          *    COMH[2] "Internal B/R channel option"
1136          *                  =   0 (0x00) .....0.. "B/R use same channel"
1137          *    COMH[1] "Color bar test pattern"
1138          *                  =   0 (0x00) ......0. "Off"
1139          *    COMH[0] "Reserved"
1140          *                  =   0 (0x00) .......0
1141          */
1142         { 0x12, 0x40 },
1143
1144         /*
1145          * 17 HREFST "Horizontal window start"
1146          *                  =  31 (0x1F) 00011111
1147          *    HREFST[7:0] "Horizontal window start, 8 MSBs"
1148          *                  =  31 (0x1F) 00011111
1149          */
1150         { 0x17, 0x1f },
1151
1152         /*
1153          * 18 HREFEND "Horizontal window end"
1154          *                  =  95 (0x5F) 01011111
1155          *    HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1156          *                  =  95 (0x5F) 01011111
1157          */
1158         { 0x18, 0x5f },
1159
1160         /*
1161          * 19 VSTRT "Vertical window start"
1162          *                  =   0 (0x00) 00000000
1163          *    VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1164          *                  =   0 (0x00) 00000000
1165          */
1166         { 0x19, 0x00 },
1167
1168         /*
1169          * 1A VEND "Vertical window end"
1170          *                  =  96 (0x60) 01100000
1171          *    VEND[7:0] "Vertical Window End, 8 MSBs"
1172          *                  =  96 (0x60) 01100000
1173          */
1174         { 0x1a, 0x60 },
1175
1176         /*
1177          * 32 COMM "Common Control M"
1178          *                  =  18 (0x12) 00010010
1179          *    COMM[7:6] "Pixel clock divide option"
1180          *                  =   0 (0x00) 00...... "/1"
1181          *    COMM[5:3] "Horizontal window end position, 3 LSBs"
1182          *                  =   2 (0x02) ..010...
1183          *    COMM[2:0] "Horizontal window start position, 3 LSBs"
1184          *                  =   2 (0x02) .....010
1185          */
1186         { 0x32, 0x12 },
1187
1188         /*
1189          * 03 COMA "Common Control A"
1190          *                  =  74 (0x4A) 01001010
1191          *    COMA[7:4] "AWB Update Threshold"
1192          *                  =   4 (0x04) 0100....
1193          *    COMA[3:2] "Vertical window end line control 2 LSBs"
1194          *                  =   2 (0x02) ....10..
1195          *    COMA[1:0] "Vertical window start line control 2 LSBs"
1196          *                  =   2 (0x02) ......10
1197          */
1198         { 0x03, 0x4a },
1199
1200         /*
1201          * 11 CLKRC "Clock Rate Control"
1202          *                  = 128 (0x80) 10000000
1203          *    CLKRC[7] "Internal frequency doublers on off seclection"
1204          *                  =   1 (0x01) 1....... "On"
1205          *    CLKRC[6] "Digital video master slave selection"
1206          *                  =   0 (0x00) .0...... "Master mode, sensor
1207          *                                         provides PCLK"
1208          *    CLKRC[5:0] "Clock divider { CLK = PCLK/(1+CLKRC[5:0]) }"
1209          *                  =   0 (0x00) ..000000
1210          */
1211         { 0x11, 0x80 },
1212
1213         /*
1214          * 12 COMH "Common Control H"
1215          *                  =   0 (0x00) 00000000
1216          *    COMH[7] "SRST"
1217          *                  =   0 (0x00) 0....... "No-op"
1218          *    COMH[6:4] "Resolution selection"
1219          *                  =   0 (0x00) .000.... "QXGA"
1220          *    COMH[3] "Master slave selection"
1221          *                  =   0 (0x00) ....0... "Master mode"
1222          *    COMH[2] "Internal B/R channel option"
1223          *                  =   0 (0x00) .....0.. "B/R use same channel"
1224          *    COMH[1] "Color bar test pattern"
1225          *                  =   0 (0x00) ......0. "Off"
1226          *    COMH[0] "Reserved"
1227          *                  =   0 (0x00) .......0
1228          */
1229         { 0x12, 0x00 },
1230
1231         /*
1232          * 12 COMH "Common Control H"
1233          *                  =  64 (0x40) 01000000
1234          *    COMH[7] "SRST"
1235          *                  =   0 (0x00) 0....... "No-op"
1236          *    COMH[6:4] "Resolution selection"
1237          *                  =   4 (0x04) .100.... "XGA"
1238          *    COMH[3] "Master slave selection"
1239          *                  =   0 (0x00) ....0... "Master mode"
1240          *    COMH[2] "Internal B/R channel option"
1241          *                  =   0 (0x00) .....0.. "B/R use same channel"
1242          *    COMH[1] "Color bar test pattern"
1243          *                  =   0 (0x00) ......0. "Off"
1244          *    COMH[0] "Reserved"
1245          *                  =   0 (0x00) .......0
1246          */
1247         { 0x12, 0x40 },
1248
1249         /*
1250          * 17 HREFST "Horizontal window start"
1251          *                  =  31 (0x1F) 00011111
1252          *    HREFST[7:0] "Horizontal window start, 8 MSBs"
1253          *                  =  31 (0x1F) 00011111
1254          */
1255         { 0x17, 0x1f },
1256
1257         /*
1258          * 18 HREFEND "Horizontal window end"
1259          *                  =  95 (0x5F) 01011111
1260          *    HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1261          *                  =  95 (0x5F) 01011111
1262          */
1263         { 0x18, 0x5f },
1264
1265         /*
1266          * 19 VSTRT "Vertical window start"
1267          *                  =   0 (0x00) 00000000
1268          *    VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1269          *                  =   0 (0x00) 00000000
1270          */
1271         { 0x19, 0x00 },
1272
1273         /*
1274          * 1A VEND "Vertical window end"
1275          *                  =  96 (0x60) 01100000
1276          *    VEND[7:0] "Vertical Window End, 8 MSBs"
1277          *                  =  96 (0x60) 01100000
1278          */
1279         { 0x1a, 0x60 },
1280
1281         /*
1282          * 32 COMM "Common Control M"
1283          *                  =  18 (0x12) 00010010
1284          *    COMM[7:6] "Pixel clock divide option"
1285          *                  =   0 (0x00) 00...... "/1"
1286          *    COMM[5:3] "Horizontal window end position, 3 LSBs"
1287          *                  =   2 (0x02) ..010...
1288          *    COMM[2:0] "Horizontal window start position, 3 LSBs"
1289          *                  =   2 (0x02) .....010
1290          */
1291         { 0x32, 0x12 },
1292
1293         /*
1294          * 03 COMA "Common Control A"
1295          *                  =  74 (0x4A) 01001010
1296          *    COMA[7:4] "AWB Update Threshold"
1297          *                  =   4 (0x04) 0100....
1298          *    COMA[3:2] "Vertical window end line control 2 LSBs"
1299          *                  =   2 (0x02) ....10..
1300          *    COMA[1:0] "Vertical window start line control 2 LSBs"
1301          *                  =   2 (0x02) ......10
1302          */
1303         { 0x03, 0x4a },
1304
1305         /*
1306          * 02 RED "Red Gain Control"
1307          *                  = 175 (0xAF) 10101111
1308          *    RED[7] "Action"
1309          *                  =   1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1310          *    RED[6:0] "Value"
1311          *                  =  47 (0x2F) .0101111
1312          */
1313         { 0x02, 0xaf },
1314
1315         /*
1316          * 2D ADDVSL "VSYNC Pulse Width"
1317          *                  = 210 (0xD2) 11010010
1318          *    ADDVSL[7:0] "VSYNC pulse width, LSB"
1319          *                  = 210 (0xD2) 11010010
1320          */
1321         { 0x2d, 0xd2 },
1322
1323         /*
1324          * 00 GAIN          =  24 (0x18) 00011000
1325          *    GAIN[7:6] "Reserved"
1326          *                  =   0 (0x00) 00......
1327          *    GAIN[5] "Double"
1328          *                  =   0 (0x00) ..0..... "False"
1329          *    GAIN[4] "Double"
1330          *                  =   1 (0x01) ...1.... "True"
1331          *    GAIN[3:0] "Range"
1332          *                  =   8 (0x08) ....1000
1333          */
1334         { 0x00, 0x18 },
1335
1336         /*
1337          * 01 BLUE "Blue Gain Control"
1338          *                  = 240 (0xF0) 11110000
1339          *    BLUE[7] "Action"
1340          *                  =   1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1341          *    BLUE[6:0] "Value"
1342          *                  = 112 (0x70) .1110000
1343          */
1344         { 0x01, 0xf0 },
1345
1346         /*
1347          * 10 AEC "Automatic Exposure Control"
1348          *                  =  10 (0x0A) 00001010
1349          *    AEC[7:0] "Automatic Exposure Control, 8 MSBs"
1350          *                  =  10 (0x0A) 00001010
1351          */
1352         { 0x10, 0x0a },
1353
1354         { 0xe1, 0x67 },
1355         { 0xe3, 0x03 },
1356         { 0xe4, 0x26 },
1357         { 0xe5, 0x3e },
1358         { 0xf8, 0x01 },
1359         { 0xff, 0x01 },
1360 };
1361
1362 static const struct ov_i2c_regvals norm_6x20[] = {
1363         { 0x12, 0x80 }, /* reset */
1364         { 0x11, 0x01 },
1365         { 0x03, 0x60 },
1366         { 0x05, 0x7f }, /* For when autoadjust is off */
1367         { 0x07, 0xa8 },
1368         /* The ratio of 0x0c and 0x0d controls the white point */
1369         { 0x0c, 0x24 },
1370         { 0x0d, 0x24 },
1371         { 0x0f, 0x15 }, /* COMS */
1372         { 0x10, 0x75 }, /* AEC Exposure time */
1373         { 0x12, 0x24 }, /* Enable AGC */
1374         { 0x14, 0x04 },
1375         /* 0x16: 0x06 helps frame stability with moving objects */
1376         { 0x16, 0x06 },
1377 /*      { 0x20, 0x30 },  * Aperture correction enable */
1378         { 0x26, 0xb2 }, /* BLC enable */
1379         /* 0x28: 0x05 Selects RGB format if RGB on */
1380         { 0x28, 0x05 },
1381         { 0x2a, 0x04 }, /* Disable framerate adjust */
1382 /*      { 0x2b, 0xac },  * Framerate; Set 2a[7] first */
1383         { 0x2d, 0x85 },
1384         { 0x33, 0xa0 }, /* Color Processing Parameter */
1385         { 0x34, 0xd2 }, /* Max A/D range */
1386         { 0x38, 0x8b },
1387         { 0x39, 0x40 },
1388
1389         { 0x3c, 0x39 }, /* Enable AEC mode changing */
1390         { 0x3c, 0x3c }, /* Change AEC mode */
1391         { 0x3c, 0x24 }, /* Disable AEC mode changing */
1392
1393         { 0x3d, 0x80 },
1394         /* These next two registers (0x4a, 0x4b) are undocumented.
1395          * They control the color balance */
1396         { 0x4a, 0x80 },
1397         { 0x4b, 0x80 },
1398         { 0x4d, 0xd2 }, /* This reduces noise a bit */
1399         { 0x4e, 0xc1 },
1400         { 0x4f, 0x04 },
1401 /* Do 50-53 have any effect? */
1402 /* Toggle 0x12[2] off and on here? */
1403 };
1404
1405 static const struct ov_i2c_regvals norm_6x30[] = {
1406         { 0x12, 0x80 }, /* Reset */
1407         { 0x00, 0x1f }, /* Gain */
1408         { 0x01, 0x99 }, /* Blue gain */
1409         { 0x02, 0x7c }, /* Red gain */
1410         { 0x03, 0xc0 }, /* Saturation */
1411         { 0x05, 0x0a }, /* Contrast */
1412         { 0x06, 0x95 }, /* Brightness */
1413         { 0x07, 0x2d }, /* Sharpness */
1414         { 0x0c, 0x20 },
1415         { 0x0d, 0x20 },
1416         { 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */
1417         { 0x0f, 0x05 },
1418         { 0x10, 0x9a },
1419         { 0x11, 0x00 }, /* Pixel clock = fastest */
1420         { 0x12, 0x24 }, /* Enable AGC and AWB */
1421         { 0x13, 0x21 },
1422         { 0x14, 0x80 },
1423         { 0x15, 0x01 },
1424         { 0x16, 0x03 },
1425         { 0x17, 0x38 },
1426         { 0x18, 0xea },
1427         { 0x19, 0x04 },
1428         { 0x1a, 0x93 },
1429         { 0x1b, 0x00 },
1430         { 0x1e, 0xc4 },
1431         { 0x1f, 0x04 },
1432         { 0x20, 0x20 },
1433         { 0x21, 0x10 },
1434         { 0x22, 0x88 },
1435         { 0x23, 0xc0 }, /* Crystal circuit power level */
1436         { 0x25, 0x9a }, /* Increase AEC black ratio */
1437         { 0x26, 0xb2 }, /* BLC enable */
1438         { 0x27, 0xa2 },
1439         { 0x28, 0x00 },
1440         { 0x29, 0x00 },
1441         { 0x2a, 0x84 }, /* 60 Hz power */
1442         { 0x2b, 0xa8 }, /* 60 Hz power */
1443         { 0x2c, 0xa0 },
1444         { 0x2d, 0x95 }, /* Enable auto-brightness */
1445         { 0x2e, 0x88 },
1446         { 0x33, 0x26 },
1447         { 0x34, 0x03 },
1448         { 0x36, 0x8f },
1449         { 0x37, 0x80 },
1450         { 0x38, 0x83 },
1451         { 0x39, 0x80 },
1452         { 0x3a, 0x0f },
1453         { 0x3b, 0x3c },
1454         { 0x3c, 0x1a },
1455         { 0x3d, 0x80 },
1456         { 0x3e, 0x80 },
1457         { 0x3f, 0x0e },
1458         { 0x40, 0x00 }, /* White bal */
1459         { 0x41, 0x00 }, /* White bal */
1460         { 0x42, 0x80 },
1461         { 0x43, 0x3f }, /* White bal */
1462         { 0x44, 0x80 },
1463         { 0x45, 0x20 },
1464         { 0x46, 0x20 },
1465         { 0x47, 0x80 },
1466         { 0x48, 0x7f },
1467         { 0x49, 0x00 },
1468         { 0x4a, 0x00 },
1469         { 0x4b, 0x80 },
1470         { 0x4c, 0xd0 },
1471         { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */
1472         { 0x4e, 0x40 },
1473         { 0x4f, 0x07 }, /* UV avg., col. killer: max */
1474         { 0x50, 0xff },
1475         { 0x54, 0x23 }, /* Max AGC gain: 18dB */
1476         { 0x55, 0xff },
1477         { 0x56, 0x12 },
1478         { 0x57, 0x81 },
1479         { 0x58, 0x75 },
1480         { 0x59, 0x01 }, /* AGC dark current comp.: +1 */
1481         { 0x5a, 0x2c },
1482         { 0x5b, 0x0f }, /* AWB chrominance levels */
1483         { 0x5c, 0x10 },
1484         { 0x3d, 0x80 },
1485         { 0x27, 0xa6 },
1486         { 0x12, 0x20 }, /* Toggle AWB */
1487         { 0x12, 0x24 },
1488 };
1489
1490 /* Lawrence Glaister <lg@jfm.bc.ca> reports:
1491  *
1492  * Register 0x0f in the 7610 has the following effects:
1493  *
1494  * 0x85 (AEC method 1): Best overall, good contrast range
1495  * 0x45 (AEC method 2): Very overexposed
1496  * 0xa5 (spec sheet default): Ok, but the black level is
1497  *      shifted resulting in loss of contrast
1498  * 0x05 (old driver setting): very overexposed, too much
1499  *      contrast
1500  */
1501 static const struct ov_i2c_regvals norm_7610[] = {
1502         { 0x10, 0xff },
1503         { 0x16, 0x06 },
1504         { 0x28, 0x24 },
1505         { 0x2b, 0xac },
1506         { 0x12, 0x00 },
1507         { 0x38, 0x81 },
1508         { 0x28, 0x24 }, /* 0c */
1509         { 0x0f, 0x85 }, /* lg's setting */
1510         { 0x15, 0x01 },
1511         { 0x20, 0x1c },
1512         { 0x23, 0x2a },
1513         { 0x24, 0x10 },
1514         { 0x25, 0x8a },
1515         { 0x26, 0xa2 },
1516         { 0x27, 0xc2 },
1517         { 0x2a, 0x04 },
1518         { 0x2c, 0xfe },
1519         { 0x2d, 0x93 },
1520         { 0x30, 0x71 },
1521         { 0x31, 0x60 },
1522         { 0x32, 0x26 },
1523         { 0x33, 0x20 },
1524         { 0x34, 0x48 },
1525         { 0x12, 0x24 },
1526         { 0x11, 0x01 },
1527         { 0x0c, 0x24 },
1528         { 0x0d, 0x24 },
1529 };
1530
1531 static const struct ov_i2c_regvals norm_7620[] = {
1532         { 0x12, 0x80 },         /* reset */
1533         { 0x00, 0x00 },         /* gain */
1534         { 0x01, 0x80 },         /* blue gain */
1535         { 0x02, 0x80 },         /* red gain */
1536         { 0x03, 0xc0 },         /* OV7670_R03_VREF */
1537         { 0x06, 0x60 },
1538         { 0x07, 0x00 },
1539         { 0x0c, 0x24 },
1540         { 0x0c, 0x24 },
1541         { 0x0d, 0x24 },
1542         { 0x11, 0x01 },
1543         { 0x12, 0x24 },
1544         { 0x13, 0x01 },
1545         { 0x14, 0x84 },
1546         { 0x15, 0x01 },
1547         { 0x16, 0x03 },
1548         { 0x17, 0x2f },
1549         { 0x18, 0xcf },
1550         { 0x19, 0x06 },
1551         { 0x1a, 0xf5 },
1552         { 0x1b, 0x00 },
1553         { 0x20, 0x18 },
1554         { 0x21, 0x80 },
1555         { 0x22, 0x80 },
1556         { 0x23, 0x00 },
1557         { 0x26, 0xa2 },
1558         { 0x27, 0xea },
1559         { 0x28, 0x22 }, /* Was 0x20, bit1 enables a 2x gain which we need */
1560         { 0x29, 0x00 },
1561         { 0x2a, 0x10 },
1562         { 0x2b, 0x00 },
1563         { 0x2c, 0x88 },
1564         { 0x2d, 0x91 },
1565         { 0x2e, 0x80 },
1566         { 0x2f, 0x44 },
1567         { 0x60, 0x27 },
1568         { 0x61, 0x02 },
1569         { 0x62, 0x5f },
1570         { 0x63, 0xd5 },
1571         { 0x64, 0x57 },
1572         { 0x65, 0x83 },
1573         { 0x66, 0x55 },
1574         { 0x67, 0x92 },
1575         { 0x68, 0xcf },
1576         { 0x69, 0x76 },
1577         { 0x6a, 0x22 },
1578         { 0x6b, 0x00 },
1579         { 0x6c, 0x02 },
1580         { 0x6d, 0x44 },
1581         { 0x6e, 0x80 },
1582         { 0x6f, 0x1d },
1583         { 0x70, 0x8b },
1584         { 0x71, 0x00 },
1585         { 0x72, 0x14 },
1586         { 0x73, 0x54 },
1587         { 0x74, 0x00 },
1588         { 0x75, 0x8e },
1589         { 0x76, 0x00 },
1590         { 0x77, 0xff },
1591         { 0x78, 0x80 },
1592         { 0x79, 0x80 },
1593         { 0x7a, 0x80 },
1594         { 0x7b, 0xe2 },
1595         { 0x7c, 0x00 },
1596 };
1597
1598 /* 7640 and 7648. The defaults should be OK for most registers. */
1599 static const struct ov_i2c_regvals norm_7640[] = {
1600         { 0x12, 0x80 },
1601         { 0x12, 0x14 },
1602 };
1603
1604 static const struct ov_regvals init_519_ov7660[] = {
1605         { 0x5d, 0x03 }, /* Turn off suspend mode */
1606         { 0x53, 0x9b }, /* 0x9f enables the (unused) microcontroller */
1607         { 0x54, 0x0f }, /* bit2 (jpeg enable) */
1608         { 0xa2, 0x20 }, /* a2-a5 are undocumented */
1609         { 0xa3, 0x18 },
1610         { 0xa4, 0x04 },
1611         { 0xa5, 0x28 },
1612         { 0x37, 0x00 }, /* SetUsbInit */
1613         { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
1614         /* Enable both fields, YUV Input, disable defect comp (why?) */
1615         { 0x20, 0x0c }, /* 0x0d does U <-> V swap */
1616         { 0x21, 0x38 },
1617         { 0x22, 0x1d },
1618         { 0x17, 0x50 }, /* undocumented */
1619         { 0x37, 0x00 }, /* undocumented */
1620         { 0x40, 0xff }, /* I2C timeout counter */
1621         { 0x46, 0x00 }, /* I2C clock prescaler */
1622 };
1623 static const struct ov_i2c_regvals norm_7660[] = {
1624         {OV7670_R12_COM7, OV7670_COM7_RESET},
1625         {OV7670_R11_CLKRC, 0x81},
1626         {0x92, 0x00},                   /* DM_LNL */
1627         {0x93, 0x00},                   /* DM_LNH */
1628         {0x9d, 0x4c},                   /* BD50ST */
1629         {0x9e, 0x3f},                   /* BD60ST */
1630         {OV7670_R3B_COM11, 0x02},
1631         {OV7670_R13_COM8, 0xf5},
1632         {OV7670_R10_AECH, 0x00},
1633         {OV7670_R00_GAIN, 0x00},
1634         {OV7670_R01_BLUE, 0x7c},
1635         {OV7670_R02_RED, 0x9d},
1636         {OV7670_R12_COM7, 0x00},
1637         {OV7670_R04_COM1, 00},
1638         {OV7670_R18_HSTOP, 0x01},
1639         {OV7670_R17_HSTART, 0x13},
1640         {OV7670_R32_HREF, 0x92},
1641         {OV7670_R19_VSTART, 0x02},
1642         {OV7670_R1A_VSTOP, 0x7a},
1643         {OV7670_R03_VREF, 0x00},
1644         {OV7670_R0E_COM5, 0x04},
1645         {OV7670_R0F_COM6, 0x62},
1646         {OV7670_R15_COM10, 0x00},
1647         {0x16, 0x02},                   /* RSVD */
1648         {0x1b, 0x00},                   /* PSHFT */
1649         {OV7670_R1E_MVFP, 0x01},
1650         {0x29, 0x3c},                   /* RSVD */
1651         {0x33, 0x00},                   /* CHLF */
1652         {0x34, 0x07},                   /* ARBLM */
1653         {0x35, 0x84},                   /* RSVD */
1654         {0x36, 0x00},                   /* RSVD */
1655         {0x37, 0x04},                   /* ADC */
1656         {0x39, 0x43},                   /* OFON */
1657         {OV7670_R3A_TSLB, 0x00},
1658         {OV7670_R3C_COM12, 0x6c},
1659         {OV7670_R3D_COM13, 0x98},
1660         {OV7670_R3F_EDGE, 0x23},
1661         {OV7670_R40_COM15, 0xc1},
1662         {OV7670_R41_COM16, 0x22},
1663         {0x6b, 0x0a},                   /* DBLV */
1664         {0xa1, 0x08},                   /* RSVD */
1665         {0x69, 0x80},                   /* HV */
1666         {0x43, 0xf0},                   /* RSVD.. */
1667         {0x44, 0x10},
1668         {0x45, 0x78},
1669         {0x46, 0xa8},
1670         {0x47, 0x60},
1671         {0x48, 0x80},
1672         {0x59, 0xba},
1673         {0x5a, 0x9a},
1674         {0x5b, 0x22},
1675         {0x5c, 0xb9},
1676         {0x5d, 0x9b},
1677         {0x5e, 0x10},
1678         {0x5f, 0xe0},
1679         {0x60, 0x85},
1680         {0x61, 0x60},
1681         {0x9f, 0x9d},                   /* RSVD */
1682         {0xa0, 0xa0},                   /* DSPC2 */
1683         {0x4f, 0x60},                   /* matrix */
1684         {0x50, 0x64},
1685         {0x51, 0x04},
1686         {0x52, 0x18},
1687         {0x53, 0x3c},
1688         {0x54, 0x54},
1689         {0x55, 0x40},
1690         {0x56, 0x40},
1691         {0x57, 0x40},
1692         {0x58, 0x0d},                   /* matrix sign */
1693         {0x8b, 0xcc},                   /* RSVD */
1694         {0x8c, 0xcc},
1695         {0x8d, 0xcf},
1696         {0x6c, 0x40},                   /* gamma curve */
1697         {0x6d, 0xe0},
1698         {0x6e, 0xa0},
1699         {0x6f, 0x80},
1700         {0x70, 0x70},
1701         {0x71, 0x80},
1702         {0x72, 0x60},
1703         {0x73, 0x60},
1704         {0x74, 0x50},
1705         {0x75, 0x40},
1706         {0x76, 0x38},
1707         {0x77, 0x3c},
1708         {0x78, 0x32},
1709         {0x79, 0x1a},
1710         {0x7a, 0x28},
1711         {0x7b, 0x24},
1712         {0x7c, 0x04},                   /* gamma curve */
1713         {0x7d, 0x12},
1714         {0x7e, 0x26},
1715         {0x7f, 0x46},
1716         {0x80, 0x54},
1717         {0x81, 0x64},
1718         {0x82, 0x70},
1719         {0x83, 0x7c},
1720         {0x84, 0x86},
1721         {0x85, 0x8e},
1722         {0x86, 0x9c},
1723         {0x87, 0xab},
1724         {0x88, 0xc4},
1725         {0x89, 0xd1},
1726         {0x8a, 0xe5},
1727         {OV7670_R14_COM9, 0x1e},
1728         {OV7670_R24_AEW, 0x80},
1729         {OV7670_R25_AEB, 0x72},
1730         {OV7670_R26_VPT, 0xb3},
1731         {0x62, 0x80},                   /* LCC1 */
1732         {0x63, 0x80},                   /* LCC2 */
1733         {0x64, 0x06},                   /* LCC3 */
1734         {0x65, 0x00},                   /* LCC4 */
1735         {0x66, 0x01},                   /* LCC5 */
1736         {0x94, 0x0e},                   /* RSVD.. */
1737         {0x95, 0x14},
1738         {OV7670_R13_COM8, OV7670_COM8_FASTAEC
1739                         | OV7670_COM8_AECSTEP
1740                         | OV7670_COM8_BFILT
1741                         | 0x10
1742                         | OV7670_COM8_AGC
1743                         | OV7670_COM8_AWB
1744                         | OV7670_COM8_AEC},
1745         {0xa1, 0xc8}
1746 };
1747
1748 /* 7670. Defaults taken from OmniVision provided data,
1749 *  as provided by Jonathan Corbet of OLPC               */
1750 static const struct ov_i2c_regvals norm_7670[] = {
1751         { OV7670_R12_COM7, OV7670_COM7_RESET },
1752         { OV7670_R3A_TSLB, 0x04 },              /* OV */
1753         { OV7670_R12_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
1754         { OV7670_R11_CLKRC, 0x01 },
1755 /*
1756  * Set the hardware window.  These values from OV don't entirely
1757  * make sense - hstop is less than hstart.  But they work...
1758  */
1759         { OV7670_R17_HSTART, 0x13 },
1760         { OV7670_R18_HSTOP, 0x01 },
1761         { OV7670_R32_HREF, 0xb6 },
1762         { OV7670_R19_VSTART, 0x02 },
1763         { OV7670_R1A_VSTOP, 0x7a },
1764         { OV7670_R03_VREF, 0x0a },
1765
1766         { OV7670_R0C_COM3, 0x00 },
1767         { OV7670_R3E_COM14, 0x00 },
1768 /* Mystery scaling numbers */
1769         { 0x70, 0x3a },
1770         { 0x71, 0x35 },
1771         { 0x72, 0x11 },
1772         { 0x73, 0xf0 },
1773         { 0xa2, 0x02 },
1774 /*      { OV7670_R15_COM10, 0x0 }, */
1775
1776 /* Gamma curve values */
1777         { 0x7a, 0x20 },
1778         { 0x7b, 0x10 },
1779         { 0x7c, 0x1e },
1780         { 0x7d, 0x35 },
1781         { 0x7e, 0x5a },
1782         { 0x7f, 0x69 },
1783         { 0x80, 0x76 },
1784         { 0x81, 0x80 },
1785         { 0x82, 0x88 },
1786         { 0x83, 0x8f },
1787         { 0x84, 0x96 },
1788         { 0x85, 0xa3 },
1789         { 0x86, 0xaf },
1790         { 0x87, 0xc4 },
1791         { 0x88, 0xd7 },
1792         { 0x89, 0xe8 },
1793
1794 /* AGC and AEC parameters.  Note we start by disabling those features,
1795    then turn them only after tweaking the values. */
1796         { OV7670_R13_COM8, OV7670_COM8_FASTAEC
1797                          | OV7670_COM8_AECSTEP
1798                          | OV7670_COM8_BFILT },
1799         { OV7670_R00_GAIN, 0x00 },
1800         { OV7670_R10_AECH, 0x00 },
1801         { OV7670_R0D_COM4, 0x40 }, /* magic reserved bit */
1802         { OV7670_R14_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
1803         { OV7670_RA5_BD50MAX, 0x05 },
1804         { OV7670_RAB_BD60MAX, 0x07 },
1805         { OV7670_R24_AEW, 0x95 },
1806         { OV7670_R25_AEB, 0x33 },
1807         { OV7670_R26_VPT, 0xe3 },
1808         { OV7670_R9F_HAECC1, 0x78 },
1809         { OV7670_RA0_HAECC2, 0x68 },
1810         { 0xa1, 0x03 }, /* magic */
1811         { OV7670_RA6_HAECC3, 0xd8 },
1812         { OV7670_RA7_HAECC4, 0xd8 },
1813         { OV7670_RA8_HAECC5, 0xf0 },
1814         { OV7670_RA9_HAECC6, 0x90 },
1815         { OV7670_RAA_HAECC7, 0x94 },
1816         { OV7670_R13_COM8, OV7670_COM8_FASTAEC
1817                         | OV7670_COM8_AECSTEP
1818                         | OV7670_COM8_BFILT
1819                         | OV7670_COM8_AGC
1820                         | OV7670_COM8_AEC },
1821
1822 /* Almost all of these are magic "reserved" values.  */
1823         { OV7670_R0E_COM5, 0x61 },
1824         { OV7670_R0F_COM6, 0x4b },
1825         { 0x16, 0x02 },
1826         { OV7670_R1E_MVFP, 0x07 },
1827         { 0x21, 0x02 },
1828         { 0x22, 0x91 },
1829         { 0x29, 0x07 },
1830         { 0x33, 0x0b },
1831         { 0x35, 0x0b },
1832         { 0x37, 0x1d },
1833         { 0x38, 0x71 },
1834         { 0x39, 0x2a },
1835         { OV7670_R3C_COM12, 0x78 },
1836         { 0x4d, 0x40 },
1837         { 0x4e, 0x20 },
1838         { OV7670_R69_GFIX, 0x00 },
1839         { 0x6b, 0x4a },
1840         { 0x74, 0x10 },
1841         { 0x8d, 0x4f },
1842         { 0x8e, 0x00 },
1843         { 0x8f, 0x00 },
1844         { 0x90, 0x00 },
1845         { 0x91, 0x00 },
1846         { 0x96, 0x00 },
1847         { 0x9a, 0x00 },
1848         { 0xb0, 0x84 },
1849         { 0xb1, 0x0c },
1850         { 0xb2, 0x0e },
1851         { 0xb3, 0x82 },
1852         { 0xb8, 0x0a },
1853
1854 /* More reserved magic, some of which tweaks white balance */
1855         { 0x43, 0x0a },
1856         { 0x44, 0xf0 },
1857         { 0x45, 0x34 },
1858         { 0x46, 0x58 },
1859         { 0x47, 0x28 },
1860         { 0x48, 0x3a },
1861         { 0x59, 0x88 },
1862         { 0x5a, 0x88 },
1863         { 0x5b, 0x44 },
1864         { 0x5c, 0x67 },
1865         { 0x5d, 0x49 },
1866         { 0x5e, 0x0e },
1867         { 0x6c, 0x0a },
1868         { 0x6d, 0x55 },
1869         { 0x6e, 0x11 },
1870         { 0x6f, 0x9f },                 /* "9e for advance AWB" */
1871         { 0x6a, 0x40 },
1872         { OV7670_R01_BLUE, 0x40 },
1873         { OV7670_R02_RED, 0x60 },
1874         { OV7670_R13_COM8, OV7670_COM8_FASTAEC
1875                         | OV7670_COM8_AECSTEP
1876                         | OV7670_COM8_BFILT
1877                         | OV7670_COM8_AGC
1878                         | OV7670_COM8_AEC
1879                         | OV7670_COM8_AWB },
1880
1881 /* Matrix coefficients */
1882         { 0x4f, 0x80 },
1883         { 0x50, 0x80 },
1884         { 0x51, 0x00 },
1885         { 0x52, 0x22 },
1886         { 0x53, 0x5e },
1887         { 0x54, 0x80 },
1888         { 0x58, 0x9e },
1889
1890         { OV7670_R41_COM16, OV7670_COM16_AWBGAIN },
1891         { OV7670_R3F_EDGE, 0x00 },
1892         { 0x75, 0x05 },
1893         { 0x76, 0xe1 },
1894         { 0x4c, 0x00 },
1895         { 0x77, 0x01 },
1896         { OV7670_R3D_COM13, OV7670_COM13_GAMMA
1897                           | OV7670_COM13_UVSAT
1898                           | 2},         /* was 3 */
1899         { 0x4b, 0x09 },
1900         { 0xc9, 0x60 },
1901         { OV7670_R41_COM16, 0x38 },
1902         { 0x56, 0x40 },
1903
1904         { 0x34, 0x11 },
1905         { OV7670_R3B_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO },
1906         { 0xa4, 0x88 },
1907         { 0x96, 0x00 },
1908         { 0x97, 0x30 },
1909         { 0x98, 0x20 },
1910         { 0x99, 0x30 },
1911         { 0x9a, 0x84 },
1912         { 0x9b, 0x29 },
1913         { 0x9c, 0x03 },
1914         { 0x9d, 0x4c },
1915         { 0x9e, 0x3f },
1916         { 0x78, 0x04 },
1917
1918 /* Extra-weird stuff.  Some sort of multiplexor register */
1919         { 0x79, 0x01 },
1920         { 0xc8, 0xf0 },
1921         { 0x79, 0x0f },
1922         { 0xc8, 0x00 },
1923         { 0x79, 0x10 },
1924         { 0xc8, 0x7e },
1925         { 0x79, 0x0a },
1926         { 0xc8, 0x80 },
1927         { 0x79, 0x0b },
1928         { 0xc8, 0x01 },
1929         { 0x79, 0x0c },
1930         { 0xc8, 0x0f },
1931         { 0x79, 0x0d },
1932         { 0xc8, 0x20 },
1933         { 0x79, 0x09 },
1934         { 0xc8, 0x80 },
1935         { 0x79, 0x02 },
1936         { 0xc8, 0xc0 },
1937         { 0x79, 0x03 },
1938         { 0xc8, 0x40 },
1939         { 0x79, 0x05 },
1940         { 0xc8, 0x30 },
1941         { 0x79, 0x26 },
1942 };
1943
1944 static const struct ov_i2c_regvals norm_8610[] = {
1945         { 0x12, 0x80 },
1946         { 0x00, 0x00 },
1947         { 0x01, 0x80 },
1948         { 0x02, 0x80 },
1949         { 0x03, 0xc0 },
1950         { 0x04, 0x30 },
1951         { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */
1952         { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */
1953         { 0x0a, 0x86 },
1954         { 0x0b, 0xb0 },
1955         { 0x0c, 0x20 },
1956         { 0x0d, 0x20 },
1957         { 0x11, 0x01 },
1958         { 0x12, 0x25 },
1959         { 0x13, 0x01 },
1960         { 0x14, 0x04 },
1961         { 0x15, 0x01 }, /* Lin and Win think different about UV order */
1962         { 0x16, 0x03 },
1963         { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */
1964         { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */
1965         { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */
1966         { 0x1a, 0xf5 },
1967         { 0x1b, 0x00 },
1968         { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */
1969         { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */
1970         { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */
1971         { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */
1972         { 0x26, 0xa2 },
1973         { 0x27, 0xea },
1974         { 0x28, 0x00 },
1975         { 0x29, 0x00 },
1976         { 0x2a, 0x80 },
1977         { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */
1978         { 0x2c, 0xac },
1979         { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */
1980         { 0x2e, 0x80 },
1981         { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */
1982         { 0x4c, 0x00 },
1983         { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */
1984         { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */
1985         { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */
1986         { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */
1987         { 0x63, 0xff },
1988         { 0x64, 0x53 }, /* new windrv 090403 says 0x57,
1989                          * maybe thats wrong */
1990         { 0x65, 0x00 },
1991         { 0x66, 0x55 },
1992         { 0x67, 0xb0 },
1993         { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */
1994         { 0x69, 0x02 },
1995         { 0x6a, 0x22 },
1996         { 0x6b, 0x00 },
1997         { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but
1998                          * deleting bit7 colors the first images red */
1999         { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */
2000         { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */
2001         { 0x6f, 0x01 },
2002         { 0x70, 0x8b },
2003         { 0x71, 0x00 },
2004         { 0x72, 0x14 },
2005         { 0x73, 0x54 },
2006         { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */
2007         { 0x75, 0x0e },
2008         { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */
2009         { 0x77, 0xff },
2010         { 0x78, 0x80 },
2011         { 0x79, 0x80 },
2012         { 0x7a, 0x80 },
2013         { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */
2014         { 0x7c, 0x00 },
2015         { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */
2016         { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */
2017         { 0x7f, 0xfb },
2018         { 0x80, 0x28 },
2019         { 0x81, 0x00 },
2020         { 0x82, 0x23 },
2021         { 0x83, 0x0b },
2022         { 0x84, 0x00 },
2023         { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */
2024         { 0x86, 0xc9 },
2025         { 0x87, 0x00 },
2026         { 0x88, 0x00 },
2027         { 0x89, 0x01 },
2028         { 0x12, 0x20 },
2029         { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */
2030 };
2031
2032 static unsigned char ov7670_abs_to_sm(unsigned char v)
2033 {
2034         if (v > 127)
2035                 return v & 0x7f;
2036         return (128 - v) | 0x80;
2037 }
2038
2039 /* Write a OV519 register */
2040 static void reg_w(struct sd *sd, u16 index, u16 value)
2041 {
2042         int ret, req = 0;
2043
2044         if (sd->gspca_dev.usb_err < 0)
2045                 return;
2046
2047         switch (sd->bridge) {
2048         case BRIDGE_OV511:
2049         case BRIDGE_OV511PLUS:
2050                 req = 2;
2051                 break;
2052         case BRIDGE_OVFX2:
2053                 req = 0x0a;
2054                 /* fall through */
2055         case BRIDGE_W9968CF:
2056                 PDEBUG(D_USBO, "SET %02x %04x %04x",
2057                                 req, value, index);
2058                 ret = usb_control_msg(sd->gspca_dev.dev,
2059                         usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2060                         req,
2061                         USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2062                         value, index, NULL, 0, 500);
2063                 goto leave;
2064         default:
2065                 req = 1;
2066         }
2067
2068         PDEBUG(D_USBO, "SET %02x 0000 %04x %02x",
2069                         req, index, value);
2070         sd->gspca_dev.usb_buf[0] = value;
2071         ret = usb_control_msg(sd->gspca_dev.dev,
2072                         usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2073                         req,
2074                         USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2075                         0, index,
2076                         sd->gspca_dev.usb_buf, 1, 500);
2077 leave:
2078         if (ret < 0) {
2079                 err("reg_w %02x failed %d", index, ret);
2080                 sd->gspca_dev.usb_err = ret;
2081                 return;
2082         }
2083 }
2084
2085 /* Read from a OV519 register, note not valid for the w9968cf!! */
2086 /* returns: negative is error, pos or zero is data */
2087 static int reg_r(struct sd *sd, u16 index)
2088 {
2089         int ret;
2090         int req;
2091
2092         if (sd->gspca_dev.usb_err < 0)
2093                 return -1;
2094
2095         switch (sd->bridge) {
2096         case BRIDGE_OV511:
2097         case BRIDGE_OV511PLUS:
2098                 req = 3;
2099                 break;
2100         case BRIDGE_OVFX2:
2101                 req = 0x0b;
2102                 break;
2103         default:
2104                 req = 1;
2105         }
2106
2107         ret = usb_control_msg(sd->gspca_dev.dev,
2108                         usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2109                         req,
2110                         USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2111                         0, index, sd->gspca_dev.usb_buf, 1, 500);
2112
2113         if (ret >= 0) {
2114                 ret = sd->gspca_dev.usb_buf[0];
2115                 PDEBUG(D_USBI, "GET %02x 0000 %04x %02x",
2116                         req, index, ret);
2117         } else {
2118                 err("reg_r %02x failed %d", index, ret);
2119                 sd->gspca_dev.usb_err = ret;
2120         }
2121
2122         return ret;
2123 }
2124
2125 /* Read 8 values from a OV519 register */
2126 static int reg_r8(struct sd *sd,
2127                   u16 index)
2128 {
2129         int ret;
2130
2131         if (sd->gspca_dev.usb_err < 0)
2132                 return -1;
2133
2134         ret = usb_control_msg(sd->gspca_dev.dev,
2135                         usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2136                         1,                      /* REQ_IO */
2137                         USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2138                         0, index, sd->gspca_dev.usb_buf, 8, 500);
2139
2140         if (ret >= 0) {
2141                 ret = sd->gspca_dev.usb_buf[0];
2142         } else {
2143                 err("reg_r8 %02x failed %d", index, ret);
2144                 sd->gspca_dev.usb_err = ret;
2145         }
2146
2147         return ret;
2148 }
2149
2150 /*
2151  * Writes bits at positions specified by mask to an OV51x reg. Bits that are in
2152  * the same position as 1's in "mask" are cleared and set to "value". Bits
2153  * that are in the same position as 0's in "mask" are preserved, regardless
2154  * of their respective state in "value".
2155  */
2156 static void reg_w_mask(struct sd *sd,
2157                         u16 index,
2158                         u8 value,
2159                         u8 mask)
2160 {
2161         int ret;
2162         u8 oldval;
2163
2164         if (mask != 0xff) {
2165                 value &= mask;                  /* Enforce mask on value */
2166                 ret = reg_r(sd, index);
2167                 if (ret < 0)
2168                         return;
2169
2170                 oldval = ret & ~mask;           /* Clear the masked bits */
2171                 value |= oldval;                /* Set the desired bits */
2172         }
2173         reg_w(sd, index, value);
2174 }
2175
2176 /*
2177  * Writes multiple (n) byte value to a single register. Only valid with certain
2178  * registers (0x30 and 0xc4 - 0xce).
2179  */
2180 static void ov518_reg_w32(struct sd *sd, u16 index, u32 value, int n)
2181 {
2182         int ret;
2183
2184         if (sd->gspca_dev.usb_err < 0)
2185                 return;
2186
2187         *((__le32 *) sd->gspca_dev.usb_buf) = __cpu_to_le32(value);
2188
2189         ret = usb_control_msg(sd->gspca_dev.dev,
2190                         usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2191                         1 /* REG_IO */,
2192                         USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2193                         0, index,
2194                         sd->gspca_dev.usb_buf, n, 500);
2195         if (ret < 0) {
2196                 err("reg_w32 %02x failed %d", index, ret);
2197                 sd->gspca_dev.usb_err = ret;
2198         }
2199 }
2200
2201 static void ov511_i2c_w(struct sd *sd, u8 reg, u8 value)
2202 {
2203         int rc, retries;
2204
2205         PDEBUG(D_USBO, "ov511_i2c_w %02x %02x", reg, value);
2206
2207         /* Three byte write cycle */
2208         for (retries = 6; ; ) {
2209                 /* Select camera register */
2210                 reg_w(sd, R51x_I2C_SADDR_3, reg);
2211
2212                 /* Write "value" to I2C data port of OV511 */
2213                 reg_w(sd, R51x_I2C_DATA, value);
2214
2215                 /* Initiate 3-byte write cycle */
2216                 reg_w(sd, R511_I2C_CTL, 0x01);
2217
2218                 do {
2219                         rc = reg_r(sd, R511_I2C_CTL);
2220                 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2221
2222                 if (rc < 0)
2223                         return;
2224
2225                 if ((rc & 2) == 0) /* Ack? */
2226                         break;
2227                 if (--retries < 0) {
2228                         PDEBUG(D_USBO, "i2c write retries exhausted");
2229                         return;
2230                 }
2231         }
2232 }
2233
2234 static int ov511_i2c_r(struct sd *sd, u8 reg)
2235 {
2236         int rc, value, retries;
2237
2238         /* Two byte write cycle */
2239         for (retries = 6; ; ) {
2240                 /* Select camera register */
2241                 reg_w(sd, R51x_I2C_SADDR_2, reg);
2242
2243                 /* Initiate 2-byte write cycle */
2244                 reg_w(sd, R511_I2C_CTL, 0x03);
2245
2246                 do {
2247                         rc = reg_r(sd, R511_I2C_CTL);
2248                 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2249
2250                 if (rc < 0)
2251                         return rc;
2252
2253                 if ((rc & 2) == 0) /* Ack? */
2254                         break;
2255
2256                 /* I2C abort */
2257                 reg_w(sd, R511_I2C_CTL, 0x10);
2258
2259                 if (--retries < 0) {
2260                         PDEBUG(D_USBI, "i2c write retries exhausted");
2261                         return -1;
2262                 }
2263         }
2264
2265         /* Two byte read cycle */
2266         for (retries = 6; ; ) {
2267                 /* Initiate 2-byte read cycle */
2268                 reg_w(sd, R511_I2C_CTL, 0x05);
2269
2270                 do {
2271                         rc = reg_r(sd, R511_I2C_CTL);
2272                 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2273
2274                 if (rc < 0)
2275                         return rc;
2276
2277                 if ((rc & 2) == 0) /* Ack? */
2278                         break;
2279
2280                 /* I2C abort */
2281                 reg_w(sd, R511_I2C_CTL, 0x10);
2282
2283                 if (--retries < 0) {
2284                         PDEBUG(D_USBI, "i2c read retries exhausted");
2285                         return -1;
2286                 }
2287         }
2288
2289         value = reg_r(sd, R51x_I2C_DATA);
2290
2291         PDEBUG(D_USBI, "ov511_i2c_r %02x %02x", reg, value);
2292
2293         /* This is needed to make i2c_w() work */
2294         reg_w(sd, R511_I2C_CTL, 0x05);
2295
2296         return value;
2297 }
2298
2299 /*
2300  * The OV518 I2C I/O procedure is different, hence, this function.
2301  * This is normally only called from i2c_w(). Note that this function
2302  * always succeeds regardless of whether the sensor is present and working.
2303  */
2304 static void ov518_i2c_w(struct sd *sd,
2305                 u8 reg,
2306                 u8 value)
2307 {
2308         PDEBUG(D_USBO, "ov518_i2c_w %02x %02x", reg, value);
2309
2310         /* Select camera register */
2311         reg_w(sd, R51x_I2C_SADDR_3, reg);
2312
2313         /* Write "value" to I2C data port of OV511 */
2314         reg_w(sd, R51x_I2C_DATA, value);
2315
2316         /* Initiate 3-byte write cycle */
2317         reg_w(sd, R518_I2C_CTL, 0x01);
2318
2319         /* wait for write complete */
2320         msleep(4);
2321         reg_r8(sd, R518_I2C_CTL);
2322 }
2323
2324 /*
2325  * returns: negative is error, pos or zero is data
2326  *
2327  * The OV518 I2C I/O procedure is different, hence, this function.
2328  * This is normally only called from i2c_r(). Note that this function
2329  * always succeeds regardless of whether the sensor is present and working.
2330  */
2331 static int ov518_i2c_r(struct sd *sd, u8 reg)
2332 {
2333         int value;
2334
2335         /* Select camera register */
2336         reg_w(sd, R51x_I2C_SADDR_2, reg);
2337
2338         /* Initiate 2-byte write cycle */
2339         reg_w(sd, R518_I2C_CTL, 0x03);
2340
2341         /* Initiate 2-byte read cycle */
2342         reg_w(sd, R518_I2C_CTL, 0x05);
2343         value = reg_r(sd, R51x_I2C_DATA);
2344         PDEBUG(D_USBI, "ov518_i2c_r %02x %02x", reg, value);
2345         return value;
2346 }
2347
2348 static void ovfx2_i2c_w(struct sd *sd, u8 reg, u8 value)
2349 {
2350         int ret;
2351
2352         if (sd->gspca_dev.usb_err < 0)
2353                 return;
2354
2355         ret = usb_control_msg(sd->gspca_dev.dev,
2356                         usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2357                         0x02,
2358                         USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2359                         (u16) value, (u16) reg, NULL, 0, 500);
2360
2361         if (ret < 0) {
2362                 err("ovfx2_i2c_w %02x failed %d", reg, ret);
2363                 sd->gspca_dev.usb_err = ret;
2364         }
2365
2366         PDEBUG(D_USBO, "ovfx2_i2c_w %02x %02x", reg, value);
2367 }
2368
2369 static int ovfx2_i2c_r(struct sd *sd, u8 reg)
2370 {
2371         int ret;
2372
2373         if (sd->gspca_dev.usb_err < 0)
2374                 return -1;
2375
2376         ret = usb_control_msg(sd->gspca_dev.dev,
2377                         usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2378                         0x03,
2379                         USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2380                         0, (u16) reg, sd->gspca_dev.usb_buf, 1, 500);
2381
2382         if (ret >= 0) {
2383                 ret = sd->gspca_dev.usb_buf[0];
2384                 PDEBUG(D_USBI, "ovfx2_i2c_r %02x %02x", reg, ret);
2385         } else {
2386                 err("ovfx2_i2c_r %02x failed %d", reg, ret);
2387                 sd->gspca_dev.usb_err = ret;
2388         }
2389
2390         return ret;
2391 }
2392
2393 static void i2c_w(struct sd *sd, u8 reg, u8 value)
2394 {
2395         if (sd->sensor_reg_cache[reg] == value)
2396                 return;
2397
2398         switch (sd->bridge) {
2399         case BRIDGE_OV511:
2400         case BRIDGE_OV511PLUS:
2401                 ov511_i2c_w(sd, reg, value);
2402                 break;
2403         case BRIDGE_OV518:
2404         case BRIDGE_OV518PLUS:
2405         case BRIDGE_OV519:
2406                 ov518_i2c_w(sd, reg, value);
2407                 break;
2408         case BRIDGE_OVFX2:
2409                 ovfx2_i2c_w(sd, reg, value);
2410                 break;
2411         case BRIDGE_W9968CF:
2412                 w9968cf_i2c_w(sd, reg, value);
2413                 break;
2414         }
2415
2416         if (sd->gspca_dev.usb_err >= 0) {
2417                 /* Up on sensor reset empty the register cache */
2418                 if (reg == 0x12 && (value & 0x80))
2419                         memset(sd->sensor_reg_cache, -1,
2420                                 sizeof(sd->sensor_reg_cache));
2421                 else
2422                         sd->sensor_reg_cache[reg] = value;
2423         }
2424 }
2425
2426 static int i2c_r(struct sd *sd, u8 reg)
2427 {
2428         int ret = -1;
2429
2430         if (sd->sensor_reg_cache[reg] != -1)
2431                 return sd->sensor_reg_cache[reg];
2432
2433         switch (sd->bridge) {
2434         case BRIDGE_OV511:
2435         case BRIDGE_OV511PLUS:
2436                 ret = ov511_i2c_r(sd, reg);
2437                 break;
2438         case BRIDGE_OV518:
2439         case BRIDGE_OV518PLUS:
2440         case BRIDGE_OV519:
2441                 ret = ov518_i2c_r(sd, reg);
2442                 break;
2443         case BRIDGE_OVFX2:
2444                 ret = ovfx2_i2c_r(sd, reg);
2445                 break;
2446         case BRIDGE_W9968CF:
2447                 ret = w9968cf_i2c_r(sd, reg);
2448                 break;
2449         }
2450
2451         if (ret >= 0)
2452                 sd->sensor_reg_cache[reg] = ret;
2453
2454         return ret;
2455 }
2456
2457 /* Writes bits at positions specified by mask to an I2C reg. Bits that are in
2458  * the same position as 1's in "mask" are cleared and set to "value". Bits
2459  * that are in the same position as 0's in "mask" are preserved, regardless
2460  * of their respective state in "value".
2461  */
2462 static void i2c_w_mask(struct sd *sd,
2463                         u8 reg,
2464                         u8 value,
2465                         u8 mask)
2466 {
2467         int rc;
2468         u8 oldval;
2469
2470         value &= mask;                  /* Enforce mask on value */
2471         rc = i2c_r(sd, reg);
2472         if (rc < 0)
2473                 return;
2474         oldval = rc & ~mask;            /* Clear the masked bits */
2475         value |= oldval;                /* Set the desired bits */
2476         i2c_w(sd, reg, value);
2477 }
2478
2479 /* Temporarily stops OV511 from functioning. Must do this before changing
2480  * registers while the camera is streaming */
2481 static inline void ov51x_stop(struct sd *sd)
2482 {
2483         PDEBUG(D_STREAM, "stopping");
2484         sd->stopped = 1;
2485         switch (sd->bridge) {
2486         case BRIDGE_OV511:
2487         case BRIDGE_OV511PLUS:
2488                 reg_w(sd, R51x_SYS_RESET, 0x3d);
2489                 break;
2490         case BRIDGE_OV518:
2491         case BRIDGE_OV518PLUS:
2492                 reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a);
2493                 break;
2494         case BRIDGE_OV519:
2495                 reg_w(sd, OV519_R51_RESET1, 0x0f);
2496                 reg_w(sd, OV519_R51_RESET1, 0x00);
2497                 reg_w(sd, 0x22, 0x00);          /* FRAR */
2498                 break;
2499         case BRIDGE_OVFX2:
2500                 reg_w_mask(sd, 0x0f, 0x00, 0x02);
2501                 break;
2502         case BRIDGE_W9968CF:
2503                 reg_w(sd, 0x3c, 0x0a05); /* stop USB transfer */
2504                 break;
2505         }
2506 }
2507
2508 /* Restarts OV511 after ov511_stop() is called. Has no effect if it is not
2509  * actually stopped (for performance). */
2510 static inline void ov51x_restart(struct sd *sd)
2511 {
2512         PDEBUG(D_STREAM, "restarting");
2513         if (!sd->stopped)
2514                 return;
2515         sd->stopped = 0;
2516
2517         /* Reinitialize the stream */
2518         switch (sd->bridge) {
2519         case BRIDGE_OV511:
2520         case BRIDGE_OV511PLUS:
2521                 reg_w(sd, R51x_SYS_RESET, 0x00);
2522                 break;
2523         case BRIDGE_OV518:
2524         case BRIDGE_OV518PLUS:
2525                 reg_w(sd, 0x2f, 0x80);
2526                 reg_w(sd, R51x_SYS_RESET, 0x00);
2527                 break;
2528         case BRIDGE_OV519:
2529                 reg_w(sd, OV519_R51_RESET1, 0x0f);
2530                 reg_w(sd, OV519_R51_RESET1, 0x00);
2531                 reg_w(sd, 0x22, 0x1d);          /* FRAR */
2532                 break;
2533         case BRIDGE_OVFX2:
2534                 reg_w_mask(sd, 0x0f, 0x02, 0x02);
2535                 break;
2536         case BRIDGE_W9968CF:
2537                 reg_w(sd, 0x3c, 0x8a05); /* USB FIFO enable */
2538                 break;
2539         }
2540 }
2541
2542 static void ov51x_set_slave_ids(struct sd *sd, u8 slave);
2543
2544 /* This does an initial reset of an OmniVision sensor and ensures that I2C
2545  * is synchronized. Returns <0 on failure.
2546  */
2547 static int init_ov_sensor(struct sd *sd, u8 slave)
2548 {
2549         int i;
2550
2551         ov51x_set_slave_ids(sd, slave);
2552
2553         /* Reset the sensor */
2554         i2c_w(sd, 0x12, 0x80);
2555
2556         /* Wait for it to initialize */
2557         msleep(150);
2558
2559         for (i = 0; i < i2c_detect_tries; i++) {
2560                 if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f &&
2561                     i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) {
2562                         PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i);
2563                         return 0;
2564                 }
2565
2566                 /* Reset the sensor */
2567                 i2c_w(sd, 0x12, 0x80);
2568
2569                 /* Wait for it to initialize */
2570                 msleep(150);
2571
2572                 /* Dummy read to sync I2C */
2573                 if (i2c_r(sd, 0x00) < 0)
2574                         return -1;
2575         }
2576         return -1;
2577 }
2578
2579 /* Set the read and write slave IDs. The "slave" argument is the write slave,
2580  * and the read slave will be set to (slave + 1).
2581  * This should not be called from outside the i2c I/O functions.
2582  * Sets I2C read and write slave IDs. Returns <0 for error
2583  */
2584 static void ov51x_set_slave_ids(struct sd *sd,
2585                                 u8 slave)
2586 {
2587         switch (sd->bridge) {
2588         case BRIDGE_OVFX2:
2589                 reg_w(sd, OVFX2_I2C_ADDR, slave);
2590                 return;
2591         case BRIDGE_W9968CF:
2592                 sd->sensor_addr = slave;
2593                 return;
2594         }
2595
2596         reg_w(sd, R51x_I2C_W_SID, slave);
2597         reg_w(sd, R51x_I2C_R_SID, slave + 1);
2598 }
2599
2600 static void write_regvals(struct sd *sd,
2601                          const struct ov_regvals *regvals,
2602                          int n)
2603 {
2604         while (--n >= 0) {
2605                 reg_w(sd, regvals->reg, regvals->val);
2606                 regvals++;
2607         }
2608 }
2609
2610 static void write_i2c_regvals(struct sd *sd,
2611                         const struct ov_i2c_regvals *regvals,
2612                         int n)
2613 {
2614         while (--n >= 0) {
2615                 i2c_w(sd, regvals->reg, regvals->val);
2616                 regvals++;
2617         }
2618 }
2619
2620 /****************************************************************************
2621  *
2622  * OV511 and sensor configuration
2623  *
2624  ***************************************************************************/
2625
2626 /* This initializes the OV2x10 / OV3610 / OV3620 */
2627 static void ov_hires_configure(struct sd *sd)
2628 {
2629         int high, low;
2630
2631         if (sd->bridge != BRIDGE_OVFX2) {
2632                 err("error hires sensors only supported with ovfx2");
2633                 return;
2634         }
2635
2636         PDEBUG(D_PROBE, "starting ov hires configuration");
2637
2638         /* Detect sensor (sub)type */
2639         high = i2c_r(sd, 0x0a);
2640         low = i2c_r(sd, 0x0b);
2641         /* info("%x, %x", high, low); */
2642         if (high == 0x96 && low == 0x40) {
2643                 PDEBUG(D_PROBE, "Sensor is an OV2610");
2644                 sd->sensor = SEN_OV2610;
2645         } else if (high == 0x96 && low == 0x41) {
2646                 PDEBUG(D_PROBE, "Sensor is an OV2610AE");
2647                 sd->sensor = SEN_OV2610AE;
2648         } else if (high == 0x36 && (low & 0x0f) == 0x00) {
2649                 PDEBUG(D_PROBE, "Sensor is an OV3610");
2650                 sd->sensor = SEN_OV3610;
2651         } else {
2652                 err("Error unknown sensor type: %02x%02x",
2653                         high, low);
2654         }
2655 }
2656
2657 /* This initializes the OV8110, OV8610 sensor. The OV8110 uses
2658  * the same register settings as the OV8610, since they are very similar.
2659  */
2660 static void ov8xx0_configure(struct sd *sd)
2661 {
2662         int rc;
2663
2664         PDEBUG(D_PROBE, "starting ov8xx0 configuration");
2665
2666         /* Detect sensor (sub)type */
2667         rc = i2c_r(sd, OV7610_REG_COM_I);
2668         if (rc < 0) {
2669                 PDEBUG(D_ERR, "Error detecting sensor type");
2670                 return;
2671         }
2672         if ((rc & 3) == 1)
2673                 sd->sensor = SEN_OV8610;
2674         else
2675                 err("Unknown image sensor version: %d", rc & 3);
2676 }
2677
2678 /* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses
2679  * the same register settings as the OV7610, since they are very similar.
2680  */
2681 static void ov7xx0_configure(struct sd *sd)
2682 {
2683         int rc, high, low;
2684
2685         PDEBUG(D_PROBE, "starting OV7xx0 configuration");
2686
2687         /* Detect sensor (sub)type */
2688         rc = i2c_r(sd, OV7610_REG_COM_I);
2689
2690         /* add OV7670 here
2691          * it appears to be wrongly detected as a 7610 by default */
2692         if (rc < 0) {
2693                 PDEBUG(D_ERR, "Error detecting sensor type");
2694                 return;
2695         }
2696         if ((rc & 3) == 3) {
2697                 /* quick hack to make OV7670s work */
2698                 high = i2c_r(sd, 0x0a);
2699                 low = i2c_r(sd, 0x0b);
2700                 /* info("%x, %x", high, low); */
2701                 if (high == 0x76 && (low & 0xf0) == 0x70) {
2702                         PDEBUG(D_PROBE, "Sensor is an OV76%02x", low);
2703                         sd->sensor = SEN_OV7670;
2704                 } else {
2705                         PDEBUG(D_PROBE, "Sensor is an OV7610");
2706                         sd->sensor = SEN_OV7610;
2707                 }
2708         } else if ((rc & 3) == 1) {
2709                 /* I don't know what's different about the 76BE yet. */
2710                 if (i2c_r(sd, 0x15) & 1) {
2711                         PDEBUG(D_PROBE, "Sensor is an OV7620AE");
2712                         sd->sensor = SEN_OV7620AE;
2713                 } else {
2714                         PDEBUG(D_PROBE, "Sensor is an OV76BE");
2715                         sd->sensor = SEN_OV76BE;
2716                 }
2717         } else if ((rc & 3) == 0) {
2718                 /* try to read product id registers */
2719                 high = i2c_r(sd, 0x0a);
2720                 if (high < 0) {
2721                         PDEBUG(D_ERR, "Error detecting camera chip PID");
2722                         return;
2723                 }
2724                 low = i2c_r(sd, 0x0b);
2725                 if (low < 0) {
2726                         PDEBUG(D_ERR, "Error detecting camera chip VER");
2727                         return;
2728                 }
2729                 if (high == 0x76) {
2730                         switch (low) {
2731                         case 0x30:
2732                                 err("Sensor is an OV7630/OV7635");
2733                                 err("7630 is not supported by this driver");
2734                                 return;
2735                         case 0x40:
2736                                 PDEBUG(D_PROBE, "Sensor is an OV7645");
2737                                 sd->sensor = SEN_OV7640; /* FIXME */
2738                                 break;
2739                         case 0x45:
2740                                 PDEBUG(D_PROBE, "Sensor is an OV7645B");
2741                                 sd->sensor = SEN_OV7640; /* FIXME */
2742                                 break;
2743                         case 0x48:
2744                                 PDEBUG(D_PROBE, "Sensor is an OV7648");
2745                                 sd->sensor = SEN_OV7648;
2746                                 break;
2747                         case 0x60:
2748                                 PDEBUG(D_PROBE, "Sensor is a OV7660");
2749                                 sd->sensor = SEN_OV7660;
2750                                 sd->invert_led = 0;
2751                                 break;
2752                         default:
2753                                 PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low);
2754                                 return;
2755                         }
2756                 } else {
2757                         PDEBUG(D_PROBE, "Sensor is an OV7620");
2758                         sd->sensor = SEN_OV7620;
2759                 }
2760         } else {
2761                 err("Unknown image sensor version: %d", rc & 3);
2762         }
2763 }
2764
2765 /* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */
2766 static void ov6xx0_configure(struct sd *sd)
2767 {
2768         int rc;
2769         PDEBUG(D_PROBE, "starting OV6xx0 configuration");
2770
2771         /* Detect sensor (sub)type */
2772         rc = i2c_r(sd, OV7610_REG_COM_I);
2773         if (rc < 0) {
2774                 PDEBUG(D_ERR, "Error detecting sensor type");
2775                 return;
2776         }
2777
2778         /* Ugh. The first two bits are the version bits, but
2779          * the entire register value must be used. I guess OVT
2780          * underestimated how many variants they would make. */
2781         switch (rc) {
2782         case 0x00:
2783                 sd->sensor = SEN_OV6630;
2784                 warn("WARNING: Sensor is an OV66308. Your camera may have");
2785                 warn("been misdetected in previous driver versions.");
2786                 break;
2787         case 0x01:
2788                 sd->sensor = SEN_OV6620;
2789                 PDEBUG(D_PROBE, "Sensor is an OV6620");
2790                 break;
2791         case 0x02:
2792                 sd->sensor = SEN_OV6630;
2793                 PDEBUG(D_PROBE, "Sensor is an OV66308AE");
2794                 break;
2795         case 0x03:
2796                 sd->sensor = SEN_OV66308AF;
2797                 PDEBUG(D_PROBE, "Sensor is an OV66308AF");
2798                 break;
2799         case 0x90:
2800                 sd->sensor = SEN_OV6630;
2801                 warn("WARNING: Sensor is an OV66307. Your camera may have");
2802                 warn("been misdetected in previous driver versions.");
2803                 break;
2804         default:
2805                 err("FATAL: Unknown sensor version: 0x%02x", rc);
2806                 return;
2807         }
2808
2809         /* Set sensor-specific vars */
2810         sd->sif = 1;
2811 }
2812
2813 /* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */
2814 static void ov51x_led_control(struct sd *sd, int on)
2815 {
2816         if (sd->invert_led)
2817                 on = !on;
2818
2819         switch (sd->bridge) {
2820         /* OV511 has no LED control */
2821         case BRIDGE_OV511PLUS:
2822                 reg_w(sd, R511_SYS_LED_CTL, on);
2823                 break;
2824         case BRIDGE_OV518:
2825         case BRIDGE_OV518PLUS:
2826                 reg_w_mask(sd, R518_GPIO_OUT, 0x02 * on, 0x02);
2827                 break;
2828         case BRIDGE_OV519:
2829                 reg_w_mask(sd, OV519_GPIO_DATA_OUT0, on, 1);
2830                 break;
2831         }
2832 }
2833
2834 static void sd_reset_snapshot(struct gspca_dev *gspca_dev)
2835 {
2836         struct sd *sd = (struct sd *) gspca_dev;
2837
2838         if (!sd->snapshot_needs_reset)
2839                 return;
2840
2841         /* Note it is important that we clear sd->snapshot_needs_reset,
2842            before actually clearing the snapshot state in the bridge
2843            otherwise we might race with the pkt_scan interrupt handler */
2844         sd->snapshot_needs_reset = 0;
2845
2846         switch (sd->bridge) {
2847         case BRIDGE_OV511:
2848         case BRIDGE_OV511PLUS:
2849                 reg_w(sd, R51x_SYS_SNAP, 0x02);
2850                 reg_w(sd, R51x_SYS_SNAP, 0x00);
2851                 break;
2852         case BRIDGE_OV518:
2853         case BRIDGE_OV518PLUS:
2854                 reg_w(sd, R51x_SYS_SNAP, 0x02); /* Reset */
2855                 reg_w(sd, R51x_SYS_SNAP, 0x01); /* Enable */
2856                 break;
2857         case BRIDGE_OV519:
2858                 reg_w(sd, R51x_SYS_RESET, 0x40);
2859                 reg_w(sd, R51x_SYS_RESET, 0x00);
2860                 break;
2861         }
2862 }
2863
2864 static void ov51x_upload_quan_tables(struct sd *sd)
2865 {
2866         const unsigned char yQuanTable511[] = {
2867                 0, 1, 1, 2, 2, 3, 3, 4,
2868                 1, 1, 1, 2, 2, 3, 4, 4,
2869                 1, 1, 2, 2, 3, 4, 4, 4,
2870                 2, 2, 2, 3, 4, 4, 4, 4,
2871                 2, 2, 3, 4, 4, 5, 5, 5,
2872                 3, 3, 4, 4, 5, 5, 5, 5,
2873                 3, 4, 4, 4, 5, 5, 5, 5,
2874                 4, 4, 4, 4, 5, 5, 5, 5
2875         };
2876
2877         const unsigned char uvQuanTable511[] = {
2878                 0, 2, 2, 3, 4, 4, 4, 4,
2879                 2, 2, 2, 4, 4, 4, 4, 4,
2880                 2, 2, 3, 4, 4, 4, 4, 4,
2881                 3, 4, 4, 4, 4, 4, 4, 4,
2882                 4, 4, 4, 4, 4, 4, 4, 4,
2883                 4, 4, 4, 4, 4, 4, 4, 4,
2884                 4, 4, 4, 4, 4, 4, 4, 4,
2885                 4, 4, 4, 4, 4, 4, 4, 4
2886         };
2887
2888         /* OV518 quantization tables are 8x4 (instead of 8x8) */
2889         const unsigned char yQuanTable518[] = {
2890                 5, 4, 5, 6, 6, 7, 7, 7,
2891                 5, 5, 5, 5, 6, 7, 7, 7,
2892                 6, 6, 6, 6, 7, 7, 7, 8,
2893                 7, 7, 6, 7, 7, 7, 8, 8
2894         };
2895         const unsigned char uvQuanTable518[] = {
2896                 6, 6, 6, 7, 7, 7, 7, 7,
2897                 6, 6, 6, 7, 7, 7, 7, 7,
2898                 6, 6, 6, 7, 7, 7, 7, 8,
2899                 7, 7, 7, 7, 7, 7, 8, 8
2900         };
2901
2902         const unsigned char *pYTable, *pUVTable;
2903         unsigned char val0, val1;
2904         int i, size, reg = R51x_COMP_LUT_BEGIN;
2905
2906         PDEBUG(D_PROBE, "Uploading quantization tables");
2907
2908         if (sd->bridge == BRIDGE_OV511 || sd->bridge == BRIDGE_OV511PLUS) {
2909                 pYTable = yQuanTable511;
2910                 pUVTable = uvQuanTable511;
2911                 size = 32;
2912         } else {
2913                 pYTable = yQuanTable518;
2914                 pUVTable = uvQuanTable518;
2915                 size = 16;
2916         }
2917
2918         for (i = 0; i < size; i++) {
2919                 val0 = *pYTable++;
2920                 val1 = *pYTable++;
2921                 val0 &= 0x0f;
2922                 val1 &= 0x0f;
2923                 val0 |= val1 << 4;
2924                 reg_w(sd, reg, val0);
2925
2926                 val0 = *pUVTable++;
2927                 val1 = *pUVTable++;
2928                 val0 &= 0x0f;
2929                 val1 &= 0x0f;
2930                 val0 |= val1 << 4;
2931                 reg_w(sd, reg + size, val0);
2932
2933                 reg++;
2934         }
2935 }
2936
2937 /* This initializes the OV511/OV511+ and the sensor */
2938 static void ov511_configure(struct gspca_dev *gspca_dev)
2939 {
2940         struct sd *sd = (struct sd *) gspca_dev;
2941
2942         /* For 511 and 511+ */
2943         const struct ov_regvals init_511[] = {
2944                 { R51x_SYS_RESET,       0x7f },
2945                 { R51x_SYS_INIT,        0x01 },
2946                 { R51x_SYS_RESET,       0x7f },
2947                 { R51x_SYS_INIT,        0x01 },
2948                 { R51x_SYS_RESET,       0x3f },
2949                 { R51x_SYS_INIT,        0x01 },
2950                 { R51x_SYS_RESET,       0x3d },
2951         };
2952
2953         const struct ov_regvals norm_511[] = {
2954                 { R511_DRAM_FLOW_CTL,   0x01 },
2955                 { R51x_SYS_SNAP,        0x00 },
2956                 { R51x_SYS_SNAP,        0x02 },
2957                 { R51x_SYS_SNAP,        0x00 },
2958                 { R511_FIFO_OPTS,       0x1f },
2959                 { R511_COMP_EN,         0x00 },
2960                 { R511_COMP_LUT_EN,     0x03 },
2961         };
2962
2963         const struct ov_regvals norm_511_p[] = {
2964                 { R511_DRAM_FLOW_CTL,   0xff },
2965                 { R51x_SYS_SNAP,        0x00 },
2966                 { R51x_SYS_SNAP,        0x02 },
2967                 { R51x_SYS_SNAP,        0x00 },
2968                 { R511_FIFO_OPTS,       0xff },
2969                 { R511_COMP_EN,         0x00 },
2970                 { R511_COMP_LUT_EN,     0x03 },
2971         };
2972
2973         const struct ov_regvals compress_511[] = {
2974                 { 0x70, 0x1f },
2975                 { 0x71, 0x05 },
2976                 { 0x72, 0x06 },
2977                 { 0x73, 0x06 },
2978                 { 0x74, 0x14 },
2979                 { 0x75, 0x03 },
2980                 { 0x76, 0x04 },
2981                 { 0x77, 0x04 },
2982         };
2983
2984         PDEBUG(D_PROBE, "Device custom id %x", reg_r(sd, R51x_SYS_CUST_ID));
2985
2986         write_regvals(sd, init_511, ARRAY_SIZE(init_511));
2987
2988         switch (sd->bridge) {
2989         case BRIDGE_OV511:
2990                 write_regvals(sd, norm_511, ARRAY_SIZE(norm_511));
2991                 break;
2992         case BRIDGE_OV511PLUS:
2993                 write_regvals(sd, norm_511_p, ARRAY_SIZE(norm_511_p));
2994                 break;
2995         }
2996
2997         /* Init compression */
2998         write_regvals(sd, compress_511, ARRAY_SIZE(compress_511));
2999
3000         ov51x_upload_quan_tables(sd);
3001 }
3002
3003 /* This initializes the OV518/OV518+ and the sensor */
3004 static void ov518_configure(struct gspca_dev *gspca_dev)
3005 {
3006         struct sd *sd = (struct sd *) gspca_dev;
3007
3008         /* For 518 and 518+ */
3009         const struct ov_regvals init_518[] = {
3010                 { R51x_SYS_RESET,       0x40 },
3011                 { R51x_SYS_INIT,        0xe1 },
3012                 { R51x_SYS_RESET,       0x3e },
3013                 { R51x_SYS_INIT,        0xe1 },
3014                 { R51x_SYS_RESET,       0x00 },
3015                 { R51x_SYS_INIT,        0xe1 },
3016                 { 0x46,                 0x00 },
3017                 { 0x5d,                 0x03 },
3018         };
3019
3020         const struct ov_regvals norm_518[] = {
3021                 { R51x_SYS_SNAP,        0x02 }, /* Reset */
3022                 { R51x_SYS_SNAP,        0x01 }, /* Enable */
3023                 { 0x31,                 0x0f },
3024                 { 0x5d,                 0x03 },
3025                 { 0x24,                 0x9f },
3026                 { 0x25,                 0x90 },
3027                 { 0x20,                 0x00 },
3028                 { 0x51,                 0x04 },
3029                 { 0x71,                 0x19 },
3030                 { 0x2f,                 0x80 },
3031         };
3032
3033         const struct ov_regvals norm_518_p[] = {
3034                 { R51x_SYS_SNAP,        0x02 }, /* Reset */
3035                 { R51x_SYS_SNAP,        0x01 }, /* Enable */
3036                 { 0x31,                 0x0f },
3037                 { 0x5d,                 0x03 },
3038                 { 0x24,                 0x9f },
3039                 { 0x25,                 0x90 },
3040                 { 0x20,                 0x60 },
3041                 { 0x51,                 0x02 },
3042                 { 0x71,                 0x19 },
3043                 { 0x40,                 0xff },
3044                 { 0x41,                 0x42 },
3045                 { 0x46,                 0x00 },
3046                 { 0x33,                 0x04 },
3047                 { 0x21,                 0x19 },
3048                 { 0x3f,                 0x10 },
3049                 { 0x2f,                 0x80 },
3050         };
3051
3052         /* First 5 bits of custom ID reg are a revision ID on OV518 */
3053         PDEBUG(D_PROBE, "Device revision %d",
3054                 0x1f & reg_r(sd, R51x_SYS_CUST_ID));
3055
3056         write_regvals(sd, init_518, ARRAY_SIZE(init_518));
3057
3058         /* Set LED GPIO pin to output mode */
3059         reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02);
3060
3061         switch (sd->bridge) {
3062         case BRIDGE_OV518:
3063                 write_regvals(sd, norm_518, ARRAY_SIZE(norm_518));
3064                 break;
3065         case BRIDGE_OV518PLUS:
3066                 write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p));
3067                 break;
3068         }
3069
3070         ov51x_upload_quan_tables(sd);
3071
3072         reg_w(sd, 0x2f, 0x80);
3073 }
3074
3075 static void ov519_configure(struct sd *sd)
3076 {
3077         static const struct ov_regvals init_519[] = {
3078                 { 0x5a, 0x6d }, /* EnableSystem */
3079                 { 0x53, 0x9b }, /* don't enable the microcontroller */
3080                 { OV519_R54_EN_CLK1, 0xff }, /* set bit2 to enable jpeg */
3081                 { 0x5d, 0x03 },
3082                 { 0x49, 0x01 },
3083                 { 0x48, 0x00 },
3084                 /* Set LED pin to output mode. Bit 4 must be cleared or sensor
3085                  * detection will fail. This deserves further investigation. */
3086                 { OV519_GPIO_IO_CTRL0,   0xee },
3087                 { OV519_R51_RESET1, 0x0f },
3088                 { OV519_R51_RESET1, 0x00 },
3089                 { 0x22, 0x00 },
3090                 /* windows reads 0x55 at this point*/
3091         };
3092
3093         write_regvals(sd, init_519, ARRAY_SIZE(init_519));
3094 }
3095
3096 static void ovfx2_configure(struct sd *sd)
3097 {
3098         static const struct ov_regvals init_fx2[] = {
3099                 { 0x00, 0x60 },
3100                 { 0x02, 0x01 },
3101                 { 0x0f, 0x1d },
3102                 { 0xe9, 0x82 },
3103                 { 0xea, 0xc7 },
3104                 { 0xeb, 0x10 },
3105                 { 0xec, 0xf6 },
3106         };
3107
3108         sd->stopped = 1;
3109
3110         write_regvals(sd, init_fx2, ARRAY_SIZE(init_fx2));
3111 }
3112
3113 /* set the mode */
3114 /* This function works for ov7660 only */
3115 static void ov519_set_mode(struct sd *sd)
3116 {
3117         static const struct ov_regvals bridge_ov7660[2][10] = {
3118                 {{0x10, 0x14}, {0x11, 0x1e}, {0x12, 0x00}, {0x13, 0x00},
3119                  {0x14, 0x00}, {0x15, 0x00}, {0x16, 0x00}, {0x20, 0x0c},
3120                  {0x25, 0x01}, {0x26, 0x00}},
3121                 {{0x10, 0x28}, {0x11, 0x3c}, {0x12, 0x00}, {0x13, 0x00},
3122                  {0x14, 0x00}, {0x15, 0x00}, {0x16, 0x00}, {0x20, 0x0c},
3123                  {0x25, 0x03}, {0x26, 0x00}}
3124         };
3125         static const struct ov_i2c_regvals sensor_ov7660[2][3] = {
3126                 {{0x12, 0x00}, {0x24, 0x00}, {0x0c, 0x0c}},
3127                 {{0x12, 0x00}, {0x04, 0x00}, {0x0c, 0x00}}
3128         };
3129         static const struct ov_i2c_regvals sensor_ov7660_2[] = {
3130                 {OV7670_R17_HSTART, 0x13},
3131                 {OV7670_R18_HSTOP, 0x01},
3132                 {OV7670_R32_HREF, 0x92},
3133                 {OV7670_R19_VSTART, 0x02},
3134                 {OV7670_R1A_VSTOP, 0x7a},
3135                 {OV7670_R03_VREF, 0x00},
3136 /*              {0x33, 0x00}, */
3137 /*              {0x34, 0x07}, */
3138 /*              {0x36, 0x00}, */
3139 /*              {0x6b, 0x0a}, */
3140         };
3141
3142         write_regvals(sd, bridge_ov7660[sd->gspca_dev.curr_mode],
3143                         ARRAY_SIZE(bridge_ov7660[0]));
3144         write_i2c_regvals(sd, sensor_ov7660[sd->gspca_dev.curr_mode],
3145                         ARRAY_SIZE(sensor_ov7660[0]));
3146         write_i2c_regvals(sd, sensor_ov7660_2,
3147                         ARRAY_SIZE(sensor_ov7660_2));
3148 }
3149
3150 /* set the frame rate */
3151 /* This function works for sensors ov7640, ov7648 ov7660 and ov7670 only */
3152 static void ov519_set_fr(struct sd *sd)
3153 {
3154         int fr;
3155         u8 clock;
3156         /* frame rate table with indices:
3157          *      - mode = 0: 320x240, 1: 640x480
3158          *      - fr rate = 0: 30, 1: 25, 2: 20, 3: 15, 4: 10, 5: 5
3159          *      - reg = 0: bridge a4, 1: bridge 23, 2: sensor 11 (clock)
3160          */
3161         static const u8 fr_tb[2][6][3] = {
3162                 {{0x04, 0xff, 0x00},
3163                  {0x04, 0x1f, 0x00},
3164                  {0x04, 0x1b, 0x00},
3165                  {0x04, 0x15, 0x00},
3166                  {0x04, 0x09, 0x00},
3167                  {0x04, 0x01, 0x00}},
3168                 {{0x0c, 0xff, 0x00},
3169                  {0x0c, 0x1f, 0x00},
3170                  {0x0c, 0x1b, 0x00},
3171                  {0x04, 0xff, 0x01},
3172                  {0x04, 0x1f, 0x01},
3173                  {0x04, 0x1b, 0x01}},
3174         };
3175
3176         if (frame_rate > 0)
3177                 sd->frame_rate = frame_rate;
3178         if (sd->frame_rate >= 30)
3179                 fr = 0;
3180         else if (sd->frame_rate >= 25)
3181                 fr = 1;
3182         else if (sd->frame_rate >= 20)
3183                 fr = 2;
3184         else if (sd->frame_rate >= 15)
3185                 fr = 3;
3186         else if (sd->frame_rate >= 10)
3187                 fr = 4;
3188         else
3189                 fr = 5;
3190         reg_w(sd, 0xa4, fr_tb[sd->gspca_dev.curr_mode][fr][0]);
3191         reg_w(sd, 0x23, fr_tb[sd->gspca_dev.curr_mode][fr][1]);
3192         clock = fr_tb[sd->gspca_dev.curr_mode][fr][2];
3193         if (sd->sensor == SEN_OV7660)
3194                 clock |= 0x80;          /* enable double clock */
3195         ov518_i2c_w(sd, OV7670_R11_CLKRC, clock);
3196 }
3197
3198 /* this function is called at probe time */
3199 static int sd_config(struct gspca_dev *gspca_dev,
3200                         const struct usb_device_id *id)
3201 {
3202         struct sd *sd = (struct sd *) gspca_dev;
3203         struct cam *cam = &gspca_dev->cam;
3204
3205         sd->bridge = id->driver_info & BRIDGE_MASK;
3206         sd->invert_led = (id->driver_info & BRIDGE_INVERT_LED) != 0;
3207
3208         switch (sd->bridge) {
3209         case BRIDGE_OV511:
3210         case BRIDGE_OV511PLUS:
3211                 cam->cam_mode = ov511_vga_mode;
3212                 cam->nmodes = ARRAY_SIZE(ov511_vga_mode);
3213                 break;
3214         case BRIDGE_OV518:
3215         case BRIDGE_OV518PLUS:
3216                 cam->cam_mode = ov518_vga_mode;
3217                 cam->nmodes = ARRAY_SIZE(ov518_vga_mode);
3218                 break;
3219         case BRIDGE_OV519:
3220                 cam->cam_mode = ov519_vga_mode;
3221                 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3222                 sd->invert_led = !sd->invert_led;
3223                 break;
3224         case BRIDGE_OVFX2:
3225                 cam->cam_mode = ov519_vga_mode;
3226                 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3227                 cam->bulk_size = OVFX2_BULK_SIZE;
3228                 cam->bulk_nurbs = MAX_NURBS;
3229                 cam->bulk = 1;
3230                 break;
3231         case BRIDGE_W9968CF:
3232                 cam->cam_mode = w9968cf_vga_mode;
3233                 cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode);
3234                 cam->reverse_alts = 1;
3235                 break;
3236         }
3237
3238         gspca_dev->cam.ctrls = sd->ctrls;
3239         sd->quality = QUALITY_DEF;
3240
3241         return 0;
3242 }
3243
3244 /* this function is called at probe and resume time */
3245 static int sd_init(struct gspca_dev *gspca_dev)
3246 {
3247         struct sd *sd = (struct sd *) gspca_dev;
3248         struct cam *cam = &gspca_dev->cam;
3249
3250         switch (sd->bridge) {
3251         case BRIDGE_OV511:
3252         case BRIDGE_OV511PLUS:
3253                 ov511_configure(gspca_dev);
3254                 break;
3255         case BRIDGE_OV518:
3256         case BRIDGE_OV518PLUS:
3257                 ov518_configure(gspca_dev);
3258                 break;
3259         case BRIDGE_OV519:
3260                 ov519_configure(sd);
3261                 break;
3262         case BRIDGE_OVFX2:
3263                 ovfx2_configure(sd);
3264                 break;
3265         case BRIDGE_W9968CF:
3266                 w9968cf_configure(sd);
3267                 break;
3268         }
3269
3270         /* The OV519 must be more aggressive about sensor detection since
3271          * I2C write will never fail if the sensor is not present. We have
3272          * to try to initialize the sensor to detect its presence */
3273         sd->sensor = -1;
3274
3275         /* Test for 76xx */
3276         if (init_ov_sensor(sd, OV7xx0_SID) >= 0) {
3277                 ov7xx0_configure(sd);
3278
3279         /* Test for 6xx0 */
3280         } else if (init_ov_sensor(sd, OV6xx0_SID) >= 0) {
3281                 ov6xx0_configure(sd);
3282
3283         /* Test for 8xx0 */
3284         } else if (init_ov_sensor(sd, OV8xx0_SID) >= 0) {
3285                 ov8xx0_configure(sd);
3286
3287         /* Test for 3xxx / 2xxx */
3288         } else if (init_ov_sensor(sd, OV_HIRES_SID) >= 0) {
3289                 ov_hires_configure(sd);
3290         } else {
3291                 err("Can't determine sensor slave IDs");
3292                 goto error;
3293         }
3294
3295         if (sd->sensor < 0)
3296                 goto error;
3297
3298         ov51x_led_control(sd, 0);       /* turn LED off */
3299
3300         switch (sd->bridge) {
3301         case BRIDGE_OV511:
3302         case BRIDGE_OV511PLUS:
3303                 if (sd->sif) {
3304                         cam->cam_mode = ov511_sif_mode;
3305                         cam->nmodes = ARRAY_SIZE(ov511_sif_mode);
3306                 }
3307                 break;
3308         case BRIDGE_OV518:
3309         case BRIDGE_OV518PLUS:
3310                 if (sd->sif) {
3311                         cam->cam_mode = ov518_sif_mode;
3312                         cam->nmodes = ARRAY_SIZE(ov518_sif_mode);
3313                 }
3314                 break;
3315         case BRIDGE_OV519:
3316                 if (sd->sif) {
3317                         cam->cam_mode = ov519_sif_mode;
3318                         cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3319                 }
3320                 break;
3321         case BRIDGE_OVFX2:
3322                 switch (sd->sensor) {
3323                 case SEN_OV2610:
3324                 case SEN_OV2610AE:
3325                         cam->cam_mode = ovfx2_ov2610_mode;
3326                         cam->nmodes = ARRAY_SIZE(ovfx2_ov2610_mode);
3327                         break;
3328                 case SEN_OV3610:
3329                         cam->cam_mode = ovfx2_ov3610_mode;
3330                         cam->nmodes = ARRAY_SIZE(ovfx2_ov3610_mode);
3331                         break;
3332                 default:
3333                         if (sd->sif) {
3334                                 cam->cam_mode = ov519_sif_mode;
3335                                 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3336                         }
3337                         break;
3338                 }
3339                 break;
3340         case BRIDGE_W9968CF:
3341                 if (sd->sif)
3342                         cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode) - 1;
3343
3344                 /* w9968cf needs initialisation once the sensor is known */
3345                 w9968cf_init(sd);
3346                 break;
3347         }
3348
3349         gspca_dev->ctrl_dis = ctrl_dis[sd->sensor];
3350
3351         /* initialize the sensor */
3352         switch (sd->sensor) {
3353         case SEN_OV2610:
3354                 write_i2c_regvals(sd, norm_2610, ARRAY_SIZE(norm_2610));
3355
3356                 /* Enable autogain, autoexpo, awb, bandfilter */
3357                 i2c_w_mask(sd, 0x13, 0x27, 0x27);
3358                 break;
3359         case SEN_OV2610AE:
3360                 write_i2c_regvals(sd, norm_2610ae, ARRAY_SIZE(norm_2610ae));
3361
3362                 /* enable autoexpo */
3363                 i2c_w_mask(sd, 0x13, 0x05, 0x05);
3364                 break;
3365         case SEN_OV3610:
3366                 write_i2c_regvals(sd, norm_3620b, ARRAY_SIZE(norm_3620b));
3367
3368                 /* Enable autogain, autoexpo, awb, bandfilter */
3369                 i2c_w_mask(sd, 0x13, 0x27, 0x27);
3370                 break;
3371         case SEN_OV6620:
3372                 write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20));
3373                 break;
3374         case SEN_OV6630:
3375         case SEN_OV66308AF:
3376                 sd->ctrls[CONTRAST].def = 200;
3377                                  /* The default is too low for the ov6630 */
3378                 write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30));
3379                 break;
3380         default:
3381 /*      case SEN_OV7610: */
3382 /*      case SEN_OV76BE: */
3383                 write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610));
3384                 i2c_w_mask(sd, 0x0e, 0x00, 0x40);
3385                 break;
3386         case SEN_OV7620:
3387         case SEN_OV7620AE:
3388                 write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620));
3389                 break;
3390         case SEN_OV7640:
3391         case SEN_OV7648:
3392                 write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640));
3393                 break;
3394         case SEN_OV7660:
3395                 i2c_w(sd, OV7670_R12_COM7, OV7670_COM7_RESET);
3396                 msleep(14);
3397                 reg_w(sd, OV519_R57_SNAPSHOT, 0x23);
3398                 write_regvals(sd, init_519_ov7660,
3399                                 ARRAY_SIZE(init_519_ov7660));
3400                 write_i2c_regvals(sd, norm_7660, ARRAY_SIZE(norm_7660));
3401                 sd->gspca_dev.curr_mode = 1;    /* 640x480 */
3402                 sd->frame_rate = 15;
3403                 ov519_set_mode(sd);
3404                 ov519_set_fr(sd);
3405                 sd->ctrls[COLORS].max = 4;      /* 0..4 */
3406                 sd->ctrls[COLORS].val =
3407                         sd->ctrls[COLORS].def = 2;
3408                 setcolors(gspca_dev);
3409                 sd->ctrls[CONTRAST].max = 6;    /* 0..6 */
3410                 sd->ctrls[CONTRAST].val =
3411                         sd->ctrls[CONTRAST].def = 3;
3412                 setcontrast(gspca_dev);
3413                 sd->ctrls[BRIGHTNESS].max = 6;  /* 0..6 */
3414                 sd->ctrls[BRIGHTNESS].val =
3415                         sd->ctrls[BRIGHTNESS].def = 3;
3416                 setbrightness(gspca_dev);
3417                 sd_reset_snapshot(gspca_dev);
3418                 ov51x_restart(sd);
3419                 ov51x_stop(sd);                 /* not in win traces */
3420                 ov51x_led_control(sd, 0);
3421                 break;
3422         case SEN_OV7670:
3423                 sd->ctrls[FREQ].max = 3;        /* auto */
3424                 sd->ctrls[FREQ].def = 3;
3425                 write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670));
3426                 break;
3427         case SEN_OV8610:
3428                 write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610));
3429                 break;
3430         }
3431         return gspca_dev->usb_err;
3432 error:
3433         PDEBUG(D_ERR, "OV519 Config failed");
3434         return -EINVAL;
3435 }
3436
3437 /* Set up the OV511/OV511+ with the given image parameters.
3438  *
3439  * Do not put any sensor-specific code in here (including I2C I/O functions)
3440  */
3441 static void ov511_mode_init_regs(struct sd *sd)
3442 {
3443         int hsegs, vsegs, packet_size, fps, needed;
3444         int interlaced = 0;
3445         struct usb_host_interface *alt;
3446         struct usb_interface *intf;
3447
3448         intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3449         alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3450         if (!alt) {
3451                 err("Couldn't get altsetting");
3452                 sd->gspca_dev.usb_err = -EIO;
3453                 return;
3454         }
3455
3456         packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3457         reg_w(sd, R51x_FIFO_PSIZE, packet_size >> 5);
3458
3459         reg_w(sd, R511_CAM_UV_EN, 0x01);
3460         reg_w(sd, R511_SNAP_UV_EN, 0x01);
3461         reg_w(sd, R511_SNAP_OPTS, 0x03);
3462
3463         /* Here I'm assuming that snapshot size == image size.
3464          * I hope that's always true. --claudio
3465          */
3466         hsegs = (sd->gspca_dev.width >> 3) - 1;
3467         vsegs = (sd->gspca_dev.height >> 3) - 1;
3468
3469         reg_w(sd, R511_CAM_PXCNT, hsegs);
3470         reg_w(sd, R511_CAM_LNCNT, vsegs);
3471         reg_w(sd, R511_CAM_PXDIV, 0x00);
3472         reg_w(sd, R511_CAM_LNDIV, 0x00);
3473
3474         /* YUV420, low pass filter on */
3475         reg_w(sd, R511_CAM_OPTS, 0x03);
3476
3477         /* Snapshot additions */
3478         reg_w(sd, R511_SNAP_PXCNT, hsegs);
3479         reg_w(sd, R511_SNAP_LNCNT, vsegs);
3480         reg_w(sd, R511_SNAP_PXDIV, 0x00);
3481         reg_w(sd, R511_SNAP_LNDIV, 0x00);
3482
3483         /******** Set the framerate ********/
3484         if (frame_rate > 0)
3485                 sd->frame_rate = frame_rate;
3486
3487         switch (sd->sensor) {
3488         case SEN_OV6620:
3489                 /* No framerate control, doesn't like higher rates yet */
3490                 sd->clockdiv = 3;
3491                 break;
3492
3493         /* Note once the FIXME's in mode_init_ov_sensor_regs() are fixed
3494            for more sensors we need to do this for them too */
3495         case SEN_OV7620:
3496         case SEN_OV7620AE:
3497         case SEN_OV7640:
3498         case SEN_OV7648:
3499         case SEN_OV76BE:
3500                 if (sd->gspca_dev.width == 320)
3501                         interlaced = 1;
3502                 /* Fall through */
3503         case SEN_OV6630:
3504         case SEN_OV7610:
3505         case SEN_OV7670:
3506                 switch (sd->frame_rate) {
3507                 case 30:
3508                 case 25:
3509                         /* Not enough bandwidth to do 640x480 @ 30 fps */
3510                         if (sd->gspca_dev.width != 640) {
3511                                 sd->clockdiv = 0;
3512                                 break;
3513                         }
3514                         /* Fall through for 640x480 case */
3515                 default:
3516 /*              case 20: */
3517 /*              case 15: */
3518                         sd->clockdiv = 1;
3519                         break;
3520                 case 10:
3521                         sd->clockdiv = 2;
3522                         break;
3523                 case 5:
3524                         sd->clockdiv = 5;
3525                         break;
3526                 }
3527                 if (interlaced) {
3528                         sd->clockdiv = (sd->clockdiv + 1) * 2 - 1;
3529                         /* Higher then 10 does not work */
3530                         if (sd->clockdiv > 10)
3531                                 sd->clockdiv = 10;
3532                 }
3533                 break;
3534
3535         case SEN_OV8610:
3536                 /* No framerate control ?? */
3537                 sd->clockdiv = 0;
3538                 break;
3539         }
3540
3541         /* Check if we have enough bandwidth to disable compression */
3542         fps = (interlaced ? 60 : 30) / (sd->clockdiv + 1) + 1;
3543         needed = fps * sd->gspca_dev.width * sd->gspca_dev.height * 3 / 2;
3544         /* 1400 is a conservative estimate of the max nr of isoc packets/sec */
3545         if (needed > 1400 * packet_size) {
3546                 /* Enable Y and UV quantization and compression */
3547                 reg_w(sd, R511_COMP_EN, 0x07);
3548                 reg_w(sd, R511_COMP_LUT_EN, 0x03);
3549         } else {
3550                 reg_w(sd, R511_COMP_EN, 0x06);
3551                 reg_w(sd, R511_COMP_LUT_EN, 0x00);
3552         }
3553
3554         reg_w(sd, R51x_SYS_RESET, OV511_RESET_OMNICE);
3555         reg_w(sd, R51x_SYS_RESET, 0);
3556 }
3557
3558 /* Sets up the OV518/OV518+ with the given image parameters
3559  *
3560  * OV518 needs a completely different approach, until we can figure out what
3561  * the individual registers do. Also, only 15 FPS is supported now.
3562  *
3563  * Do not put any sensor-specific code in here (including I2C I/O functions)
3564  */
3565 static void ov518_mode_init_regs(struct sd *sd)
3566 {
3567         int hsegs, vsegs, packet_size;
3568         struct usb_host_interface *alt;
3569         struct usb_interface *intf;
3570
3571         intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3572         alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3573         if (!alt) {
3574                 err("Couldn't get altsetting");
3575                 sd->gspca_dev.usb_err = -EIO;
3576                 return;
3577         }
3578
3579         packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3580         ov518_reg_w32(sd, R51x_FIFO_PSIZE, packet_size & ~7, 2);
3581
3582         /******** Set the mode ********/
3583         reg_w(sd, 0x2b, 0);
3584         reg_w(sd, 0x2c, 0);
3585         reg_w(sd, 0x2d, 0);
3586         reg_w(sd, 0x2e, 0);
3587         reg_w(sd, 0x3b, 0);
3588         reg_w(sd, 0x3c, 0);
3589         reg_w(sd, 0x3d, 0);
3590         reg_w(sd, 0x3e, 0);
3591
3592         if (sd->bridge == BRIDGE_OV518) {
3593                 /* Set 8-bit (YVYU) input format */
3594                 reg_w_mask(sd, 0x20, 0x08, 0x08);
3595
3596                 /* Set 12-bit (4:2:0) output format */
3597                 reg_w_mask(sd, 0x28, 0x80, 0xf0);
3598                 reg_w_mask(sd, 0x38, 0x80, 0xf0);
3599         } else {
3600                 reg_w(sd, 0x28, 0x80);
3601                 reg_w(sd, 0x38, 0x80);
3602         }
3603
3604         hsegs = sd->gspca_dev.width / 16;
3605         vsegs = sd->gspca_dev.height / 4;
3606
3607         reg_w(sd, 0x29, hsegs);
3608         reg_w(sd, 0x2a, vsegs);
3609
3610         reg_w(sd, 0x39, hsegs);
3611         reg_w(sd, 0x3a, vsegs);
3612
3613         /* Windows driver does this here; who knows why */
3614         reg_w(sd, 0x2f, 0x80);
3615
3616         /******** Set the framerate ********/
3617         sd->clockdiv = 1;
3618
3619         /* Mode independent, but framerate dependent, regs */
3620         /* 0x51: Clock divider; Only works on some cams which use 2 crystals */
3621         reg_w(sd, 0x51, 0x04);
3622         reg_w(sd, 0x22, 0x18);
3623         reg_w(sd, 0x23, 0xff);
3624
3625         if (sd->bridge == BRIDGE_OV518PLUS) {
3626                 switch (sd->sensor) {
3627                 case SEN_OV7620AE:
3628                         if (sd->gspca_dev.width == 320) {
3629                                 reg_w(sd, 0x20, 0x00);
3630                                 reg_w(sd, 0x21, 0x19);
3631                         } else {
3632                                 reg_w(sd, 0x20, 0x60);
3633                                 reg_w(sd, 0x21, 0x1f);
3634                         }
3635                         break;
3636                 case SEN_OV7620:
3637                         reg_w(sd, 0x20, 0x00);
3638                         reg_w(sd, 0x21, 0x19);
3639                         break;
3640                 default:
3641                         reg_w(sd, 0x21, 0x19);
3642                 }
3643         } else
3644                 reg_w(sd, 0x71, 0x17);  /* Compression-related? */
3645
3646         /* FIXME: Sensor-specific */
3647         /* Bit 5 is what matters here. Of course, it is "reserved" */
3648         i2c_w(sd, 0x54, 0x23);
3649
3650         reg_w(sd, 0x2f, 0x80);
3651
3652         if (sd->bridge == BRIDGE_OV518PLUS) {
3653                 reg_w(sd, 0x24, 0x94);
3654                 reg_w(sd, 0x25, 0x90);
3655                 ov518_reg_w32(sd, 0xc4,    400, 2);     /* 190h   */
3656                 ov518_reg_w32(sd, 0xc6,    540, 2);     /* 21ch   */
3657                 ov518_reg_w32(sd, 0xc7,    540, 2);     /* 21ch   */
3658                 ov518_reg_w32(sd, 0xc8,    108, 2);     /* 6ch    */
3659                 ov518_reg_w32(sd, 0xca, 131098, 3);     /* 2001ah */
3660                 ov518_reg_w32(sd, 0xcb,    532, 2);     /* 214h   */
3661                 ov518_reg_w32(sd, 0xcc,   2400, 2);     /* 960h   */
3662                 ov518_reg_w32(sd, 0xcd,     32, 2);     /* 20h    */
3663                 ov518_reg_w32(sd, 0xce,    608, 2);     /* 260h   */
3664         } else {
3665                 reg_w(sd, 0x24, 0x9f);
3666                 reg_w(sd, 0x25, 0x90);
3667                 ov518_reg_w32(sd, 0xc4,    400, 2);     /* 190h   */
3668                 ov518_reg_w32(sd, 0xc6,    381, 2);     /* 17dh   */
3669                 ov518_reg_w32(sd, 0xc7,    381, 2);     /* 17dh   */
3670                 ov518_reg_w32(sd, 0xc8,    128, 2);     /* 80h    */
3671                 ov518_reg_w32(sd, 0xca, 183331, 3);     /* 2cc23h */
3672                 ov518_reg_w32(sd, 0xcb,    746, 2);     /* 2eah   */
3673                 ov518_reg_w32(sd, 0xcc,   1750, 2);     /* 6d6h   */
3674                 ov518_reg_w32(sd, 0xcd,     45, 2);     /* 2dh    */
3675                 ov518_reg_w32(sd, 0xce,    851, 2);     /* 353h   */
3676         }
3677
3678         reg_w(sd, 0x2f, 0x80);
3679 }
3680
3681 /* Sets up the OV519 with the given image parameters
3682  *
3683  * OV519 needs a completely different approach, until we can figure out what
3684  * the individual registers do.
3685  *
3686  * Do not put any sensor-specific code in here (including I2C I/O functions)
3687  */
3688 static void ov519_mode_init_regs(struct sd *sd)
3689 {
3690         static const struct ov_regvals mode_init_519_ov7670[] = {
3691                 { 0x5d, 0x03 }, /* Turn off suspend mode */
3692                 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3693                 { OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
3694                 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3695                 { 0xa3, 0x18 },
3696                 { 0xa4, 0x04 },
3697                 { 0xa5, 0x28 },
3698                 { 0x37, 0x00 }, /* SetUsbInit */
3699                 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3700                 /* Enable both fields, YUV Input, disable defect comp (why?) */
3701                 { 0x20, 0x0c },
3702                 { 0x21, 0x38 },
3703                 { 0x22, 0x1d },
3704                 { 0x17, 0x50 }, /* undocumented */
3705                 { 0x37, 0x00 }, /* undocumented */
3706                 { 0x40, 0xff }, /* I2C timeout counter */
3707                 { 0x46, 0x00 }, /* I2C clock prescaler */
3708                 { 0x59, 0x04 }, /* new from windrv 090403 */
3709                 { 0xff, 0x00 }, /* undocumented */
3710                 /* windows reads 0x55 at this point, why? */
3711         };
3712
3713         static const struct ov_regvals mode_init_519[] = {
3714                 { 0x5d, 0x03 }, /* Turn off suspend mode */
3715                 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3716                 { OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
3717                 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3718                 { 0xa3, 0x18 },
3719                 { 0xa4, 0x04 },
3720                 { 0xa5, 0x28 },
3721                 { 0x37, 0x00 }, /* SetUsbInit */
3722                 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3723                 /* Enable both fields, YUV Input, disable defect comp (why?) */
3724                 { 0x22, 0x1d },
3725                 { 0x17, 0x50 }, /* undocumented */
3726                 { 0x37, 0x00 }, /* undocumented */
3727                 { 0x40, 0xff }, /* I2C timeout counter */
3728                 { 0x46, 0x00 }, /* I2C clock prescaler */
3729                 { 0x59, 0x04 }, /* new from windrv 090403 */
3730                 { 0xff, 0x00 }, /* undocumented */
3731                 /* windows reads 0x55 at this point, why? */
3732         };
3733
3734         /******** Set the mode ********/
3735         switch (sd->sensor) {
3736         default:
3737                 write_regvals(sd, mode_init_519, ARRAY_SIZE(mode_init_519));
3738                 if (sd->sensor == SEN_OV7640 ||
3739                     sd->sensor == SEN_OV7648) {
3740                         /* Select 8-bit input mode */
3741                         reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10);
3742                 }
3743                 break;
3744         case SEN_OV7660:
3745                 return;         /* done by ov519_set_mode/fr() */
3746         case SEN_OV7670:
3747                 write_regvals(sd, mode_init_519_ov7670,
3748                                 ARRAY_SIZE(mode_init_519_ov7670));
3749                 break;
3750         }
3751
3752         reg_w(sd, OV519_R10_H_SIZE,     sd->gspca_dev.width >> 4);
3753         reg_w(sd, OV519_R11_V_SIZE,     sd->gspca_dev.height >> 3);
3754         if (sd->sensor == SEN_OV7670 &&
3755             sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3756                 reg_w(sd, OV519_R12_X_OFFSETL, 0x04);
3757         else if (sd->sensor == SEN_OV7648 &&
3758             sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3759                 reg_w(sd, OV519_R12_X_OFFSETL, 0x01);
3760         else
3761                 reg_w(sd, OV519_R12_X_OFFSETL, 0x00);
3762         reg_w(sd, OV519_R13_X_OFFSETH,  0x00);
3763         reg_w(sd, OV519_R14_Y_OFFSETL,  0x00);
3764         reg_w(sd, OV519_R15_Y_OFFSETH,  0x00);
3765         reg_w(sd, OV519_R16_DIVIDER,    0x00);
3766         reg_w(sd, OV519_R25_FORMAT,     0x03); /* YUV422 */
3767         reg_w(sd, 0x26,                 0x00); /* Undocumented */
3768
3769         /******** Set the framerate ********/
3770         if (frame_rate > 0)
3771                 sd->frame_rate = frame_rate;
3772
3773 /* FIXME: These are only valid at the max resolution. */
3774         sd->clockdiv = 0;
3775         switch (sd->sensor) {
3776         case SEN_OV7640:
3777         case SEN_OV7648:
3778                 switch (sd->frame_rate) {
3779                 default:
3780 /*              case 30: */
3781                         reg_w(sd, 0xa4, 0x0c);
3782                         reg_w(sd, 0x23, 0xff);
3783                         break;
3784                 case 25:
3785                         reg_w(sd, 0xa4, 0x0c);
3786                         reg_w(sd, 0x23, 0x1f);
3787                         break;
3788                 case 20:
3789                         reg_w(sd, 0xa4, 0x0c);
3790                         reg_w(sd, 0x23, 0x1b);
3791                         break;
3792                 case 15:
3793                         reg_w(sd, 0xa4, 0x04);
3794                         reg_w(sd, 0x23, 0xff);
3795                         sd->clockdiv = 1;
3796                         break;
3797                 case 10:
3798                         reg_w(sd, 0xa4, 0x04);
3799                         reg_w(sd, 0x23, 0x1f);
3800                         sd->clockdiv = 1;
3801                         break;
3802                 case 5:
3803                         reg_w(sd, 0xa4, 0x04);
3804                         reg_w(sd, 0x23, 0x1b);
3805                         sd->clockdiv = 1;
3806                         break;
3807                 }
3808                 break;
3809         case SEN_OV8610:
3810                 switch (sd->frame_rate) {
3811                 default:        /* 15 fps */
3812 /*              case 15: */
3813                         reg_w(sd, 0xa4, 0x06);
3814                         reg_w(sd, 0x23, 0xff);
3815                         break;
3816                 case 10:
3817                         reg_w(sd, 0xa4, 0x06);
3818                         reg_w(sd, 0x23, 0x1f);
3819                         break;
3820                 case 5:
3821                         reg_w(sd, 0xa4, 0x06);
3822                         reg_w(sd, 0x23, 0x1b);
3823                         break;
3824                 }
3825                 break;
3826         case SEN_OV7670:                /* guesses, based on 7640 */
3827                 PDEBUG(D_STREAM, "Setting framerate to %d fps",
3828                                  (sd->frame_rate == 0) ? 15 : sd->frame_rate);
3829                 reg_w(sd, 0xa4, 0x10);
3830                 switch (sd->frame_rate) {
3831                 case 30:
3832                         reg_w(sd, 0x23, 0xff);
3833                         break;
3834                 case 20:
3835                         reg_w(sd, 0x23, 0x1b);
3836                         break;
3837                 default:
3838 /*              case 15: */
3839                         reg_w(sd, 0x23, 0xff);
3840                         sd->clockdiv = 1;
3841                         break;
3842                 }
3843                 break;
3844         }
3845 }
3846
3847 static void mode_init_ov_sensor_regs(struct sd *sd)
3848 {
3849         struct gspca_dev *gspca_dev;
3850         int qvga, xstart, xend, ystart, yend;
3851         u8 v;
3852
3853         gspca_dev = &sd->gspca_dev;
3854         qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
3855
3856         /******** Mode (VGA/QVGA) and sensor specific regs ********/
3857         switch (sd->sensor) {
3858         case SEN_OV2610:
3859                 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3860                 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3861                 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3862                 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3863                 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3864                 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
3865                 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3866                 return;
3867         case SEN_OV2610AE: {
3868                 u8 v;
3869
3870                 /* frame rates:
3871                  *      10fps / 5 fps for 1600x1200
3872                  *      40fps / 20fps for 800x600
3873                  */
3874                 v = 80;
3875                 if (qvga) {
3876                         if (sd->frame_rate < 25)
3877                                 v = 0x81;
3878                 } else {
3879                         if (sd->frame_rate < 10)
3880                                 v = 0x81;
3881                 }
3882                 i2c_w(sd, 0x11, v);
3883                 i2c_w(sd, 0x12, qvga ? 0x60 : 0x20);
3884                 return;
3885             }
3886         case SEN_OV3610:
3887                 if (qvga) {
3888                         xstart = (1040 - gspca_dev->width) / 2 + (0x1f << 4);
3889                         ystart = (776 - gspca_dev->height) / 2;
3890                 } else {
3891                         xstart = (2076 - gspca_dev->width) / 2 + (0x10 << 4);
3892                         ystart = (1544 - gspca_dev->height) / 2;
3893                 }
3894                 xend = xstart + gspca_dev->width;
3895                 yend = ystart + gspca_dev->height;
3896                 /* Writing to the COMH register resets the other windowing regs
3897                    to their default values, so we must do this first. */
3898                 i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0xf0);
3899                 i2c_w_mask(sd, 0x32,
3900                            (((xend >> 1) & 7) << 3) | ((xstart >> 1) & 7),
3901                            0x3f);
3902                 i2c_w_mask(sd, 0x03,
3903                            (((yend >> 1) & 3) << 2) | ((ystart >> 1) & 3),
3904                            0x0f);
3905                 i2c_w(sd, 0x17, xstart >> 4);
3906                 i2c_w(sd, 0x18, xend >> 4);
3907                 i2c_w(sd, 0x19, ystart >> 3);
3908                 i2c_w(sd, 0x1a, yend >> 3);
3909                 return;
3910         case SEN_OV8610:
3911                 /* For OV8610 qvga means qsvga */
3912                 i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5);
3913                 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3914                 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3915                 i2c_w_mask(sd, 0x2d, 0x00, 0x40); /* from windrv 090403 */
3916                 i2c_w_mask(sd, 0x28, 0x20, 0x20); /* progressive mode on */
3917                 break;
3918         case SEN_OV7610:
3919                 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3920                 i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
3921                 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3922                 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3923                 break;
3924         case SEN_OV7620:
3925         case SEN_OV7620AE:
3926         case SEN_OV76BE:
3927                 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3928                 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3929                 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3930                 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3931                 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3932                 i2c_w_mask(sd, 0x67, qvga ? 0xb0 : 0x90, 0xf0);
3933                 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3934                 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3935                 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3936                 if (sd->sensor == SEN_OV76BE)
3937                         i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
3938                 break;
3939         case SEN_OV7640:
3940         case SEN_OV7648:
3941                 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3942                 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3943                 /* Setting this undocumented bit in qvga mode removes a very
3944                    annoying vertical shaking of the image */
3945                 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3946                 /* Unknown */
3947                 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
3948                 /* Allow higher automatic gain (to allow higher framerates) */
3949                 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3950                 i2c_w_mask(sd, 0x12, 0x04, 0x04); /* AWB: 1 */
3951                 break;
3952         case SEN_OV7670:
3953                 /* set COM7_FMT_VGA or COM7_FMT_QVGA
3954                  * do we need to set anything else?
3955                  *      HSTART etc are set in set_ov_sensor_window itself */
3956                 i2c_w_mask(sd, OV7670_R12_COM7,
3957                          qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA,
3958                          OV7670_COM7_FMT_MASK);
3959                 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3960                 i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_AWB,
3961                                 OV7670_COM8_AWB);
3962                 if (qvga) {             /* QVGA from ov7670.c by
3963                                          * Jonathan Corbet */
3964                         xstart = 164;
3965                         xend = 28;
3966                         ystart = 14;
3967                         yend = 494;
3968                 } else {                /* VGA */
3969                         xstart = 158;
3970                         xend = 14;
3971                         ystart = 10;
3972                         yend = 490;
3973                 }
3974                 /* OV7670 hardware window registers are split across
3975                  * multiple locations */
3976                 i2c_w(sd, OV7670_R17_HSTART, xstart >> 3);
3977                 i2c_w(sd, OV7670_R18_HSTOP, xend >> 3);
3978                 v = i2c_r(sd, OV7670_R32_HREF);
3979                 v = (v & 0xc0) | ((xend & 0x7) << 3) | (xstart & 0x07);
3980                 msleep(10);     /* need to sleep between read and write to
3981                                  * same reg! */
3982                 i2c_w(sd, OV7670_R32_HREF, v);
3983
3984                 i2c_w(sd, OV7670_R19_VSTART, ystart >> 2);
3985                 i2c_w(sd, OV7670_R1A_VSTOP, yend >> 2);
3986                 v = i2c_r(sd, OV7670_R03_VREF);
3987                 v = (v & 0xc0) | ((yend & 0x3) << 2) | (ystart & 0x03);
3988                 msleep(10);     /* need to sleep between read and write to
3989                                  * same reg! */
3990                 i2c_w(sd, OV7670_R03_VREF, v);
3991                 break;
3992         case SEN_OV6620:
3993                 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3994                 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3995                 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3996                 break;
3997         case SEN_OV6630:
3998         case SEN_OV66308AF:
3999                 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4000                 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4001                 break;
4002         default:
4003                 return;
4004         }
4005
4006         /******** Clock programming ********/
4007         i2c_w(sd, 0x11, sd->clockdiv);
4008 }
4009
4010 /* this function works for bridge ov519 and sensors ov7660 and ov7670 only */
4011 static void sethvflip(struct gspca_dev *gspca_dev)
4012 {
4013         struct sd *sd = (struct sd *) gspca_dev;
4014
4015         if (sd->gspca_dev.streaming)
4016                 reg_w(sd, OV519_R51_RESET1, 0x0f);      /* block stream */
4017         i2c_w_mask(sd, OV7670_R1E_MVFP,
4018                 OV7670_MVFP_MIRROR * sd->ctrls[HFLIP].val
4019                         | OV7670_MVFP_VFLIP * sd->ctrls[VFLIP].val,
4020                 OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP);
4021         if (sd->gspca_dev.streaming)
4022                 reg_w(sd, OV519_R51_RESET1, 0x00);      /* restart stream */
4023 }
4024
4025 static void set_ov_sensor_window(struct sd *sd)
4026 {
4027         struct gspca_dev *gspca_dev;
4028         int qvga, crop;
4029         int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;
4030
4031         /* mode setup is fully handled in mode_init_ov_sensor_regs for these */
4032         switch (sd->sensor) {
4033         case SEN_OV2610:
4034         case SEN_OV2610AE:
4035         case SEN_OV3610:
4036         case SEN_OV7670:
4037                 mode_init_ov_sensor_regs(sd);
4038                 return;
4039         case SEN_OV7660:
4040                 ov519_set_mode(sd);
4041                 ov519_set_fr(sd);
4042                 return;
4043         }
4044
4045         gspca_dev = &sd->gspca_dev;
4046         qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
4047         crop = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 2;
4048
4049         /* The different sensor ICs handle setting up of window differently.
4050          * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */
4051         switch (sd->sensor) {
4052         case SEN_OV8610:
4053                 hwsbase = 0x1e;
4054                 hwebase = 0x1e;
4055                 vwsbase = 0x02;
4056                 vwebase = 0x02;
4057                 break;
4058         case SEN_OV7610:
4059         case SEN_OV76BE:
4060                 hwsbase = 0x38;
4061                 hwebase = 0x3a;
4062                 vwsbase = vwebase = 0x05;
4063                 break;
4064         case SEN_OV6620:
4065         case SEN_OV6630:
4066         case SEN_OV66308AF:
4067                 hwsbase = 0x38;
4068                 hwebase = 0x3a;
4069                 vwsbase = 0x05;
4070                 vwebase = 0x06;
4071                 if (sd->sensor == SEN_OV66308AF && qvga)
4072                         /* HDG: this fixes U and V getting swapped */
4073                         hwsbase++;
4074                 if (crop) {
4075                         hwsbase += 8;
4076                         hwebase += 8;
4077                         vwsbase += 11;
4078                         vwebase += 11;
4079                 }
4080                 break;
4081         case SEN_OV7620:
4082         case SEN_OV7620AE:
4083                 hwsbase = 0x2f;         /* From 7620.SET (spec is wrong) */
4084                 hwebase = 0x2f;
4085                 vwsbase = vwebase = 0x05;
4086                 break;
4087         case SEN_OV7640:
4088         case SEN_OV7648:
4089                 hwsbase = 0x1a;
4090                 hwebase = 0x1a;
4091                 vwsbase = vwebase = 0x03;
4092                 break;
4093         default:
4094                 return;
4095         }
4096
4097         switch (sd->sensor) {
4098         case SEN_OV6620:
4099         case SEN_OV6630:
4100         case SEN_OV66308AF:
4101                 if (qvga) {             /* QCIF */
4102                         hwscale = 0;
4103                         vwscale = 0;
4104                 } else {                /* CIF */
4105                         hwscale = 1;
4106                         vwscale = 1;    /* The datasheet says 0;
4107                                          * it's wrong */
4108                 }
4109                 break;
4110         case SEN_OV8610:
4111                 if (qvga) {             /* QSVGA */
4112                         hwscale = 1;
4113                         vwscale = 1;
4114                 } else {                /* SVGA */
4115                         hwscale = 2;
4116                         vwscale = 2;
4117                 }
4118                 break;
4119         default:                        /* SEN_OV7xx0 */
4120                 if (qvga) {             /* QVGA */
4121                         hwscale = 1;
4122                         vwscale = 0;
4123                 } else {                /* VGA */
4124                         hwscale = 2;
4125                         vwscale = 1;
4126                 }
4127         }
4128
4129         mode_init_ov_sensor_regs(sd);
4130
4131         i2c_w(sd, 0x17, hwsbase);
4132         i2c_w(sd, 0x18, hwebase + (sd->sensor_width >> hwscale));
4133         i2c_w(sd, 0x19, vwsbase);
4134         i2c_w(sd, 0x1a, vwebase + (sd->sensor_height >> vwscale));
4135 }
4136
4137 /* -- start the camera -- */
4138 static int sd_start(struct gspca_dev *gspca_dev)
4139 {
4140         struct sd *sd = (struct sd *) gspca_dev;
4141
4142         /* Default for most bridges, allow bridge_mode_init_regs to override */
4143         sd->sensor_width = sd->gspca_dev.width;
4144         sd->sensor_height = sd->gspca_dev.height;
4145
4146         switch (sd->bridge) {
4147         case BRIDGE_OV511:
4148         case BRIDGE_OV511PLUS:
4149                 ov511_mode_init_regs(sd);
4150                 break;
4151         case BRIDGE_OV518:
4152         case BRIDGE_OV518PLUS:
4153                 ov518_mode_init_regs(sd);
4154                 break;
4155         case BRIDGE_OV519:
4156                 ov519_mode_init_regs(sd);
4157                 break;
4158         /* case BRIDGE_OVFX2: nothing to do */
4159         case BRIDGE_W9968CF:
4160                 w9968cf_mode_init_regs(sd);
4161                 break;
4162         }
4163
4164         set_ov_sensor_window(sd);
4165
4166         if (!(sd->gspca_dev.ctrl_dis & (1 << CONTRAST)))
4167                 setcontrast(gspca_dev);
4168         if (!(sd->gspca_dev.ctrl_dis & (1 << BRIGHTNESS)))
4169                 setbrightness(gspca_dev);
4170         if (!(sd->gspca_dev.ctrl_dis & (1 << COLORS)))
4171                 setcolors(gspca_dev);
4172         if (!(sd->gspca_dev.ctrl_dis & ((1 << HFLIP) | (1 << VFLIP))))
4173                 sethvflip(gspca_dev);
4174         if (!(sd->gspca_dev.ctrl_dis & (1 << AUTOBRIGHT)))
4175                 setautobright(gspca_dev);
4176         if (!(sd->gspca_dev.ctrl_dis & (1 << FREQ)))
4177                 setfreq_i(sd);
4178
4179         /* Force clear snapshot state in case the snapshot button was
4180            pressed while we weren't streaming */
4181         sd->snapshot_needs_reset = 1;
4182         sd_reset_snapshot(gspca_dev);
4183
4184         sd->first_frame = 3;
4185
4186         ov51x_restart(sd);
4187         ov51x_led_control(sd, 1);
4188         return gspca_dev->usb_err;
4189 }
4190
4191 static void sd_stopN(struct gspca_dev *gspca_dev)
4192 {
4193         struct sd *sd = (struct sd *) gspca_dev;
4194
4195         ov51x_stop(sd);
4196         ov51x_led_control(sd, 0);
4197 }
4198
4199 static void sd_stop0(struct gspca_dev *gspca_dev)
4200 {
4201         struct sd *sd = (struct sd *) gspca_dev;
4202
4203         if (!sd->gspca_dev.present)
4204                 return;
4205         if (sd->bridge == BRIDGE_W9968CF)
4206                 w9968cf_stop0(sd);
4207
4208 #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
4209         /* If the last button state is pressed, release it now! */
4210         if (sd->snapshot_pressed) {
4211                 input_report_key(gspca_dev->input_dev, KEY_CAMERA, 0);
4212                 input_sync(gspca_dev->input_dev);
4213                 sd->snapshot_pressed = 0;
4214         }
4215 #endif
4216         if (sd->bridge == BRIDGE_OV519)
4217                 reg_w(sd, OV519_R57_SNAPSHOT, 0x23);
4218 }
4219
4220 static void ov51x_handle_button(struct gspca_dev *gspca_dev, u8 state)
4221 {
4222         struct sd *sd = (struct sd *) gspca_dev;
4223
4224         if (sd->snapshot_pressed != state) {
4225 #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
4226                 input_report_key(gspca_dev->input_dev, KEY_CAMERA, state);
4227                 input_sync(gspca_dev->input_dev);
4228 #endif
4229                 if (state)
4230                         sd->snapshot_needs_reset = 1;
4231
4232                 sd->snapshot_pressed = state;
4233         } else {
4234                 /* On the ov511 / ov519 we need to reset the button state
4235                    multiple times, as resetting does not work as long as the
4236                    button stays pressed */
4237                 switch (sd->bridge) {
4238                 case BRIDGE_OV511:
4239                 case BRIDGE_OV511PLUS:
4240                 case BRIDGE_OV519:
4241                         if (state)
4242                                 sd->snapshot_needs_reset = 1;
4243                         break;
4244                 }
4245         }
4246 }
4247
4248 static void ov511_pkt_scan(struct gspca_dev *gspca_dev,
4249                         u8 *in,                 /* isoc packet */
4250                         int len)                /* iso packet length */
4251 {
4252         struct sd *sd = (struct sd *) gspca_dev;
4253
4254         /* SOF/EOF packets have 1st to 8th bytes zeroed and the 9th
4255          * byte non-zero. The EOF packet has image width/height in the
4256          * 10th and 11th bytes. The 9th byte is given as follows:
4257          *
4258          * bit 7: EOF
4259          *     6: compression enabled
4260          *     5: 422/420/400 modes
4261          *     4: 422/420/400 modes
4262          *     3: 1
4263          *     2: snapshot button on
4264          *     1: snapshot frame
4265          *     0: even/odd field
4266          */
4267         if (!(in[0] | in[1] | in[2] | in[3] | in[4] | in[5] | in[6] | in[7]) &&
4268             (in[8] & 0x08)) {
4269                 ov51x_handle_button(gspca_dev, (in[8] >> 2) & 1);
4270                 if (in[8] & 0x80) {
4271                         /* Frame end */
4272                         if ((in[9] + 1) * 8 != gspca_dev->width ||
4273                             (in[10] + 1) * 8 != gspca_dev->height) {
4274                                 PDEBUG(D_ERR, "Invalid frame size, got: %dx%d,"
4275                                         " requested: %dx%d\n",
4276                                         (in[9] + 1) * 8, (in[10] + 1) * 8,
4277                                         gspca_dev->width, gspca_dev->height);
4278                                 gspca_dev->last_packet_type = DISCARD_PACKET;
4279                                 return;
4280                         }
4281                         /* Add 11 byte footer to frame, might be usefull */
4282                         gspca_frame_add(gspca_dev, LAST_PACKET, in, 11);
4283                         return;
4284                 } else {
4285                         /* Frame start */
4286                         gspca_frame_add(gspca_dev, FIRST_PACKET, in, 0);
4287                         sd->packet_nr = 0;
4288                 }
4289         }
4290
4291         /* Ignore the packet number */
4292         len--;
4293
4294         /* intermediate packet */
4295         gspca_frame_add(gspca_dev, INTER_PACKET, in, len);
4296 }
4297
4298 static void ov518_pkt_scan(struct gspca_dev *gspca_dev,
4299                         u8 *data,                       /* isoc packet */
4300                         int len)                        /* iso packet length */
4301 {
4302         struct sd *sd = (struct sd *) gspca_dev;
4303
4304         /* A false positive here is likely, until OVT gives me
4305          * the definitive SOF/EOF format */
4306         if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) {
4307                 ov51x_handle_button(gspca_dev, (data[6] >> 1) & 1);
4308                 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
4309                 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4310                 sd->packet_nr = 0;
4311         }
4312
4313         if (gspca_dev->last_packet_type == DISCARD_PACKET)
4314                 return;
4315
4316         /* Does this device use packet numbers ? */
4317         if (len & 7) {
4318                 len--;
4319                 if (sd->packet_nr == data[len])
4320                         sd->packet_nr++;
4321                 /* The last few packets of the frame (which are all 0's
4322                    except that they may contain part of the footer), are
4323                    numbered 0 */
4324                 else if (sd->packet_nr == 0 || data[len]) {
4325                         PDEBUG(D_ERR, "Invalid packet nr: %d (expect: %d)",
4326                                 (int)data[len], (int)sd->packet_nr);
4327                         gspca_dev->last_packet_type = DISCARD_PACKET;
4328                         return;
4329                 }
4330         }
4331
4332         /* intermediate packet */
4333         gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4334 }
4335
4336 static void ov519_pkt_scan(struct gspca_dev *gspca_dev,
4337                         u8 *data,                       /* isoc packet */
4338                         int len)                        /* iso packet length */
4339 {
4340         /* Header of ov519 is 16 bytes:
4341          *     Byte     Value      Description
4342          *      0       0xff    magic
4343          *      1       0xff    magic
4344          *      2       0xff    magic
4345          *      3       0xXX    0x50 = SOF, 0x51 = EOF
4346          *      9       0xXX    0x01 initial frame without data,
4347          *                      0x00 standard frame with image
4348          *      14      Lo      in EOF: length of image data / 8
4349          *      15      Hi
4350          */
4351
4352         if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) {
4353                 switch (data[3]) {
4354                 case 0x50:              /* start of frame */
4355                         /* Don't check the button state here, as the state
4356                            usually (always ?) changes at EOF and checking it
4357                            here leads to unnecessary snapshot state resets. */
4358 #define HDRSZ 16
4359                         data += HDRSZ;
4360                         len -= HDRSZ;
4361 #undef HDRSZ
4362                         if (data[0] == 0xff || data[1] == 0xd8)
4363                                 gspca_frame_add(gspca_dev, FIRST_PACKET,
4364                                                 data, len);
4365                         else
4366                                 gspca_dev->last_packet_type = DISCARD_PACKET;
4367                         return;
4368                 case 0x51:              /* end of frame */
4369                         ov51x_handle_button(gspca_dev, data[11] & 1);
4370                         if (data[9] != 0)
4371                                 gspca_dev->last_packet_type = DISCARD_PACKET;
4372                         gspca_frame_add(gspca_dev, LAST_PACKET,
4373                                         NULL, 0);
4374                         return;
4375                 }
4376         }
4377
4378         /* intermediate packet */
4379         gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4380 }
4381
4382 static void ovfx2_pkt_scan(struct gspca_dev *gspca_dev,
4383                         u8 *data,                       /* isoc packet */
4384                         int len)                        /* iso packet length */
4385 {
4386         struct sd *sd = (struct sd *) gspca_dev;
4387
4388         gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4389
4390         /* A short read signals EOF */
4391         if (len < OVFX2_BULK_SIZE) {
4392                 /* If the frame is short, and it is one of the first ones
4393                    the sensor and bridge are still syncing, so drop it. */
4394                 if (sd->first_frame) {
4395                         sd->first_frame--;
4396                         if (gspca_dev->image_len <
4397                                   sd->gspca_dev.width * sd->gspca_dev.height)
4398                                 gspca_dev->last_packet_type = DISCARD_PACKET;
4399                 }
4400                 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
4401                 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4402         }
4403 }
4404
4405 static void sd_pkt_scan(struct gspca_dev *gspca_dev,
4406                         u8 *data,                       /* isoc packet */
4407                         int len)                        /* iso packet length */
4408 {
4409         struct sd *sd = (struct sd *) gspca_dev;
4410
4411         switch (sd->bridge) {
4412         case BRIDGE_OV511:
4413         case BRIDGE_OV511PLUS:
4414                 ov511_pkt_scan(gspca_dev, data, len);
4415                 break;
4416         case BRIDGE_OV518:
4417         case BRIDGE_OV518PLUS:
4418                 ov518_pkt_scan(gspca_dev, data, len);
4419                 break;
4420         case BRIDGE_OV519:
4421                 ov519_pkt_scan(gspca_dev, data, len);
4422                 break;
4423         case BRIDGE_OVFX2:
4424                 ovfx2_pkt_scan(gspca_dev, data, len);
4425                 break;
4426         case BRIDGE_W9968CF:
4427                 w9968cf_pkt_scan(gspca_dev, data, len);
4428                 break;
4429         }
4430 }
4431
4432 /* -- management routines -- */
4433
4434 static void setbrightness(struct gspca_dev *gspca_dev)
4435 {
4436         struct sd *sd = (struct sd *) gspca_dev;
4437         int val;
4438         static const struct ov_i2c_regvals brit_7660[][7] = {
4439                 {{0x0f, 0x6a}, {0x24, 0x40}, {0x25, 0x2b}, {0x26, 0x90},
4440                         {0x27, 0xe0}, {0x28, 0xe0}, {0x2c, 0xe0}},
4441                 {{0x0f, 0x6a}, {0x24, 0x50}, {0x25, 0x40}, {0x26, 0xa1},
4442                         {0x27, 0xc0}, {0x28, 0xc0}, {0x2c, 0xc0}},
4443                 {{0x0f, 0x6a}, {0x24, 0x68}, {0x25, 0x58}, {0x26, 0xc2},
4444                         {0x27, 0xa0}, {0x28, 0xa0}, {0x2c, 0xa0}},
4445                 {{0x0f, 0x6a}, {0x24, 0x70}, {0x25, 0x68}, {0x26, 0xd3},
4446                         {0x27, 0x80}, {0x28, 0x80}, {0x2c, 0x80}},
4447                 {{0x0f, 0x6a}, {0x24, 0x80}, {0x25, 0x70}, {0x26, 0xd3},
4448                         {0x27, 0x20}, {0x28, 0x20}, {0x2c, 0x20}},
4449                 {{0x0f, 0x6a}, {0x24, 0x88}, {0x25, 0x78}, {0x26, 0xd3},
4450                         {0x27, 0x40}, {0x28, 0x40}, {0x2c, 0x40}},
4451                 {{0x0f, 0x6a}, {0x24, 0x90}, {0x25, 0x80}, {0x26, 0xd4},
4452                         {0x27, 0x60}, {0x28, 0x60}, {0x2c, 0x60}}
4453         };
4454
4455         val = sd->ctrls[BRIGHTNESS].val;
4456         switch (sd->sensor) {
4457         case SEN_OV8610:
4458         case SEN_OV7610:
4459         case SEN_OV76BE:
4460         case SEN_OV6620:
4461         case SEN_OV6630:
4462         case SEN_OV66308AF:
4463         case SEN_OV7640:
4464         case SEN_OV7648:
4465                 i2c_w(sd, OV7610_REG_BRT, val);
4466                 break;
4467         case SEN_OV7620:
4468         case SEN_OV7620AE:
4469                 /* 7620 doesn't like manual changes when in auto mode */
4470                 if (!sd->ctrls[AUTOBRIGHT].val)
4471                         i2c_w(sd, OV7610_REG_BRT, val);
4472                 break;
4473         case SEN_OV7660:
4474                 write_i2c_regvals(sd, brit_7660[val],
4475                                 ARRAY_SIZE(brit_7660[0]));
4476                 break;
4477         case SEN_OV7670:
4478 /*win trace
4479  *              i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_AEC); */
4480                 i2c_w(sd, OV7670_R55_BRIGHT, ov7670_abs_to_sm(val));
4481                 break;
4482         }
4483 }
4484
4485 static void setcontrast(struct gspca_dev *gspca_dev)
4486 {
4487         struct sd *sd = (struct sd *) gspca_dev;
4488         int val;
4489         static const struct ov_i2c_regvals contrast_7660[][31] = {
4490                 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf8}, {0x6f, 0xa0},
4491                  {0x70, 0x58}, {0x71, 0x38}, {0x72, 0x30}, {0x73, 0x30},
4492                  {0x74, 0x28}, {0x75, 0x28}, {0x76, 0x24}, {0x77, 0x24},
4493                  {0x78, 0x22}, {0x79, 0x28}, {0x7a, 0x2a}, {0x7b, 0x34},
4494                  {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3d}, {0x7f, 0x65},
4495                  {0x80, 0x70}, {0x81, 0x77}, {0x82, 0x7d}, {0x83, 0x83},
4496                  {0x84, 0x88}, {0x85, 0x8d}, {0x86, 0x96}, {0x87, 0x9f},
4497                  {0x88, 0xb0}, {0x89, 0xc4}, {0x8a, 0xd9}},
4498                 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf8}, {0x6f, 0x94},
4499                  {0x70, 0x58}, {0x71, 0x40}, {0x72, 0x30}, {0x73, 0x30},
4500                  {0x74, 0x30}, {0x75, 0x30}, {0x76, 0x2c}, {0x77, 0x24},
4501                  {0x78, 0x22}, {0x79, 0x28}, {0x7a, 0x2a}, {0x7b, 0x31},
4502                  {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3d}, {0x7f, 0x62},
4503                  {0x80, 0x6d}, {0x81, 0x75}, {0x82, 0x7b}, {0x83, 0x81},
4504                  {0x84, 0x87}, {0x85, 0x8d}, {0x86, 0x98}, {0x87, 0xa1},
4505                  {0x88, 0xb2}, {0x89, 0xc6}, {0x8a, 0xdb}},
4506                 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf0}, {0x6f, 0x84},
4507                  {0x70, 0x58}, {0x71, 0x48}, {0x72, 0x40}, {0x73, 0x40},
4508                  {0x74, 0x28}, {0x75, 0x28}, {0x76, 0x28}, {0x77, 0x24},
4509                  {0x78, 0x26}, {0x79, 0x28}, {0x7a, 0x28}, {0x7b, 0x34},
4510                  {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3c}, {0x7f, 0x5d},
4511                  {0x80, 0x68}, {0x81, 0x71}, {0x82, 0x79}, {0x83, 0x81},
4512                  {0x84, 0x86}, {0x85, 0x8b}, {0x86, 0x95}, {0x87, 0x9e},
4513                  {0x88, 0xb1}, {0x89, 0xc5}, {0x8a, 0xd9}},
4514                 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf0}, {0x6f, 0x70},
4515                  {0x70, 0x58}, {0x71, 0x58}, {0x72, 0x48}, {0x73, 0x48},
4516                  {0x74, 0x38}, {0x75, 0x40}, {0x76, 0x34}, {0x77, 0x34},
4517                  {0x78, 0x2e}, {0x79, 0x28}, {0x7a, 0x24}, {0x7b, 0x22},
4518                  {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3c}, {0x7f, 0x58},
4519                  {0x80, 0x63}, {0x81, 0x6e}, {0x82, 0x77}, {0x83, 0x80},
4520                  {0x84, 0x87}, {0x85, 0x8f}, {0x86, 0x9c}, {0x87, 0xa9},
4521                  {0x88, 0xc0}, {0x89, 0xd4}, {0x8a, 0xe6}},
4522                 {{0x6c, 0xa0}, {0x6d, 0xf0}, {0x6e, 0x90}, {0x6f, 0x80},
4523                  {0x70, 0x70}, {0x71, 0x80}, {0x72, 0x60}, {0x73, 0x60},
4524                  {0x74, 0x58}, {0x75, 0x60}, {0x76, 0x4c}, {0x77, 0x38},
4525                  {0x78, 0x38}, {0x79, 0x2a}, {0x7a, 0x20}, {0x7b, 0x0e},
4526                  {0x7c, 0x0a}, {0x7d, 0x14}, {0x7e, 0x26}, {0x7f, 0x46},
4527                  {0x80, 0x54}, {0x81, 0x64}, {0x82, 0x70}, {0x83, 0x7c},
4528                  {0x84, 0x87}, {0x85, 0x93}, {0x86, 0xa6}, {0x87, 0xb4},
4529                  {0x88, 0xd0}, {0x89, 0xe5}, {0x8a, 0xf5}},
4530                 {{0x6c, 0x60}, {0x6d, 0x80}, {0x6e, 0x60}, {0x6f, 0x80},
4531                  {0x70, 0x80}, {0x71, 0x80}, {0x72, 0x88}, {0x73, 0x30},
4532                  {0x74, 0x70}, {0x75, 0x68}, {0x76, 0x64}, {0x77, 0x50},
4533                  {0x78, 0x3c}, {0x79, 0x22}, {0x7a, 0x10}, {0x7b, 0x08},
4534                  {0x7c, 0x06}, {0x7d, 0x0e}, {0x7e, 0x1a}, {0x7f, 0x3a},
4535                  {0x80, 0x4a}, {0x81, 0x5a}, {0x82, 0x6b}, {0x83, 0x7b},
4536                  {0x84, 0x89}, {0x85, 0x96}, {0x86, 0xaf}, {0x87, 0xc3},
4537                  {0x88, 0xe1}, {0x89, 0xf2}, {0x8a, 0xfa}},
4538                 {{0x6c, 0x20}, {0x6d, 0x40}, {0x6e, 0x20}, {0x6f, 0x60},
4539                  {0x70, 0x88}, {0x71, 0xc8}, {0x72, 0xc0}, {0x73, 0xb8},
4540                  {0x74, 0xa8}, {0x75, 0xb8}, {0x76, 0x80}, {0x77, 0x5c},
4541                  {0x78, 0x26}, {0x79, 0x10}, {0x7a, 0x08}, {0x7b, 0x04},
4542                  {0x7c, 0x02}, {0x7d, 0x06}, {0x7e, 0x0a}, {0x7f, 0x22},
4543                  {0x80, 0x33}, {0x81, 0x4c}, {0x82, 0x64}, {0x83, 0x7b},
4544                  {0x84, 0x90}, {0x85, 0xa7}, {0x86, 0xc7}, {0x87, 0xde},
4545                  {0x88, 0xf1}, {0x89, 0xf9}, {0x8a, 0xfd}},
4546         };
4547
4548         val = sd->ctrls[CONTRAST].val;
4549         switch (sd->sensor) {
4550         case SEN_OV7610:
4551         case SEN_OV6620:
4552                 i2c_w(sd, OV7610_REG_CNT, val);
4553                 break;
4554         case SEN_OV6630:
4555         case SEN_OV66308AF:
4556                 i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f);
4557                 break;
4558         case SEN_OV8610: {
4559                 static const u8 ctab[] = {
4560                         0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f
4561                 };
4562
4563                 /* Use Y gamma control instead. Bit 0 enables it. */
4564                 i2c_w(sd, 0x64, ctab[val >> 5]);
4565                 break;
4566             }
4567         case SEN_OV7620:
4568         case SEN_OV7620AE: {
4569                 static const u8 ctab[] = {
4570                         0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57,
4571                         0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff
4572                 };
4573
4574                 /* Use Y gamma control instead. Bit 0 enables it. */
4575                 i2c_w(sd, 0x64, ctab[val >> 4]);
4576                 break;
4577             }
4578         case SEN_OV7660:
4579                 write_i2c_regvals(sd, contrast_7660[val],
4580                                         ARRAY_SIZE(contrast_7660[0]));
4581                 break;
4582         case SEN_OV7670:
4583                 /* check that this isn't just the same as ov7610 */
4584                 i2c_w(sd, OV7670_R56_CONTRAS, val >> 1);
4585                 break;
4586         }
4587 }
4588
4589 static void setcolors(struct gspca_dev *gspca_dev)
4590 {
4591         struct sd *sd = (struct sd *) gspca_dev;
4592         int val;
4593         static const struct ov_i2c_regvals colors_7660[][6] = {
4594                 {{0x4f, 0x28}, {0x50, 0x2a}, {0x51, 0x02}, {0x52, 0x0a},
4595                  {0x53, 0x19}, {0x54, 0x23}},
4596                 {{0x4f, 0x47}, {0x50, 0x4a}, {0x51, 0x03}, {0x52, 0x11},
4597                  {0x53, 0x2c}, {0x54, 0x3e}},
4598                 {{0x4f, 0x66}, {0x50, 0x6b}, {0x51, 0x05}, {0x52, 0x19},
4599                  {0x53, 0x40}, {0x54, 0x59}},
4600                 {{0x4f, 0x84}, {0x50, 0x8b}, {0x51, 0x06}, {0x52, 0x20},
4601                  {0x53, 0x53}, {0x54, 0x73}},
4602                 {{0x4f, 0xa3}, {0x50, 0xab}, {0x51, 0x08}, {0x52, 0x28},
4603                  {0x53, 0x66}, {0x54, 0x8e}},
4604         };
4605
4606         val = sd->ctrls[COLORS].val;
4607         switch (sd->sensor) {
4608         case SEN_OV8610:
4609         case SEN_OV7610:
4610         case SEN_OV76BE:
4611         case SEN_OV6620:
4612         case SEN_OV6630:
4613         case SEN_OV66308AF:
4614                 i2c_w(sd, OV7610_REG_SAT, val);
4615                 break;
4616         case SEN_OV7620:
4617         case SEN_OV7620AE:
4618                 /* Use UV gamma control instead. Bits 0 & 7 are reserved. */
4619 /*              rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e);
4620                 if (rc < 0)
4621                         goto out; */
4622                 i2c_w(sd, OV7610_REG_SAT, val);
4623                 break;
4624         case SEN_OV7640:
4625         case SEN_OV7648:
4626                 i2c_w(sd, OV7610_REG_SAT, val & 0xf0);
4627                 break;
4628         case SEN_OV7660:
4629                 write_i2c_regvals(sd, colors_7660[val],
4630                                         ARRAY_SIZE(colors_7660[0]));
4631                 break;
4632         case SEN_OV7670:
4633                 /* supported later once I work out how to do it
4634                  * transparently fail now! */
4635                 /* set REG_COM13 values for UV sat auto mode */
4636                 break;
4637         }
4638 }
4639
4640 static void setautobright(struct gspca_dev *gspca_dev)
4641 {
4642         struct sd *sd = (struct sd *) gspca_dev;
4643
4644         i2c_w_mask(sd, 0x2d, sd->ctrls[AUTOBRIGHT].val ? 0x10 : 0x00, 0x10);
4645 }
4646
4647 static void setfreq_i(struct sd *sd)
4648 {
4649         if (sd->sensor == SEN_OV7660
4650          || sd->sensor == SEN_OV7670) {
4651                 switch (sd->ctrls[FREQ].val) {
4652                 case 0: /* Banding filter disabled */
4653                         i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_BFILT);
4654                         break;
4655                 case 1: /* 50 hz */
4656                         i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4657                                    OV7670_COM8_BFILT);
4658                         i2c_w_mask(sd, OV7670_R3B_COM11, 0x08, 0x18);
4659                         break;
4660                 case 2: /* 60 hz */
4661                         i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4662                                    OV7670_COM8_BFILT);
4663                         i2c_w_mask(sd, OV7670_R3B_COM11, 0x00, 0x18);
4664                         break;
4665                 case 3: /* Auto hz - ov7670 only */
4666                         i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4667                                    OV7670_COM8_BFILT);
4668                         i2c_w_mask(sd, OV7670_R3B_COM11, OV7670_COM11_HZAUTO,
4669                                    0x18);
4670                         break;
4671                 }
4672         } else {
4673                 switch (sd->ctrls[FREQ].val) {
4674                 case 0: /* Banding filter disabled */
4675                         i2c_w_mask(sd, 0x2d, 0x00, 0x04);
4676                         i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4677                         break;
4678                 case 1: /* 50 hz (filter on and framerate adj) */
4679                         i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4680                         i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4681                         /* 20 fps -> 16.667 fps */
4682                         if (sd->sensor == SEN_OV6620 ||
4683                             sd->sensor == SEN_OV6630 ||
4684                             sd->sensor == SEN_OV66308AF)
4685                                 i2c_w(sd, 0x2b, 0x5e);
4686                         else
4687                                 i2c_w(sd, 0x2b, 0xac);
4688                         break;
4689                 case 2: /* 60 hz (filter on, ...) */
4690                         i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4691                         if (sd->sensor == SEN_OV6620 ||
4692                             sd->sensor == SEN_OV6630 ||
4693                             sd->sensor == SEN_OV66308AF) {
4694                                 /* 20 fps -> 15 fps */
4695                                 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4696                                 i2c_w(sd, 0x2b, 0xa8);
4697                         } else {
4698                                 /* no framerate adj. */
4699                                 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4700                         }
4701                         break;
4702                 }
4703         }
4704 }
4705 static void setfreq(struct gspca_dev *gspca_dev)
4706 {
4707         struct sd *sd = (struct sd *) gspca_dev;
4708
4709         setfreq_i(sd);
4710
4711         /* Ugly but necessary */
4712         if (sd->bridge == BRIDGE_W9968CF)
4713                 w9968cf_set_crop_window(sd);
4714 }
4715
4716 static int sd_querymenu(struct gspca_dev *gspca_dev,
4717                         struct v4l2_querymenu *menu)
4718 {
4719         struct sd *sd = (struct sd *) gspca_dev;
4720
4721         switch (menu->id) {
4722         case V4L2_CID_POWER_LINE_FREQUENCY:
4723                 switch (menu->index) {
4724                 case 0:         /* V4L2_CID_POWER_LINE_FREQUENCY_DISABLED */
4725                         strcpy((char *) menu->name, "NoFliker");
4726                         return 0;
4727                 case 1:         /* V4L2_CID_POWER_LINE_FREQUENCY_50HZ */
4728                         strcpy((char *) menu->name, "50 Hz");
4729                         return 0;
4730                 case 2:         /* V4L2_CID_POWER_LINE_FREQUENCY_60HZ */
4731                         strcpy((char *) menu->name, "60 Hz");
4732                         return 0;
4733                 case 3:
4734                         if (sd->sensor != SEN_OV7670)
4735                                 return -EINVAL;
4736
4737                         strcpy((char *) menu->name, "Automatic");
4738                         return 0;
4739                 }
4740                 break;
4741         }
4742         return -EINVAL;
4743 }
4744
4745 static int sd_get_jcomp(struct gspca_dev *gspca_dev,
4746                         struct v4l2_jpegcompression *jcomp)
4747 {
4748         struct sd *sd = (struct sd *) gspca_dev;
4749
4750         if (sd->bridge != BRIDGE_W9968CF)
4751                 return -EINVAL;
4752
4753         memset(jcomp, 0, sizeof *jcomp);
4754         jcomp->quality = sd->quality;
4755         jcomp->jpeg_markers = V4L2_JPEG_MARKER_DHT | V4L2_JPEG_MARKER_DQT |
4756                               V4L2_JPEG_MARKER_DRI;
4757         return 0;
4758 }
4759
4760 static int sd_set_jcomp(struct gspca_dev *gspca_dev,
4761                         struct v4l2_jpegcompression *jcomp)
4762 {
4763         struct sd *sd = (struct sd *) gspca_dev;
4764
4765         if (sd->bridge != BRIDGE_W9968CF)
4766                 return -EINVAL;
4767
4768         if (gspca_dev->streaming)
4769                 return -EBUSY;
4770
4771         if (jcomp->quality < QUALITY_MIN)
4772                 sd->quality = QUALITY_MIN;
4773         else if (jcomp->quality > QUALITY_MAX)
4774                 sd->quality = QUALITY_MAX;
4775         else
4776                 sd->quality = jcomp->quality;
4777
4778         /* Return resulting jcomp params to app */
4779         sd_get_jcomp(gspca_dev, jcomp);
4780
4781         return 0;
4782 }
4783
4784 /* sub-driver description */
4785 static const struct sd_desc sd_desc = {
4786         .name = MODULE_NAME,
4787         .ctrls = sd_ctrls,
4788         .nctrls = ARRAY_SIZE(sd_ctrls),
4789         .config = sd_config,
4790         .init = sd_init,
4791         .start = sd_start,
4792         .stopN = sd_stopN,
4793         .stop0 = sd_stop0,
4794         .pkt_scan = sd_pkt_scan,
4795         .dq_callback = sd_reset_snapshot,
4796         .querymenu = sd_querymenu,
4797         .get_jcomp = sd_get_jcomp,
4798         .set_jcomp = sd_set_jcomp,
4799 #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
4800         .other_input = 1,
4801 #endif
4802 };
4803
4804 /* -- module initialisation -- */
4805 static const struct usb_device_id device_table[] = {
4806         {USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF },
4807         {USB_DEVICE(0x041e, 0x4052), .driver_info = BRIDGE_OV519 },
4808         {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 },
4809         {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 },
4810         {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 },
4811         {USB_DEVICE(0x041e, 0x4064),
4812                 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4813         {USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 },
4814         {USB_DEVICE(0x041e, 0x4068),
4815                 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4816         {USB_DEVICE(0x045e, 0x028c), .driver_info = BRIDGE_OV519 },
4817         {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 },
4818         {USB_DEVICE(0x054c, 0x0155),
4819                 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4820         {USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 },
4821         {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 },
4822         {USB_DEVICE(0x05a9, 0x0519), .driver_info = BRIDGE_OV519 },
4823         {USB_DEVICE(0x05a9, 0x0530), .driver_info = BRIDGE_OV519 },
4824         {USB_DEVICE(0x05a9, 0x2800), .driver_info = BRIDGE_OVFX2 },
4825         {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 },
4826         {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 },
4827         {USB_DEVICE(0x05a9, 0xa511), .driver_info = BRIDGE_OV511PLUS },
4828         {USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS },
4829         {USB_DEVICE(0x0813, 0x0002), .driver_info = BRIDGE_OV511PLUS },
4830         {USB_DEVICE(0x0b62, 0x0059), .driver_info = BRIDGE_OVFX2 },
4831         {USB_DEVICE(0x0e96, 0xc001), .driver_info = BRIDGE_OVFX2 },
4832         {USB_DEVICE(0x1046, 0x9967), .driver_info = BRIDGE_W9968CF },
4833         {USB_DEVICE(0x8020, 0xef04), .driver_info = BRIDGE_OVFX2 },
4834         {}
4835 };
4836
4837 MODULE_DEVICE_TABLE(usb, device_table);
4838
4839 /* -- device connect -- */
4840 static int sd_probe(struct usb_interface *intf,
4841                         const struct usb_device_id *id)
4842 {
4843         return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
4844                                 THIS_MODULE);
4845 }
4846
4847 static struct usb_driver sd_driver = {
4848         .name = MODULE_NAME,
4849         .id_table = device_table,
4850         .probe = sd_probe,
4851         .disconnect = gspca_disconnect,
4852 #ifdef CONFIG_PM
4853         .suspend = gspca_suspend,
4854         .resume = gspca_resume,
4855 #endif
4856 };
4857
4858 /* -- module insert / remove -- */
4859 static int __init sd_mod_init(void)
4860 {
4861         return usb_register(&sd_driver);
4862 }
4863 static void __exit sd_mod_exit(void)
4864 {
4865         usb_deregister(&sd_driver);
4866 }
4867
4868 module_init(sd_mod_init);
4869 module_exit(sd_mod_exit);
4870
4871 module_param(frame_rate, int, 0644);
4872 MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");