2 * Driver for the ov9650 sensor
4 * Copyright (C) 2008 Erik Andrén
5 * Copyright (C) 2007 Ilyes Gouta. Based on the m5603x Linux Driver Project.
6 * Copyright (C) 2005 m5603x Linux Driver Project <m5602@x3ng.com.br>
8 * Portions of code to USB interface and ALi driver software,
9 * Copyright (c) 2006 Willem Duinker
10 * v4l2 interface modeled after the V4L2 driver
11 * for SN9C10x PC Camera Controllers
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation, version 2.
19 #include "m5602_ov9650.h"
21 /* Vertically and horizontally flips the image if matched, needed for machines
22 where the sensor is mounted upside down */
25 struct dmi_system_id ov9650_flip_dmi_table[] = {
29 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
30 DMI_MATCH(DMI_PRODUCT_NAME, "A6VC")
36 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
37 DMI_MATCH(DMI_PRODUCT_NAME, "A6VM")
43 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
44 DMI_MATCH(DMI_PRODUCT_NAME, "A6JC")
50 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
51 DMI_MATCH(DMI_PRODUCT_NAME, "A6J")
57 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
58 DMI_MATCH(DMI_PRODUCT_NAME, "A6Kt")
62 .ident = "Alienware Aurora m9700",
64 DMI_MATCH(DMI_SYS_VENDOR, "alienware"),
65 DMI_MATCH(DMI_PRODUCT_NAME, "Aurora m9700")
71 const static struct ctrl ov9650_ctrls[] = {
74 .id = V4L2_CID_EXPOSURE,
75 .type = V4L2_CTRL_TYPE_INTEGER,
80 .default_value = EXPOSURE_DEFAULT,
81 .flags = V4L2_CTRL_FLAG_SLIDER
83 .set = ov9650_set_exposure,
84 .get = ov9650_get_exposure
88 .type = V4L2_CTRL_TYPE_INTEGER,
93 .default_value = GAIN_DEFAULT,
94 .flags = V4L2_CTRL_FLAG_SLIDER
96 .set = ov9650_set_gain,
97 .get = ov9650_get_gain
100 .type = V4L2_CTRL_TYPE_INTEGER,
101 .name = "red balance",
105 .default_value = RED_GAIN_DEFAULT,
106 .flags = V4L2_CTRL_FLAG_SLIDER
108 .set = ov9650_set_red_balance,
109 .get = ov9650_get_red_balance
112 .type = V4L2_CTRL_TYPE_INTEGER,
113 .name = "blue balance",
117 .default_value = BLUE_GAIN_DEFAULT,
118 .flags = V4L2_CTRL_FLAG_SLIDER
120 .set = ov9650_set_blue_balance,
121 .get = ov9650_get_blue_balance
124 .id = V4L2_CID_HFLIP,
125 .type = V4L2_CTRL_TYPE_BOOLEAN,
126 .name = "horizontal flip",
132 .set = ov9650_set_hflip,
133 .get = ov9650_get_hflip
136 .id = V4L2_CID_VFLIP,
137 .type = V4L2_CTRL_TYPE_BOOLEAN,
138 .name = "vertical flip",
144 .set = ov9650_set_vflip,
145 .get = ov9650_get_vflip
148 .id = V4L2_CID_AUTO_WHITE_BALANCE,
149 .type = V4L2_CTRL_TYPE_BOOLEAN,
150 .name = "auto white balance",
156 .set = ov9650_set_auto_white_balance,
157 .get = ov9650_get_auto_white_balance
160 .id = V4L2_CID_AUTOGAIN,
161 .type = V4L2_CTRL_TYPE_BOOLEAN,
162 .name = "auto gain control",
168 .set = ov9650_set_auto_gain,
169 .get = ov9650_get_auto_gain
173 static struct v4l2_pix_format ov9650_modes[] = {
182 .colorspace = V4L2_COLORSPACE_SRGB,
192 .colorspace = V4L2_COLORSPACE_SRGB,
202 .colorspace = V4L2_COLORSPACE_SRGB,
212 .colorspace = V4L2_COLORSPACE_SRGB,
217 static void ov9650_dump_registers(struct sd *sd);
219 int ov9650_probe(struct sd *sd)
221 u8 prod_id = 0, ver_id = 0, i;
224 if (force_sensor == OV9650_SENSOR) {
225 info("Forcing an %s sensor", ov9650.name);
228 /* If we want to force another sensor,
229 don't try to probe this one */
233 info("Probing for an ov9650 sensor");
235 /* Run the pre-init to actually probe the unit */
236 for (i = 0; i < ARRAY_SIZE(preinit_ov9650); i++) {
237 u8 data = preinit_ov9650[i][2];
238 if (preinit_ov9650[i][0] == SENSOR)
239 m5602_write_sensor(sd,
240 preinit_ov9650[i][1], &data, 1);
242 m5602_write_bridge(sd, preinit_ov9650[i][1], data);
245 if (m5602_read_sensor(sd, OV9650_PID, &prod_id, 1))
248 if (m5602_read_sensor(sd, OV9650_VER, &ver_id, 1))
251 if ((prod_id == 0x96) && (ver_id == 0x52)) {
252 info("Detected an ov9650 sensor");
259 sd->gspca_dev.cam.cam_mode = ov9650_modes;
260 sd->gspca_dev.cam.nmodes = ARRAY_SIZE(ov9650_modes);
261 sd->desc->ctrls = ov9650_ctrls;
262 sd->desc->nctrls = ARRAY_SIZE(ov9650_ctrls);
266 int ov9650_init(struct sd *sd)
272 ov9650_dump_registers(sd);
274 for (i = 0; i < ARRAY_SIZE(init_ov9650) && !err; i++) {
275 data = init_ov9650[i][2];
276 if (init_ov9650[i][0] == SENSOR)
277 err = m5602_write_sensor(sd, init_ov9650[i][1],
280 err = m5602_write_bridge(sd, init_ov9650[i][1], data);
283 if (dmi_check_system(ov9650_flip_dmi_table) && !err) {
284 info("vflip quirk active");
286 err = m5602_write_sensor(sd, OV9650_MVFP, &data, 1);
292 int ov9650_start(struct sd *sd)
295 struct cam *cam = &sd->gspca_dev.cam;
297 err = ov9650_init(sd);
301 for (i = 0; i < ARRAY_SIZE(res_init_ov9650) && !err; i++) {
302 if (res_init_ov9650[i][0] == BRIDGE)
303 err = m5602_write_bridge(sd, res_init_ov9650[i][1],
304 res_init_ov9650[i][2]);
305 else if (res_init_ov9650[i][0] == SENSOR) {
306 u8 data = res_init_ov9650[i][2];
307 err = m5602_write_sensor(sd,
308 res_init_ov9650[i][1], &data, 1);
314 switch (cam->cam_mode[sd->gspca_dev.curr_mode].width) {
316 PDEBUG(D_V4L2, "Configuring camera for VGA mode");
318 for (i = 0; i < ARRAY_SIZE(VGA_ov9650) && !err; i++) {
319 if (VGA_ov9650[i][0] == SENSOR) {
320 u8 data = VGA_ov9650[i][2];
322 err = m5602_write_sensor(sd,
323 VGA_ov9650[i][1], &data, 1);
325 err = m5602_write_bridge(sd, VGA_ov9650[i][1],
332 PDEBUG(D_V4L2, "Configuring camera for CIF mode");
334 for (i = 0; i < ARRAY_SIZE(CIF_ov9650) && !err; i++) {
335 if (CIF_ov9650[i][0] == SENSOR) {
336 u8 data = CIF_ov9650[i][2];
338 err = m5602_write_sensor(sd,
339 CIF_ov9650[i][1], &data, 1);
341 err = m5602_write_bridge(sd, CIF_ov9650[i][1],
348 PDEBUG(D_V4L2, "Configuring camera for QVGA mode");
350 for (i = 0; i < ARRAY_SIZE(QVGA_ov9650) && !err; i++) {
351 if (QVGA_ov9650[i][0] == SENSOR) {
352 u8 data = QVGA_ov9650[i][2];
354 err = m5602_write_sensor(sd,
355 QVGA_ov9650[i][1], &data, 1);
357 err = m5602_write_bridge(sd, QVGA_ov9650[i][1],
364 PDEBUG(D_V4L2, "Configuring camera for QCIF mode");
366 for (i = 0; i < ARRAY_SIZE(QCIF_ov9650) && !err; i++) {
367 if (QCIF_ov9650[i][0] == SENSOR) {
368 u8 data = QCIF_ov9650[i][2];
369 err = m5602_write_sensor(sd,
370 QCIF_ov9650[i][1], &data, 1);
372 err = m5602_write_bridge(sd, QCIF_ov9650[i][1],
382 int ov9650_stop(struct sd *sd)
384 u8 data = OV9650_SOFT_SLEEP | OV9650_OUTPUT_DRIVE_2X;
385 return m5602_write_sensor(sd, OV9650_COM2, &data, 1);
388 int ov9650_power_down(struct sd *sd)
391 for (i = 0; i < ARRAY_SIZE(power_down_ov9650) && !err; i++) {
392 u8 data = power_down_ov9650[i][2];
393 if (power_down_ov9650[i][0] == SENSOR)
394 err = m5602_write_sensor(sd,
395 power_down_ov9650[i][1], &data, 1);
397 err = m5602_write_bridge(sd, power_down_ov9650[i][1],
404 int ov9650_get_exposure(struct gspca_dev *gspca_dev, __s32 *val)
406 struct sd *sd = (struct sd *) gspca_dev;
410 err = m5602_read_sensor(sd, OV9650_COM1, &i2c_data, 1);
413 *val = i2c_data & 0x03;
415 err = m5602_read_sensor(sd, OV9650_AECH, &i2c_data, 1);
418 *val |= (i2c_data << 2);
420 err = m5602_read_sensor(sd, OV9650_AECHM, &i2c_data, 1);
423 *val |= (i2c_data & 0x3f) << 10;
425 PDEBUG(D_V4L2, "Read exposure %d", *val);
430 int ov9650_set_exposure(struct gspca_dev *gspca_dev, __s32 val)
432 struct sd *sd = (struct sd *) gspca_dev;
436 PDEBUG(D_V4L2, "Set exposure to %d",
440 i2c_data = (val >> 10) & 0x3f;
441 err = m5602_write_sensor(sd, OV9650_AECHM,
446 /* The 8 middle bits */
447 i2c_data = (val >> 2) & 0xff;
448 err = m5602_write_sensor(sd, OV9650_AECH,
454 i2c_data = val & 0x03;
455 err = m5602_write_sensor(sd, OV9650_COM1, &i2c_data, 1);
460 int ov9650_get_gain(struct gspca_dev *gspca_dev, __s32 *val)
464 struct sd *sd = (struct sd *) gspca_dev;
466 m5602_read_sensor(sd, OV9650_VREF, &i2c_data, 1);
467 *val = (i2c_data & 0x03) << 8;
469 err = m5602_read_sensor(sd, OV9650_GAIN, &i2c_data, 1);
471 PDEBUG(D_V4L2, "Read gain %d", *val);
475 int ov9650_set_gain(struct gspca_dev *gspca_dev, __s32 val)
479 struct sd *sd = (struct sd *) gspca_dev;
482 /* Read the OV9650_VREF register first to avoid
483 corrupting the VREF high and low bits */
484 m5602_read_sensor(sd, OV9650_VREF, &i2c_data, 1);
485 /* Mask away all uninteresting bits */
486 i2c_data = ((val & 0x0300) >> 2) |
488 err = m5602_write_sensor(sd, OV9650_VREF, &i2c_data, 1);
491 i2c_data = val & 0xff;
492 err = m5602_write_sensor(sd, OV9650_GAIN, &i2c_data, 1);
496 int ov9650_get_red_balance(struct gspca_dev *gspca_dev, __s32 *val)
500 struct sd *sd = (struct sd *) gspca_dev;
502 err = m5602_read_sensor(sd, OV9650_RED, &i2c_data, 1);
505 PDEBUG(D_V4L2, "Read red gain %d", *val);
510 int ov9650_set_red_balance(struct gspca_dev *gspca_dev, __s32 val)
514 struct sd *sd = (struct sd *) gspca_dev;
516 PDEBUG(D_V4L2, "Set red gain to %d",
519 i2c_data = val & 0xff;
520 err = m5602_write_sensor(sd, OV9650_RED, &i2c_data, 1);
525 int ov9650_get_blue_balance(struct gspca_dev *gspca_dev, __s32 *val)
529 struct sd *sd = (struct sd *) gspca_dev;
531 err = m5602_read_sensor(sd, OV9650_BLUE, &i2c_data, 1);
534 PDEBUG(D_V4L2, "Read blue gain %d", *val);
539 int ov9650_set_blue_balance(struct gspca_dev *gspca_dev, __s32 val)
543 struct sd *sd = (struct sd *) gspca_dev;
545 PDEBUG(D_V4L2, "Set blue gain to %d",
548 i2c_data = val & 0xff;
549 err = m5602_write_sensor(sd, OV9650_BLUE, &i2c_data, 1);
554 int ov9650_get_hflip(struct gspca_dev *gspca_dev, __s32 *val)
558 struct sd *sd = (struct sd *) gspca_dev;
560 err = m5602_read_sensor(sd, OV9650_MVFP, &i2c_data, 1);
561 if (dmi_check_system(ov9650_flip_dmi_table))
562 *val = ((i2c_data & OV9650_HFLIP) >> 5) ? 0 : 1;
564 *val = (i2c_data & OV9650_HFLIP) >> 5;
565 PDEBUG(D_V4L2, "Read horizontal flip %d", *val);
570 int ov9650_set_hflip(struct gspca_dev *gspca_dev, __s32 val)
574 struct sd *sd = (struct sd *) gspca_dev;
576 PDEBUG(D_V4L2, "Set horizontal flip to %d", val);
577 err = m5602_read_sensor(sd, OV9650_MVFP, &i2c_data, 1);
581 if (dmi_check_system(ov9650_flip_dmi_table))
582 i2c_data = ((i2c_data & 0xdf) |
583 (((val ? 0 : 1) & 0x01) << 5));
585 i2c_data = ((i2c_data & 0xdf) |
586 ((val & 0x01) << 5));
588 err = m5602_write_sensor(sd, OV9650_MVFP, &i2c_data, 1);
593 int ov9650_get_vflip(struct gspca_dev *gspca_dev, __s32 *val)
597 struct sd *sd = (struct sd *) gspca_dev;
599 err = m5602_read_sensor(sd, OV9650_MVFP, &i2c_data, 1);
600 if (dmi_check_system(ov9650_flip_dmi_table))
601 *val = ((i2c_data & 0x10) >> 4) ? 0 : 1;
603 *val = (i2c_data & 0x10) >> 4;
604 PDEBUG(D_V4L2, "Read vertical flip %d", *val);
609 int ov9650_set_vflip(struct gspca_dev *gspca_dev, __s32 val)
613 struct sd *sd = (struct sd *) gspca_dev;
615 PDEBUG(D_V4L2, "Set vertical flip to %d", val);
616 err = m5602_read_sensor(sd, OV9650_MVFP, &i2c_data, 1);
620 if (dmi_check_system(ov9650_flip_dmi_table))
621 i2c_data = ((i2c_data & 0xef) |
622 (((val ? 0 : 1) & 0x01) << 4));
624 i2c_data = ((i2c_data & 0xef) |
625 ((val & 0x01) << 4));
627 err = m5602_write_sensor(sd, OV9650_MVFP, &i2c_data, 1);
632 int ov9650_get_brightness(struct gspca_dev *gspca_dev, __s32 *val)
636 struct sd *sd = (struct sd *) gspca_dev;
638 err = m5602_read_sensor(sd, OV9650_VREF, &i2c_data, 1);
641 *val = (i2c_data & 0x03) << 8;
643 err = m5602_read_sensor(sd, OV9650_GAIN, &i2c_data, 1);
645 PDEBUG(D_V4L2, "Read gain %d", *val);
650 int ov9650_set_brightness(struct gspca_dev *gspca_dev, __s32 val)
654 struct sd *sd = (struct sd *) gspca_dev;
656 PDEBUG(D_V4L2, "Set gain to %d", val & 0x3ff);
658 /* Read the OV9650_VREF register first to avoid
659 corrupting the VREF high and low bits */
660 err = m5602_read_sensor(sd, OV9650_VREF, &i2c_data, 1);
664 /* Mask away all uninteresting bits */
665 i2c_data = ((val & 0x0300) >> 2) | (i2c_data & 0x3F);
666 err = m5602_write_sensor(sd, OV9650_VREF, &i2c_data, 1);
671 i2c_data = val & 0xff;
672 err = m5602_write_sensor(sd, OV9650_GAIN, &i2c_data, 1);
677 int ov9650_get_auto_white_balance(struct gspca_dev *gspca_dev, __s32 *val)
681 struct sd *sd = (struct sd *) gspca_dev;
683 err = m5602_read_sensor(sd, OV9650_COM8, &i2c_data, 1);
684 *val = (i2c_data & OV9650_AWB_EN) >> 1;
685 PDEBUG(D_V4L2, "Read auto white balance %d", *val);
690 int ov9650_set_auto_white_balance(struct gspca_dev *gspca_dev, __s32 val)
694 struct sd *sd = (struct sd *) gspca_dev;
696 PDEBUG(D_V4L2, "Set auto white balance to %d", val);
697 err = m5602_read_sensor(sd, OV9650_COM8, &i2c_data, 1);
701 i2c_data = ((i2c_data & 0xfd) | ((val & 0x01) << 1));
702 err = m5602_write_sensor(sd, OV9650_COM8, &i2c_data, 1);
707 int ov9650_get_auto_gain(struct gspca_dev *gspca_dev, __s32 *val)
711 struct sd *sd = (struct sd *) gspca_dev;
713 err = m5602_read_sensor(sd, OV9650_COM8, &i2c_data, 1);
714 *val = (i2c_data & OV9650_AGC_EN) >> 2;
715 PDEBUG(D_V4L2, "Read auto gain control %d", *val);
720 int ov9650_set_auto_gain(struct gspca_dev *gspca_dev, __s32 val)
724 struct sd *sd = (struct sd *) gspca_dev;
726 PDEBUG(D_V4L2, "Set auto gain control to %d", val);
727 err = m5602_read_sensor(sd, OV9650_COM8, &i2c_data, 1);
731 i2c_data = ((i2c_data & 0xfb) | ((val & 0x01) << 2));
732 err = m5602_write_sensor(sd, OV9650_COM8, &i2c_data, 1);
737 static void ov9650_dump_registers(struct sd *sd)
740 info("Dumping the ov9650 register state");
741 for (address = 0; address < 0xa9; address++) {
743 m5602_read_sensor(sd, address, &value, 1);
744 info("register 0x%x contains 0x%x",
748 info("ov9650 register state dump complete");
750 info("Probing for which registers that are read/write");
751 for (address = 0; address < 0xff; address++) {
752 u8 old_value, ctrl_value;
753 u8 test_value[2] = {0xff, 0xff};
755 m5602_read_sensor(sd, address, &old_value, 1);
756 m5602_write_sensor(sd, address, test_value, 1);
757 m5602_read_sensor(sd, address, &ctrl_value, 1);
759 if (ctrl_value == test_value[0])
760 info("register 0x%x is writeable", address);
762 info("register 0x%x is read only", address);
764 /* Restore original value */
765 m5602_write_sensor(sd, address, &old_value, 1);