3 * device driver for Conexant 2388x based TV cards
4 * MPEG Transport Stream (DVB) routines
6 * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
7 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/device.h>
28 #include <linux/kthread.h>
29 #include <linux/file.h>
30 #include <linux/suspend.h>
34 #include <media/v4l2-common.h>
38 # include "mt352_priv.h"
39 # ifdef HAVE_VP3054_I2C
40 # include "cx88-vp3054-i2c.h"
53 # include "lgdt330x.h"
54 # include "fe_lgh06xf.h"
63 MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
64 MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
65 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
66 MODULE_LICENSE("GPL");
68 static unsigned int debug = 0;
69 module_param(debug, int, 0644);
70 MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
72 #define dprintk(level,fmt, arg...) if (debug >= level) \
73 printk(KERN_DEBUG "%s/2-dvb: " fmt, dev->core->name , ## arg)
75 /* ------------------------------------------------------------------ */
77 static int dvb_buf_setup(struct videobuf_queue *q,
78 unsigned int *count, unsigned int *size)
80 struct cx8802_dev *dev = q->priv_data;
82 dev->ts_packet_size = 188 * 4;
83 dev->ts_packet_count = 32;
85 *size = dev->ts_packet_size * dev->ts_packet_count;
90 static int dvb_buf_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
91 enum v4l2_field field)
93 struct cx8802_dev *dev = q->priv_data;
94 return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
97 static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
99 struct cx8802_dev *dev = q->priv_data;
100 cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
103 static void dvb_buf_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
105 cx88_free_buffer(q, (struct cx88_buffer*)vb);
108 static struct videobuf_queue_ops dvb_qops = {
109 .buf_setup = dvb_buf_setup,
110 .buf_prepare = dvb_buf_prepare,
111 .buf_queue = dvb_buf_queue,
112 .buf_release = dvb_buf_release,
115 /* ------------------------------------------------------------------ */
118 static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
120 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
121 static u8 reset [] = { RESET, 0x80 };
122 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
123 static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
124 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
125 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
127 mt352_write(fe, clock_config, sizeof(clock_config));
129 mt352_write(fe, reset, sizeof(reset));
130 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
132 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
133 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
134 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
138 static int dvico_dual_demod_init(struct dvb_frontend *fe)
140 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
141 static u8 reset [] = { RESET, 0x80 };
142 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
143 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
144 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
145 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
147 mt352_write(fe, clock_config, sizeof(clock_config));
149 mt352_write(fe, reset, sizeof(reset));
150 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
152 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
153 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
154 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
159 static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
161 static u8 clock_config [] = { 0x89, 0x38, 0x39 };
162 static u8 reset [] = { 0x50, 0x80 };
163 static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
164 static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
165 0x00, 0xFF, 0x00, 0x40, 0x40 };
166 static u8 dntv_extra[] = { 0xB5, 0x7A };
167 static u8 capt_range_cfg[] = { 0x75, 0x32 };
169 mt352_write(fe, clock_config, sizeof(clock_config));
171 mt352_write(fe, reset, sizeof(reset));
172 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
174 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
176 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
177 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
182 static struct mt352_config dvico_fusionhdtv = {
183 .demod_address = 0x0F,
184 .demod_init = dvico_fusionhdtv_demod_init,
187 static struct mt352_config dntv_live_dvbt_config = {
188 .demod_address = 0x0f,
189 .demod_init = dntv_live_dvbt_demod_init,
192 static struct mt352_config dvico_fusionhdtv_dual = {
193 .demod_address = 0x0F,
194 .demod_init = dvico_dual_demod_init,
197 #ifdef HAVE_VP3054_I2C
198 static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
200 static u8 clock_config [] = { 0x89, 0x38, 0x38 };
201 static u8 reset [] = { 0x50, 0x80 };
202 static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
203 static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
204 0x00, 0xFF, 0x00, 0x40, 0x40 };
205 static u8 dntv_extra[] = { 0xB5, 0x7A };
206 static u8 capt_range_cfg[] = { 0x75, 0x32 };
208 mt352_write(fe, clock_config, sizeof(clock_config));
210 mt352_write(fe, reset, sizeof(reset));
211 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
213 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
215 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
216 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
221 static int philips_fmd1216_pll_init(struct dvb_frontend *fe)
223 struct cx8802_dev *dev= fe->dvb->priv;
225 /* this message is to set up ATC and ALC */
226 static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
228 { .addr = dev->core->pll_addr, .flags = 0,
229 .buf = fmd1216_init, .len = sizeof(fmd1216_init) };
232 if (fe->ops->i2c_gate_ctrl)
233 fe->ops->i2c_gate_ctrl(fe, 1);
234 if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
244 static int dntv_live_dvbt_pro_tuner_set_params(struct dvb_frontend* fe,
245 struct dvb_frontend_parameters* params)
247 struct cx8802_dev *dev= fe->dvb->priv;
250 { .addr = dev->core->pll_addr, .flags = 0,
251 .buf = buf, .len = 4 };
254 /* Switch PLL to DVB mode */
255 err = philips_fmd1216_pll_init(fe);
260 dvb_pll_configure(dev->core->pll_desc, buf,
262 params->u.ofdm.bandwidth);
263 if (fe->ops->i2c_gate_ctrl)
264 fe->ops->i2c_gate_ctrl(fe, 1);
265 if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
267 printk(KERN_WARNING "cx88-dvb: %s error "
268 "(addr %02x <- %02x, err = %i)\n",
269 __FUNCTION__, dev->core->pll_addr, buf[0], err);
279 static struct mt352_config dntv_live_dvbt_pro_config = {
280 .demod_address = 0x0f,
282 .demod_init = dntv_live_dvbt_pro_demod_init,
288 static int dvico_hybrid_tuner_set_params(struct dvb_frontend *fe,
289 struct dvb_frontend_parameters *params)
292 struct cx8802_dev *dev= fe->dvb->priv;
294 { .addr = dev->core->pll_addr, .flags = 0,
295 .buf = pllbuf, .len = 4 };
298 dvb_pll_configure(dev->core->pll_desc, pllbuf,
300 params->u.ofdm.bandwidth);
302 if (fe->ops->i2c_gate_ctrl)
303 fe->ops->i2c_gate_ctrl(fe, 1);
304 if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
305 printk(KERN_WARNING "cx88-dvb: %s error "
306 "(addr %02x <- %02x, err = %i)\n",
307 __FUNCTION__, pllbuf[0], pllbuf[1], err);
317 static struct zl10353_config dvico_fusionhdtv_hybrid = {
318 .demod_address = 0x0F,
322 static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
323 .demod_address = 0x0F,
328 static struct cx22702_config connexant_refboard_config = {
329 .demod_address = 0x43,
330 .output_mode = CX22702_SERIAL_OUTPUT,
333 static struct cx22702_config hauppauge_novat_config = {
334 .demod_address = 0x43,
335 .output_mode = CX22702_SERIAL_OUTPUT,
337 static struct cx22702_config hauppauge_hvr1100_config = {
338 .demod_address = 0x63,
339 .output_mode = CX22702_SERIAL_OUTPUT,
344 static int or51132_set_ts_param(struct dvb_frontend* fe,
347 struct cx8802_dev *dev= fe->dvb->priv;
348 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
352 static struct or51132_config pchdtv_hd3000 = {
353 .demod_address = 0x15,
354 .set_ts_params = or51132_set_ts_param,
359 static int lgdt3302_tuner_set_params(struct dvb_frontend* fe,
360 struct dvb_frontend_parameters* params)
362 /* FIXME make this routine use the tuner-simple code.
363 * It could probably be shared with a number of ATSC
364 * frontends. Many share the same tuner with analog TV. */
366 struct cx8802_dev *dev= fe->dvb->priv;
367 struct cx88_core *core = dev->core;
370 { .addr = dev->core->pll_addr, .flags = 0, .buf = buf, .len = 4 };
373 dvb_pll_configure(core->pll_desc, buf, params->frequency, 0);
374 dprintk(1, "%s: tuner at 0x%02x bytes: 0x%02x 0x%02x 0x%02x 0x%02x\n",
375 __FUNCTION__, msg.addr, buf[0],buf[1],buf[2],buf[3]);
377 if (fe->ops->i2c_gate_ctrl)
378 fe->ops->i2c_gate_ctrl(fe, 1);
379 if ((err = i2c_transfer(&core->i2c_adap, &msg, 1)) != 1) {
380 printk(KERN_WARNING "cx88-dvb: %s error "
381 "(addr %02x <- %02x, err = %i)\n",
382 __FUNCTION__, buf[0], buf[1], err);
391 static int lgdt3303_tuner_set_params(struct dvb_frontend* fe,
392 struct dvb_frontend_parameters* params)
394 struct cx8802_dev *dev= fe->dvb->priv;
395 struct cx88_core *core = dev->core;
397 /* Put the analog decoder in standby to keep it quiet */
398 cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
400 return lg_h06xf_pll_set(fe, &core->i2c_adap, params);
403 static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
405 struct cx8802_dev *dev= fe->dvb->priv;
406 struct cx88_core *core = dev->core;
408 dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
410 cx_clear(MO_GP0_IO, 8);
412 cx_set(MO_GP0_IO, 8);
416 static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
418 struct cx8802_dev *dev= fe->dvb->priv;
420 dev->ts_gen_cntrl |= 0x04;
422 dev->ts_gen_cntrl &= ~0x04;
426 static struct lgdt330x_config fusionhdtv_3_gold = {
427 .demod_address = 0x0e,
428 .demod_chip = LGDT3302,
429 .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
430 .set_ts_params = lgdt330x_set_ts_param,
433 static struct lgdt330x_config fusionhdtv_5_gold = {
434 .demod_address = 0x0e,
435 .demod_chip = LGDT3303,
436 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
437 .set_ts_params = lgdt330x_set_ts_param,
440 static struct lgdt330x_config pchdtv_hd5500 = {
441 .demod_address = 0x59,
442 .demod_chip = LGDT3303,
443 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
444 .set_ts_params = lgdt330x_set_ts_param,
449 static int nxt200x_set_ts_param(struct dvb_frontend* fe,
452 struct cx8802_dev *dev= fe->dvb->priv;
453 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
457 static int nxt200x_set_pll_input(u8* buf, int input)
466 static struct nxt200x_config ati_hdtvwonder = {
467 .demod_address = 0x0a,
468 .set_pll_input = nxt200x_set_pll_input,
469 .set_ts_params = nxt200x_set_ts_param,
474 static int cx24123_set_ts_param(struct dvb_frontend* fe,
477 struct cx8802_dev *dev= fe->dvb->priv;
478 dev->ts_gen_cntrl = 0x2;
482 static void cx24123_enable_lnb_voltage(struct dvb_frontend* fe, int on)
484 struct cx8802_dev *dev= fe->dvb->priv;
485 struct cx88_core *core = dev->core;
488 cx_write(MO_GP0_IO, 0x000006f9);
490 cx_write(MO_GP0_IO, 0x000006fB);
493 static struct cx24123_config hauppauge_novas_config = {
494 .demod_address = 0x55,
496 .set_ts_params = cx24123_set_ts_param,
499 static struct cx24123_config kworld_dvbs_100_config = {
500 .demod_address = 0x15,
502 .set_ts_params = cx24123_set_ts_param,
503 .enable_lnb_voltage = cx24123_enable_lnb_voltage,
507 static int dvb_register(struct cx8802_dev *dev)
509 /* init struct videobuf_dvb */
510 dev->dvb.name = dev->core->name;
511 dev->ts_gen_cntrl = 0x0c;
514 switch (dev->core->board) {
516 case CX88_BOARD_HAUPPAUGE_DVB_T1:
517 dev->dvb.frontend = cx22702_attach(&hauppauge_novat_config,
518 &dev->core->i2c_adap);
519 if (dev->dvb.frontend != NULL) {
520 dvb_pll_attach(dev->dvb.frontend, 0x61, &dev->core->i2c_adap, &dvb_pll_thomson_dtt759x);
523 case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
524 case CX88_BOARD_CONEXANT_DVB_T1:
525 case CX88_BOARD_KWORLD_DVB_T_CX22702:
526 case CX88_BOARD_WINFAST_DTV1000:
527 dev->dvb.frontend = cx22702_attach(&connexant_refboard_config,
528 &dev->core->i2c_adap);
529 if (dev->dvb.frontend != NULL) {
530 dvb_pll_attach(dev->dvb.frontend, 0x60, &dev->core->i2c_adap, &dvb_pll_thomson_dtt7579);
533 case CX88_BOARD_HAUPPAUGE_HVR1100:
534 case CX88_BOARD_HAUPPAUGE_HVR1100LP:
535 dev->dvb.frontend = cx22702_attach(&hauppauge_hvr1100_config,
536 &dev->core->i2c_adap);
537 if (dev->dvb.frontend != NULL) {
538 dvb_pll_attach(dev->dvb.frontend, 0x61, &dev->core->i2c_adap, &dvb_pll_fmd1216me);
542 #if defined(HAVE_MT352) || defined(HAVE_ZL10353)
543 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
545 dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv,
546 &dev->core->i2c_adap);
547 if (dev->dvb.frontend != NULL) {
548 dvb_pll_attach(dev->dvb.frontend, 0x60, &dev->core->i2c_adap, &dvb_pll_thomson_dtt7579);
553 /* ZL10353 replaces MT352 on later cards */
554 dev->dvb.frontend = zl10353_attach(&dvico_fusionhdtv_plus_v1_1,
555 &dev->core->i2c_adap);
556 if (dev->dvb.frontend != NULL) {
557 dvb_pll_attach(dev->dvb.frontend, 0x60, &dev->core->i2c_adap, &dvb_pll_thomson_dtt7579);
561 #endif /* HAVE_MT352 || HAVE_ZL10353 */
563 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
564 dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv,
565 &dev->core->i2c_adap);
566 if (dev->dvb.frontend != NULL) {
567 dvb_pll_attach(dev->dvb.frontend, 0x61, &dev->core->i2c_adap, &dvb_pll_lg_z201);
570 case CX88_BOARD_KWORLD_DVB_T:
571 case CX88_BOARD_DNTV_LIVE_DVB_T:
572 case CX88_BOARD_ADSTECH_DVB_T_PCI:
573 dev->dvb.frontend = mt352_attach(&dntv_live_dvbt_config,
574 &dev->core->i2c_adap);
575 if (dev->dvb.frontend != NULL) {
576 dvb_pll_attach(dev->dvb.frontend, 0x61, &dev->core->i2c_adap, &dvb_pll_unknown_1);
579 case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
580 #ifdef HAVE_VP3054_I2C
581 dev->core->pll_addr = 0x61;
582 dev->core->pll_desc = &dvb_pll_fmd1216me;
583 dev->dvb.frontend = mt352_attach(&dntv_live_dvbt_pro_config,
584 &((struct vp3054_i2c_state *)dev->card_priv)->adap);
585 if (dev->dvb.frontend != NULL) {
586 dev->dvb.frontend->ops->tuner_ops.set_params = dntv_live_dvbt_pro_tuner_set_params;
589 printk("%s: built without vp3054 support\n", dev->core->name);
592 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
593 /* The tin box says DEE1601, but it seems to be DTT7579
594 * compatible, with a slightly different MT352 AGC gain. */
595 dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv_dual,
596 &dev->core->i2c_adap);
597 if (dev->dvb.frontend != NULL) {
598 dvb_pll_attach(dev->dvb.frontend, 0x61, &dev->core->i2c_adap, &dvb_pll_thomson_dtt7579);
603 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
604 dev->core->pll_addr = 0x61;
605 dev->core->pll_desc = &dvb_pll_thomson_fe6600;
606 dev->dvb.frontend = zl10353_attach(&dvico_fusionhdtv_hybrid,
607 &dev->core->i2c_adap);
608 if (dev->dvb.frontend != NULL) {
609 dev->dvb.frontend->ops->tuner_ops.set_params = dvico_hybrid_tuner_set_params;
614 case CX88_BOARD_PCHDTV_HD3000:
615 dev->dvb.frontend = or51132_attach(&pchdtv_hd3000,
616 &dev->core->i2c_adap);
617 if (dev->dvb.frontend != NULL) {
618 dvb_pll_attach(dev->dvb.frontend, 0x61, &dev->core->i2c_adap, &dvb_pll_thomson_dtt761x);
623 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
624 dev->ts_gen_cntrl = 0x08;
626 /* Do a hardware reset of chip before using it. */
627 struct cx88_core *core = dev->core;
629 cx_clear(MO_GP0_IO, 1);
631 cx_set(MO_GP0_IO, 1);
634 /* Select RF connector callback */
635 fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
636 dev->core->pll_addr = 0x61;
637 dev->core->pll_desc = &dvb_pll_microtune_4042;
638 dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_3_gold,
639 &dev->core->i2c_adap);
640 if (dev->dvb.frontend != NULL) {
641 dev->dvb.frontend->ops->tuner_ops.set_params = lgdt3302_tuner_set_params;
645 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
646 dev->ts_gen_cntrl = 0x08;
648 /* Do a hardware reset of chip before using it. */
649 struct cx88_core *core = dev->core;
651 cx_clear(MO_GP0_IO, 1);
653 cx_set(MO_GP0_IO, 9);
655 dev->core->pll_addr = 0x61;
656 dev->core->pll_desc = &dvb_pll_thomson_dtt761x;
657 dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_3_gold,
658 &dev->core->i2c_adap);
659 if (dev->dvb.frontend != NULL) {
660 dev->dvb.frontend->ops->tuner_ops.set_params = lgdt3302_tuner_set_params;
664 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
665 dev->ts_gen_cntrl = 0x08;
667 /* Do a hardware reset of chip before using it. */
668 struct cx88_core *core = dev->core;
670 cx_clear(MO_GP0_IO, 1);
672 cx_set(MO_GP0_IO, 1);
674 dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_5_gold,
675 &dev->core->i2c_adap);
676 if (dev->dvb.frontend != NULL) {
677 dev->dvb.frontend->ops->tuner_ops.set_params = lgdt3303_tuner_set_params;
681 case CX88_BOARD_PCHDTV_HD5500:
682 dev->ts_gen_cntrl = 0x08;
684 /* Do a hardware reset of chip before using it. */
685 struct cx88_core *core = dev->core;
687 cx_clear(MO_GP0_IO, 1);
689 cx_set(MO_GP0_IO, 1);
691 dev->dvb.frontend = lgdt330x_attach(&pchdtv_hd5500,
692 &dev->core->i2c_adap);
693 if (dev->dvb.frontend != NULL) {
694 dev->dvb.frontend->ops->tuner_ops.set_params = lgdt3303_tuner_set_params;
700 case CX88_BOARD_ATI_HDTVWONDER:
701 dev->dvb.frontend = nxt200x_attach(&ati_hdtvwonder,
702 &dev->core->i2c_adap);
703 if (dev->dvb.frontend != NULL) {
704 dvb_pll_attach(dev->dvb.frontend, 0x61, &dev->core->i2c_adap, &dvb_pll_tuv1236d);
709 case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
710 case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
711 dev->dvb.frontend = cx24123_attach(&hauppauge_novas_config,
712 &dev->core->i2c_adap);
714 case CX88_BOARD_KWORLD_DVBS_100:
715 dev->dvb.frontend = cx24123_attach(&kworld_dvbs_100_config,
716 &dev->core->i2c_adap);
720 printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n",
724 if (NULL == dev->dvb.frontend) {
725 printk("%s: frontend initialization failed\n",dev->core->name);
729 if (dev->core->pll_desc) {
730 dev->dvb.frontend->ops->info.frequency_min = dev->core->pll_desc->min;
731 dev->dvb.frontend->ops->info.frequency_max = dev->core->pll_desc->max;
734 /* Put the analog decoder in standby to keep it quiet */
735 cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
737 /* register everything */
738 return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
741 /* ----------------------------------------------------------- */
743 static int __devinit dvb_probe(struct pci_dev *pci_dev,
744 const struct pci_device_id *pci_id)
746 struct cx8802_dev *dev;
747 struct cx88_core *core;
751 core = cx88_core_get(pci_dev);
756 if (!cx88_boards[core->board].dvb)
760 dev = kzalloc(sizeof(*dev),GFP_KERNEL);
766 err = cx8802_init_common(dev);
770 #ifdef HAVE_VP3054_I2C
771 err = vp3054_i2c_probe(dev);
777 printk("%s/2: cx2388x based dvb card\n", core->name);
778 videobuf_queue_init(&dev->dvb.dvbq, &dvb_qops,
779 dev->pci, &dev->slock,
780 V4L2_BUF_TYPE_VIDEO_CAPTURE,
782 sizeof(struct cx88_buffer),
784 err = dvb_register(dev);
788 /* Maintain a reference to cx88-video can query the 8802 device. */
793 cx8802_fini_common(dev);
797 cx88_core_put(core,pci_dev);
801 static void __devexit dvb_remove(struct pci_dev *pci_dev)
803 struct cx8802_dev *dev = pci_get_drvdata(pci_dev);
805 /* Destroy any 8802 reference. */
806 dev->core->dvbdev = NULL;
809 videobuf_dvb_unregister(&dev->dvb);
811 #ifdef HAVE_VP3054_I2C
812 vp3054_i2c_remove(dev);
816 cx8802_fini_common(dev);
817 cx88_core_put(dev->core,dev->pci);
821 static struct pci_device_id cx8802_pci_tbl[] = {
825 .subvendor = PCI_ANY_ID,
826 .subdevice = PCI_ANY_ID,
828 /* --- end of list --- */
831 MODULE_DEVICE_TABLE(pci, cx8802_pci_tbl);
833 static struct pci_driver dvb_pci_driver = {
835 .id_table = cx8802_pci_tbl,
837 .remove = __devexit_p(dvb_remove),
838 .suspend = cx8802_suspend_common,
839 .resume = cx8802_resume_common,
842 static int dvb_init(void)
844 printk(KERN_INFO "cx2388x dvb driver version %d.%d.%d loaded\n",
845 (CX88_VERSION_CODE >> 16) & 0xff,
846 (CX88_VERSION_CODE >> 8) & 0xff,
847 CX88_VERSION_CODE & 0xff);
849 printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
850 SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
852 return pci_register_driver(&dvb_pci_driver);
855 static void dvb_fini(void)
857 pci_unregister_driver(&dvb_pci_driver);
860 module_init(dvb_init);
861 module_exit(dvb_fini);
866 * compile-command: "make DVB=1"