drivers/media/video/cx23885/cx23885-cards.c

   1 /*
   2  *  Driver for the Conexant CX23885 PCIe bridge
   3  *
   4  *  Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
   5  *
   6  *  This program is free software; you can redistribute it and/or modify
   7  *  it under the terms of the GNU General Public License as published by
   8  *  the Free Software Foundation; either version 2 of the License, or
   9  *  (at your option) any later version.
  10  *
  11  *  This program is distributed in the hope that it will be useful,
  12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *
  15  *  GNU General Public License for more details.
  16  *
  17  *  You should have received a copy of the GNU General Public License
  18  *  along with this program; if not, write to the Free Software
  19  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20  */
  21
  22 #include <linux/init.h>
  23 #include <linux/module.h>
  24 #include <linux/pci.h>
  25 #include <linux/delay.h>
  26 #include <media/cx25840.h>
  27 #include <linux/firmware.h>
  28
  29 #include "../../../staging/altera-stapl/altera.h"
  30 #include "cx23885.h"
  31 #include "tuner-xc2028.h"
  32 #include "netup-init.h"
  33 #include "altera-ci.h"
  34 #include "xc4000.h"
  35 #include "xc5000.h"
  36 #include "cx23888-ir.h"
  37
  38 static unsigned int enable_885_ir;
  39 module_param(enable_885_ir, int, 0644);
  40 MODULE_PARM_DESC(enable_885_ir,
  41                  "Enable integrated IR controller for supported\n"
  42                  "\t\t    CX2388[57] boards that are wired for it:\n"
  43                  "\t\t\tHVR-1250 (reported safe)\n"
  44                  "\t\t\tTeVii S470 (reported unsafe)\n"
  45                  "\t\t    This can cause an interrupt storm with some cards.\n"
  46                  "\t\t    Default: 0 [Disabled]");
  47
  48 /* ------------------------------------------------------------------ */
  49 /* board config info                                                  */
  50
  51 struct cx23885_board cx23885_boards[] = {
  52         [CX23885_BOARD_UNKNOWN] = {
  53                 .name           = "UNKNOWN/GENERIC",
  54                 /* Ensure safe default for unknown boards */
  55                 .clk_freq       = 0,
  56                 .input          = {{
  57                         .type   = CX23885_VMUX_COMPOSITE1,
  58                         .vmux   = 0,
  59                 }, {
  60                         .type   = CX23885_VMUX_COMPOSITE2,
  61                         .vmux   = 1,
  62                 }, {
  63                         .type   = CX23885_VMUX_COMPOSITE3,
  64                         .vmux   = 2,
  65                 }, {
  66                         .type   = CX23885_VMUX_COMPOSITE4,
  67                         .vmux   = 3,
  68                 } },
  69         },
  70         [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
  71                 .name           = "Hauppauge WinTV-HVR1800lp",
  72                 .portc          = CX23885_MPEG_DVB,
  73                 .input          = {{
  74                         .type   = CX23885_VMUX_TELEVISION,
  75                         .vmux   = 0,
  76                         .gpio0  = 0xff00,
  77                 }, {
  78                         .type   = CX23885_VMUX_DEBUG,
  79                         .vmux   = 0,
  80                         .gpio0  = 0xff01,
  81                 }, {
  82                         .type   = CX23885_VMUX_COMPOSITE1,
  83                         .vmux   = 1,
  84                         .gpio0  = 0xff02,
  85                 }, {
  86                         .type   = CX23885_VMUX_SVIDEO,
  87                         .vmux   = 2,
  88                         .gpio0  = 0xff02,
  89                 } },
  90         },
  91         [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
  92                 .name           = "Hauppauge WinTV-HVR1800",
  93                 .porta          = CX23885_ANALOG_VIDEO,
  94                 .portb          = CX23885_MPEG_ENCODER,
  95                 .portc          = CX23885_MPEG_DVB,
  96                 .tuner_type     = TUNER_PHILIPS_TDA8290,
  97                 .tuner_addr     = 0x42, /* 0x84 >> 1 */
  98                 .tuner_bus      = 1,
  99                 .input          = {{
 100                         .type   = CX23885_VMUX_TELEVISION,
 101                         .vmux   =       CX25840_VIN7_CH3 |
 102                                         CX25840_VIN5_CH2 |
 103                                         CX25840_VIN2_CH1,
 104                         .gpio0  = 0,
 105                 }, {
 106                         .type   = CX23885_VMUX_COMPOSITE1,
 107                         .vmux   =       CX25840_VIN7_CH3 |
 108                                         CX25840_VIN4_CH2 |
 109                                         CX25840_VIN6_CH1,
 110                         .gpio0  = 0,
 111                 }, {
 112                         .type   = CX23885_VMUX_SVIDEO,
 113                         .vmux   =       CX25840_VIN7_CH3 |
 114                                         CX25840_VIN4_CH2 |
 115                                         CX25840_VIN8_CH1 |
 116                                         CX25840_SVIDEO_ON,
 117                         .gpio0  = 0,
 118                 } },
 119         },
 120         [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
 121                 .name           = "Hauppauge WinTV-HVR1250",
 122                 .portc          = CX23885_MPEG_DVB,
 123                 .input          = {{
 124                         .type   = CX23885_VMUX_TELEVISION,
 125                         .vmux   = 0,
 126                         .gpio0  = 0xff00,
 127                 }, {
 128                         .type   = CX23885_VMUX_DEBUG,
 129                         .vmux   = 0,
 130                         .gpio0  = 0xff01,
 131                 }, {
 132                         .type   = CX23885_VMUX_COMPOSITE1,
 133                         .vmux   = 1,
 134                         .gpio0  = 0xff02,
 135                 }, {
 136                         .type   = CX23885_VMUX_SVIDEO,
 137                         .vmux   = 2,
 138                         .gpio0  = 0xff02,
 139                 } },
 140         },
 141         [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
 142                 .name           = "DViCO FusionHDTV5 Express",
 143                 .portb          = CX23885_MPEG_DVB,
 144         },
 145         [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
 146                 .name           = "Hauppauge WinTV-HVR1500Q",
 147                 .portc          = CX23885_MPEG_DVB,
 148         },
 149         [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
 150                 .name           = "Hauppauge WinTV-HVR1500",
 151                 .portc          = CX23885_MPEG_DVB,
 152         },
 153         [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
 154                 .name           = "Hauppauge WinTV-HVR1200",
 155                 .portc          = CX23885_MPEG_DVB,
 156         },
 157         [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
 158                 .name           = "Hauppauge WinTV-HVR1700",
 159                 .portc          = CX23885_MPEG_DVB,
 160         },
 161         [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
 162                 .name           = "Hauppauge WinTV-HVR1400",
 163                 .portc          = CX23885_MPEG_DVB,
 164         },
 165         [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
 166                 .name           = "DViCO FusionHDTV7 Dual Express",
 167                 .portb          = CX23885_MPEG_DVB,
 168                 .portc          = CX23885_MPEG_DVB,
 169         },
 170         [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
 171                 .name           = "DViCO FusionHDTV DVB-T Dual Express",
 172                 .portb          = CX23885_MPEG_DVB,
 173                 .portc          = CX23885_MPEG_DVB,
 174         },
 175         [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
 176                 .name           = "Leadtek Winfast PxDVR3200 H",
 177                 .portc          = CX23885_MPEG_DVB,
 178         },
 179         [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000] = {
 180                 .name           = "Leadtek Winfast PxDVR3200 H XC4000",
 181                 .porta          = CX23885_ANALOG_VIDEO,
 182                 .portc          = CX23885_MPEG_DVB,
 183                 .tuner_type     = TUNER_XC4000,
 184                 .tuner_addr     = 0x61,
 185                 .radio_type     = TUNER_XC4000,
 186                 .radio_addr     = 0x61,
 187                 .input          = {{
 188                         .type   = CX23885_VMUX_TELEVISION,
 189                         .vmux   = CX25840_VIN2_CH1 |
 190                                   CX25840_VIN5_CH2 |
 191                                   CX25840_NONE0_CH3,
 192                 }, {
 193                         .type   = CX23885_VMUX_COMPOSITE1,
 194                         .vmux   = CX25840_COMPOSITE1,
 195                 }, {
 196                         .type   = CX23885_VMUX_SVIDEO,
 197                         .vmux   = CX25840_SVIDEO_LUMA3 |
 198                                   CX25840_SVIDEO_CHROMA4,
 199                 }, {
 200                         .type   = CX23885_VMUX_COMPONENT,
 201                         .vmux   = CX25840_VIN7_CH1 |
 202                                   CX25840_VIN6_CH2 |
 203                                   CX25840_VIN8_CH3 |
 204                                   CX25840_COMPONENT_ON,
 205                 } },
 206         },
 207         [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
 208                 .name           = "Compro VideoMate E650F",
 209                 .portc          = CX23885_MPEG_DVB,
 210         },
 211         [CX23885_BOARD_TBS_6920] = {
 212                 .name           = "TurboSight TBS 6920",
 213                 .portb          = CX23885_MPEG_DVB,
 214         },
 215         [CX23885_BOARD_TEVII_S470] = {
 216                 .name           = "TeVii S470",
 217                 .portb          = CX23885_MPEG_DVB,
 218         },
 219         [CX23885_BOARD_DVBWORLD_2005] = {
 220                 .name           = "DVBWorld DVB-S2 2005",
 221                 .portb          = CX23885_MPEG_DVB,
 222         },
 223         [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
 224                 .ci_type        = 1,
 225                 .name           = "NetUP Dual DVB-S2 CI",
 226                 .portb          = CX23885_MPEG_DVB,
 227                 .portc          = CX23885_MPEG_DVB,
 228         },
 229         [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
 230                 .name           = "Hauppauge WinTV-HVR1270",
 231                 .portc          = CX23885_MPEG_DVB,
 232         },
 233         [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
 234                 .name           = "Hauppauge WinTV-HVR1275",
 235                 .portc          = CX23885_MPEG_DVB,
 236         },
 237         [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
 238                 .name           = "Hauppauge WinTV-HVR1255",
 239                 .portc          = CX23885_MPEG_DVB,
 240         },
 241         [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
 242                 .name           = "Hauppauge WinTV-HVR1210",
 243                 .portc          = CX23885_MPEG_DVB,
 244         },
 245         [CX23885_BOARD_MYGICA_X8506] = {
 246                 .name           = "Mygica X8506 DMB-TH",
 247                 .tuner_type = TUNER_XC5000,
 248                 .tuner_addr = 0x61,
 249                 .tuner_bus      = 1,
 250                 .porta          = CX23885_ANALOG_VIDEO,
 251                 .portb          = CX23885_MPEG_DVB,
 252                 .input          = {
 253                         {
 254                                 .type   = CX23885_VMUX_TELEVISION,
 255                                 .vmux   = CX25840_COMPOSITE2,
 256                         },
 257                         {
 258                                 .type   = CX23885_VMUX_COMPOSITE1,
 259                                 .vmux   = CX25840_COMPOSITE8,
 260                         },
 261                         {
 262                                 .type   = CX23885_VMUX_SVIDEO,
 263                                 .vmux   = CX25840_SVIDEO_LUMA3 |
 264                                                 CX25840_SVIDEO_CHROMA4,
 265                         },
 266                         {
 267                                 .type   = CX23885_VMUX_COMPONENT,
 268                                 .vmux   = CX25840_COMPONENT_ON |
 269                                         CX25840_VIN1_CH1 |
 270                                         CX25840_VIN6_CH2 |
 271                                         CX25840_VIN7_CH3,
 272                         },
 273                 },
 274         },
 275         [CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
 276                 .name           = "Magic-Pro ProHDTV Extreme 2",
 277                 .tuner_type = TUNER_XC5000,
 278                 .tuner_addr = 0x61,
 279                 .tuner_bus      = 1,
 280                 .porta          = CX23885_ANALOG_VIDEO,
 281                 .portb          = CX23885_MPEG_DVB,
 282                 .input          = {
 283                         {
 284                                 .type   = CX23885_VMUX_TELEVISION,
 285                                 .vmux   = CX25840_COMPOSITE2,
 286                         },
 287                         {
 288                                 .type   = CX23885_VMUX_COMPOSITE1,
 289                                 .vmux   = CX25840_COMPOSITE8,
 290                         },
 291                         {
 292                                 .type   = CX23885_VMUX_SVIDEO,
 293                                 .vmux   = CX25840_SVIDEO_LUMA3 |
 294                                                 CX25840_SVIDEO_CHROMA4,
 295                         },
 296                         {
 297                                 .type   = CX23885_VMUX_COMPONENT,
 298                                 .vmux   = CX25840_COMPONENT_ON |
 299                                         CX25840_VIN1_CH1 |
 300                                         CX25840_VIN6_CH2 |
 301                                         CX25840_VIN7_CH3,
 302                         },
 303                 },
 304         },
 305         [CX23885_BOARD_HAUPPAUGE_HVR1850] = {
 306                 .name           = "Hauppauge WinTV-HVR1850",
 307                 .portb          = CX23885_MPEG_ENCODER,
 308                 .portc          = CX23885_MPEG_DVB,
 309         },
 310         [CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
 311                 .name           = "Compro VideoMate E800",
 312                 .portc          = CX23885_MPEG_DVB,
 313         },
 314         [CX23885_BOARD_HAUPPAUGE_HVR1290] = {
 315                 .name           = "Hauppauge WinTV-HVR1290",
 316                 .portc          = CX23885_MPEG_DVB,
 317         },
 318         [CX23885_BOARD_MYGICA_X8558PRO] = {
 319                 .name           = "Mygica X8558 PRO DMB-TH",
 320                 .portb          = CX23885_MPEG_DVB,
 321                 .portc          = CX23885_MPEG_DVB,
 322         },
 323         [CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = {
 324                 .name           = "LEADTEK WinFast PxTV1200",
 325                 .porta          = CX23885_ANALOG_VIDEO,
 326                 .tuner_type     = TUNER_XC2028,
 327                 .tuner_addr     = 0x61,
 328                 .tuner_bus      = 1,
 329                 .input          = {{
 330                         .type   = CX23885_VMUX_TELEVISION,
 331                         .vmux   = CX25840_VIN2_CH1 |
 332                                   CX25840_VIN5_CH2 |
 333                                   CX25840_NONE0_CH3,
 334                 }, {
 335                         .type   = CX23885_VMUX_COMPOSITE1,
 336                         .vmux   = CX25840_COMPOSITE1,
 337                 }, {
 338                         .type   = CX23885_VMUX_SVIDEO,
 339                         .vmux   = CX25840_SVIDEO_LUMA3 |
 340                                   CX25840_SVIDEO_CHROMA4,
 341                 }, {
 342                         .type   = CX23885_VMUX_COMPONENT,
 343                         .vmux   = CX25840_VIN7_CH1 |
 344                                   CX25840_VIN6_CH2 |
 345                                   CX25840_VIN8_CH3 |
 346                                   CX25840_COMPONENT_ON,
 347                 } },
 348         },
 349         [CX23885_BOARD_GOTVIEW_X5_3D_HYBRID] = {
 350                 .name           = "GoTView X5 3D Hybrid",
 351                 .tuner_type     = TUNER_XC5000,
 352                 .tuner_addr     = 0x64,
 353                 .tuner_bus      = 1,
 354                 .porta          = CX23885_ANALOG_VIDEO,
 355                 .portb          = CX23885_MPEG_DVB,
 356                 .input          = {{
 357                         .type   = CX23885_VMUX_TELEVISION,
 358                         .vmux   = CX25840_VIN2_CH1 |
 359                                   CX25840_VIN5_CH2,
 360                         .gpio0  = 0x02,
 361                 }, {
 362                         .type   = CX23885_VMUX_COMPOSITE1,
 363                         .vmux   = CX23885_VMUX_COMPOSITE1,
 364                 }, {
 365                         .type   = CX23885_VMUX_SVIDEO,
 366                         .vmux   = CX25840_SVIDEO_LUMA3 |
 367                                   CX25840_SVIDEO_CHROMA4,
 368                 } },
 369         },
 370         [CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF] = {
 371                 .ci_type        = 2,
 372                 .name           = "NetUP Dual DVB-T/C-CI RF",
 373                 .porta          = CX23885_ANALOG_VIDEO,
 374                 .portb          = CX23885_MPEG_DVB,
 375                 .portc          = CX23885_MPEG_DVB,
 376                 .num_fds_portb  = 2,
 377                 .num_fds_portc  = 2,
 378                 .tuner_type     = TUNER_XC5000,
 379                 .tuner_addr     = 0x64,
 380                 .input          = { {
 381                                 .type   = CX23885_VMUX_TELEVISION,
 382                                 .vmux   = CX25840_COMPOSITE1,
 383                 } },
 384         },
 385 };
 386 const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
 387
 388 /* ------------------------------------------------------------------ */
 389 /* PCI subsystem IDs                                                  */
 390
 391 struct cx23885_subid cx23885_subids[] = {
 392         {
 393                 .subvendor = 0x0070,
 394                 .subdevice = 0x3400,
 395                 .card      = CX23885_BOARD_UNKNOWN,
 396         }, {
 397                 .subvendor = 0x0070,
 398                 .subdevice = 0x7600,
 399                 .card      = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
 400         }, {
 401                 .subvendor = 0x0070,
 402                 .subdevice = 0x7800,
 403                 .card      = CX23885_BOARD_HAUPPAUGE_HVR1800,
 404         }, {
 405                 .subvendor = 0x0070,
 406                 .subdevice = 0x7801,
 407                 .card      = CX23885_BOARD_HAUPPAUGE_HVR1800,
 408         }, {
 409                 .subvendor = 0x0070,
 410                 .subdevice = 0x7809,
 411                 .card      = CX23885_BOARD_HAUPPAUGE_HVR1800,
 412         }, {
 413                 .subvendor = 0x0070,
 414                 .subdevice = 0x7911,
 415                 .card      = CX23885_BOARD_HAUPPAUGE_HVR1250,
 416         }, {
 417                 .subvendor = 0x18ac,
 418                 .subdevice = 0xd500,
 419                 .card      = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
 420         }, {
 421                 .subvendor = 0x0070,
 422                 .subdevice = 0x7790,
 423                 .card      = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
 424         }, {
 425                 .subvendor = 0x0070,
 426                 .subdevice = 0x7797,
 427                 .card      = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
 428         }, {
 429                 .subvendor = 0x0070,
 430                 .subdevice = 0x7710,
 431                 .card      = CX23885_BOARD_HAUPPAUGE_HVR1500,
 432         }, {
 433                 .subvendor = 0x0070,
 434                 .subdevice = 0x7717,
 435                 .card      = CX23885_BOARD_HAUPPAUGE_HVR1500,
 436         }, {
 437                 .subvendor = 0x0070,
 438                 .subdevice = 0x71d1,
 439                 .card      = CX23885_BOARD_HAUPPAUGE_HVR1200,
 440         }, {
 441                 .subvendor = 0x0070,
 442                 .subdevice = 0x71d3,
 443                 .card      = CX23885_BOARD_HAUPPAUGE_HVR1200,
 444         }, {
 445                 .subvendor = 0x0070,
 446                 .subdevice = 0x8101,
 447                 .card      = CX23885_BOARD_HAUPPAUGE_HVR1700,
 448         }, {
 449                 .subvendor = 0x0070,
 450                 .subdevice = 0x8010,
 451                 .card      = CX23885_BOARD_HAUPPAUGE_HVR1400,
 452         }, {
 453                 .subvendor = 0x18ac,
 454                 .subdevice = 0xd618,
 455                 .card      = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
 456         }, {
 457                 .subvendor = 0x18ac,
 458                 .subdevice = 0xdb78,
 459                 .card      = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
 460         }, {
 461                 .subvendor = 0x107d,
 462                 .subdevice = 0x6681,
 463                 .card      = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
 464         }, {
 465                 .subvendor = 0x107d,
 466                 .subdevice = 0x6f39,
 467                 .card      = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000,
 468         }, {
 469                 .subvendor = 0x185b,
 470                 .subdevice = 0xe800,
 471                 .card      = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
 472         }, {
 473                 .subvendor = 0x6920,
 474                 .subdevice = 0x8888,
 475                 .card      = CX23885_BOARD_TBS_6920,
 476         }, {
 477                 .subvendor = 0xd470,
 478                 .subdevice = 0x9022,
 479                 .card      = CX23885_BOARD_TEVII_S470,
 480         }, {
 481                 .subvendor = 0x0001,
 482                 .subdevice = 0x2005,
 483                 .card      = CX23885_BOARD_DVBWORLD_2005,
 484         }, {
 485                 .subvendor = 0x1b55,
 486                 .subdevice = 0x2a2c,
 487                 .card      = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
 488         }, {
 489                 .subvendor = 0x0070,
 490                 .subdevice = 0x2211,
 491                 .card      = CX23885_BOARD_HAUPPAUGE_HVR1270,
 492         }, {
 493                 .subvendor = 0x0070,
 494                 .subdevice = 0x2215,
 495                 .card      = CX23885_BOARD_HAUPPAUGE_HVR1275,
 496         }, {
 497                 .subvendor = 0x0070,
 498                 .subdevice = 0x221d,
 499                 .card      = CX23885_BOARD_HAUPPAUGE_HVR1275,
 500         }, {
 501                 .subvendor = 0x0070,
 502                 .subdevice = 0x2251,
 503                 .card      = CX23885_BOARD_HAUPPAUGE_HVR1255,
 504         }, {
 505                 .subvendor = 0x0070,
 506                 .subdevice = 0x2259,
 507                 .card      = CX23885_BOARD_HAUPPAUGE_HVR1255,
 508         }, {
 509                 .subvendor = 0x0070,
 510                 .subdevice = 0x2291,
 511                 .card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
 512         }, {
 513                 .subvendor = 0x0070,
 514                 .subdevice = 0x2295,
 515                 .card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
 516         }, {
 517                 .subvendor = 0x0070,
 518                 .subdevice = 0x2299,
 519                 .card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
 520         }, {
 521                 .subvendor = 0x0070,
 522                 .subdevice = 0x229d,
 523                 .card      = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
 524         }, {
 525                 .subvendor = 0x0070,
 526                 .subdevice = 0x22f0,
 527                 .card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
 528         }, {
 529                 .subvendor = 0x0070,
 530                 .subdevice = 0x22f1,
 531                 .card      = CX23885_BOARD_HAUPPAUGE_HVR1255,
 532         }, {
 533                 .subvendor = 0x0070,
 534                 .subdevice = 0x22f2,
 535                 .card      = CX23885_BOARD_HAUPPAUGE_HVR1275,
 536         }, {
 537                 .subvendor = 0x0070,
 538                 .subdevice = 0x22f3,
 539                 .card      = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
 540         }, {
 541                 .subvendor = 0x0070,
 542                 .subdevice = 0x22f4,
 543                 .card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
 544         }, {
 545                 .subvendor = 0x0070,
 546                 .subdevice = 0x22f5,
 547                 .card      = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
 548         }, {
 549                 .subvendor = 0x14f1,
 550                 .subdevice = 0x8651,
 551                 .card      = CX23885_BOARD_MYGICA_X8506,
 552         }, {
 553                 .subvendor = 0x14f1,
 554                 .subdevice = 0x8657,
 555                 .card      = CX23885_BOARD_MAGICPRO_PROHDTVE2,
 556         }, {
 557                 .subvendor = 0x0070,
 558                 .subdevice = 0x8541,
 559                 .card      = CX23885_BOARD_HAUPPAUGE_HVR1850,
 560         }, {
 561                 .subvendor = 0x1858,
 562                 .subdevice = 0xe800,
 563                 .card      = CX23885_BOARD_COMPRO_VIDEOMATE_E800,
 564         }, {
 565                 .subvendor = 0x0070,
 566                 .subdevice = 0x8551,
 567                 .card      = CX23885_BOARD_HAUPPAUGE_HVR1290,
 568         }, {
 569                 .subvendor = 0x14f1,
 570                 .subdevice = 0x8578,
 571                 .card      = CX23885_BOARD_MYGICA_X8558PRO,
 572         }, {
 573                 .subvendor = 0x107d,
 574                 .subdevice = 0x6f22,
 575                 .card      = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200,
 576         }, {
 577                 .subvendor = 0x5654,
 578                 .subdevice = 0x2390,
 579                 .card      = CX23885_BOARD_GOTVIEW_X5_3D_HYBRID,
 580         }, {
 581                 .subvendor = 0x1b55,
 582                 .subdevice = 0xe2e4,
 583                 .card      = CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF,
 584         },
 585 };
 586 const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
 587
 588 void cx23885_card_list(struct cx23885_dev *dev)
 589 {
 590         int i;
 591
 592         if (0 == dev->pci->subsystem_vendor &&
 593             0 == dev->pci->subsystem_device) {
 594                 printk(KERN_INFO
 595                         "%s: Board has no valid PCIe Subsystem ID and can't\n"
 596                        "%s: be autodetected. Pass card=<n> insmod option\n"
 597                        "%s: to workaround that. Redirect complaints to the\n"
 598                        "%s: vendor of the TV card.  Best regards,\n"
 599                        "%s:         -- tux\n",
 600                        dev->name, dev->name, dev->name, dev->name, dev->name);
 601         } else {
 602                 printk(KERN_INFO
 603                         "%s: Your board isn't known (yet) to the driver.\n"
 604                        "%s: Try to pick one of the existing card configs via\n"
 605                        "%s: card=<n> insmod option.  Updating to the latest\n"
 606                        "%s: version might help as well.\n",
 607                        dev->name, dev->name, dev->name, dev->name);
 608         }
 609         printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
 610                dev->name);
 611         for (i = 0; i < cx23885_bcount; i++)
 612                 printk(KERN_INFO "%s:    card=%d -> %s\n",
 613                        dev->name, i, cx23885_boards[i].name);
 614 }
 615
 616 static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
 617 {
 618         struct tveeprom tv;
 619
 620         tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
 621                 eeprom_data);
 622
 623         /* Make sure we support the board model */
 624         switch (tv.model) {
 625         case 22001:
 626                 /* WinTV-HVR1270 (PCIe, Retail, half height)
 627                  * ATSC/QAM and basic analog, IR Blast */
 628         case 22009:
 629                 /* WinTV-HVR1210 (PCIe, Retail, half height)
 630                  * DVB-T and basic analog, IR Blast */
 631         case 22011:
 632                 /* WinTV-HVR1270 (PCIe, Retail, half height)
 633                  * ATSC/QAM and basic analog, IR Recv */
 634         case 22019:
 635                 /* WinTV-HVR1210 (PCIe, Retail, half height)
 636                  * DVB-T and basic analog, IR Recv */
 637         case 22021:
 638                 /* WinTV-HVR1275 (PCIe, Retail, half height)
 639                  * ATSC/QAM and basic analog, IR Recv */
 640         case 22029:
 641                 /* WinTV-HVR1210 (PCIe, Retail, half height)
 642                  * DVB-T and basic analog, IR Recv */
 643         case 22101:
 644                 /* WinTV-HVR1270 (PCIe, Retail, full height)
 645                  * ATSC/QAM and basic analog, IR Blast */
 646         case 22109:
 647                 /* WinTV-HVR1210 (PCIe, Retail, full height)
 648                  * DVB-T and basic analog, IR Blast */
 649         case 22111:
 650                 /* WinTV-HVR1270 (PCIe, Retail, full height)
 651                  * ATSC/QAM and basic analog, IR Recv */
 652         case 22119:
 653                 /* WinTV-HVR1210 (PCIe, Retail, full height)
 654                  * DVB-T and basic analog, IR Recv */
 655         case 22121:
 656                 /* WinTV-HVR1275 (PCIe, Retail, full height)
 657                  * ATSC/QAM and basic analog, IR Recv */
 658         case 22129:
 659                 /* WinTV-HVR1210 (PCIe, Retail, full height)
 660                  * DVB-T and basic analog, IR Recv */
 661         case 71009:
 662                 /* WinTV-HVR1200 (PCIe, Retail, full height)
 663                  * DVB-T and basic analog */
 664         case 71359:
 665                 /* WinTV-HVR1200 (PCIe, OEM, half height)
 666                  * DVB-T and basic analog */
 667         case 71439:
 668                 /* WinTV-HVR1200 (PCIe, OEM, half height)
 669                  * DVB-T and basic analog */
 670         case 71449:
 671                 /* WinTV-HVR1200 (PCIe, OEM, full height)
 672                  * DVB-T and basic analog */
 673         case 71939:
 674                 /* WinTV-HVR1200 (PCIe, OEM, half height)
 675                  * DVB-T and basic analog */
 676         case 71949:
 677                 /* WinTV-HVR1200 (PCIe, OEM, full height)
 678                  * DVB-T and basic analog */
 679         case 71959:
 680                 /* WinTV-HVR1200 (PCIe, OEM, full height)
 681                  * DVB-T and basic analog */
 682         case 71979:
 683                 /* WinTV-HVR1200 (PCIe, OEM, half height)
 684                  * DVB-T and basic analog */
 685         case 71999:
 686                 /* WinTV-HVR1200 (PCIe, OEM, full height)
 687                  * DVB-T and basic analog */
 688         case 76601:
 689                 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
 690                         channel ATSC and MPEG2 HW Encoder */
 691         case 77001:
 692                 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
 693                         and Basic analog */
 694         case 77011:
 695                 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
 696                         and Basic analog */
 697         case 77041:
 698                 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
 699                         and Basic analog */
 700         case 77051:
 701                 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
 702                         and Basic analog */
 703         case 78011:
 704                 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
 705                         Dual channel ATSC and MPEG2 HW Encoder */
 706         case 78501:
 707                 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
 708                         Dual channel ATSC and MPEG2 HW Encoder */
 709         case 78521:
 710                 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
 711                         Dual channel ATSC and MPEG2 HW Encoder */
 712         case 78531:
 713                 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
 714                         Dual channel ATSC and MPEG2 HW Encoder */
 715         case 78631:
 716                 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
 717                         Dual channel ATSC and MPEG2 HW Encoder */
 718         case 79001:
 719                 /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
 720                         ATSC and Basic analog */
 721         case 79101:
 722                 /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
 723                         ATSC and Basic analog */
 724         case 79501:
 725                 /* WinTV-HVR1250 (PCIe, No IR, half height,
 726                         ATSC [at least] and Basic analog) */
 727         case 79561:
 728                 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
 729                         ATSC and Basic analog */
 730         case 79571:
 731                 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
 732                  ATSC and Basic analog */
 733         case 79671:
 734                 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
 735                         ATSC and Basic analog */
 736         case 80019:
 737                 /* WinTV-HVR1400 (Express Card, Retail, IR,
 738                  * DVB-T and Basic analog */
 739         case 81509:
 740                 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
 741                  * DVB-T and MPEG2 HW Encoder */
 742         case 81519:
 743                 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
 744                  * DVB-T and MPEG2 HW Encoder */
 745                 break;
 746         case 85021:
 747                 /* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM,
 748                         Dual channel ATSC and MPEG2 HW Encoder */
 749                 break;
 750         case 85721:
 751                 /* WinTV-HVR1290 (PCIe, OEM, RCA in, IR,
 752                         Dual channel ATSC and Basic analog */
 753                 break;
 754         default:
 755                 printk(KERN_WARNING "%s: warning: "
 756                         "unknown hauppauge model #%d\n",
 757                         dev->name, tv.model);
 758                 break;
 759         }
 760
 761         printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
 762                         dev->name, tv.model);
 763 }
 764
 765 int cx23885_tuner_callback(void *priv, int component, int command, int arg)
 766 {
 767         struct cx23885_tsport *port = priv;
 768         struct cx23885_dev *dev = port->dev;
 769         u32 bitmask = 0;
 770
 771         if (command == XC2028_RESET_CLK)
 772                 return 0;
 773
 774         if (command != 0) {
 775                 printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
 776                         __func__, command);
 777                 return -EINVAL;
 778         }
 779
 780         switch (dev->board) {
 781         case CX23885_BOARD_HAUPPAUGE_HVR1400:
 782         case CX23885_BOARD_HAUPPAUGE_HVR1500:
 783         case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
 784         case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
 785         case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
 786         case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
 787         case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
 788         case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
 789                 /* Tuner Reset Command */
 790                 bitmask = 0x04;
 791                 break;
 792         case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
 793         case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
 794                 /* Two identical tuners on two different i2c buses,
 795                  * we need to reset the correct gpio. */
 796                 if (port->nr == 1)
 797                         bitmask = 0x01;
 798                 else if (port->nr == 2)
 799                         bitmask = 0x04;
 800                 break;
 801         case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
 802                 /* Tuner Reset Command */
 803                 bitmask = 0x02;
 804                 break;
 805         case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
 806                 altera_ci_tuner_reset(dev, port->nr);
 807                 break;
 808         }
 809
 810         if (bitmask) {
 811                 /* Drive the tuner into reset and back out */
 812                 cx_clear(GP0_IO, bitmask);
 813                 mdelay(200);
 814                 cx_set(GP0_IO, bitmask);
 815         }
 816
 817         return 0;
 818 }
 819
 820 void cx23885_gpio_setup(struct cx23885_dev *dev)
 821 {
 822         switch (dev->board) {
 823         case CX23885_BOARD_HAUPPAUGE_HVR1250:
 824                 /* GPIO-0 cx24227 demodulator reset */
 825                 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
 826                 break;
 827         case CX23885_BOARD_HAUPPAUGE_HVR1500:
 828                 /* GPIO-0 cx24227 demodulator */
 829                 /* GPIO-2 xc3028 tuner */
 830
 831                 /* Put the parts into reset */
 832                 cx_set(GP0_IO, 0x00050000);
 833                 cx_clear(GP0_IO, 0x00000005);
 834                 msleep(5);
 835
 836                 /* Bring the parts out of reset */
 837                 cx_set(GP0_IO, 0x00050005);
 838                 break;
 839         case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
 840                 /* GPIO-0 cx24227 demodulator reset */
 841                 /* GPIO-2 xc5000 tuner reset */
 842                 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
 843                 break;
 844         case CX23885_BOARD_HAUPPAUGE_HVR1800:
 845                 /* GPIO-0 656_CLK */
 846                 /* GPIO-1 656_D0 */
 847                 /* GPIO-2 8295A Reset */
 848                 /* GPIO-3-10 cx23417 data0-7 */
 849                 /* GPIO-11-14 cx23417 addr0-3 */
 850                 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
 851                 /* GPIO-19 IR_RX */
 852
 853                 /* CX23417 GPIO's */
 854                 /* EIO15 Zilog Reset */
 855                 /* EIO14 S5H1409/CX24227 Reset */
 856                 mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
 857
 858                 /* Put the demod into reset and protect the eeprom */
 859                 mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
 860                 mdelay(100);
 861
 862                 /* Bring the demod and blaster out of reset */
 863                 mc417_gpio_set(dev, GPIO_15 | GPIO_14);
 864                 mdelay(100);
 865
 866                 /* Force the TDA8295A into reset and back */
 867                 cx23885_gpio_enable(dev, GPIO_2, 1);
 868                 cx23885_gpio_set(dev, GPIO_2);
 869                 mdelay(20);
 870                 cx23885_gpio_clear(dev, GPIO_2);
 871                 mdelay(20);
 872                 cx23885_gpio_set(dev, GPIO_2);
 873                 mdelay(20);
 874                 break;
 875         case CX23885_BOARD_HAUPPAUGE_HVR1200:
 876                 /* GPIO-0 tda10048 demodulator reset */
 877                 /* GPIO-2 tda18271 tuner reset */
 878
 879                 /* Put the parts into reset and back */
 880                 cx_set(GP0_IO, 0x00050000);
 881                 mdelay(20);
 882                 cx_clear(GP0_IO, 0x00000005);
 883                 mdelay(20);
 884                 cx_set(GP0_IO, 0x00050005);
 885                 break;
 886         case CX23885_BOARD_HAUPPAUGE_HVR1700:
 887                 /* GPIO-0 TDA10048 demodulator reset */
 888                 /* GPIO-2 TDA8295A Reset */
 889                 /* GPIO-3-10 cx23417 data0-7 */
 890                 /* GPIO-11-14 cx23417 addr0-3 */
 891                 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
 892
 893                 /* The following GPIO's are on the interna AVCore (cx25840) */
 894                 /* GPIO-19 IR_RX */
 895                 /* GPIO-20 IR_TX 416/DVBT Select */
 896                 /* GPIO-21 IIS DAT */
 897                 /* GPIO-22 IIS WCLK */
 898                 /* GPIO-23 IIS BCLK */
 899
 900                 /* Put the parts into reset and back */
 901                 cx_set(GP0_IO, 0x00050000);
 902                 mdelay(20);
 903                 cx_clear(GP0_IO, 0x00000005);
 904                 mdelay(20);
 905                 cx_set(GP0_IO, 0x00050005);
 906                 break;
 907         case CX23885_BOARD_HAUPPAUGE_HVR1400:
 908                 /* GPIO-0  Dibcom7000p demodulator reset */
 909                 /* GPIO-2  xc3028L tuner reset */
 910                 /* GPIO-13 LED */
 911
 912                 /* Put the parts into reset and back */
 913                 cx_set(GP0_IO, 0x00050000);
 914                 mdelay(20);
 915                 cx_clear(GP0_IO, 0x00000005);
 916                 mdelay(20);
 917                 cx_set(GP0_IO, 0x00050005);
 918                 break;
 919         case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
 920                 /* GPIO-0 xc5000 tuner reset i2c bus 0 */
 921                 /* GPIO-1 s5h1409 demod reset i2c bus 0 */
 922                 /* GPIO-2 xc5000 tuner reset i2c bus 1 */
 923                 /* GPIO-3 s5h1409 demod reset i2c bus 0 */
 924
 925                 /* Put the parts into reset and back */
 926                 cx_set(GP0_IO, 0x000f0000);
 927                 mdelay(20);
 928                 cx_clear(GP0_IO, 0x0000000f);
 929                 mdelay(20);
 930                 cx_set(GP0_IO, 0x000f000f);
 931                 break;
 932         case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
 933                 /* GPIO-0 portb xc3028 reset */
 934                 /* GPIO-1 portb zl10353 reset */
 935                 /* GPIO-2 portc xc3028 reset */
 936                 /* GPIO-3 portc zl10353 reset */
 937
 938                 /* Put the parts into reset and back */
 939                 cx_set(GP0_IO, 0x000f0000);
 940                 mdelay(20);
 941                 cx_clear(GP0_IO, 0x0000000f);
 942                 mdelay(20);
 943                 cx_set(GP0_IO, 0x000f000f);
 944                 break;
 945         case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
 946         case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
 947         case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
 948         case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
 949         case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
 950                 /* GPIO-2  xc3028 tuner reset */
 951
 952                 /* The following GPIO's are on the internal AVCore (cx25840) */
 953                 /* GPIO-?  zl10353 demod reset */
 954
 955                 /* Put the parts into reset and back */
 956                 cx_set(GP0_IO, 0x00040000);
 957                 mdelay(20);
 958                 cx_clear(GP0_IO, 0x00000004);
 959                 mdelay(20);
 960                 cx_set(GP0_IO, 0x00040004);
 961                 break;
 962         case CX23885_BOARD_TBS_6920:
 963                 cx_write(MC417_CTL, 0x00000036);
 964                 cx_write(MC417_OEN, 0x00001000);
 965                 cx_set(MC417_RWD, 0x00000002);
 966                 mdelay(200);
 967                 cx_clear(MC417_RWD, 0x00000800);
 968                 mdelay(200);
 969                 cx_set(MC417_RWD, 0x00000800);
 970                 mdelay(200);
 971                 break;
 972         case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
 973                 /* GPIO-0 INTA from CiMax1
 974                    GPIO-1 INTB from CiMax2
 975                    GPIO-2 reset chips
 976                    GPIO-3 to GPIO-10 data/addr for CA
 977                    GPIO-11 ~CS0 to CiMax1
 978                    GPIO-12 ~CS1 to CiMax2
 979                    GPIO-13 ADL0 load LSB addr
 980                    GPIO-14 ADL1 load MSB addr
 981                    GPIO-15 ~RDY from CiMax
 982                    GPIO-17 ~RD to CiMax
 983                    GPIO-18 ~WR to CiMax
 984                  */
 985                 cx_set(GP0_IO, 0x00040000); /* GPIO as out */
 986                 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
 987                 cx_clear(GP0_IO, 0x00030004);
 988                 mdelay(100);/* reset delay */
 989                 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
 990                 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
 991                 /* GPIO-15 IN as ~ACK, rest as OUT */
 992                 cx_write(MC417_OEN, 0x00001000);
 993                 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
 994                 cx_write(MC417_RWD, 0x0000c300);
 995                 /* enable irq */
 996                 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
 997                 break;
 998         case CX23885_BOARD_HAUPPAUGE_HVR1270:
 999         case CX23885_BOARD_HAUPPAUGE_HVR1275:
1000         case CX23885_BOARD_HAUPPAUGE_HVR1255:
1001         case CX23885_BOARD_HAUPPAUGE_HVR1210:
1002                 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
1003                 /* GPIO-6 I2C Gate which can isolate the demod from the bus */
1004                 /* GPIO-9 Demod reset */
1005
1006                 /* Put the parts into reset and back */
1007                 cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
1008                 cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
1009                 cx23885_gpio_clear(dev, GPIO_9);
1010                 mdelay(20);
1011                 cx23885_gpio_set(dev, GPIO_9);
1012                 break;
1013         case CX23885_BOARD_MYGICA_X8506:
1014         case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1015                 /* GPIO-0 (0)Analog / (1)Digital TV */
1016                 /* GPIO-1 reset XC5000 */
1017                 /* GPIO-2 reset LGS8GL5 / LGS8G75 */
1018                 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1);
1019                 cx23885_gpio_clear(dev, GPIO_1 | GPIO_2);
1020                 mdelay(100);
1021                 cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2);
1022                 mdelay(100);
1023                 break;
1024         case CX23885_BOARD_MYGICA_X8558PRO:
1025                 /* GPIO-0 reset first ATBM8830 */
1026                 /* GPIO-1 reset second ATBM8830 */
1027                 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
1028                 cx23885_gpio_clear(dev, GPIO_0 | GPIO_1);
1029                 mdelay(100);
1030                 cx23885_gpio_set(dev, GPIO_0 | GPIO_1);
1031                 mdelay(100);
1032                 break;
1033         case CX23885_BOARD_HAUPPAUGE_HVR1850:
1034         case CX23885_BOARD_HAUPPAUGE_HVR1290:
1035                 /* GPIO-0 656_CLK */
1036                 /* GPIO-1 656_D0 */
1037                 /* GPIO-2 Wake# */
1038                 /* GPIO-3-10 cx23417 data0-7 */
1039                 /* GPIO-11-14 cx23417 addr0-3 */
1040                 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1041                 /* GPIO-19 IR_RX */
1042                 /* GPIO-20 C_IR_TX */
1043                 /* GPIO-21 I2S DAT */
1044                 /* GPIO-22 I2S WCLK */
1045                 /* GPIO-23 I2S BCLK */
1046                 /* ALT GPIO: EXP GPIO LATCH */
1047
1048                 /* CX23417 GPIO's */
1049                 /* GPIO-14 S5H1411/CX24228 Reset */
1050                 /* GPIO-13 EEPROM write protect */
1051                 mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
1052
1053                 /* Put the demod into reset and protect the eeprom */
1054                 mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
1055                 mdelay(100);
1056
1057                 /* Bring the demod out of reset */
1058                 mc417_gpio_set(dev, GPIO_14);
1059                 mdelay(100);
1060
1061                 /* CX24228 GPIO */
1062                 /* Connected to IF / Mux */
1063                 break;
1064         case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1065                 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1066                 break;
1067         case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1068                 /* GPIO-0 ~INT in
1069                    GPIO-1 TMS out
1070                    GPIO-2 ~reset chips out
1071                    GPIO-3 to GPIO-10 data/addr for CA in/out
1072                    GPIO-11 ~CS out
1073                    GPIO-12 ADDR out
1074                    GPIO-13 ~WR out
1075                    GPIO-14 ~RD out
1076                    GPIO-15 ~RDY in
1077                    GPIO-16 TCK out
1078                    GPIO-17 TDO in
1079                    GPIO-18 TDI out
1080                  */
1081                 cx_set(GP0_IO, 0x00060000); /* GPIO-1,2 as out */
1082                 /* GPIO-0 as INT, reset & TMS low */
1083                 cx_clear(GP0_IO, 0x00010006);
1084                 mdelay(100);/* reset delay */
1085                 cx_set(GP0_IO, 0x00000004); /* reset high */
1086                 cx_write(MC417_CTL, 0x00000037);/* enable GPIO-3..18 pins */
1087                 /* GPIO-17 is TDO in, GPIO-15 is ~RDY in, rest is out */
1088                 cx_write(MC417_OEN, 0x00005000);
1089                 /* ~RD, ~WR high; ADDR low; ~CS high */
1090                 cx_write(MC417_RWD, 0x00000d00);
1091                 /* enable irq */
1092                 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1093                 break;
1094         }
1095 }
1096
1097 int cx23885_ir_init(struct cx23885_dev *dev)
1098 {
1099         static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = {
1100                 {
1101                         .flags    = V4L2_SUBDEV_IO_PIN_INPUT,
1102                         .pin      = CX23885_PIN_IR_RX_GPIO19,
1103                         .function = CX23885_PAD_IR_RX,
1104                         .value    = 0,
1105                         .strength = CX25840_PIN_DRIVE_MEDIUM,
1106                 }, {
1107                         .flags    = V4L2_SUBDEV_IO_PIN_OUTPUT,
1108                         .pin      = CX23885_PIN_IR_TX_GPIO20,
1109                         .function = CX23885_PAD_IR_TX,
1110                         .value    = 0,
1111                         .strength = CX25840_PIN_DRIVE_MEDIUM,
1112                 }
1113         };
1114         const size_t ir_rxtx_pin_cfg_count = ARRAY_SIZE(ir_rxtx_pin_cfg);
1115
1116         static struct v4l2_subdev_io_pin_config ir_rx_pin_cfg[] = {
1117                 {
1118                         .flags    = V4L2_SUBDEV_IO_PIN_INPUT,
1119                         .pin      = CX23885_PIN_IR_RX_GPIO19,
1120                         .function = CX23885_PAD_IR_RX,
1121                         .value    = 0,
1122                         .strength = CX25840_PIN_DRIVE_MEDIUM,
1123                 }
1124         };
1125         const size_t ir_rx_pin_cfg_count = ARRAY_SIZE(ir_rx_pin_cfg);
1126
1127         struct v4l2_subdev_ir_parameters params;
1128         int ret = 0;
1129         switch (dev->board) {
1130         case CX23885_BOARD_HAUPPAUGE_HVR1500:
1131         case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1132         case CX23885_BOARD_HAUPPAUGE_HVR1800:
1133         case CX23885_BOARD_HAUPPAUGE_HVR1200:
1134         case CX23885_BOARD_HAUPPAUGE_HVR1400:
1135         case CX23885_BOARD_HAUPPAUGE_HVR1275:
1136         case CX23885_BOARD_HAUPPAUGE_HVR1255:
1137         case CX23885_BOARD_HAUPPAUGE_HVR1210:
1138                 /* FIXME: Implement me */
1139                 break;
1140         case CX23885_BOARD_HAUPPAUGE_HVR1270:
1141                 ret = cx23888_ir_probe(dev);
1142                 if (ret)
1143                         break;
1144                 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1145                 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1146                                  ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1147                 break;
1148         case CX23885_BOARD_HAUPPAUGE_HVR1850:
1149         case CX23885_BOARD_HAUPPAUGE_HVR1290:
1150                 ret = cx23888_ir_probe(dev);
1151                 if (ret)
1152                         break;
1153                 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1154                 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1155                                  ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
1156                 /*
1157                  * For these boards we need to invert the Tx output via the
1158                  * IR controller to have the LED off while idle
1159                  */
1160                 v4l2_subdev_call(dev->sd_ir, ir, tx_g_parameters, &params);
1161                 params.enable = false;
1162                 params.shutdown = false;
1163                 params.invert_level = true;
1164                 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
1165                 params.shutdown = true;
1166                 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
1167                 break;
1168         case CX23885_BOARD_TEVII_S470:
1169                 if (!enable_885_ir)
1170                         break;
1171                 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1172                 if (dev->sd_ir == NULL) {
1173                         ret = -ENODEV;
1174                         break;
1175                 }
1176                 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1177                                  ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1178                 break;
1179         case CX23885_BOARD_HAUPPAUGE_HVR1250:
1180                 if (!enable_885_ir)
1181                         break;
1182                 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1183                 if (dev->sd_ir == NULL) {
1184                         ret = -ENODEV;
1185                         break;
1186                 }
1187                 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1188                                  ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
1189                 break;
1190         case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1191                 request_module("ir-kbd-i2c");
1192                 break;
1193         }
1194
1195         return ret;
1196 }
1197
1198 void cx23885_ir_fini(struct cx23885_dev *dev)
1199 {
1200         switch (dev->board) {
1201         case CX23885_BOARD_HAUPPAUGE_HVR1270:
1202         case CX23885_BOARD_HAUPPAUGE_HVR1850:
1203         case CX23885_BOARD_HAUPPAUGE_HVR1290:
1204                 cx23885_irq_remove(dev, PCI_MSK_IR);
1205                 cx23888_ir_remove(dev);
1206                 dev->sd_ir = NULL;
1207                 break;
1208         case CX23885_BOARD_TEVII_S470:
1209         case CX23885_BOARD_HAUPPAUGE_HVR1250:
1210                 cx23885_irq_remove(dev, PCI_MSK_AV_CORE);
1211                 /* sd_ir is a duplicate pointer to the AV Core, just clear it */
1212                 dev->sd_ir = NULL;
1213                 break;
1214         }
1215 }
1216
1217 int netup_jtag_io(void *device, int tms, int tdi, int read_tdo)
1218 {
1219         int data;
1220         int tdo = 0;
1221         struct cx23885_dev *dev = (struct cx23885_dev *)device;
1222         /*TMS*/
1223         data = ((cx_read(GP0_IO)) & (~0x00000002));
1224         data |= (tms ? 0x00020002 : 0x00020000);
1225         cx_write(GP0_IO, data);
1226
1227         /*TDI*/
1228         data = ((cx_read(MC417_RWD)) & (~0x0000a000));
1229         data |= (tdi ? 0x00008000 : 0);
1230         cx_write(MC417_RWD, data);
1231         if (read_tdo)
1232                 tdo = (data & 0x00004000) ? 1 : 0; /*TDO*/
1233
1234         cx_write(MC417_RWD, data | 0x00002000);
1235         udelay(1);
1236         /*TCK*/
1237         cx_write(MC417_RWD, data);
1238
1239         return tdo;
1240 }
1241
1242 void cx23885_ir_pci_int_enable(struct cx23885_dev *dev)
1243 {
1244         switch (dev->board) {
1245         case CX23885_BOARD_HAUPPAUGE_HVR1270:
1246         case CX23885_BOARD_HAUPPAUGE_HVR1850:
1247         case CX23885_BOARD_HAUPPAUGE_HVR1290:
1248                 if (dev->sd_ir)
1249                         cx23885_irq_add_enable(dev, PCI_MSK_IR);
1250                 break;
1251         case CX23885_BOARD_TEVII_S470:
1252         case CX23885_BOARD_HAUPPAUGE_HVR1250:
1253                 if (dev->sd_ir)
1254                         cx23885_irq_add_enable(dev, PCI_MSK_AV_CORE);
1255                 break;
1256         }
1257 }
1258
1259 void cx23885_card_setup(struct cx23885_dev *dev)
1260 {
1261         struct cx23885_tsport *ts1 = &dev->ts1;
1262         struct cx23885_tsport *ts2 = &dev->ts2;
1263
1264         static u8 eeprom[256];
1265
1266         if (dev->i2c_bus[0].i2c_rc == 0) {
1267                 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
1268                 tveeprom_read(&dev->i2c_bus[0].i2c_client,
1269                               eeprom, sizeof(eeprom));
1270         }
1271
1272         switch (dev->board) {
1273         case CX23885_BOARD_HAUPPAUGE_HVR1250:
1274                 if (dev->i2c_bus[0].i2c_rc == 0) {
1275                         if (eeprom[0x80] != 0x84)
1276                                 hauppauge_eeprom(dev, eeprom+0xc0);
1277                         else
1278                                 hauppauge_eeprom(dev, eeprom+0x80);
1279                 }
1280                 break;
1281         case CX23885_BOARD_HAUPPAUGE_HVR1500:
1282         case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1283         case CX23885_BOARD_HAUPPAUGE_HVR1400:
1284                 if (dev->i2c_bus[0].i2c_rc == 0)
1285                         hauppauge_eeprom(dev, eeprom+0x80);
1286                 break;
1287         case CX23885_BOARD_HAUPPAUGE_HVR1800:
1288         case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1289         case CX23885_BOARD_HAUPPAUGE_HVR1200:
1290         case CX23885_BOARD_HAUPPAUGE_HVR1700:
1291         case CX23885_BOARD_HAUPPAUGE_HVR1270:
1292         case CX23885_BOARD_HAUPPAUGE_HVR1275:
1293         case CX23885_BOARD_HAUPPAUGE_HVR1255:
1294         case CX23885_BOARD_HAUPPAUGE_HVR1210:
1295         case CX23885_BOARD_HAUPPAUGE_HVR1850:
1296         case CX23885_BOARD_HAUPPAUGE_HVR1290:
1297                 if (dev->i2c_bus[0].i2c_rc == 0)
1298                         hauppauge_eeprom(dev, eeprom+0xc0);
1299                 break;
1300         }
1301
1302         switch (dev->board) {
1303         case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1304         case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1305                 ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1306                 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1307                 ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1308                 /* break omitted intentionally */
1309         case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
1310                 ts1->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1311                 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1312                 ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1313                 break;
1314         case CX23885_BOARD_HAUPPAUGE_HVR1800:
1315                 /* Defaults for VID B - Analog encoder */
1316                 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
1317                 ts1->gen_ctrl_val    = 0x10e;
1318                 ts1->ts_clk_en_val   = 0x1; /* Enable TS_CLK */
1319                 ts1->src_sel_val     = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1320
1321                 /* APB_TSVALERR_POL (active low)*/
1322                 ts1->vld_misc_val    = 0x2000;
1323                 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
1324
1325                 /* Defaults for VID C */
1326                 ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1327                 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1328                 ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1329                 break;
1330         case CX23885_BOARD_TBS_6920:
1331                 ts1->gen_ctrl_val  = 0x4; /* Parallel */
1332                 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1333                 ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1334                 break;
1335         case CX23885_BOARD_TEVII_S470:
1336         case CX23885_BOARD_DVBWORLD_2005:
1337                 ts1->gen_ctrl_val  = 0x5; /* Parallel */
1338                 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1339                 ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1340                 break;
1341         case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1342         case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1343                 ts1->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1344                 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1345                 ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1346                 ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1347                 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1348                 ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1349                 break;
1350         case CX23885_BOARD_MYGICA_X8506:
1351         case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1352                 ts1->gen_ctrl_val  = 0x5; /* Parallel */
1353                 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1354                 ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1355                 break;
1356         case CX23885_BOARD_MYGICA_X8558PRO:
1357                 ts1->gen_ctrl_val  = 0x5; /* Parallel */
1358                 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1359                 ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1360                 ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1361                 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1362                 ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1363                 break;
1364         case CX23885_BOARD_HAUPPAUGE_HVR1250:
1365         case CX23885_BOARD_HAUPPAUGE_HVR1500:
1366         case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1367         case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1368         case CX23885_BOARD_HAUPPAUGE_HVR1200:
1369         case CX23885_BOARD_HAUPPAUGE_HVR1700:
1370         case CX23885_BOARD_HAUPPAUGE_HVR1400:
1371         case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1372         case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1373         case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1374         case CX23885_BOARD_HAUPPAUGE_HVR1270:
1375         case CX23885_BOARD_HAUPPAUGE_HVR1275:
1376         case CX23885_BOARD_HAUPPAUGE_HVR1255:
1377         case CX23885_BOARD_HAUPPAUGE_HVR1210:
1378         case CX23885_BOARD_HAUPPAUGE_HVR1850:
1379         case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1380         case CX23885_BOARD_HAUPPAUGE_HVR1290:
1381         case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1382         default:
1383                 ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1384                 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1385                 ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1386         }
1387
1388         /* Certain boards support analog, or require the avcore to be
1389          * loaded, ensure this happens.
1390          */
1391         switch (dev->board) {
1392         case CX23885_BOARD_TEVII_S470:
1393         case CX23885_BOARD_HAUPPAUGE_HVR1250:
1394                 /* Currently only enabled for the integrated IR controller */
1395                 if (!enable_885_ir)
1396                         break;
1397         case CX23885_BOARD_HAUPPAUGE_HVR1800:
1398         case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1399         case CX23885_BOARD_HAUPPAUGE_HVR1700:
1400         case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1401         case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1402         case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1403         case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1404         case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1405         case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1406         case CX23885_BOARD_HAUPPAUGE_HVR1270:
1407         case CX23885_BOARD_HAUPPAUGE_HVR1850:
1408         case CX23885_BOARD_MYGICA_X8506:
1409         case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1410         case CX23885_BOARD_HAUPPAUGE_HVR1290:
1411         case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1412         case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1413                 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
1414                                 &dev->i2c_bus[2].i2c_adap,
1415                                 "cx25840", 0x88 >> 1, NULL);
1416                 if (dev->sd_cx25840) {
1417                         dev->sd_cx25840->grp_id = CX23885_HW_AV_CORE;
1418                         v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
1419                 }
1420                 break;
1421         }
1422
1423         /* AUX-PLL 27MHz CLK */
1424         switch (dev->board) {
1425         case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1426                 netup_initialize(dev);
1427                 break;
1428         case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
1429                 int ret;
1430                 const struct firmware *fw;
1431                 const char *filename = "dvb-netup-altera-01.fw";
1432                 char *action = "configure";
1433                 struct altera_config netup_config = {
1434                         .dev = dev,
1435                         .action = action,
1436                         .jtag_io = netup_jtag_io,
1437                 };
1438
1439                 netup_initialize(dev);
1440
1441                 ret = request_firmware(&fw, filename, &dev->pci->dev);
1442                 if (ret != 0)
1443                         printk(KERN_ERR "did not find the firmware file. (%s) "
1444                         "Please see linux/Documentation/dvb/ for more details "
1445                         "on firmware-problems.", filename);
1446                 else
1447                         altera_init(&netup_config, fw);
1448
1449                 release_firmware(fw);
1450                 break;
1451         }
1452         }
1453 }
1454
1455 /* ------------------------------------------------------------------ */