perf: Tidy up after the big rename
[pandora-kernel.git] / drivers / media / video / cx18 / cx18-i2c.c
1 /*
2  *  cx18 I2C functions
3  *
4  *  Derived from ivtv-i2c.c
5  *
6  *  Copyright (C) 2007  Hans Verkuil <hverkuil@xs4all.nl>
7  *  Copyright (C) 2008  Andy Walls <awalls@radix.net>
8  *
9  *  This program is free software; you can redistribute it and/or modify
10  *  it under the terms of the GNU General Public License as published by
11  *  the Free Software Foundation; either version 2 of the License, or
12  *  (at your option) any later version.
13  *
14  *  This program is distributed in the hope that it will be useful,
15  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *  GNU General Public License for more details.
18  *
19  *  You should have received a copy of the GNU General Public License
20  *  along with this program; if not, write to the Free Software
21  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
22  *  02111-1307  USA
23  */
24
25 #include "cx18-driver.h"
26 #include "cx18-io.h"
27 #include "cx18-cards.h"
28 #include "cx18-gpio.h"
29 #include "cx18-i2c.h"
30 #include "cx18-irq.h"
31 #include <media/ir-kbd-i2c.h>
32
33 #define CX18_REG_I2C_1_WR   0xf15000
34 #define CX18_REG_I2C_1_RD   0xf15008
35 #define CX18_REG_I2C_2_WR   0xf25100
36 #define CX18_REG_I2C_2_RD   0xf25108
37
38 #define SETSCL_BIT      0x0001
39 #define SETSDL_BIT      0x0002
40 #define GETSCL_BIT      0x0004
41 #define GETSDL_BIT      0x0008
42
43 #define CX18_CS5345_I2C_ADDR            0x4c
44 #define CX18_Z8F0811_IR_TX_I2C_ADDR     0x70
45 #define CX18_Z8F0811_IR_RX_I2C_ADDR     0x71
46
47 /* This array should match the CX18_HW_ defines */
48 static const u8 hw_addrs[] = {
49         0,                              /* CX18_HW_TUNER */
50         0,                              /* CX18_HW_TVEEPROM */
51         CX18_CS5345_I2C_ADDR,           /* CX18_HW_CS5345 */
52         0,                              /* CX18_HW_DVB */
53         0,                              /* CX18_HW_418_AV */
54         0,                              /* CX18_HW_GPIO_MUX */
55         0,                              /* CX18_HW_GPIO_RESET_CTRL */
56         CX18_Z8F0811_IR_TX_I2C_ADDR,    /* CX18_HW_Z8F0811_IR_TX_HAUP */
57         CX18_Z8F0811_IR_RX_I2C_ADDR,    /* CX18_HW_Z8F0811_IR_RX_HAUP */
58 };
59
60 /* This array should match the CX18_HW_ defines */
61 /* This might well become a card-specific array */
62 static const u8 hw_bus[] = {
63         1,      /* CX18_HW_TUNER */
64         0,      /* CX18_HW_TVEEPROM */
65         0,      /* CX18_HW_CS5345 */
66         0,      /* CX18_HW_DVB */
67         0,      /* CX18_HW_418_AV */
68         0,      /* CX18_HW_GPIO_MUX */
69         0,      /* CX18_HW_GPIO_RESET_CTRL */
70         0,      /* CX18_HW_Z8F0811_IR_TX_HAUP */
71         0,      /* CX18_HW_Z8F0811_IR_RX_HAUP */
72 };
73
74 /* This array should match the CX18_HW_ defines */
75 static const char * const hw_modules[] = {
76         "tuner",        /* CX18_HW_TUNER */
77         NULL,           /* CX18_HW_TVEEPROM */
78         "cs5345",       /* CX18_HW_CS5345 */
79         NULL,           /* CX18_HW_DVB */
80         NULL,           /* CX18_HW_418_AV */
81         NULL,           /* CX18_HW_GPIO_MUX */
82         NULL,           /* CX18_HW_GPIO_RESET_CTRL */
83         NULL,           /* CX18_HW_Z8F0811_IR_TX_HAUP */
84         NULL,           /* CX18_HW_Z8F0811_IR_RX_HAUP */
85 };
86
87 /* This array should match the CX18_HW_ defines */
88 static const char * const hw_devicenames[] = {
89         "tuner",
90         "tveeprom",
91         "cs5345",
92         "cx23418_DTV",
93         "cx23418_AV",
94         "gpio_mux",
95         "gpio_reset_ctrl",
96         "ir_tx_z8f0811_haup",
97         "ir_rx_z8f0811_haup",
98 };
99
100 static const struct IR_i2c_init_data z8f0811_ir_init_data = {
101         .ir_codes = &ir_codes_hauppauge_new_table,
102         .internal_get_key_func = IR_KBD_GET_KEY_HAUP_XVR,
103         .type = IR_TYPE_RC5,
104         .name = "CX23418 Z8F0811 Hauppauge",
105 };
106
107 static int cx18_i2c_new_ir(struct i2c_adapter *adap, u32 hw, const char *type,
108                            u8 addr)
109 {
110         struct i2c_board_info info;
111         unsigned short addr_list[2] = { addr, I2C_CLIENT_END };
112
113         memset(&info, 0, sizeof(struct i2c_board_info));
114         strlcpy(info.type, type, I2C_NAME_SIZE);
115
116         /* Our default information for ir-kbd-i2c.c to use */
117         switch (hw) {
118         case CX18_HW_Z8F0811_IR_RX_HAUP:
119                 info.platform_data = &z8f0811_ir_init_data;
120                 break;
121         default:
122                 break;
123         }
124
125         return i2c_new_probed_device(adap, &info, addr_list) == NULL ? -1 : 0;
126 }
127
128 int cx18_i2c_register(struct cx18 *cx, unsigned idx)
129 {
130         struct v4l2_subdev *sd;
131         int bus = hw_bus[idx];
132         struct i2c_adapter *adap = &cx->i2c_adap[bus];
133         const char *mod = hw_modules[idx];
134         const char *type = hw_devicenames[idx];
135         u32 hw = 1 << idx;
136
137         if (idx >= ARRAY_SIZE(hw_addrs))
138                 return -1;
139
140         if (hw == CX18_HW_TUNER) {
141                 /* special tuner group handling */
142                 sd = v4l2_i2c_new_probed_subdev(&cx->v4l2_dev,
143                                 adap, mod, type, cx->card_i2c->radio);
144                 if (sd != NULL)
145                         sd->grp_id = hw;
146                 sd = v4l2_i2c_new_probed_subdev(&cx->v4l2_dev,
147                                 adap, mod, type, cx->card_i2c->demod);
148                 if (sd != NULL)
149                         sd->grp_id = hw;
150                 sd = v4l2_i2c_new_probed_subdev(&cx->v4l2_dev,
151                                 adap, mod, type, cx->card_i2c->tv);
152                 if (sd != NULL)
153                         sd->grp_id = hw;
154                 return sd != NULL ? 0 : -1;
155         }
156
157         if (hw & CX18_HW_Z8F0811_IR_HAUP)
158                 return cx18_i2c_new_ir(adap, hw, type, hw_addrs[idx]);
159
160         /* Is it not an I2C device or one we do not wish to register? */
161         if (!hw_addrs[idx])
162                 return -1;
163
164         /* It's an I2C device other than an analog tuner or IR chip */
165         sd = v4l2_i2c_new_subdev(&cx->v4l2_dev, adap, mod, type, hw_addrs[idx]);
166         if (sd != NULL)
167                 sd->grp_id = hw;
168         return sd != NULL ? 0 : -1;
169 }
170
171 /* Find the first member of the subdev group id in hw */
172 struct v4l2_subdev *cx18_find_hw(struct cx18 *cx, u32 hw)
173 {
174         struct v4l2_subdev *result = NULL;
175         struct v4l2_subdev *sd;
176
177         spin_lock(&cx->v4l2_dev.lock);
178         v4l2_device_for_each_subdev(sd, &cx->v4l2_dev) {
179                 if (sd->grp_id == hw) {
180                         result = sd;
181                         break;
182                 }
183         }
184         spin_unlock(&cx->v4l2_dev.lock);
185         return result;
186 }
187
188 static void cx18_setscl(void *data, int state)
189 {
190         struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
191         int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
192         u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR;
193         u32 r = cx18_read_reg(cx, addr);
194
195         if (state)
196                 cx18_write_reg(cx, r | SETSCL_BIT, addr);
197         else
198                 cx18_write_reg(cx, r & ~SETSCL_BIT, addr);
199 }
200
201 static void cx18_setsda(void *data, int state)
202 {
203         struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
204         int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
205         u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR;
206         u32 r = cx18_read_reg(cx, addr);
207
208         if (state)
209                 cx18_write_reg(cx, r | SETSDL_BIT, addr);
210         else
211                 cx18_write_reg(cx, r & ~SETSDL_BIT, addr);
212 }
213
214 static int cx18_getscl(void *data)
215 {
216         struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
217         int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
218         u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD;
219
220         return cx18_read_reg(cx, addr) & GETSCL_BIT;
221 }
222
223 static int cx18_getsda(void *data)
224 {
225         struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
226         int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
227         u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD;
228
229         return cx18_read_reg(cx, addr) & GETSDL_BIT;
230 }
231
232 /* template for i2c-bit-algo */
233 static struct i2c_adapter cx18_i2c_adap_template = {
234         .name = "cx18 i2c driver",
235         .algo = NULL,                   /* set by i2c-algo-bit */
236         .algo_data = NULL,              /* filled from template */
237         .owner = THIS_MODULE,
238 };
239
240 #define CX18_SCL_PERIOD (10) /* usecs. 10 usec is period for a 100 KHz clock */
241 #define CX18_ALGO_BIT_TIMEOUT (2) /* seconds */
242
243 static struct i2c_algo_bit_data cx18_i2c_algo_template = {
244         .setsda         = cx18_setsda,
245         .setscl         = cx18_setscl,
246         .getsda         = cx18_getsda,
247         .getscl         = cx18_getscl,
248         .udelay         = CX18_SCL_PERIOD/2,       /* 1/2 clock period in usec*/
249         .timeout        = CX18_ALGO_BIT_TIMEOUT*HZ /* jiffies */
250 };
251
252 /* init + register i2c algo-bit adapter */
253 int init_cx18_i2c(struct cx18 *cx)
254 {
255         int i, err;
256         CX18_DEBUG_I2C("i2c init\n");
257
258         for (i = 0; i < 2; i++) {
259                 /* Setup algorithm for adapter */
260                 memcpy(&cx->i2c_algo[i], &cx18_i2c_algo_template,
261                         sizeof(struct i2c_algo_bit_data));
262                 cx->i2c_algo_cb_data[i].cx = cx;
263                 cx->i2c_algo_cb_data[i].bus_index = i;
264                 cx->i2c_algo[i].data = &cx->i2c_algo_cb_data[i];
265
266                 /* Setup adapter */
267                 memcpy(&cx->i2c_adap[i], &cx18_i2c_adap_template,
268                         sizeof(struct i2c_adapter));
269                 cx->i2c_adap[i].algo_data = &cx->i2c_algo[i];
270                 sprintf(cx->i2c_adap[i].name + strlen(cx->i2c_adap[i].name),
271                                 " #%d-%d", cx->instance, i);
272                 i2c_set_adapdata(&cx->i2c_adap[i], &cx->v4l2_dev);
273                 cx->i2c_adap[i].dev.parent = &cx->pci_dev->dev;
274         }
275
276         if (cx18_read_reg(cx, CX18_REG_I2C_2_WR) != 0x0003c02f) {
277                 /* Reset/Unreset I2C hardware block */
278                 /* Clock select 220MHz */
279                 cx18_write_reg_expect(cx, 0x10000000, 0xc71004,
280                                           0x00000000, 0x10001000);
281                 /* Clock Enable */
282                 cx18_write_reg_expect(cx, 0x10001000, 0xc71024,
283                                           0x00001000, 0x10001000);
284         }
285         /* courtesy of Steven Toth <stoth@hauppauge.com> */
286         cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
287         mdelay(10);
288         cx18_write_reg_expect(cx, 0x00c000c0, 0xc7001c, 0x000000c0, 0x00c000c0);
289         mdelay(10);
290         cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
291         mdelay(10);
292
293         /* Set to edge-triggered intrs. */
294         cx18_write_reg(cx, 0x00c00000, 0xc730c8);
295         /* Clear any stale intrs */
296         cx18_write_reg_expect(cx, HW2_I2C1_INT|HW2_I2C2_INT, HW2_INT_CLR_STATUS,
297                        ~(HW2_I2C1_INT|HW2_I2C2_INT), HW2_I2C1_INT|HW2_I2C2_INT);
298
299         /* Hw I2C1 Clock Freq ~100kHz */
300         cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_1_WR);
301         cx18_setscl(&cx->i2c_algo_cb_data[0], 1);
302         cx18_setsda(&cx->i2c_algo_cb_data[0], 1);
303
304         /* Hw I2C2 Clock Freq ~100kHz */
305         cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_2_WR);
306         cx18_setscl(&cx->i2c_algo_cb_data[1], 1);
307         cx18_setsda(&cx->i2c_algo_cb_data[1], 1);
308
309         cx18_call_hw(cx, CX18_HW_GPIO_RESET_CTRL,
310                      core, reset, (u32) CX18_GPIO_RESET_I2C);
311
312         err = i2c_bit_add_bus(&cx->i2c_adap[0]);
313         if (err)
314                 goto err;
315         err = i2c_bit_add_bus(&cx->i2c_adap[1]);
316         if (err)
317                 goto err_del_bus_0;
318         return 0;
319
320  err_del_bus_0:
321         i2c_del_adapter(&cx->i2c_adap[0]);
322  err:
323         return err;
324 }
325
326 void exit_cx18_i2c(struct cx18 *cx)
327 {
328         int i;
329         CX18_DEBUG_I2C("i2c exit\n");
330         cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_1_WR) | 4,
331                                                         CX18_REG_I2C_1_WR);
332         cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_2_WR) | 4,
333                                                         CX18_REG_I2C_2_WR);
334
335         for (i = 0; i < 2; i++) {
336                 i2c_del_adapter(&cx->i2c_adap[i]);
337         }
338 }
339
340 /*
341    Hauppauge HVR1600 should have:
342    32 cx24227
343    98 unknown
344    a0 eeprom
345    c2 tuner
346    e? zilog ir
347    */