2 * driver for Earthsoft PT1/PT2
4 * Copyright (C) 2009 HIRANO Takahito <hiranotaka@zng.info>
6 * based on pt1dvr - http://pt1dvr.sourceforge.jp/
7 * by Tomoaki Ishikawa <tomy@users.sourceforge.jp>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 #include <linux/kernel.h>
25 #include <linux/module.h>
26 #include <linux/slab.h>
27 #include <linux/vmalloc.h>
28 #include <linux/pci.h>
29 #include <linux/kthread.h>
30 #include <linux/freezer.h>
33 #include "dvb_demux.h"
36 #include "dvb_frontend.h"
38 #include "va1j5jf8007t.h"
39 #include "va1j5jf8007s.h"
41 #define DRIVER_NAME "earth-pt1"
43 #define PT1_PAGE_SHIFT 12
44 #define PT1_PAGE_SIZE (1 << PT1_PAGE_SHIFT)
45 #define PT1_NR_UPACKETS 1024
46 #define PT1_NR_BUFS 511
48 struct pt1_buffer_page {
49 __le32 upackets[PT1_NR_UPACKETS];
52 struct pt1_table_page {
54 __le32 buf_pfns[PT1_NR_BUFS];
58 struct pt1_buffer_page *page;
63 struct pt1_table_page *page;
65 struct pt1_buffer bufs[PT1_NR_BUFS];
68 #define PT1_NR_ADAPS 4
75 struct i2c_adapter i2c_adap;
77 struct pt1_adapter *adaps[PT1_NR_ADAPS];
78 struct pt1_table *tables;
79 struct task_struct *kthread;
94 struct dvb_adapter adap;
95 struct dvb_demux demux;
99 struct dvb_frontend *fe;
100 int (*orig_set_voltage)(struct dvb_frontend *fe,
101 fe_sec_voltage_t voltage);
102 int (*orig_sleep)(struct dvb_frontend *fe);
103 int (*orig_init)(struct dvb_frontend *fe);
105 fe_sec_voltage_t voltage;
109 #define pt1_printk(level, pt1, format, arg...) \
110 dev_printk(level, &(pt1)->pdev->dev, format, ##arg)
112 static void pt1_write_reg(struct pt1 *pt1, int reg, u32 data)
114 writel(data, pt1->regs + reg * 4);
117 static u32 pt1_read_reg(struct pt1 *pt1, int reg)
119 return readl(pt1->regs + reg * 4);
122 static int pt1_nr_tables = 64;
123 module_param_named(nr_tables, pt1_nr_tables, int, 0);
125 static void pt1_increment_table_count(struct pt1 *pt1)
127 pt1_write_reg(pt1, 0, 0x00000020);
130 static void pt1_init_table_count(struct pt1 *pt1)
132 pt1_write_reg(pt1, 0, 0x00000010);
135 static void pt1_register_tables(struct pt1 *pt1, u32 first_pfn)
137 pt1_write_reg(pt1, 5, first_pfn);
138 pt1_write_reg(pt1, 0, 0x0c000040);
141 static void pt1_unregister_tables(struct pt1 *pt1)
143 pt1_write_reg(pt1, 0, 0x08080000);
146 static int pt1_sync(struct pt1 *pt1)
149 for (i = 0; i < 57; i++) {
150 if (pt1_read_reg(pt1, 0) & 0x20000000)
152 pt1_write_reg(pt1, 0, 0x00000008);
154 pt1_printk(KERN_ERR, pt1, "could not sync\n");
158 static u64 pt1_identify(struct pt1 *pt1)
163 for (i = 0; i < 57; i++) {
164 id |= (u64)(pt1_read_reg(pt1, 0) >> 30 & 1) << i;
165 pt1_write_reg(pt1, 0, 0x00000008);
170 static int pt1_unlock(struct pt1 *pt1)
173 pt1_write_reg(pt1, 0, 0x00000008);
174 for (i = 0; i < 3; i++) {
175 if (pt1_read_reg(pt1, 0) & 0x80000000)
177 schedule_timeout_uninterruptible((HZ + 999) / 1000);
179 pt1_printk(KERN_ERR, pt1, "could not unlock\n");
183 static int pt1_reset_pci(struct pt1 *pt1)
186 pt1_write_reg(pt1, 0, 0x01010000);
187 pt1_write_reg(pt1, 0, 0x01000000);
188 for (i = 0; i < 10; i++) {
189 if (pt1_read_reg(pt1, 0) & 0x00000001)
191 schedule_timeout_uninterruptible((HZ + 999) / 1000);
193 pt1_printk(KERN_ERR, pt1, "could not reset PCI\n");
197 static int pt1_reset_ram(struct pt1 *pt1)
200 pt1_write_reg(pt1, 0, 0x02020000);
201 pt1_write_reg(pt1, 0, 0x02000000);
202 for (i = 0; i < 10; i++) {
203 if (pt1_read_reg(pt1, 0) & 0x00000002)
205 schedule_timeout_uninterruptible((HZ + 999) / 1000);
207 pt1_printk(KERN_ERR, pt1, "could not reset RAM\n");
211 static int pt1_do_enable_ram(struct pt1 *pt1)
215 status = pt1_read_reg(pt1, 0) & 0x00000004;
216 pt1_write_reg(pt1, 0, 0x00000002);
217 for (i = 0; i < 10; i++) {
218 for (j = 0; j < 1024; j++) {
219 if ((pt1_read_reg(pt1, 0) & 0x00000004) != status)
222 schedule_timeout_uninterruptible((HZ + 999) / 1000);
224 pt1_printk(KERN_ERR, pt1, "could not enable RAM\n");
228 static int pt1_enable_ram(struct pt1 *pt1)
232 schedule_timeout_uninterruptible((HZ + 999) / 1000);
233 phase = pt1->pdev->device == 0x211a ? 128 : 166;
234 for (i = 0; i < phase; i++) {
235 ret = pt1_do_enable_ram(pt1);
242 static void pt1_disable_ram(struct pt1 *pt1)
244 pt1_write_reg(pt1, 0, 0x0b0b0000);
247 static void pt1_set_stream(struct pt1 *pt1, int index, int enabled)
249 pt1_write_reg(pt1, 2, 1 << (index + 8) | enabled << index);
252 static void pt1_init_streams(struct pt1 *pt1)
255 for (i = 0; i < PT1_NR_ADAPS; i++)
256 pt1_set_stream(pt1, i, 0);
259 static int pt1_filter(struct pt1 *pt1, struct pt1_buffer_page *page)
264 struct pt1_adapter *adap;
268 if (!page->upackets[PT1_NR_UPACKETS - 1])
271 for (i = 0; i < PT1_NR_UPACKETS; i++) {
272 upacket = le32_to_cpu(page->upackets[i]);
273 index = (upacket >> 29) - 1;
274 if (index < 0 || index >= PT1_NR_ADAPS)
277 adap = pt1->adaps[index];
278 if (upacket >> 25 & 1)
279 adap->upacket_count = 0;
280 else if (!adap->upacket_count)
284 offset = adap->packet_count * 188 + adap->upacket_count * 3;
285 buf[offset] = upacket >> 16;
286 buf[offset + 1] = upacket >> 8;
287 if (adap->upacket_count != 62)
288 buf[offset + 2] = upacket;
290 if (++adap->upacket_count >= 63) {
291 adap->upacket_count = 0;
292 if (++adap->packet_count >= 21) {
293 dvb_dmx_swfilter_packets(&adap->demux, buf, 21);
294 adap->packet_count = 0;
299 page->upackets[PT1_NR_UPACKETS - 1] = 0;
303 static int pt1_thread(void *data)
308 struct pt1_buffer_page *page;
316 while (!kthread_should_stop()) {
319 page = pt1->tables[table_index].bufs[buf_index].page;
320 if (!pt1_filter(pt1, page)) {
321 schedule_timeout_interruptible((HZ + 999) / 1000);
325 if (++buf_index >= PT1_NR_BUFS) {
326 pt1_increment_table_count(pt1);
328 if (++table_index >= pt1_nr_tables)
336 static void pt1_free_page(struct pt1 *pt1, void *page, dma_addr_t addr)
338 dma_free_coherent(&pt1->pdev->dev, PT1_PAGE_SIZE, page, addr);
341 static void *pt1_alloc_page(struct pt1 *pt1, dma_addr_t *addrp, u32 *pfnp)
346 page = dma_alloc_coherent(&pt1->pdev->dev, PT1_PAGE_SIZE, &addr,
351 BUG_ON(addr & (PT1_PAGE_SIZE - 1));
352 BUG_ON(addr >> PT1_PAGE_SHIFT >> 31 >> 1);
355 *pfnp = addr >> PT1_PAGE_SHIFT;
359 static void pt1_cleanup_buffer(struct pt1 *pt1, struct pt1_buffer *buf)
361 pt1_free_page(pt1, buf->page, buf->addr);
365 pt1_init_buffer(struct pt1 *pt1, struct pt1_buffer *buf, u32 *pfnp)
367 struct pt1_buffer_page *page;
370 page = pt1_alloc_page(pt1, &addr, pfnp);
374 page->upackets[PT1_NR_UPACKETS - 1] = 0;
381 static void pt1_cleanup_table(struct pt1 *pt1, struct pt1_table *table)
385 for (i = 0; i < PT1_NR_BUFS; i++)
386 pt1_cleanup_buffer(pt1, &table->bufs[i]);
388 pt1_free_page(pt1, table->page, table->addr);
392 pt1_init_table(struct pt1 *pt1, struct pt1_table *table, u32 *pfnp)
394 struct pt1_table_page *page;
399 page = pt1_alloc_page(pt1, &addr, pfnp);
403 for (i = 0; i < PT1_NR_BUFS; i++) {
404 ret = pt1_init_buffer(pt1, &table->bufs[i], &buf_pfn);
408 page->buf_pfns[i] = cpu_to_le32(buf_pfn);
411 pt1_increment_table_count(pt1);
418 pt1_cleanup_buffer(pt1, &table->bufs[i]);
420 pt1_free_page(pt1, page, addr);
424 static void pt1_cleanup_tables(struct pt1 *pt1)
426 struct pt1_table *tables;
429 tables = pt1->tables;
430 pt1_unregister_tables(pt1);
432 for (i = 0; i < pt1_nr_tables; i++)
433 pt1_cleanup_table(pt1, &tables[i]);
438 static int pt1_init_tables(struct pt1 *pt1)
440 struct pt1_table *tables;
444 tables = vmalloc(sizeof(struct pt1_table) * pt1_nr_tables);
448 pt1_init_table_count(pt1);
452 ret = pt1_init_table(pt1, &tables[0], &first_pfn);
458 while (i < pt1_nr_tables) {
459 ret = pt1_init_table(pt1, &tables[i], &pfn);
462 tables[i - 1].page->next_pfn = cpu_to_le32(pfn);
466 tables[pt1_nr_tables - 1].page->next_pfn = cpu_to_le32(first_pfn);
468 pt1_register_tables(pt1, first_pfn);
469 pt1->tables = tables;
474 pt1_cleanup_table(pt1, &tables[i]);
480 static int pt1_start_feed(struct dvb_demux_feed *feed)
482 struct pt1_adapter *adap;
483 adap = container_of(feed->demux, struct pt1_adapter, demux);
485 pt1_set_stream(adap->pt1, adap->index, 1);
489 static int pt1_stop_feed(struct dvb_demux_feed *feed)
491 struct pt1_adapter *adap;
492 adap = container_of(feed->demux, struct pt1_adapter, demux);
494 pt1_set_stream(adap->pt1, adap->index, 0);
499 pt1_update_power(struct pt1 *pt1)
503 struct pt1_adapter *adap;
504 static const int sleep_bits[] = {
511 bits = pt1->power | !pt1->reset << 3;
512 mutex_lock(&pt1->lock);
513 for (i = 0; i < PT1_NR_ADAPS; i++) {
514 adap = pt1->adaps[i];
515 switch (adap->voltage) {
516 case SEC_VOLTAGE_13: /* actually 11V */
519 case SEC_VOLTAGE_18: /* actually 15V */
520 bits |= 1 << 1 | 1 << 2;
526 /* XXX: The bits should be changed depending on adap->sleep. */
527 bits |= sleep_bits[i];
529 pt1_write_reg(pt1, 1, bits);
530 mutex_unlock(&pt1->lock);
533 static int pt1_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
535 struct pt1_adapter *adap;
537 adap = container_of(fe->dvb, struct pt1_adapter, adap);
538 adap->voltage = voltage;
539 pt1_update_power(adap->pt1);
541 if (adap->orig_set_voltage)
542 return adap->orig_set_voltage(fe, voltage);
547 static int pt1_sleep(struct dvb_frontend *fe)
549 struct pt1_adapter *adap;
551 adap = container_of(fe->dvb, struct pt1_adapter, adap);
553 pt1_update_power(adap->pt1);
555 if (adap->orig_sleep)
556 return adap->orig_sleep(fe);
561 static int pt1_wakeup(struct dvb_frontend *fe)
563 struct pt1_adapter *adap;
565 adap = container_of(fe->dvb, struct pt1_adapter, adap);
567 pt1_update_power(adap->pt1);
568 schedule_timeout_uninterruptible((HZ + 999) / 1000);
571 return adap->orig_init(fe);
576 static void pt1_free_adapter(struct pt1_adapter *adap)
578 dvb_net_release(&adap->net);
579 adap->demux.dmx.close(&adap->demux.dmx);
580 dvb_dmxdev_release(&adap->dmxdev);
581 dvb_dmx_release(&adap->demux);
582 dvb_unregister_adapter(&adap->adap);
583 free_page((unsigned long)adap->buf);
587 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
589 static struct pt1_adapter *
590 pt1_alloc_adapter(struct pt1 *pt1)
592 struct pt1_adapter *adap;
594 struct dvb_adapter *dvb_adap;
595 struct dvb_demux *demux;
596 struct dmxdev *dmxdev;
599 adap = kzalloc(sizeof(struct pt1_adapter), GFP_KERNEL);
607 adap->voltage = SEC_VOLTAGE_OFF;
610 buf = (u8 *)__get_free_page(GFP_KERNEL);
617 adap->upacket_count = 0;
618 adap->packet_count = 0;
620 dvb_adap = &adap->adap;
621 dvb_adap->priv = adap;
622 ret = dvb_register_adapter(dvb_adap, DRIVER_NAME, THIS_MODULE,
623 &pt1->pdev->dev, adapter_nr);
627 demux = &adap->demux;
628 demux->dmx.capabilities = DMX_TS_FILTERING | DMX_SECTION_FILTERING;
630 demux->feednum = 256;
631 demux->filternum = 256;
632 demux->start_feed = pt1_start_feed;
633 demux->stop_feed = pt1_stop_feed;
634 demux->write_to_decoder = NULL;
635 ret = dvb_dmx_init(demux);
637 goto err_unregister_adapter;
639 dmxdev = &adap->dmxdev;
640 dmxdev->filternum = 256;
641 dmxdev->demux = &demux->dmx;
642 dmxdev->capabilities = 0;
643 ret = dvb_dmxdev_init(dmxdev, dvb_adap);
645 goto err_dmx_release;
647 dvb_net_init(dvb_adap, &adap->net, &demux->dmx);
652 dvb_dmx_release(demux);
653 err_unregister_adapter:
654 dvb_unregister_adapter(dvb_adap);
656 free_page((unsigned long)buf);
663 static void pt1_cleanup_adapters(struct pt1 *pt1)
666 for (i = 0; i < PT1_NR_ADAPS; i++)
667 pt1_free_adapter(pt1->adaps[i]);
670 static int pt1_init_adapters(struct pt1 *pt1)
673 struct pt1_adapter *adap;
676 for (i = 0; i < PT1_NR_ADAPS; i++) {
677 adap = pt1_alloc_adapter(pt1);
684 pt1->adaps[i] = adap;
690 pt1_free_adapter(pt1->adaps[i]);
695 static void pt1_cleanup_frontend(struct pt1_adapter *adap)
697 dvb_unregister_frontend(adap->fe);
700 static int pt1_init_frontend(struct pt1_adapter *adap, struct dvb_frontend *fe)
704 adap->orig_set_voltage = fe->ops.set_voltage;
705 adap->orig_sleep = fe->ops.sleep;
706 adap->orig_init = fe->ops.init;
707 fe->ops.set_voltage = pt1_set_voltage;
708 fe->ops.sleep = pt1_sleep;
709 fe->ops.init = pt1_wakeup;
711 ret = dvb_register_frontend(&adap->adap, fe);
719 static void pt1_cleanup_frontends(struct pt1 *pt1)
722 for (i = 0; i < PT1_NR_ADAPS; i++)
723 pt1_cleanup_frontend(pt1->adaps[i]);
727 struct va1j5jf8007s_config va1j5jf8007s_config;
728 struct va1j5jf8007t_config va1j5jf8007t_config;
731 static const struct pt1_config pt1_configs[2] = {
734 .demod_address = 0x1b,
735 .frequency = VA1J5JF8007S_20MHZ,
738 .demod_address = 0x1a,
739 .frequency = VA1J5JF8007T_20MHZ,
743 .demod_address = 0x19,
744 .frequency = VA1J5JF8007S_20MHZ,
747 .demod_address = 0x18,
748 .frequency = VA1J5JF8007T_20MHZ,
753 static const struct pt1_config pt2_configs[2] = {
756 .demod_address = 0x1b,
757 .frequency = VA1J5JF8007S_25MHZ,
760 .demod_address = 0x1a,
761 .frequency = VA1J5JF8007T_25MHZ,
765 .demod_address = 0x19,
766 .frequency = VA1J5JF8007S_25MHZ,
769 .demod_address = 0x18,
770 .frequency = VA1J5JF8007T_25MHZ,
775 static int pt1_init_frontends(struct pt1 *pt1)
778 struct i2c_adapter *i2c_adap;
779 const struct pt1_config *configs, *config;
780 struct dvb_frontend *fe[4];
786 i2c_adap = &pt1->i2c_adap;
787 configs = pt1->pdev->device == 0x211a ? pt1_configs : pt2_configs;
789 config = &configs[i / 2];
791 fe[i] = va1j5jf8007s_attach(&config->va1j5jf8007s_config,
794 ret = -ENODEV; /* This does not sound nice... */
799 fe[i] = va1j5jf8007t_attach(&config->va1j5jf8007t_config,
807 ret = va1j5jf8007s_prepare(fe[i - 2]);
811 ret = va1j5jf8007t_prepare(fe[i - 1]);
818 ret = pt1_init_frontend(pt1->adaps[j], fe[j]);
827 fe[i]->ops.release(fe[i]);
830 dvb_unregister_frontend(fe[j]);
835 static void pt1_i2c_emit(struct pt1 *pt1, int addr, int busy, int read_enable,
836 int clock, int data, int next_addr)
838 pt1_write_reg(pt1, 4, addr << 18 | busy << 13 | read_enable << 12 |
839 !clock << 11 | !data << 10 | next_addr);
842 static void pt1_i2c_write_bit(struct pt1 *pt1, int addr, int *addrp, int data)
844 pt1_i2c_emit(pt1, addr, 1, 0, 0, data, addr + 1);
845 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, data, addr + 2);
846 pt1_i2c_emit(pt1, addr + 2, 1, 0, 0, data, addr + 3);
850 static void pt1_i2c_read_bit(struct pt1 *pt1, int addr, int *addrp)
852 pt1_i2c_emit(pt1, addr, 1, 0, 0, 1, addr + 1);
853 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 1, addr + 2);
854 pt1_i2c_emit(pt1, addr + 2, 1, 1, 1, 1, addr + 3);
855 pt1_i2c_emit(pt1, addr + 3, 1, 0, 0, 1, addr + 4);
859 static void pt1_i2c_write_byte(struct pt1 *pt1, int addr, int *addrp, int data)
862 for (i = 0; i < 8; i++)
863 pt1_i2c_write_bit(pt1, addr, &addr, data >> (7 - i) & 1);
864 pt1_i2c_write_bit(pt1, addr, &addr, 1);
868 static void pt1_i2c_read_byte(struct pt1 *pt1, int addr, int *addrp, int last)
871 for (i = 0; i < 8; i++)
872 pt1_i2c_read_bit(pt1, addr, &addr);
873 pt1_i2c_write_bit(pt1, addr, &addr, last);
877 static void pt1_i2c_prepare(struct pt1 *pt1, int addr, int *addrp)
879 pt1_i2c_emit(pt1, addr, 1, 0, 1, 1, addr + 1);
880 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
881 pt1_i2c_emit(pt1, addr + 2, 1, 0, 0, 0, addr + 3);
886 pt1_i2c_write_msg(struct pt1 *pt1, int addr, int *addrp, struct i2c_msg *msg)
889 pt1_i2c_prepare(pt1, addr, &addr);
890 pt1_i2c_write_byte(pt1, addr, &addr, msg->addr << 1);
891 for (i = 0; i < msg->len; i++)
892 pt1_i2c_write_byte(pt1, addr, &addr, msg->buf[i]);
897 pt1_i2c_read_msg(struct pt1 *pt1, int addr, int *addrp, struct i2c_msg *msg)
900 pt1_i2c_prepare(pt1, addr, &addr);
901 pt1_i2c_write_byte(pt1, addr, &addr, msg->addr << 1 | 1);
902 for (i = 0; i < msg->len; i++)
903 pt1_i2c_read_byte(pt1, addr, &addr, i == msg->len - 1);
907 static int pt1_i2c_end(struct pt1 *pt1, int addr)
909 pt1_i2c_emit(pt1, addr, 1, 0, 0, 0, addr + 1);
910 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
911 pt1_i2c_emit(pt1, addr + 2, 1, 0, 1, 1, 0);
913 pt1_write_reg(pt1, 0, 0x00000004);
915 if (signal_pending(current))
917 schedule_timeout_interruptible((HZ + 999) / 1000);
918 } while (pt1_read_reg(pt1, 0) & 0x00000080);
922 static void pt1_i2c_begin(struct pt1 *pt1, int *addrp)
927 pt1_i2c_emit(pt1, addr, 0, 0, 1, 1, addr /* itself */);
930 if (!pt1->i2c_running) {
931 pt1_i2c_emit(pt1, addr, 1, 0, 1, 1, addr + 1);
932 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
934 pt1->i2c_running = 1;
939 static int pt1_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
943 struct i2c_msg *msg, *next_msg;
948 pt1 = i2c_get_adapdata(adap);
950 for (i = 0; i < num; i++) {
952 if (msg->flags & I2C_M_RD)
956 next_msg = &msgs[i + 1];
960 if (next_msg && next_msg->flags & I2C_M_RD) {
967 pt1_i2c_begin(pt1, &addr);
968 pt1_i2c_write_msg(pt1, addr, &addr, msg);
969 pt1_i2c_read_msg(pt1, addr, &addr, next_msg);
970 ret = pt1_i2c_end(pt1, addr);
974 word = pt1_read_reg(pt1, 2);
976 next_msg->buf[len] = word;
980 pt1_i2c_begin(pt1, &addr);
981 pt1_i2c_write_msg(pt1, addr, &addr, msg);
982 ret = pt1_i2c_end(pt1, addr);
991 static u32 pt1_i2c_func(struct i2c_adapter *adap)
996 static const struct i2c_algorithm pt1_i2c_algo = {
997 .master_xfer = pt1_i2c_xfer,
998 .functionality = pt1_i2c_func,
1001 static void pt1_i2c_wait(struct pt1 *pt1)
1004 for (i = 0; i < 128; i++)
1005 pt1_i2c_emit(pt1, 0, 0, 0, 1, 1, 0);
1008 static void pt1_i2c_init(struct pt1 *pt1)
1011 for (i = 0; i < 1024; i++)
1012 pt1_i2c_emit(pt1, i, 0, 0, 1, 1, 0);
1015 static void __devexit pt1_remove(struct pci_dev *pdev)
1020 pt1 = pci_get_drvdata(pdev);
1023 kthread_stop(pt1->kthread);
1024 pt1_cleanup_tables(pt1);
1025 pt1_cleanup_frontends(pt1);
1026 pt1_disable_ram(pt1);
1029 pt1_update_power(pt1);
1030 pt1_cleanup_adapters(pt1);
1031 i2c_del_adapter(&pt1->i2c_adap);
1032 pci_set_drvdata(pdev, NULL);
1034 pci_iounmap(pdev, regs);
1035 pci_release_regions(pdev);
1036 pci_disable_device(pdev);
1039 static int __devinit
1040 pt1_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1045 struct i2c_adapter *i2c_adap;
1046 struct task_struct *kthread;
1048 ret = pci_enable_device(pdev);
1052 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1054 goto err_pci_disable_device;
1056 pci_set_master(pdev);
1058 ret = pci_request_regions(pdev, DRIVER_NAME);
1060 goto err_pci_disable_device;
1062 regs = pci_iomap(pdev, 0, 0);
1065 goto err_pci_release_regions;
1068 pt1 = kzalloc(sizeof(struct pt1), GFP_KERNEL);
1071 goto err_pci_iounmap;
1074 mutex_init(&pt1->lock);
1077 pci_set_drvdata(pdev, pt1);
1079 ret = pt1_init_adapters(pt1);
1083 mutex_init(&pt1->lock);
1087 pt1_update_power(pt1);
1089 i2c_adap = &pt1->i2c_adap;
1090 i2c_adap->class = I2C_CLASS_TV_DIGITAL;
1091 i2c_adap->algo = &pt1_i2c_algo;
1092 i2c_adap->algo_data = NULL;
1093 i2c_adap->dev.parent = &pdev->dev;
1094 i2c_set_adapdata(i2c_adap, pt1);
1095 ret = i2c_add_adapter(i2c_adap);
1097 goto err_pt1_cleanup_adapters;
1102 ret = pt1_sync(pt1);
1104 goto err_i2c_del_adapter;
1108 ret = pt1_unlock(pt1);
1110 goto err_i2c_del_adapter;
1112 ret = pt1_reset_pci(pt1);
1114 goto err_i2c_del_adapter;
1116 ret = pt1_reset_ram(pt1);
1118 goto err_i2c_del_adapter;
1120 ret = pt1_enable_ram(pt1);
1122 goto err_i2c_del_adapter;
1124 pt1_init_streams(pt1);
1127 pt1_update_power(pt1);
1128 schedule_timeout_uninterruptible((HZ + 49) / 50);
1131 pt1_update_power(pt1);
1132 schedule_timeout_uninterruptible((HZ + 999) / 1000);
1134 ret = pt1_init_frontends(pt1);
1136 goto err_pt1_disable_ram;
1138 ret = pt1_init_tables(pt1);
1140 goto err_pt1_cleanup_frontends;
1142 kthread = kthread_run(pt1_thread, pt1, "pt1");
1143 if (IS_ERR(kthread)) {
1144 ret = PTR_ERR(kthread);
1145 goto err_pt1_cleanup_tables;
1148 pt1->kthread = kthread;
1151 err_pt1_cleanup_tables:
1152 pt1_cleanup_tables(pt1);
1153 err_pt1_cleanup_frontends:
1154 pt1_cleanup_frontends(pt1);
1155 err_pt1_disable_ram:
1156 pt1_disable_ram(pt1);
1159 pt1_update_power(pt1);
1160 err_pt1_cleanup_adapters:
1161 pt1_cleanup_adapters(pt1);
1162 err_i2c_del_adapter:
1163 i2c_del_adapter(i2c_adap);
1165 pci_set_drvdata(pdev, NULL);
1168 pci_iounmap(pdev, regs);
1169 err_pci_release_regions:
1170 pci_release_regions(pdev);
1171 err_pci_disable_device:
1172 pci_disable_device(pdev);
1178 static struct pci_device_id pt1_id_table[] = {
1179 { PCI_DEVICE(0x10ee, 0x211a) },
1180 { PCI_DEVICE(0x10ee, 0x222a) },
1183 MODULE_DEVICE_TABLE(pci, pt1_id_table);
1185 static struct pci_driver pt1_driver = {
1186 .name = DRIVER_NAME,
1188 .remove = __devexit_p(pt1_remove),
1189 .id_table = pt1_id_table,
1193 static int __init pt1_init(void)
1195 return pci_register_driver(&pt1_driver);
1199 static void __exit pt1_cleanup(void)
1201 pci_unregister_driver(&pt1_driver);
1204 module_init(pt1_init);
1205 module_exit(pt1_cleanup);
1207 MODULE_AUTHOR("Takahito HIRANO <hiranotaka@zng.info>");
1208 MODULE_DESCRIPTION("Earthsoft PT1/PT2 Driver");
1209 MODULE_LICENSE("GPL");