drivers/media/dvb/frontends/zl10353.c

   1 /*
   2  * Driver for Zarlink DVB-T ZL10353 demodulator
   3  *
   4  * Copyright (C) 2006, 2007 Christopher Pascoe <c.pascoe@itee.uq.edu.au>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20  */
  21
  22 #include <linux/kernel.h>
  23 #include <linux/module.h>
  24 #include <linux/init.h>
  25 #include <linux/delay.h>
  26 #include <linux/string.h>
  27 #include <linux/slab.h>
  28 #include <asm/div64.h>
  29
  30 #include "dvb_frontend.h"
  31 #include "zl10353_priv.h"
  32 #include "zl10353.h"
  33
  34 struct zl10353_state {
  35         struct i2c_adapter *i2c;
  36         struct dvb_frontend frontend;
  37
  38         struct zl10353_config config;
  39
  40         enum fe_bandwidth bandwidth;
  41 };
  42
  43 static int debug;
  44 #define dprintk(args...) \
  45         do { \
  46                 if (debug) printk(KERN_DEBUG "zl10353: " args); \
  47         } while (0)
  48
  49 static int debug_regs;
  50
  51 static int zl10353_single_write(struct dvb_frontend *fe, u8 reg, u8 val)
  52 {
  53         struct zl10353_state *state = fe->demodulator_priv;
  54         u8 buf[2] = { reg, val };
  55         struct i2c_msg msg = { .addr = state->config.demod_address, .flags = 0,
  56                                .buf = buf, .len = 2 };
  57         int err = i2c_transfer(state->i2c, &msg, 1);
  58         if (err != 1) {
  59                 printk("zl10353: write to reg %x failed (err = %d)!\n", reg, err);
  60                 return err;
  61         }
  62         return 0;
  63 }
  64
  65 static int zl10353_write(struct dvb_frontend *fe, u8 *ibuf, int ilen)
  66 {
  67         int err, i;
  68         for (i = 0; i < ilen - 1; i++)
  69                 if ((err = zl10353_single_write(fe, ibuf[0] + i, ibuf[i + 1])))
  70                         return err;
  71
  72         return 0;
  73 }
  74
  75 static int zl10353_read_register(struct zl10353_state *state, u8 reg)
  76 {
  77         int ret;
  78         u8 b0[1] = { reg };
  79         u8 b1[1] = { 0 };
  80         struct i2c_msg msg[2] = { { .addr = state->config.demod_address,
  81                                     .flags = 0,
  82                                     .buf = b0, .len = 1 },
  83                                   { .addr = state->config.demod_address,
  84                                     .flags = I2C_M_RD,
  85                                     .buf = b1, .len = 1 } };
  86
  87         ret = i2c_transfer(state->i2c, msg, 2);
  88
  89         if (ret != 2) {
  90                 printk("%s: readreg error (reg=%d, ret==%i)\n",
  91                        __func__, reg, ret);
  92                 return ret;
  93         }
  94
  95         return b1[0];
  96 }
  97
  98 static void zl10353_dump_regs(struct dvb_frontend *fe)
  99 {
 100         struct zl10353_state *state = fe->demodulator_priv;
 101         char buf[52], buf2[4];
 102         int ret;
 103         u8 reg;
 104
 105         /* Dump all registers. */
 106         for (reg = 0; ; reg++) {
 107                 if (reg % 16 == 0) {
 108                         if (reg)
 109                                 printk(KERN_DEBUG "%s\n", buf);
 110                         sprintf(buf, "%02x: ", reg);
 111                 }
 112                 ret = zl10353_read_register(state, reg);
 113                 if (ret >= 0)
 114                         sprintf(buf2, "%02x ", (u8)ret);
 115                 else
 116                         strcpy(buf2, "-- ");
 117                 strcat(buf, buf2);
 118                 if (reg == 0xff)
 119                         break;
 120         }
 121         printk(KERN_DEBUG "%s\n", buf);
 122 }
 123
 124 static void zl10353_calc_nominal_rate(struct dvb_frontend *fe,
 125                                       enum fe_bandwidth bandwidth,
 126                                       u16 *nominal_rate)
 127 {
 128         struct zl10353_state *state = fe->demodulator_priv;
 129         u32 adc_clock = 450560; /* 45.056 MHz */
 130         u64 value;
 131         u8 bw;
 132
 133         if (state->config.adc_clock)
 134                 adc_clock = state->config.adc_clock;
 135
 136         switch (bandwidth) {
 137         case BANDWIDTH_6_MHZ:
 138                 bw = 6;
 139                 break;
 140         case BANDWIDTH_7_MHZ:
 141                 bw = 7;
 142                 break;
 143         case BANDWIDTH_8_MHZ:
 144         default:
 145                 bw = 8;
 146                 break;
 147         }
 148
 149         value = (u64)10 * (1 << 23) / 7 * 125;
 150         value = (bw * value) + adc_clock / 2;
 151         do_div(value, adc_clock);
 152         *nominal_rate = value;
 153
 154         dprintk("%s: bw %d, adc_clock %d => 0x%x\n",
 155                 __func__, bw, adc_clock, *nominal_rate);
 156 }
 157
 158 static void zl10353_calc_input_freq(struct dvb_frontend *fe,
 159                                     u16 *input_freq)
 160 {
 161         struct zl10353_state *state = fe->demodulator_priv;
 162         u32 adc_clock = 450560; /* 45.056  MHz */
 163         int if2 = 361667;       /* 36.1667 MHz */
 164         int ife;
 165         u64 value;
 166
 167         if (state->config.adc_clock)
 168                 adc_clock = state->config.adc_clock;
 169         if (state->config.if2)
 170                 if2 = state->config.if2;
 171
 172         if (adc_clock >= if2 * 2)
 173                 ife = if2;
 174         else {
 175                 ife = adc_clock - (if2 % adc_clock);
 176                 if (ife > adc_clock / 2)
 177                         ife = adc_clock - ife;
 178         }
 179         value = (u64)65536 * ife + adc_clock / 2;
 180         do_div(value, adc_clock);
 181         *input_freq = -value;
 182
 183         dprintk("%s: if2 %d, ife %d, adc_clock %d => %d / 0x%x\n",
 184                 __func__, if2, ife, adc_clock, -(int)value, *input_freq);
 185 }
 186
 187 static int zl10353_sleep(struct dvb_frontend *fe)
 188 {
 189         static u8 zl10353_softdown[] = { 0x50, 0x0C, 0x44 };
 190
 191         zl10353_write(fe, zl10353_softdown, sizeof(zl10353_softdown));
 192         return 0;
 193 }
 194
 195 static int zl10353_set_parameters(struct dvb_frontend *fe,
 196                                   struct dvb_frontend_parameters *param)
 197 {
 198         struct zl10353_state *state = fe->demodulator_priv;
 199         u16 nominal_rate, input_freq;
 200         u8 pllbuf[6] = { 0x67 }, acq_ctl = 0;
 201         u16 tps = 0;
 202         struct dvb_ofdm_parameters *op = &param->u.ofdm;
 203
 204         zl10353_single_write(fe, RESET, 0x80);
 205         udelay(200);
 206         zl10353_single_write(fe, 0xEA, 0x01);
 207         udelay(200);
 208         zl10353_single_write(fe, 0xEA, 0x00);
 209
 210         zl10353_single_write(fe, AGC_TARGET, 0x28);
 211
 212         if (op->transmission_mode != TRANSMISSION_MODE_AUTO)
 213                 acq_ctl |= (1 << 0);
 214         if (op->guard_interval != GUARD_INTERVAL_AUTO)
 215                 acq_ctl |= (1 << 1);
 216         zl10353_single_write(fe, ACQ_CTL, acq_ctl);
 217
 218         switch (op->bandwidth) {
 219         case BANDWIDTH_6_MHZ:
 220                 /* These are extrapolated from the 7 and 8MHz values */
 221                 zl10353_single_write(fe, MCLK_RATIO, 0x97);
 222                 zl10353_single_write(fe, 0x64, 0x34);
 223                 break;
 224         case BANDWIDTH_7_MHZ:
 225                 zl10353_single_write(fe, MCLK_RATIO, 0x86);
 226                 zl10353_single_write(fe, 0x64, 0x35);
 227                 break;
 228         case BANDWIDTH_8_MHZ:
 229         default:
 230                 zl10353_single_write(fe, MCLK_RATIO, 0x75);
 231                 zl10353_single_write(fe, 0x64, 0x36);
 232         }
 233
 234         zl10353_calc_nominal_rate(fe, op->bandwidth, &nominal_rate);
 235         zl10353_single_write(fe, TRL_NOMINAL_RATE_1, msb(nominal_rate));
 236         zl10353_single_write(fe, TRL_NOMINAL_RATE_0, lsb(nominal_rate));
 237         state->bandwidth = op->bandwidth;
 238
 239         zl10353_calc_input_freq(fe, &input_freq);
 240         zl10353_single_write(fe, INPUT_FREQ_1, msb(input_freq));
 241         zl10353_single_write(fe, INPUT_FREQ_0, lsb(input_freq));
 242
 243         /* Hint at TPS settings */
 244         switch (op->code_rate_HP) {
 245         case FEC_2_3:
 246                 tps |= (1 << 7);
 247                 break;
 248         case FEC_3_4:
 249                 tps |= (2 << 7);
 250                 break;
 251         case FEC_5_6:
 252                 tps |= (3 << 7);
 253                 break;
 254         case FEC_7_8:
 255                 tps |= (4 << 7);
 256                 break;
 257         case FEC_1_2:
 258         case FEC_AUTO:
 259                 break;
 260         default:
 261                 return -EINVAL;
 262         }
 263
 264         switch (op->code_rate_LP) {
 265         case FEC_2_3:
 266                 tps |= (1 << 4);
 267                 break;
 268         case FEC_3_4:
 269                 tps |= (2 << 4);
 270                 break;
 271         case FEC_5_6:
 272                 tps |= (3 << 4);
 273                 break;
 274         case FEC_7_8:
 275                 tps |= (4 << 4);
 276                 break;
 277         case FEC_1_2:
 278         case FEC_AUTO:
 279                 break;
 280         case FEC_NONE:
 281                 if (op->hierarchy_information == HIERARCHY_AUTO ||
 282                     op->hierarchy_information == HIERARCHY_NONE)
 283                         break;
 284         default:
 285                 return -EINVAL;
 286         }
 287
 288         switch (op->constellation) {
 289         case QPSK:
 290                 break;
 291         case QAM_AUTO:
 292         case QAM_16:
 293                 tps |= (1 << 13);
 294                 break;
 295         case QAM_64:
 296                 tps |= (2 << 13);
 297                 break;
 298         default:
 299                 return -EINVAL;
 300         }
 301
 302         switch (op->transmission_mode) {
 303         case TRANSMISSION_MODE_2K:
 304         case TRANSMISSION_MODE_AUTO:
 305                 break;
 306         case TRANSMISSION_MODE_8K:
 307                 tps |= (1 << 0);
 308                 break;
 309         default:
 310                 return -EINVAL;
 311         }
 312
 313         switch (op->guard_interval) {
 314         case GUARD_INTERVAL_1_32:
 315         case GUARD_INTERVAL_AUTO:
 316                 break;
 317         case GUARD_INTERVAL_1_16:
 318                 tps |= (1 << 2);
 319                 break;
 320         case GUARD_INTERVAL_1_8:
 321                 tps |= (2 << 2);
 322                 break;
 323         case GUARD_INTERVAL_1_4:
 324                 tps |= (3 << 2);
 325                 break;
 326         default:
 327                 return -EINVAL;
 328         }
 329
 330         switch (op->hierarchy_information) {
 331         case HIERARCHY_AUTO:
 332         case HIERARCHY_NONE:
 333                 break;
 334         case HIERARCHY_1:
 335                 tps |= (1 << 10);
 336                 break;
 337         case HIERARCHY_2:
 338                 tps |= (2 << 10);
 339                 break;
 340         case HIERARCHY_4:
 341                 tps |= (3 << 10);
 342                 break;
 343         default:
 344                 return -EINVAL;
 345         }
 346
 347         zl10353_single_write(fe, TPS_GIVEN_1, msb(tps));
 348         zl10353_single_write(fe, TPS_GIVEN_0, lsb(tps));
 349
 350         if (fe->ops.i2c_gate_ctrl)
 351                 fe->ops.i2c_gate_ctrl(fe, 0);
 352
 353         /*
 354          * If there is no tuner attached to the secondary I2C bus, we call
 355          * set_params to program a potential tuner attached somewhere else.
 356          * Otherwise, we update the PLL registers via calc_regs.
 357          */
 358         if (state->config.no_tuner) {
 359                 if (fe->ops.tuner_ops.set_params) {
 360                         fe->ops.tuner_ops.set_params(fe, param);
 361                         if (fe->ops.i2c_gate_ctrl)
 362                                 fe->ops.i2c_gate_ctrl(fe, 0);
 363                 }
 364         } else if (fe->ops.tuner_ops.calc_regs) {
 365                 fe->ops.tuner_ops.calc_regs(fe, param, pllbuf + 1, 5);
 366                 pllbuf[1] <<= 1;
 367                 zl10353_write(fe, pllbuf, sizeof(pllbuf));
 368         }
 369
 370         zl10353_single_write(fe, 0x5F, 0x13);
 371
 372         /* If no attached tuner or invalid PLL registers, just start the FSM. */
 373         if (state->config.no_tuner || fe->ops.tuner_ops.calc_regs == NULL)
 374                 zl10353_single_write(fe, FSM_GO, 0x01);
 375         else
 376                 zl10353_single_write(fe, TUNER_GO, 0x01);
 377
 378         return 0;
 379 }
 380
 381 static int zl10353_get_parameters(struct dvb_frontend *fe,
 382                                   struct dvb_frontend_parameters *param)
 383 {
 384         struct zl10353_state *state = fe->demodulator_priv;
 385         struct dvb_ofdm_parameters *op = &param->u.ofdm;
 386         int s6, s9;
 387         u16 tps;
 388         static const u8 tps_fec_to_api[8] = {
 389                 FEC_1_2,
 390                 FEC_2_3,
 391                 FEC_3_4,
 392                 FEC_5_6,
 393                 FEC_7_8,
 394                 FEC_AUTO,
 395                 FEC_AUTO,
 396                 FEC_AUTO
 397         };
 398
 399         s6 = zl10353_read_register(state, STATUS_6);
 400         s9 = zl10353_read_register(state, STATUS_9);
 401         if (s6 < 0 || s9 < 0)
 402                 return -EREMOTEIO;
 403         if ((s6 & (1 << 5)) == 0 || (s9 & (1 << 4)) == 0)
 404                 return -EINVAL; /* no FE or TPS lock */
 405
 406         tps = zl10353_read_register(state, TPS_RECEIVED_1) << 8 |
 407               zl10353_read_register(state, TPS_RECEIVED_0);
 408
 409         op->code_rate_HP = tps_fec_to_api[(tps >> 7) & 7];
 410         op->code_rate_LP = tps_fec_to_api[(tps >> 4) & 7];
 411
 412         switch ((tps >> 13) & 3) {
 413         case 0:
 414                 op->constellation = QPSK;
 415                 break;
 416         case 1:
 417                 op->constellation = QAM_16;
 418                 break;
 419         case 2:
 420                 op->constellation = QAM_64;
 421                 break;
 422         default:
 423                 op->constellation = QAM_AUTO;
 424                 break;
 425         }
 426
 427         op->transmission_mode = (tps & 0x01) ? TRANSMISSION_MODE_8K :
 428                                                TRANSMISSION_MODE_2K;
 429
 430         switch ((tps >> 2) & 3) {
 431         case 0:
 432                 op->guard_interval = GUARD_INTERVAL_1_32;
 433                 break;
 434         case 1:
 435                 op->guard_interval = GUARD_INTERVAL_1_16;
 436                 break;
 437         case 2:
 438                 op->guard_interval = GUARD_INTERVAL_1_8;
 439                 break;
 440         case 3:
 441                 op->guard_interval = GUARD_INTERVAL_1_4;
 442                 break;
 443         default:
 444                 op->guard_interval = GUARD_INTERVAL_AUTO;
 445                 break;
 446         }
 447
 448         switch ((tps >> 10) & 7) {
 449         case 0:
 450                 op->hierarchy_information = HIERARCHY_NONE;
 451                 break;
 452         case 1:
 453                 op->hierarchy_information = HIERARCHY_1;
 454                 break;
 455         case 2:
 456                 op->hierarchy_information = HIERARCHY_2;
 457                 break;
 458         case 3:
 459                 op->hierarchy_information = HIERARCHY_4;
 460                 break;
 461         default:
 462                 op->hierarchy_information = HIERARCHY_AUTO;
 463                 break;
 464         }
 465
 466         param->frequency = 0;
 467         op->bandwidth = state->bandwidth;
 468         param->inversion = INVERSION_AUTO;
 469
 470         return 0;
 471 }
 472
 473 static int zl10353_read_status(struct dvb_frontend *fe, fe_status_t *status)
 474 {
 475         struct zl10353_state *state = fe->demodulator_priv;
 476         int s6, s7, s8;
 477
 478         if ((s6 = zl10353_read_register(state, STATUS_6)) < 0)
 479                 return -EREMOTEIO;
 480         if ((s7 = zl10353_read_register(state, STATUS_7)) < 0)
 481                 return -EREMOTEIO;
 482         if ((s8 = zl10353_read_register(state, STATUS_8)) < 0)
 483                 return -EREMOTEIO;
 484
 485         *status = 0;
 486         if (s6 & (1 << 2))
 487                 *status |= FE_HAS_CARRIER;
 488         if (s6 & (1 << 1))
 489                 *status |= FE_HAS_VITERBI;
 490         if (s6 & (1 << 5))
 491                 *status |= FE_HAS_LOCK;
 492         if (s7 & (1 << 4))
 493                 *status |= FE_HAS_SYNC;
 494         if (s8 & (1 << 6))
 495                 *status |= FE_HAS_SIGNAL;
 496
 497         if ((*status & (FE_HAS_CARRIER | FE_HAS_VITERBI | FE_HAS_SYNC)) !=
 498             (FE_HAS_CARRIER | FE_HAS_VITERBI | FE_HAS_SYNC))
 499                 *status &= ~FE_HAS_LOCK;
 500
 501         return 0;
 502 }
 503
 504 static int zl10353_read_ber(struct dvb_frontend *fe, u32 *ber)
 505 {
 506         struct zl10353_state *state = fe->demodulator_priv;
 507
 508         *ber = zl10353_read_register(state, RS_ERR_CNT_2) << 16 |
 509                zl10353_read_register(state, RS_ERR_CNT_1) << 8 |
 510                zl10353_read_register(state, RS_ERR_CNT_0);
 511
 512         return 0;
 513 }
 514
 515 static int zl10353_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
 516 {
 517         struct zl10353_state *state = fe->demodulator_priv;
 518
 519         u16 signal = zl10353_read_register(state, AGC_GAIN_1) << 10 |
 520                      zl10353_read_register(state, AGC_GAIN_0) << 2 | 3;
 521
 522         *strength = ~signal;
 523
 524         return 0;
 525 }
 526
 527 static int zl10353_read_snr(struct dvb_frontend *fe, u16 *snr)
 528 {
 529         struct zl10353_state *state = fe->demodulator_priv;
 530         u8 _snr;
 531
 532         if (debug_regs)
 533                 zl10353_dump_regs(fe);
 534
 535         _snr = zl10353_read_register(state, SNR);
 536         *snr = (_snr << 8) | _snr;
 537
 538         return 0;
 539 }
 540
 541 static int zl10353_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
 542 {
 543         struct zl10353_state *state = fe->demodulator_priv;
 544
 545         *ucblocks = zl10353_read_register(state, RS_UBC_1) << 8 |
 546                     zl10353_read_register(state, RS_UBC_0);
 547
 548         return 0;
 549 }
 550
 551 static int zl10353_get_tune_settings(struct dvb_frontend *fe,
 552                                      struct dvb_frontend_tune_settings
 553                                          *fe_tune_settings)
 554 {
 555         fe_tune_settings->min_delay_ms = 1000;
 556         fe_tune_settings->step_size = 0;
 557         fe_tune_settings->max_drift = 0;
 558
 559         return 0;
 560 }
 561
 562 static int zl10353_init(struct dvb_frontend *fe)
 563 {
 564         struct zl10353_state *state = fe->demodulator_priv;
 565         u8 zl10353_reset_attach[6] = { 0x50, 0x03, 0x64, 0x46, 0x15, 0x0F };
 566         int rc = 0;
 567
 568         if (debug_regs)
 569                 zl10353_dump_regs(fe);
 570         if (state->config.parallel_ts)
 571                 zl10353_reset_attach[2] &= ~0x20;
 572
 573         /* Do a "hard" reset if not already done */
 574         if (zl10353_read_register(state, 0x50) != zl10353_reset_attach[1] ||
 575             zl10353_read_register(state, 0x51) != zl10353_reset_attach[2]) {
 576                 rc = zl10353_write(fe, zl10353_reset_attach,
 577                                    sizeof(zl10353_reset_attach));
 578                 if (debug_regs)
 579                         zl10353_dump_regs(fe);
 580         }
 581
 582         return 0;
 583 }
 584
 585 static int zl10353_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
 586 {
 587         u8 val = 0x0a;
 588
 589         if (enable)
 590                 val |= 0x10;
 591
 592         return zl10353_single_write(fe, 0x62, val);
 593 }
 594
 595 static void zl10353_release(struct dvb_frontend *fe)
 596 {
 597         struct zl10353_state *state = fe->demodulator_priv;
 598         kfree(state);
 599 }
 600
 601 static struct dvb_frontend_ops zl10353_ops;
 602
 603 struct dvb_frontend *zl10353_attach(const struct zl10353_config *config,
 604                                     struct i2c_adapter *i2c)
 605 {
 606         struct zl10353_state *state = NULL;
 607
 608         /* allocate memory for the internal state */
 609         state = kzalloc(sizeof(struct zl10353_state), GFP_KERNEL);
 610         if (state == NULL)
 611                 goto error;
 612
 613         /* setup the state */
 614         state->i2c = i2c;
 615         memcpy(&state->config, config, sizeof(struct zl10353_config));
 616
 617         /* check if the demod is there */
 618         if (zl10353_read_register(state, CHIP_ID) != ID_ZL10353)
 619                 goto error;
 620
 621         /* create dvb_frontend */
 622         memcpy(&state->frontend.ops, &zl10353_ops, sizeof(struct dvb_frontend_ops));
 623         state->frontend.demodulator_priv = state;
 624
 625         return &state->frontend;
 626 error:
 627         kfree(state);
 628         return NULL;
 629 }
 630
 631 static struct dvb_frontend_ops zl10353_ops = {
 632
 633         .info = {
 634                 .name                   = "Zarlink ZL10353 DVB-T",
 635                 .type                   = FE_OFDM,
 636                 .frequency_min          = 174000000,
 637                 .frequency_max          = 862000000,
 638                 .frequency_stepsize     = 166667,
 639                 .frequency_tolerance    = 0,
 640                 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 |
 641                         FE_CAN_FEC_3_4 | FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 |
 642                         FE_CAN_FEC_AUTO |
 643                         FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
 644                         FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_GUARD_INTERVAL_AUTO |
 645                         FE_CAN_HIERARCHY_AUTO | FE_CAN_RECOVER |
 646                         FE_CAN_MUTE_TS
 647         },
 648
 649         .release = zl10353_release,
 650
 651         .init = zl10353_init,
 652         .sleep = zl10353_sleep,
 653         .i2c_gate_ctrl = zl10353_i2c_gate_ctrl,
 654         .write = zl10353_write,
 655
 656         .set_frontend = zl10353_set_parameters,
 657         .get_frontend = zl10353_get_parameters,
 658         .get_tune_settings = zl10353_get_tune_settings,
 659
 660         .read_status = zl10353_read_status,
 661         .read_ber = zl10353_read_ber,
 662         .read_signal_strength = zl10353_read_signal_strength,
 663         .read_snr = zl10353_read_snr,
 664         .read_ucblocks = zl10353_read_ucblocks,
 665 };
 666
 667 module_param(debug, int, 0644);
 668 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
 669
 670 module_param(debug_regs, int, 0644);
 671 MODULE_PARM_DESC(debug_regs, "Turn on/off frontend register dumps (default:off).");
 672
 673 MODULE_DESCRIPTION("Zarlink ZL10353 DVB-T demodulator driver");
 674 MODULE_AUTHOR("Chris Pascoe");
 675 MODULE_LICENSE("GPL");
 676
 677 EXPORT_SYMBOL(zl10353_attach);