drivers/media/dvb/frontends/tda10023.c

   1 /*
   2     TDA10023  - DVB-C decoder
   3     (as used in Philips CU1216-3 NIM and the Reelbox DVB-C tuner card)
   4
   5     Copyright (C) 2005 Georg Acher, BayCom GmbH (acher at baycom dot de)
   6     Copyright (c) 2006 Hartmut Birr (e9hack at gmail dot com)
   7
   8     Remotely based on tda10021.c
   9     Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de>
  10     Copyright (C) 2004 Markus Schulz <msc@antzsystem.de>
  11                    Support for TDA10021
  12
  13     This program is free software; you can redistribute it and/or modify
  14     it under the terms of the GNU General Public License as published by
  15     the Free Software Foundation; either version 2 of the License, or
  16     (at your option) any later version.
  17
  18     This program is distributed in the hope that it will be useful,
  19     but WITHOUT ANY WARRANTY; without even the implied warranty of
  20     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21     GNU General Public License for more details.
  22
  23     You should have received a copy of the GNU General Public License
  24     along with this program; if not, write to the Free Software
  25     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  26 */
  27
  28 #include <linux/delay.h>
  29 #include <linux/errno.h>
  30 #include <linux/init.h>
  31 #include <linux/kernel.h>
  32 #include <linux/module.h>
  33 #include <linux/string.h>
  34 #include <linux/slab.h>
  35
  36 #include <asm/div64.h>
  37
  38 #include "dvb_frontend.h"
  39 #include "tda1002x.h"
  40
  41
  42 struct tda10023_state {
  43         struct i2c_adapter* i2c;
  44         /* configuration settings */
  45         const struct tda1002x_config* config;
  46         struct dvb_frontend frontend;
  47
  48         u8 pwm;
  49         u8 reg0;
  50 };
  51
  52
  53 #define dprintk(x...)
  54
  55 static int verbose;
  56
  57 #define XTAL   28920000UL
  58 #define PLL_M  8UL
  59 #define PLL_P  4UL
  60 #define PLL_N  1UL
  61 #define SYSCLK (XTAL*PLL_M/(PLL_N*PLL_P))  // -> 57840000
  62
  63 static u8 tda10023_inittab[]={
  64         // reg mask val
  65         0x2a,0xff,0x02,  // PLL3, Bypass, Power Down
  66         0xff,0x64,0x00,  // Sleep 100ms
  67         0x2a,0xff,0x03,  // PLL3, Bypass, Power Down
  68         0xff,0x64,0x00,  // Sleep 100ms
  69         0x28,0xff,PLL_M-1,  // PLL1 M=8
  70         0x29,0xff,((PLL_P-1)<<6)|(PLL_N-1),  // PLL2
  71         0x00,0xff,0x23,  // GPR FSAMPLING=1
  72         0x2a,0xff,0x08,  // PLL3 PSACLK=1
  73         0xff,0x64,0x00,  // Sleep 100ms
  74         0x1f,0xff,0x00,  // RESET
  75         0xff,0x64,0x00,  // Sleep 100ms
  76         0xe6,0x0c,0x04,  // RSCFG_IND
  77         0x10,0xc0,0x80,  // DECDVBCFG1 PBER=1
  78
  79         0x0e,0xff,0x82,  // GAIN1
  80         0x03,0x08,0x08,  // CLKCONF DYN=1
  81         0x2e,0xbf,0x30,  // AGCCONF2 TRIAGC=0,POSAGC=ENAGCIF=1 PPWMTUN=0 PPWMIF=0
  82         0x01,0xff,0x30,  // AGCREF
  83         0x1e,0x84,0x84,  // CONTROL SACLK_ON=1
  84         0x1b,0xff,0xc8,  // ADC TWOS=1
  85         0x3b,0xff,0xff,  // IFMAX
  86         0x3c,0xff,0x00,  // IFMIN
  87         0x34,0xff,0x00,  // PWMREF
  88         0x35,0xff,0xff,  // TUNMAX
  89         0x36,0xff,0x00,  // TUNMIN
  90         0x06,0xff,0x7f,  // EQCONF1 POSI=7 ENADAPT=ENEQUAL=DFE=1    // 0x77
  91         0x1c,0x30,0x30,  // EQCONF2 STEPALGO=SGNALGO=1
  92         0x37,0xff,0xf6,  // DELTAF_LSB
  93         0x38,0xff,0xff,  // DELTAF_MSB
  94         0x02,0xff,0x93,  // AGCCONF1  IFS=1 KAGCIF=2 KAGCTUN=3
  95         0x2d,0xff,0xf6,  // SWEEP SWPOS=1 SWDYN=7 SWSTEP=1 SWLEN=2
  96         0x04,0x10,0x00,   // SWRAMP=1
  97         0x12,0xff,0xa1,  // INTP1 POCLKP=1 FEL=1 MFS=0
  98         0x2b,0x01,0xa1,  // INTS1
  99         0x20,0xff,0x04,  // INTP2 SWAPP=? MSBFIRSTP=? INTPSEL=?
 100         0x2c,0xff,0x0d,  // INTP/S TRIP=0 TRIS=0
 101         0xc4,0xff,0x00,
 102         0xc3,0x30,0x00,
 103         0xb5,0xff,0x19,  // ERAGC_THD
 104         0x00,0x03,0x01,  // GPR, CLBS soft reset
 105         0x00,0x03,0x03,  // GPR, CLBS soft reset
 106         0xff,0x64,0x00,  // Sleep 100ms
 107         0xff,0xff,0xff
 108 };
 109
 110 static u8 tda10023_readreg (struct tda10023_state* state, u8 reg)
 111 {
 112         u8 b0 [] = { reg };
 113         u8 b1 [] = { 0 };
 114         struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 },
 115                                   { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
 116         int ret;
 117
 118         ret = i2c_transfer (state->i2c, msg, 2);
 119         if (ret != 2) {
 120                 int num = state->frontend.dvb ? state->frontend.dvb->num : -1;
 121                 printk(KERN_ERR "DVB: TDA10023(%d): %s: readreg error "
 122                         "(reg == 0x%02x, ret == %i)\n",
 123                         num, __func__, reg, ret);
 124         }
 125         return b1[0];
 126 }
 127
 128 static int tda10023_writereg (struct tda10023_state* state, u8 reg, u8 data)
 129 {
 130         u8 buf[] = { reg, data };
 131         struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };
 132         int ret;
 133
 134         ret = i2c_transfer (state->i2c, &msg, 1);
 135         if (ret != 1) {
 136                 int num = state->frontend.dvb ? state->frontend.dvb->num : -1;
 137                 printk(KERN_ERR "DVB: TDA10023(%d): %s, writereg error "
 138                         "(reg == 0x%02x, val == 0x%02x, ret == %i)\n",
 139                         num, __func__, reg, data, ret);
 140         }
 141         return (ret != 1) ? -EREMOTEIO : 0;
 142 }
 143
 144
 145 static int tda10023_writebit (struct tda10023_state* state, u8 reg, u8 mask,u8 data)
 146 {
 147         if (mask==0xff)
 148                 return tda10023_writereg(state, reg, data);
 149         else {
 150                 u8 val;
 151                 val=tda10023_readreg(state,reg);
 152                 val&=~mask;
 153                 val|=(data&mask);
 154                 return tda10023_writereg(state, reg, val);
 155         }
 156 }
 157
 158 static void tda10023_writetab(struct tda10023_state* state, u8* tab)
 159 {
 160         u8 r,m,v;
 161         while (1) {
 162                 r=*tab++;
 163                 m=*tab++;
 164                 v=*tab++;
 165                 if (r==0xff) {
 166                         if (m==0xff)
 167                                 break;
 168                         else
 169                                 msleep(m);
 170                 }
 171                 else
 172                         tda10023_writebit(state,r,m,v);
 173         }
 174 }
 175
 176 //get access to tuner
 177 static int lock_tuner(struct tda10023_state* state)
 178 {
 179         u8 buf[2] = { 0x0f, 0xc0 };
 180         struct i2c_msg msg = {.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};
 181
 182         if(i2c_transfer(state->i2c, &msg, 1) != 1)
 183         {
 184                 printk("tda10023: lock tuner fails\n");
 185                 return -EREMOTEIO;
 186         }
 187         return 0;
 188 }
 189
 190 //release access from tuner
 191 static int unlock_tuner(struct tda10023_state* state)
 192 {
 193         u8 buf[2] = { 0x0f, 0x40 };
 194         struct i2c_msg msg_post={.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};
 195
 196         if(i2c_transfer(state->i2c, &msg_post, 1) != 1)
 197         {
 198                 printk("tda10023: unlock tuner fails\n");
 199                 return -EREMOTEIO;
 200         }
 201         return 0;
 202 }
 203
 204 static int tda10023_setup_reg0 (struct tda10023_state* state, u8 reg0)
 205 {
 206         reg0 |= state->reg0 & 0x63;
 207
 208         tda10023_writereg (state, 0x00, reg0 & 0xfe);
 209         tda10023_writereg (state, 0x00, reg0 | 0x01);
 210
 211         state->reg0 = reg0;
 212         return 0;
 213 }
 214
 215 static int tda10023_set_symbolrate (struct tda10023_state* state, u32 sr)
 216 {
 217         s32 BDR;
 218         s32 BDRI;
 219         s16 SFIL=0;
 220         u16 NDEC = 0;
 221
 222         if (sr < (u32)(SYSCLK/98.40)) {
 223                 NDEC=3;
 224                 SFIL=1;
 225         } else if (sr<(u32)(SYSCLK/64.0)) {
 226                 NDEC=3;
 227                 SFIL=0;
 228         } else if (sr<(u32)(SYSCLK/49.2)) {
 229                 NDEC=2;
 230                 SFIL=1;
 231         } else if (sr<(u32)(SYSCLK/32.0)) {
 232                 NDEC=2;
 233                 SFIL=0;
 234         } else if (sr<(u32)(SYSCLK/24.6)) {
 235                 NDEC=1;
 236                 SFIL=1;
 237         } else if (sr<(u32)(SYSCLK/16.0)) {
 238                 NDEC=1;
 239                 SFIL=0;
 240         } else if (sr<(u32)(SYSCLK/12.3)) {
 241                 NDEC=0;
 242                 SFIL=1;
 243         }
 244
 245         BDRI=SYSCLK*16;
 246         BDRI>>=NDEC;
 247         BDRI +=sr/2;
 248         BDRI /=sr;
 249
 250         if (BDRI>255)
 251                 BDRI=255;
 252
 253         {
 254                 u64 BDRX;
 255
 256                 BDRX=1<<(24+NDEC);
 257                 BDRX*=sr;
 258                 do_div(BDRX,SYSCLK);    // BDRX/=SYSCLK;
 259
 260                 BDR=(s32)BDRX;
 261         }
 262 //      printk("Symbolrate %i, BDR %i BDRI %i, NDEC %i\n",sr,BDR,BDRI,NDEC);
 263         tda10023_writebit (state, 0x03, 0xc0, NDEC<<6);
 264         tda10023_writereg (state, 0x0a, BDR&255);
 265         tda10023_writereg (state, 0x0b, (BDR>>8)&255);
 266         tda10023_writereg (state, 0x0c, (BDR>>16)&31);
 267         tda10023_writereg (state, 0x0d, BDRI);
 268         tda10023_writereg (state, 0x3d, (SFIL<<7));
 269         return 0;
 270 }
 271
 272 static int tda10023_init (struct dvb_frontend *fe)
 273 {
 274         struct tda10023_state* state = fe->demodulator_priv;
 275
 276         dprintk("DVB: TDA10023(%d): init chip\n", fe->adapter->num);
 277
 278         tda10023_writetab(state, tda10023_inittab);
 279
 280         return 0;
 281 }
 282
 283 static int tda10023_set_parameters (struct dvb_frontend *fe,
 284                             struct dvb_frontend_parameters *p)
 285 {
 286         struct tda10023_state* state = fe->demodulator_priv;
 287
 288         static int qamvals[6][6] = {
 289                 //  QAM   LOCKTHR  MSETH   AREF AGCREFNYQ  ERAGCNYQ_THD
 290                 { (5<<2),  0x78,    0x8c,   0x96,   0x78,   0x4c  },  // 4 QAM
 291                 { (0<<2),  0x87,    0xa2,   0x91,   0x8c,   0x57  },  // 16 QAM
 292                 { (1<<2),  0x64,    0x74,   0x96,   0x8c,   0x57  },  // 32 QAM
 293                 { (2<<2),  0x46,    0x43,   0x6a,   0x6a,   0x44  },  // 64 QAM
 294                 { (3<<2),  0x36,    0x34,   0x7e,   0x78,   0x4c  },  // 128 QAM
 295                 { (4<<2),  0x26,    0x23,   0x6c,   0x5c,   0x3c  },  // 256 QAM
 296         };
 297
 298         int qam = p->u.qam.modulation;
 299
 300         if (qam < 0 || qam > 5)
 301                 return -EINVAL;
 302
 303         if (fe->ops.tuner_ops.set_params) {
 304                 fe->ops.tuner_ops.set_params(fe, p);
 305                 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
 306         }
 307
 308         tda10023_set_symbolrate (state, p->u.qam.symbol_rate);
 309         tda10023_writereg (state, 0x05, qamvals[qam][1]);
 310         tda10023_writereg (state, 0x08, qamvals[qam][2]);
 311         tda10023_writereg (state, 0x09, qamvals[qam][3]);
 312         tda10023_writereg (state, 0xb4, qamvals[qam][4]);
 313         tda10023_writereg (state, 0xb6, qamvals[qam][5]);
 314
 315 //      tda10023_writereg (state, 0x04, (p->inversion?0x12:0x32));
 316 //      tda10023_writebit (state, 0x04, 0x60, (p->inversion?0:0x20));
 317         tda10023_writebit (state, 0x04, 0x40, 0x40);
 318         tda10023_setup_reg0 (state, qamvals[qam][0]);
 319
 320         return 0;
 321 }
 322
 323 static int tda10023_read_status(struct dvb_frontend* fe, fe_status_t* status)
 324 {
 325         struct tda10023_state* state = fe->demodulator_priv;
 326         int sync;
 327
 328         *status = 0;
 329
 330         //0x11[1] == CARLOCK -> Carrier locked
 331         //0x11[2] == FSYNC -> Frame synchronisation
 332         //0x11[3] == FEL -> Front End locked
 333         //0x11[6] == NODVB -> DVB Mode Information
 334         sync = tda10023_readreg (state, 0x11);
 335
 336         if (sync & 2)
 337                 *status |= FE_HAS_SIGNAL|FE_HAS_CARRIER;
 338
 339         if (sync & 4)
 340                 *status |= FE_HAS_SYNC|FE_HAS_VITERBI;
 341
 342         if (sync & 8)
 343                 *status |= FE_HAS_LOCK;
 344
 345         return 0;
 346 }
 347
 348 static int tda10023_read_ber(struct dvb_frontend* fe, u32* ber)
 349 {
 350         struct tda10023_state* state = fe->demodulator_priv;
 351         u8 a,b,c;
 352         a=tda10023_readreg(state, 0x14);
 353         b=tda10023_readreg(state, 0x15);
 354         c=tda10023_readreg(state, 0x16)&0xf;
 355         tda10023_writebit (state, 0x10, 0xc0, 0x00);
 356
 357         *ber = a | (b<<8)| (c<<16);
 358         return 0;
 359 }
 360
 361 static int tda10023_read_signal_strength(struct dvb_frontend* fe, u16* strength)
 362 {
 363         struct tda10023_state* state = fe->demodulator_priv;
 364         u8 ifgain=tda10023_readreg(state, 0x2f);
 365
 366         u16 gain = ((255-tda10023_readreg(state, 0x17))) + (255-ifgain)/16;
 367         // Max raw value is about 0xb0 -> Normalize to >0xf0 after 0x90
 368         if (gain>0x90)
 369                 gain=gain+2*(gain-0x90);
 370         if (gain>255)
 371                 gain=255;
 372
 373         *strength = (gain<<8)|gain;
 374         return 0;
 375 }
 376
 377 static int tda10023_read_snr(struct dvb_frontend* fe, u16* snr)
 378 {
 379         struct tda10023_state* state = fe->demodulator_priv;
 380
 381         u8 quality = ~tda10023_readreg(state, 0x18);
 382         *snr = (quality << 8) | quality;
 383         return 0;
 384 }
 385
 386 static int tda10023_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
 387 {
 388         struct tda10023_state* state = fe->demodulator_priv;
 389         u8 a,b,c,d;
 390         a= tda10023_readreg (state, 0x74);
 391         b= tda10023_readreg (state, 0x75);
 392         c= tda10023_readreg (state, 0x76);
 393         d= tda10023_readreg (state, 0x77);
 394         *ucblocks = a | (b<<8)|(c<<16)|(d<<24);
 395
 396         tda10023_writebit (state, 0x10, 0x20,0x00);
 397         tda10023_writebit (state, 0x10, 0x20,0x20);
 398         tda10023_writebit (state, 0x13, 0x01, 0x00);
 399
 400         return 0;
 401 }
 402
 403 static int tda10023_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
 404 {
 405         struct tda10023_state* state = fe->demodulator_priv;
 406         int sync,inv;
 407         s8 afc = 0;
 408
 409         sync = tda10023_readreg(state, 0x11);
 410         afc = tda10023_readreg(state, 0x19);
 411         inv = tda10023_readreg(state, 0x04);
 412
 413         if (verbose) {
 414                 /* AFC only valid when carrier has been recovered */
 415                 printk(sync & 2 ? "DVB: TDA10023(%d): AFC (%d) %dHz\n" :
 416                                   "DVB: TDA10023(%d): [AFC (%d) %dHz]\n",
 417                         state->frontend.dvb->num, afc,
 418                        -((s32)p->u.qam.symbol_rate * afc) >> 10);
 419         }
 420
 421         p->inversion = (inv&0x20?0:1);
 422         p->u.qam.modulation = ((state->reg0 >> 2) & 7) + QAM_16;
 423
 424         p->u.qam.fec_inner = FEC_NONE;
 425         p->frequency = ((p->frequency + 31250) / 62500) * 62500;
 426
 427         if (sync & 2)
 428                 p->frequency -= ((s32)p->u.qam.symbol_rate * afc) >> 10;
 429
 430         return 0;
 431 }
 432
 433 static int tda10023_sleep(struct dvb_frontend* fe)
 434 {
 435         struct tda10023_state* state = fe->demodulator_priv;
 436
 437         tda10023_writereg (state, 0x1b, 0x02);  /* pdown ADC */
 438         tda10023_writereg (state, 0x00, 0x80);  /* standby */
 439
 440         return 0;
 441 }
 442
 443 static int tda10023_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
 444 {
 445         struct tda10023_state* state = fe->demodulator_priv;
 446
 447         if (enable) {
 448                 lock_tuner(state);
 449         } else {
 450                 unlock_tuner(state);
 451         }
 452         return 0;
 453 }
 454
 455 static void tda10023_release(struct dvb_frontend* fe)
 456 {
 457         struct tda10023_state* state = fe->demodulator_priv;
 458         kfree(state);
 459 }
 460
 461 static struct dvb_frontend_ops tda10023_ops;
 462
 463 struct dvb_frontend* tda10023_attach(const struct tda1002x_config* config,
 464                                      struct i2c_adapter* i2c,
 465                                      u8 pwm)
 466 {
 467         struct tda10023_state* state = NULL;
 468         int i;
 469
 470         /* allocate memory for the internal state */
 471         state = kzalloc(sizeof(struct tda10023_state), GFP_KERNEL);
 472         if (state == NULL) goto error;
 473
 474         /* setup the state */
 475         state->config = config;
 476         state->i2c = i2c;
 477         memcpy(&state->frontend.ops, &tda10023_ops, sizeof(struct dvb_frontend_ops));
 478         state->pwm = pwm;
 479         for (i=0; i < ARRAY_SIZE(tda10023_inittab);i+=3) {
 480                 if (tda10023_inittab[i] == 0x00) {
 481                         state->reg0 = tda10023_inittab[i+2];
 482                         break;
 483                 }
 484         }
 485
 486         // Wakeup if in standby
 487         tda10023_writereg (state, 0x00, 0x33);
 488         /* check if the demod is there */
 489         if ((tda10023_readreg(state, 0x1a) & 0xf0) != 0x70) goto error;
 490
 491         /* create dvb_frontend */
 492         memcpy(&state->frontend.ops, &tda10023_ops, sizeof(struct dvb_frontend_ops));
 493         state->frontend.demodulator_priv = state;
 494         return &state->frontend;
 495
 496 error:
 497         kfree(state);
 498         return NULL;
 499 }
 500
 501 static struct dvb_frontend_ops tda10023_ops = {
 502
 503         .info = {
 504                 .name = "Philips TDA10023 DVB-C",
 505                 .type = FE_QAM,
 506                 .frequency_stepsize = 62500,
 507                 .frequency_min = 47000000,
 508                 .frequency_max = 862000000,
 509                 .symbol_rate_min = (SYSCLK/2)/64,     /* SACLK/64 == (SYSCLK/2)/64 */
 510                 .symbol_rate_max = (SYSCLK/2)/4,      /* SACLK/4 */
 511                 .caps = 0x400 | //FE_CAN_QAM_4
 512                         FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 |
 513                         FE_CAN_QAM_128 | FE_CAN_QAM_256 |
 514                         FE_CAN_FEC_AUTO
 515         },
 516
 517         .release = tda10023_release,
 518
 519         .init = tda10023_init,
 520         .sleep = tda10023_sleep,
 521         .i2c_gate_ctrl = tda10023_i2c_gate_ctrl,
 522
 523         .set_frontend = tda10023_set_parameters,
 524         .get_frontend = tda10023_get_frontend,
 525
 526         .read_status = tda10023_read_status,
 527         .read_ber = tda10023_read_ber,
 528         .read_signal_strength = tda10023_read_signal_strength,
 529         .read_snr = tda10023_read_snr,
 530         .read_ucblocks = tda10023_read_ucblocks,
 531 };
 532
 533
 534 MODULE_DESCRIPTION("Philips TDA10023 DVB-C demodulator driver");
 535 MODULE_AUTHOR("Georg Acher, Hartmut Birr");
 536 MODULE_LICENSE("GPL");
 537
 538 EXPORT_SYMBOL(tda10023_attach);