2 * Support for LGDT3302 and LGDT3303 - VSB/QAM
4 * Copyright (C) 2005 Wilson Michaels <wilsonmichaels@earthlink.net>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 * NOTES ABOUT THIS DRIVER
25 * This Linux driver supports:
26 * DViCO FusionHDTV 3 Gold-Q
27 * DViCO FusionHDTV 3 Gold-T
28 * DViCO FusionHDTV 5 Gold
29 * DViCO FusionHDTV 5 Lite
30 * Air2PC/AirStar 2 ATSC 3rd generation (HD5000)
33 * signal strength always returns 0.
37 #include <linux/kernel.h>
38 #include <linux/module.h>
39 #include <linux/moduleparam.h>
40 #include <linux/init.h>
41 #include <linux/delay.h>
42 #include <linux/string.h>
43 #include <linux/slab.h>
44 #include <asm/byteorder.h>
46 #include "dvb_frontend.h"
47 #include "lgdt330x_priv.h"
51 module_param(debug, int, 0644);
52 MODULE_PARM_DESC(debug,"Turn on/off lgdt330x frontend debugging (default:off).");
53 #define dprintk(args...) \
55 if (debug) printk(KERN_DEBUG "lgdt330x: " args); \
60 struct i2c_adapter* i2c;
61 struct dvb_frontend_ops ops;
63 /* Configuration settings */
64 const struct lgdt330x_config* config;
66 struct dvb_frontend frontend;
68 /* Demodulator private data */
69 fe_modulation_t current_modulation;
71 /* Tuner private data */
72 u32 current_frequency;
75 static int i2c_write_demod_bytes (struct lgdt330x_state* state,
76 u8 *buf, /* data bytes to send */
77 int len /* number of bytes to send */ )
80 { .addr = state->config->demod_address,
87 for (i=0; i<len-1; i+=2){
88 if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
89 printk(KERN_WARNING "lgdt330x: %s error (addr %02x <- %02x, err = %i)\n", __FUNCTION__, msg.buf[0], msg.buf[1], err);
101 * This routine writes the register (reg) to the demod bus
102 * then reads the data returned for (len) bytes.
105 static u8 i2c_read_demod_bytes (struct lgdt330x_state* state,
106 enum I2C_REG reg, u8* buf, int len)
109 struct i2c_msg msg [] = {
110 { .addr = state->config->demod_address,
111 .flags = 0, .buf = wr, .len = 1 },
112 { .addr = state->config->demod_address,
113 .flags = I2C_M_RD, .buf = buf, .len = len },
116 ret = i2c_transfer(state->i2c, msg, 2);
118 printk(KERN_WARNING "lgdt330x: %s: addr 0x%02x select 0x%02x error (ret == %i)\n", __FUNCTION__, state->config->demod_address, reg, ret);
126 static int lgdt3302_SwReset(struct lgdt330x_state* state)
131 0x00 /* bit 6 is active low software reset
132 * bits 5-0 are 1 to mask interrupts */
135 ret = i2c_write_demod_bytes(state,
136 reset, sizeof(reset));
139 /* force reset high (inactive) and unmask interrupts */
141 ret = i2c_write_demod_bytes(state,
142 reset, sizeof(reset));
147 static int lgdt3303_SwReset(struct lgdt330x_state* state)
152 0x00 /* bit 0 is active low software reset */
155 ret = i2c_write_demod_bytes(state,
156 reset, sizeof(reset));
159 /* force reset high (inactive) */
161 ret = i2c_write_demod_bytes(state,
162 reset, sizeof(reset));
167 static int lgdt330x_SwReset(struct lgdt330x_state* state)
169 switch (state->config->demod_chip) {
171 return lgdt3302_SwReset(state);
173 return lgdt3303_SwReset(state);
179 static int lgdt330x_init(struct dvb_frontend* fe)
181 /* Hardware reset is done using gpio[0] of cx23880x chip.
182 * I'd like to do it here, but don't know how to find chip address.
183 * cx88-cards.c arranges for the reset bit to be inactive (high).
184 * Maybe there needs to be a callable function in cx88-core or
185 * the caller of this function needs to do it. */
188 * Array of byte pairs <address, value>
189 * to initialize each different chip
191 static u8 lgdt3302_init_data[] = {
192 /* Use 50MHz parameter values from spec sheet since xtal is 50 */
193 /* Change the value of NCOCTFV[25:0] of carrier
194 recovery center frequency register */
195 VSB_CARRIER_FREQ0, 0x00,
196 VSB_CARRIER_FREQ1, 0x87,
197 VSB_CARRIER_FREQ2, 0x8e,
198 VSB_CARRIER_FREQ3, 0x01,
199 /* Change the TPCLK pin polarity
200 data is valid on falling clock */
202 /* Change the value of IFBW[11:0] of
203 AGC IF/RF loop filter bandwidth register */
204 AGC_RF_BANDWIDTH0, 0x40,
205 AGC_RF_BANDWIDTH1, 0x93,
206 AGC_RF_BANDWIDTH2, 0x00,
207 /* Change the value of bit 6, 'nINAGCBY' and
208 'NSSEL[1:0] of ACG function control register 2 */
209 AGC_FUNC_CTRL2, 0xc6,
210 /* Change the value of bit 6 'RFFIX'
211 of AGC function control register 3 */
212 AGC_FUNC_CTRL3, 0x40,
213 /* Set the value of 'INLVTHD' register 0x2a/0x2c
217 /* Change the value of IAGCBW[15:8]
218 of inner AGC loop filter bandwith */
219 AGC_LOOP_BANDWIDTH0, 0x08,
220 AGC_LOOP_BANDWIDTH1, 0x9a
223 static u8 lgdt3303_init_data[] = {
227 static u8 flip_lgdt3303_init_data[] = {
232 struct lgdt330x_state* state = fe->demodulator_priv;
236 switch (state->config->demod_chip) {
238 chip_name = "LGDT3302";
239 err = i2c_write_demod_bytes(state, lgdt3302_init_data,
240 sizeof(lgdt3302_init_data));
243 chip_name = "LGDT3303";
244 if (state->config->clock_polarity_flip) {
245 err = i2c_write_demod_bytes(state, flip_lgdt3303_init_data,
246 sizeof(flip_lgdt3303_init_data));
248 err = i2c_write_demod_bytes(state, lgdt3303_init_data,
249 sizeof(lgdt3303_init_data));
253 chip_name = "undefined";
254 printk (KERN_WARNING "Only LGDT3302 and LGDT3303 are supported chips.\n");
257 dprintk("%s entered as %s\n", __FUNCTION__, chip_name);
260 return lgdt330x_SwReset(state);
263 static int lgdt330x_read_ber(struct dvb_frontend* fe, u32* ber)
265 *ber = 0; /* Not supplied by the demod chips */
269 static int lgdt330x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
271 struct lgdt330x_state* state = fe->demodulator_priv;
275 switch (state->config->demod_chip) {
277 err = i2c_read_demod_bytes(state, LGDT3302_PACKET_ERR_COUNTER1,
281 err = i2c_read_demod_bytes(state, LGDT3303_PACKET_ERR_COUNTER1,
286 "Only LGDT3302 and LGDT3303 are supported chips.\n");
290 *ucblocks = (buf[0] << 8) | buf[1];
294 static int lgdt330x_set_parameters(struct dvb_frontend* fe,
295 struct dvb_frontend_parameters *param)
298 * Array of byte pairs <address, value>
299 * to initialize 8VSB for lgdt3303 chip 50 MHz IF
301 static u8 lgdt3303_8vsb_44_data[] = {
310 * Array of byte pairs <address, value>
311 * to initialize QAM for lgdt3303 chip
313 static u8 lgdt3303_qam_data[] = {
326 struct lgdt330x_state* state = fe->demodulator_priv;
328 static u8 top_ctrl_cfg[] = { TOP_CONTROL, 0x03 };
331 /* Change only if we are actually changing the modulation */
332 if (state->current_modulation != param->u.vsb.modulation) {
333 switch(param->u.vsb.modulation) {
335 dprintk("%s: VSB_8 MODE\n", __FUNCTION__);
337 /* Select VSB mode */
338 top_ctrl_cfg[1] = 0x03;
340 /* Select ANT connector if supported by card */
341 if (state->config->pll_rf_set)
342 state->config->pll_rf_set(fe, 1);
344 if (state->config->demod_chip == LGDT3303) {
345 err = i2c_write_demod_bytes(state, lgdt3303_8vsb_44_data,
346 sizeof(lgdt3303_8vsb_44_data));
351 dprintk("%s: QAM_64 MODE\n", __FUNCTION__);
353 /* Select QAM_64 mode */
354 top_ctrl_cfg[1] = 0x00;
356 /* Select CABLE connector if supported by card */
357 if (state->config->pll_rf_set)
358 state->config->pll_rf_set(fe, 0);
360 if (state->config->demod_chip == LGDT3303) {
361 err = i2c_write_demod_bytes(state, lgdt3303_qam_data,
362 sizeof(lgdt3303_qam_data));
367 dprintk("%s: QAM_256 MODE\n", __FUNCTION__);
369 /* Select QAM_256 mode */
370 top_ctrl_cfg[1] = 0x01;
372 /* Select CABLE connector if supported by card */
373 if (state->config->pll_rf_set)
374 state->config->pll_rf_set(fe, 0);
376 if (state->config->demod_chip == LGDT3303) {
377 err = i2c_write_demod_bytes(state, lgdt3303_qam_data,
378 sizeof(lgdt3303_qam_data));
382 printk(KERN_WARNING "lgdt330x: %s: Modulation type(%d) UNSUPPORTED\n", __FUNCTION__, param->u.vsb.modulation);
386 * select serial or parallel MPEG harware interface
387 * Serial: 0x04 for LGDT3302 or 0x40 for LGDT3303
390 top_ctrl_cfg[1] |= state->config->serial_mpeg;
392 /* Select the requested mode */
393 i2c_write_demod_bytes(state, top_ctrl_cfg,
394 sizeof(top_ctrl_cfg));
395 if (state->config->set_ts_params)
396 state->config->set_ts_params(fe, 0);
397 state->current_modulation = param->u.vsb.modulation;
400 /* Tune to the specified frequency */
401 if (state->config->pll_set)
402 state->config->pll_set(fe, param);
404 /* Keep track of the new frequency */
405 state->current_frequency = param->frequency;
407 lgdt330x_SwReset(state);
411 static int lgdt330x_get_frontend(struct dvb_frontend* fe,
412 struct dvb_frontend_parameters* param)
414 struct lgdt330x_state *state = fe->demodulator_priv;
415 param->frequency = state->current_frequency;
419 static int lgdt3302_read_status(struct dvb_frontend* fe, fe_status_t* status)
421 struct lgdt330x_state* state = fe->demodulator_priv;
424 *status = 0; /* Reset status result */
426 /* AGC status register */
427 i2c_read_demod_bytes(state, AGC_STATUS, buf, 1);
428 dprintk("%s: AGC_STATUS = 0x%02x\n", __FUNCTION__, buf[0]);
429 if ((buf[0] & 0x0c) == 0x8){
430 /* Test signal does not exist flag */
431 /* as well as the AGC lock flag. */
432 *status |= FE_HAS_SIGNAL;
434 /* Without a signal all other status bits are meaningless */
439 * You must set the Mask bits to 1 in the IRQ_MASK in order
440 * to see that status bit in the IRQ_STATUS register.
441 * This is done in SwReset();
444 i2c_read_demod_bytes(state, TOP_CONTROL, buf, sizeof(buf));
445 dprintk("%s: TOP_CONTROL = 0x%02x, IRO_MASK = 0x%02x, IRQ_STATUS = 0x%02x\n", __FUNCTION__, buf[0], buf[1], buf[2]);
449 if ((buf[2] & 0x03) == 0x01) {
450 *status |= FE_HAS_SYNC;
453 /* FEC error status */
454 if ((buf[2] & 0x0c) == 0x08) {
455 *status |= FE_HAS_LOCK;
456 *status |= FE_HAS_VITERBI;
459 /* Carrier Recovery Lock Status Register */
460 i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1);
461 dprintk("%s: CARRIER_LOCK = 0x%02x\n", __FUNCTION__, buf[0]);
462 switch (state->current_modulation) {
465 /* Need to undestand why there are 3 lock levels here */
466 if ((buf[0] & 0x07) == 0x07)
467 *status |= FE_HAS_CARRIER;
470 if ((buf[0] & 0x80) == 0x80)
471 *status |= FE_HAS_CARRIER;
474 printk("KERN_WARNING lgdt330x: %s: Modulation set to unsupported value\n", __FUNCTION__);
480 static int lgdt3303_read_status(struct dvb_frontend* fe, fe_status_t* status)
482 struct lgdt330x_state* state = fe->demodulator_priv;
486 *status = 0; /* Reset status result */
488 /* lgdt3303 AGC status register */
489 err = i2c_read_demod_bytes(state, 0x58, buf, 1);
493 dprintk("%s: AGC_STATUS = 0x%02x\n", __FUNCTION__, buf[0]);
494 if ((buf[0] & 0x21) == 0x01){
495 /* Test input signal does not exist flag */
496 /* as well as the AGC lock flag. */
497 *status |= FE_HAS_SIGNAL;
499 /* Without a signal all other status bits are meaningless */
503 /* Carrier Recovery Lock Status Register */
504 i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1);
505 dprintk("%s: CARRIER_LOCK = 0x%02x\n", __FUNCTION__, buf[0]);
506 switch (state->current_modulation) {
509 /* Need to undestand why there are 3 lock levels here */
510 if ((buf[0] & 0x07) == 0x07)
511 *status |= FE_HAS_CARRIER;
514 i2c_read_demod_bytes(state, 0x8a, buf, 1);
515 if ((buf[0] & 0x04) == 0x04)
516 *status |= FE_HAS_SYNC;
517 if ((buf[0] & 0x01) == 0x01)
518 *status |= FE_HAS_LOCK;
519 if ((buf[0] & 0x08) == 0x08)
520 *status |= FE_HAS_VITERBI;
523 if ((buf[0] & 0x80) == 0x80)
524 *status |= FE_HAS_CARRIER;
527 i2c_read_demod_bytes(state, 0x38, buf, 1);
528 if ((buf[0] & 0x02) == 0x00)
529 *status |= FE_HAS_SYNC;
530 if ((buf[0] & 0x01) == 0x01) {
531 *status |= FE_HAS_LOCK;
532 *status |= FE_HAS_VITERBI;
536 printk("KERN_WARNING lgdt330x: %s: Modulation set to unsupported value\n", __FUNCTION__);
541 static int lgdt330x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
543 /* not directly available. */
548 static int lgdt3302_read_snr(struct dvb_frontend* fe, u16* snr)
552 * Spec sheet shows formula for SNR_EQ = 10 log10(25 * 24**2 / noise)
553 * and SNR_PH = 10 log10(25 * 32**2 / noise) for equalizer and phase tracker
554 * respectively. The following tables are built on these formulas.
555 * The usual definition is SNR = 20 log10(signal/noise)
556 * If the specification is wrong the value retuned is 1/2 the actual SNR in db.
558 * This table is a an ordered list of noise values computed by the
559 * formula from the spec sheet such that the index into the table
560 * starting at 43 or 45 is the SNR value in db. There are duplicate noise
561 * value entries at the beginning because the SNR varies more than
562 * 1 db for a change of 1 digit in noise at very small values of noise.
564 * Examples from SNR_EQ table:
582 static const u32 SNR_EQ[] =
583 { 1, 2, 2, 2, 3, 3, 4, 4, 5, 7,
584 9, 11, 13, 17, 21, 26, 33, 41, 52, 65,
585 81, 102, 129, 162, 204, 257, 323, 406, 511, 644,
586 810, 1020, 1284, 1616, 2035, 2561, 3224, 4059, 5110, 6433,
587 8098, 10195, 12835, 16158, 20341, 25608, 32238, 40585, 51094, 64323,
588 80978, 101945, 128341, 161571, 203406, 256073, 0x40000
591 static const u32 SNR_PH[] =
592 { 1, 2, 2, 2, 3, 3, 4, 5, 6, 8,
593 10, 12, 15, 19, 23, 29, 37, 46, 58, 73,
594 91, 115, 144, 182, 229, 288, 362, 456, 574, 722,
595 909, 1144, 1440, 1813, 2282, 2873, 3617, 4553, 5732, 7216,
596 9084, 11436, 14396, 18124, 22817, 28724, 36161, 45524, 57312, 72151,
597 90833, 114351, 143960, 181235, 228161, 0x080000
600 static u8 buf[5];/* read data buffer */
601 static u32 noise; /* noise value */
602 static u32 snr_db; /* index into SNR_EQ[] */
603 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
605 /* read both equalizer and phase tracker noise data */
606 i2c_read_demod_bytes(state, EQPH_ERR0, buf, sizeof(buf));
608 if (state->current_modulation == VSB_8) {
609 /* Equalizer Mean-Square Error Register for VSB */
610 noise = ((buf[0] & 7) << 16) | (buf[1] << 8) | buf[2];
613 * Look up noise value in table.
614 * A better search algorithm could be used...
615 * watch out there are duplicate entries.
617 for (snr_db = 0; snr_db < sizeof(SNR_EQ); snr_db++) {
618 if (noise < SNR_EQ[snr_db]) {
624 /* Phase Tracker Mean-Square Error Register for QAM */
625 noise = ((buf[0] & 7<<3) << 13) | (buf[3] << 8) | buf[4];
627 /* Look up noise value in table. */
628 for (snr_db = 0; snr_db < sizeof(SNR_PH); snr_db++) {
629 if (noise < SNR_PH[snr_db]) {
636 /* Return the raw noise value */
637 static u8 buf[5];/* read data buffer */
638 static u32 noise; /* noise value */
639 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
641 /* read both equalizer and pase tracker noise data */
642 i2c_read_demod_bytes(state, EQPH_ERR0, buf, sizeof(buf));
644 if (state->current_modulation == VSB_8) {
645 /* Phase Tracker Mean-Square Error Register for VSB */
646 noise = ((buf[0] & 7<<3) << 13) | (buf[3] << 8) | buf[4];
649 /* Carrier Recovery Mean-Square Error for QAM */
650 i2c_read_demod_bytes(state, 0x1a, buf, 2);
651 noise = ((buf[0] & 3) << 8) | buf[1];
654 /* Small values for noise mean signal is better so invert noise */
658 dprintk("%s: noise = 0x%05x, snr = %idb\n",__FUNCTION__, noise, *snr);
663 static int lgdt3303_read_snr(struct dvb_frontend* fe, u16* snr)
665 /* Return the raw noise value */
666 static u8 buf[5];/* read data buffer */
667 static u32 noise; /* noise value */
668 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
670 if (state->current_modulation == VSB_8) {
672 /* Phase Tracker Mean-Square Error Register for VSB */
673 noise = ((buf[0] & 7) << 16) | (buf[3] << 8) | buf[4];
676 /* Carrier Recovery Mean-Square Error for QAM */
677 i2c_read_demod_bytes(state, 0x1a, buf, 2);
678 noise = (buf[0] << 8) | buf[1];
681 /* Small values for noise mean signal is better so invert noise */
684 dprintk("%s: noise = 0x%05x, snr = %idb\n",__FUNCTION__, noise, *snr);
689 static int lgdt330x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fe_tune_settings)
691 /* I have no idea about this - it may not be needed */
692 fe_tune_settings->min_delay_ms = 500;
693 fe_tune_settings->step_size = 0;
694 fe_tune_settings->max_drift = 0;
698 static void lgdt330x_release(struct dvb_frontend* fe)
700 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
704 static struct dvb_frontend_ops lgdt3302_ops;
705 static struct dvb_frontend_ops lgdt3303_ops;
707 struct dvb_frontend* lgdt330x_attach(const struct lgdt330x_config* config,
708 struct i2c_adapter* i2c)
710 struct lgdt330x_state* state = NULL;
713 /* Allocate memory for the internal state */
714 state = (struct lgdt330x_state*) kmalloc(sizeof(struct lgdt330x_state), GFP_KERNEL);
717 memset(state,0,sizeof(*state));
719 /* Setup the state */
720 state->config = config;
722 switch (config->demod_chip) {
724 memcpy(&state->ops, &lgdt3302_ops, sizeof(struct dvb_frontend_ops));
727 memcpy(&state->ops, &lgdt3303_ops, sizeof(struct dvb_frontend_ops));
733 /* Verify communication with demod chip */
734 if (i2c_read_demod_bytes(state, 2, buf, 1))
737 state->current_frequency = -1;
738 state->current_modulation = -1;
740 /* Create dvb_frontend */
741 state->frontend.ops = &state->ops;
742 state->frontend.demodulator_priv = state;
743 return &state->frontend;
747 dprintk("%s: ERROR\n",__FUNCTION__);
751 static struct dvb_frontend_ops lgdt3302_ops = {
753 .name= "LG Electronics LGDT3302 VSB/QAM Frontend",
755 .frequency_min= 54000000,
756 .frequency_max= 858000000,
757 .frequency_stepsize= 62500,
758 .symbol_rate_min = 5056941, /* QAM 64 */
759 .symbol_rate_max = 10762000, /* VSB 8 */
760 .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
762 .init = lgdt330x_init,
763 .set_frontend = lgdt330x_set_parameters,
764 .get_frontend = lgdt330x_get_frontend,
765 .get_tune_settings = lgdt330x_get_tune_settings,
766 .read_status = lgdt3302_read_status,
767 .read_ber = lgdt330x_read_ber,
768 .read_signal_strength = lgdt330x_read_signal_strength,
769 .read_snr = lgdt3302_read_snr,
770 .read_ucblocks = lgdt330x_read_ucblocks,
771 .release = lgdt330x_release,
774 static struct dvb_frontend_ops lgdt3303_ops = {
776 .name= "LG Electronics LGDT3303 VSB/QAM Frontend",
778 .frequency_min= 54000000,
779 .frequency_max= 858000000,
780 .frequency_stepsize= 62500,
781 .symbol_rate_min = 5056941, /* QAM 64 */
782 .symbol_rate_max = 10762000, /* VSB 8 */
783 .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
785 .init = lgdt330x_init,
786 .set_frontend = lgdt330x_set_parameters,
787 .get_frontend = lgdt330x_get_frontend,
788 .get_tune_settings = lgdt330x_get_tune_settings,
789 .read_status = lgdt3303_read_status,
790 .read_ber = lgdt330x_read_ber,
791 .read_signal_strength = lgdt330x_read_signal_strength,
792 .read_snr = lgdt3303_read_snr,
793 .read_ucblocks = lgdt330x_read_ucblocks,
794 .release = lgdt330x_release,
797 MODULE_DESCRIPTION("LGDT330X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
798 MODULE_AUTHOR("Wilson Michaels");
799 MODULE_LICENSE("GPL");
801 EXPORT_SYMBOL(lgdt330x_attach);