2 * driver for ENE KB3926 B/C/D/E/F CIR (pnp id: ENE0XXX)
4 * Copyright (C) 2010 Maxim Levitsky <maximlevitsky@gmail.com>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of the
9 * License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
22 * Sami R. <maesesami@gmail.com> for lot of help in debugging and therefore
23 * bringing to life support for transmission & learning mode.
25 * Charlie Andrews <charliethepilot@googlemail.com> for lots of help in
26 * bringing up the support of new firmware buffer that is popular
29 * ENE for partial device documentation
33 #include <linux/kernel.h>
34 #include <linux/module.h>
35 #include <linux/pnp.h>
37 #include <linux/interrupt.h>
38 #include <linux/sched.h>
39 #include <linux/slab.h>
40 #include <linux/input.h>
41 #include <media/ir-core.h>
42 #include <media/ir-common.h>
45 static int sample_period;
46 static bool learning_mode;
50 static void ene_set_reg_addr(struct ene_device *dev, u16 reg)
52 outb(reg >> 8, dev->hw_io + ENE_ADDR_HI);
53 outb(reg & 0xFF, dev->hw_io + ENE_ADDR_LO);
56 /* read a hardware register */
57 static u8 ene_read_reg(struct ene_device *dev, u16 reg)
60 ene_set_reg_addr(dev, reg);
61 retval = inb(dev->hw_io + ENE_IO);
62 dbg_regs("reg %04x == %02x", reg, retval);
66 /* write a hardware register */
67 static void ene_write_reg(struct ene_device *dev, u16 reg, u8 value)
69 dbg_regs("reg %04x <- %02x", reg, value);
70 ene_set_reg_addr(dev, reg);
71 outb(value, dev->hw_io + ENE_IO);
74 /* Set bits in hardware register */
75 static void ene_set_reg_mask(struct ene_device *dev, u16 reg, u8 mask)
77 dbg_regs("reg %04x |= %02x", reg, mask);
78 ene_set_reg_addr(dev, reg);
79 outb(inb(dev->hw_io + ENE_IO) | mask, dev->hw_io + ENE_IO);
82 /* Clear bits in hardware register */
83 static void ene_clear_reg_mask(struct ene_device *dev, u16 reg, u8 mask)
85 dbg_regs("reg %04x &= ~%02x ", reg, mask);
86 ene_set_reg_addr(dev, reg);
87 outb(inb(dev->hw_io + ENE_IO) & ~mask, dev->hw_io + ENE_IO);
90 /* A helper to set/clear a bit in register according to boolean variable */
91 static void ene_set_clear_reg_mask(struct ene_device *dev, u16 reg, u8 mask,
95 ene_set_reg_mask(dev, reg, mask);
97 ene_clear_reg_mask(dev, reg, mask);
100 /* detect hardware features */
101 static int ene_hw_detect(struct ene_device *dev)
103 u8 chip_major, chip_minor;
104 u8 hw_revision, old_ver;
107 ene_clear_reg_mask(dev, ENE_ECSTS, ENE_ECSTS_RSRVD);
108 chip_major = ene_read_reg(dev, ENE_ECVER_MAJOR);
109 chip_minor = ene_read_reg(dev, ENE_ECVER_MINOR);
110 ene_set_reg_mask(dev, ENE_ECSTS, ENE_ECSTS_RSRVD);
112 hw_revision = ene_read_reg(dev, ENE_ECHV);
113 old_ver = ene_read_reg(dev, ENE_HW_VER_OLD);
115 dev->pll_freq = (ene_read_reg(dev, ENE_PLLFRH) << 4) +
116 (ene_read_reg(dev, ENE_PLLFRL) >> 4);
118 if (sample_period != ENE_DEFAULT_SAMPLE_PERIOD)
119 dev->rx_period_adjust =
120 dev->pll_freq == ENE_DEFAULT_PLL_FREQ ? 2 : 4;
122 if (hw_revision == 0xFF) {
123 ene_warn("device seems to be disabled");
124 ene_warn("send a mail to lirc-list@lists.sourceforge.net");
125 ene_warn("please attach output of acpidump and dmidecode");
129 ene_notice("chip is 0x%02x%02x - kbver = 0x%02x, rev = 0x%02x",
130 chip_major, chip_minor, old_ver, hw_revision);
132 ene_notice("PLL freq = %d", dev->pll_freq);
134 if (chip_major == 0x33) {
135 ene_warn("chips 0x33xx aren't supported");
139 if (chip_major == 0x39 && chip_minor == 0x26 && hw_revision == 0xC0) {
140 dev->hw_revision = ENE_HW_C;
141 ene_notice("KB3926C detected");
142 } else if (old_ver == 0x24 && hw_revision == 0xC0) {
143 dev->hw_revision = ENE_HW_B;
144 ene_notice("KB3926B detected");
146 dev->hw_revision = ENE_HW_D;
147 ene_notice("KB3926D or higher detected");
150 /* detect features hardware supports */
151 if (dev->hw_revision < ENE_HW_C)
154 fw_reg1 = ene_read_reg(dev, ENE_FW1);
155 fw_reg2 = ene_read_reg(dev, ENE_FW2);
157 ene_notice("Firmware regs: %02x %02x", fw_reg1, fw_reg2);
159 dev->hw_use_gpio_0a = fw_reg2 & ENE_FW2_GP0A;
160 dev->hw_learning_and_tx_capable = fw_reg2 & ENE_FW2_LEARNING;
161 dev->hw_extra_buffer = fw_reg1 & ENE_FW1_HAS_EXTRA_BUF;
162 dev->hw_fan_input = dev->hw_learning_and_tx_capable &&
163 (fw_reg2 & ENE_FW2_FAN_INPUT);
165 ene_notice("Hardware features:");
167 if (dev->hw_learning_and_tx_capable) {
168 ene_notice("* Supports transmitting & learning mode");
169 ene_notice(" This feature is rare and therefore,");
170 ene_notice(" you are welcome to test it,");
171 ene_notice(" and/or contact the author via:");
172 ene_notice(" lirc-list@lists.sourceforge.net");
173 ene_notice(" or maximlevitsky@gmail.com");
175 ene_notice("* Uses GPIO %s for IR raw input",
176 dev->hw_use_gpio_0a ? "40" : "0A");
178 if (dev->hw_fan_input)
179 ene_notice("* Uses unused fan feedback input as source"
180 " of demodulated IR data");
183 if (!dev->hw_fan_input)
184 ene_notice("* Uses GPIO %s for IR demodulated input",
185 dev->hw_use_gpio_0a ? "0A" : "40");
187 if (dev->hw_extra_buffer)
188 ene_notice("* Uses new style input buffer");
192 /* Sense current received carrier */
193 void ene_rx_sense_carrier(struct ene_device *dev)
195 int period = ene_read_reg(dev, ENE_CIRCAR_PRD);
196 int hperiod = ene_read_reg(dev, ENE_CIRCAR_HPRD);
197 int carrier, duty_cycle;
200 if (!(period & ENE_CIRCAR_PRD_VALID))
203 period &= ~ENE_CIRCAR_PRD_VALID;
208 dbg("RX: hardware carrier period = %02x", period);
209 dbg("RX: hardware carrier pulse period = %02x", hperiod);
212 carrier = 2000000 / period;
213 duty_cycle = (hperiod * 100) / period;
214 dbg("RX: sensed carrier = %d Hz, duty cycle %d%%",
215 carrier, duty_cycle);
217 /* TODO: Send carrier & duty cycle to IR layer */
220 /* this enables/disables the CIR RX engine */
221 static void ene_enable_cir_engine(struct ene_device *dev, bool enable)
223 ene_set_clear_reg_mask(dev, ENE_CIRCFG,
224 ENE_CIRCFG_RX_EN | ENE_CIRCFG_RX_IRQ, enable);
227 /* this selects input for CIR engine. Ether GPIO 0A or GPIO40*/
228 static void ene_select_rx_input(struct ene_device *dev, bool gpio_0a)
230 ene_set_clear_reg_mask(dev, ENE_CIRCFG2, ENE_CIRCFG2_GPIO0A, gpio_0a);
234 * this enables alternative input via fan tachometer sensor and bypasses
237 static void ene_enable_fan_input(struct ene_device *dev, bool enable)
239 if (!dev->hw_fan_input)
243 ene_write_reg(dev, ENE_FAN_AS_IN1, 0);
245 ene_write_reg(dev, ENE_FAN_AS_IN1, ENE_FAN_AS_IN1_EN);
246 ene_write_reg(dev, ENE_FAN_AS_IN2, ENE_FAN_AS_IN2_EN);
248 dev->rx_fan_input_inuse = enable;
251 /* setup the receiver for RX*/
252 static void ene_rx_setup(struct ene_device *dev)
254 bool learning_mode = dev->learning_enabled ||
255 dev->carrier_detect_enabled;
256 int sample_period_adjust = 0;
259 /* set sample period*/
260 if (sample_period == ENE_DEFAULT_SAMPLE_PERIOD)
261 sample_period_adjust =
262 dev->pll_freq == ENE_DEFAULT_PLL_FREQ ? 1 : 2;
264 ene_write_reg(dev, ENE_CIRRLC_CFG,
265 (sample_period + sample_period_adjust) |
266 ENE_CIRRLC_CFG_OVERFLOW);
267 /* revB doesn't support inputs */
268 if (dev->hw_revision < ENE_HW_C)
271 if (learning_mode && dev->hw_learning_and_tx_capable) {
273 /* Enable the opposite of the normal input
274 That means that if GPIO40 is normally used, use GPIO0A
276 This input will carry non demodulated
277 signal, and we will tell the hw to demodulate it itself */
278 ene_select_rx_input(dev, !dev->hw_use_gpio_0a);
279 dev->rx_fan_input_inuse = false;
281 /* Enable carrier demodulation */
282 ene_set_reg_mask(dev, ENE_CIRCFG, ENE_CIRCFG_CARR_DEMOD);
284 /* Enable carrier detection */
285 ene_set_clear_reg_mask(dev, ENE_CIRCFG2, ENE_CIRCFG2_CARR_DETECT,
286 dev->carrier_detect_enabled || debug);
288 if (dev->hw_fan_input)
289 dev->rx_fan_input_inuse = true;
291 ene_select_rx_input(dev, dev->hw_use_gpio_0a);
293 /* Disable carrier detection & demodulation */
294 ene_clear_reg_mask(dev, ENE_CIRCFG, ENE_CIRCFG_CARR_DEMOD);
295 ene_clear_reg_mask(dev, ENE_CIRCFG2, ENE_CIRCFG2_CARR_DETECT);
299 if (dev->rx_fan_input_inuse) {
300 dev->props->rx_resolution = MS_TO_NS(ENE_FW_SAMPLE_PERIOD_FAN);
302 /* Fan input doesn't support timeouts, it just ends the
303 input with a maximum sample */
304 dev->props->min_timeout = dev->props->max_timeout =
305 MS_TO_NS(ENE_FW_SMPL_BUF_FAN_MSK *
306 ENE_FW_SAMPLE_PERIOD_FAN);
308 dev->props->rx_resolution = MS_TO_NS(sample_period);
310 /* Theoreticly timeout is unlimited, but we cap it
311 * because it was seen that on one device, it
312 * would stop sending spaces after around 250 msec.
313 * Besides, this is close to 2^32 anyway and timeout is u32.
315 dev->props->min_timeout = MS_TO_NS(127 * sample_period);
316 dev->props->max_timeout = MS_TO_NS(200000);
319 if (dev->hw_learning_and_tx_capable)
320 dev->props->tx_resolution = MS_TO_NS(sample_period);
322 if (dev->props->timeout > dev->props->max_timeout)
323 dev->props->timeout = dev->props->max_timeout;
324 if (dev->props->timeout < dev->props->min_timeout)
325 dev->props->timeout = dev->props->min_timeout;
328 /* Enable the device for receive */
329 static void ene_rx_enable(struct ene_device *dev)
332 dbg("RX: setup receiver, learning mode = %d", learning_mode);
334 /* Enable system interrupt */
335 if (dev->hw_revision < ENE_HW_C) {
336 ene_write_reg(dev, ENEB_IRQ, dev->irq << 1);
337 ene_write_reg(dev, ENEB_IRQ_UNK1, 0x01);
339 reg_value = ene_read_reg(dev, ENE_IRQ) & 0xF0;
340 reg_value |= ENE_IRQ_UNK_EN;
341 reg_value &= ~ENE_IRQ_STATUS;
342 reg_value |= (dev->irq & ENE_IRQ_MASK);
343 ene_write_reg(dev, ENE_IRQ, reg_value);
346 if (dev->hw_revision >= ENE_HW_C)
347 ene_write_reg(dev, ENE_CIRCAR_PULS, 0x63);
349 /* Enable the inputs */
350 ene_write_reg(dev, ENE_CIRCFG2, 0x00);
352 if (dev->rx_fan_input_inuse) {
353 ene_enable_cir_engine(dev, false);
354 ene_enable_fan_input(dev, true);
356 ene_enable_cir_engine(dev, true);
357 ene_enable_fan_input(dev, false);
360 /* ack any pending irqs - just in case */
363 /* enable firmware bits */
364 ene_set_reg_mask(dev, ENE_FW1, ENE_FW1_ENABLE | ENE_FW1_IRQ);
366 /* enter idle mode */
367 ir_raw_event_set_idle(dev->idev, true);
368 dev->rx_enabled = true;
371 /* Disable the device receiver */
372 static void ene_rx_disable(struct ene_device *dev)
375 ene_enable_cir_engine(dev, false);
376 ene_enable_fan_input(dev, false);
378 /* disable hardware IRQ and firmware flag */
379 ene_clear_reg_mask(dev, ENE_FW1, ENE_FW1_ENABLE | ENE_FW1_IRQ);
381 ir_raw_event_set_idle(dev->idev, true);
382 dev->rx_enabled = false;
385 /* prepare transmission */
386 static void ene_tx_prepare(struct ene_device *dev)
388 u8 conf1 = ene_read_reg(dev, ENE_CIRCFG);
389 u8 fwreg2 = ene_read_reg(dev, ENE_FW2);
391 dev->saved_conf1 = conf1;
393 /* Show information about currently connected transmitter jacks */
394 if (fwreg2 & ENE_FW2_EMMITER1_CONN)
395 dbg("TX: Transmitter #1 is connected");
397 if (fwreg2 & ENE_FW2_EMMITER2_CONN)
398 dbg("TX: Transmitter #2 is connected");
400 if (!(fwreg2 & (ENE_FW2_EMMITER1_CONN | ENE_FW2_EMMITER2_CONN)))
401 ene_warn("TX: transmitter cable isn't connected!");
403 /* Set transmitter mask */
404 ene_set_clear_reg_mask(dev, ENE_GPIOFS8, ENE_GPIOFS8_GPIO41,
405 !!(dev->transmitter_mask & 0x01));
406 ene_set_clear_reg_mask(dev, ENE_GPIOFS1, ENE_GPIOFS1_GPIO0D,
407 !!(dev->transmitter_mask & 0x02));
409 /* Set the carrier period && duty cycle */
410 if (dev->tx_period) {
412 int tx_puls_width = dev->tx_period / (100 / dev->tx_duty_cycle);
417 dbg("TX: pulse distance = %d * 500 ns", dev->tx_period);
418 dbg("TX: pulse width = %d * 500 ns", tx_puls_width);
420 ene_write_reg(dev, ENE_CIRMOD_PRD, ENE_CIRMOD_PRD_POL |
423 ene_write_reg(dev, ENE_CIRMOD_HPRD, tx_puls_width);
425 conf1 |= ENE_CIRCFG_TX_CARR;
427 conf1 &= ~ENE_CIRCFG_TX_CARR;
429 /* disable receive on revc */
430 if (dev->hw_revision == ENE_HW_C)
431 conf1 &= ~ENE_CIRCFG_RX_EN;
433 /* Enable TX engine */
434 conf1 |= ENE_CIRCFG_TX_EN | ENE_CIRCFG_TX_IRQ;
435 ene_write_reg(dev, ENE_CIRCFG, conf1);
438 /* end transmission */
439 static void ene_tx_complete(struct ene_device *dev)
441 ene_write_reg(dev, ENE_CIRCFG, dev->saved_conf1);
442 dev->tx_buffer = NULL;
446 /* TX one sample - must be called with dev->hw_lock*/
447 static void ene_tx_sample(struct ene_device *dev)
451 bool pulse = dev->tx_sample_pulse;
453 if (!dev->tx_buffer) {
454 ene_warn("TX: BUG: attempt to transmit NULL buffer");
458 /* Grab next TX sample */
459 if (!dev->tx_sample) {
461 if (dev->tx_pos == dev->tx_len) {
463 dbg("TX: no more data to send");
467 dbg("TX: last sample sent by hardware");
468 ene_tx_complete(dev);
469 complete(&dev->tx_complete);
474 sample = dev->tx_buffer[dev->tx_pos++];
475 dev->tx_sample_pulse = !dev->tx_sample_pulse;
477 dev->tx_sample = DIV_ROUND_CLOSEST(sample, sample_period);
483 raw_tx = min(dev->tx_sample , (unsigned int)ENE_CIRRLC_OUT_MASK);
484 dev->tx_sample -= raw_tx;
486 dbg("TX: sample %8d (%s)", raw_tx * sample_period,
487 pulse ? "pulse" : "space");
489 raw_tx |= ENE_CIRRLC_OUT_PULSE;
492 dev->tx_reg ? ENE_CIRRLC_OUT1 : ENE_CIRRLC_OUT0, raw_tx);
494 dev->tx_reg = !dev->tx_reg;
496 /* simulate TX done interrupt */
498 mod_timer(&dev->tx_sim_timer, jiffies + HZ / 500);
501 /* timer to simulate tx done interrupt */
502 static void ene_tx_irqsim(unsigned long data)
504 struct ene_device *dev = (struct ene_device *)data;
507 spin_lock_irqsave(&dev->hw_lock, flags);
509 spin_unlock_irqrestore(&dev->hw_lock, flags);
512 /* Read properities of hw sample buffer */
513 static void ene_setup_hw_buffer(struct ene_device *dev)
517 ene_read_hw_pointer(dev);
518 dev->r_pointer = dev->w_pointer;
520 if (!dev->hw_extra_buffer) {
521 dev->buffer_len = ENE_FW_PACKET_SIZE * 2;
525 tmp = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER);
526 tmp |= ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER+1) << 8;
527 dev->extra_buf1_address = tmp;
529 dev->extra_buf1_len = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 2);
531 tmp = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 3);
532 tmp |= ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 4) << 8;
533 dev->extra_buf2_address = tmp;
535 dev->extra_buf2_len = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 5);
537 dev->buffer_len = dev->extra_buf1_len + dev->extra_buf2_len + 8;
539 ene_notice("Hardware uses 2 extended buffers:");
540 ene_notice(" 0x%04x - len : %d", dev->extra_buf1_address,
541 dev->extra_buf1_len);
542 ene_notice(" 0x%04x - len : %d", dev->extra_buf2_address,
543 dev->extra_buf2_len);
545 ene_notice("Total buffer len = %d", dev->buffer_len);
547 if (dev->buffer_len > 64 || dev->buffer_len < 16)
550 if (dev->extra_buf1_address > 0xFBFC ||
551 dev->extra_buf1_address < 0xEC00)
554 if (dev->extra_buf2_address > 0xFBFC ||
555 dev->extra_buf2_address < 0xEC00)
558 if (dev->r_pointer > dev->buffer_len)
561 ene_set_reg_mask(dev, ENE_FW1, ENE_FW1_EXTRA_BUF_HND);
564 ene_warn("Error validating extra buffers, device probably won't work");
565 dev->hw_extra_buffer = false;
566 ene_clear_reg_mask(dev, ENE_FW1, ENE_FW1_EXTRA_BUF_HND);
570 /* Restore the pointers to extra buffers - to make module reload work*/
571 static void ene_restore_extra_buffer(struct ene_device *dev)
573 if (!dev->hw_extra_buffer)
576 ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 0,
577 dev->extra_buf1_address & 0xFF);
578 ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 1,
579 dev->extra_buf1_address >> 8);
580 ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 2, dev->extra_buf1_len);
582 ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 3,
583 dev->extra_buf2_address & 0xFF);
584 ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 4,
585 dev->extra_buf2_address >> 8);
586 ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 5,
587 dev->extra_buf2_len);
588 ene_clear_reg_mask(dev, ENE_FW1, ENE_FW1_EXTRA_BUF_HND);
592 /* read irq status and ack it */
593 static int ene_irq_status(struct ene_device *dev)
596 u8 fw_flags1, fw_flags2;
599 fw_flags2 = ene_read_reg(dev, ENE_FW2);
601 if (dev->hw_revision < ENE_HW_C) {
602 irq_status = ene_read_reg(dev, ENEB_IRQ_STATUS);
604 if (!(irq_status & ENEB_IRQ_STATUS_IR))
607 ene_clear_reg_mask(dev, ENEB_IRQ_STATUS, ENEB_IRQ_STATUS_IR);
611 irq_status = ene_read_reg(dev, ENE_IRQ);
612 if (!(irq_status & ENE_IRQ_STATUS))
615 /* original driver does that twice - a workaround ? */
616 ene_write_reg(dev, ENE_IRQ, irq_status & ~ENE_IRQ_STATUS);
617 ene_write_reg(dev, ENE_IRQ, irq_status & ~ENE_IRQ_STATUS);
619 /* check RX interrupt */
620 if (fw_flags2 & ENE_FW2_RXIRQ) {
621 retval |= ENE_IRQ_RX;
622 ene_write_reg(dev, ENE_FW2, fw_flags2 & ~ENE_FW2_RXIRQ);
625 /* check TX interrupt */
626 fw_flags1 = ene_read_reg(dev, ENE_FW1);
627 if (fw_flags1 & ENE_FW1_TXIRQ) {
628 ene_write_reg(dev, ENE_FW1, fw_flags1 & ~ENE_FW1_TXIRQ);
629 retval |= ENE_IRQ_TX;
635 /* Read hardware write pointer */
636 static void ene_read_hw_pointer(struct ene_device *dev)
638 if (dev->hw_extra_buffer)
639 dev->w_pointer = ene_read_reg(dev, ENE_FW_RX_POINTER);
641 dev->w_pointer = ene_read_reg(dev, ENE_FW2)
642 & ENE_FW2_BUF_WPTR ? 0 : ENE_FW_PACKET_SIZE;
644 dbg_verbose("RB: HW write pointer: %02x, driver read pointer: %02x",
645 dev->w_pointer, dev->r_pointer);
648 /* Gets address of next sample from HW ring buffer */
649 static int ene_get_sample_reg(struct ene_device *dev)
653 if (dev->r_pointer == dev->w_pointer) {
654 dbg_verbose("RB: hit end, try update w_pointer");
655 ene_read_hw_pointer(dev);
658 if (dev->r_pointer == dev->w_pointer) {
659 dbg_verbose("RB: end of data at %d", dev->r_pointer);
663 dbg_verbose("RB: reading at offset %d", dev->r_pointer);
664 r_pointer = dev->r_pointer;
667 if (dev->r_pointer == dev->buffer_len)
670 dbg_verbose("RB: next read will be from offset %d", dev->r_pointer);
673 dbg_verbose("RB: read at main buffer at %d", r_pointer);
674 return ENE_FW_SAMPLE_BUFFER + r_pointer;
679 if (r_pointer < dev->extra_buf1_len) {
680 dbg_verbose("RB: read at 1st extra buffer at %d", r_pointer);
681 return dev->extra_buf1_address + r_pointer;
684 r_pointer -= dev->extra_buf1_len;
686 if (r_pointer < dev->extra_buf2_len) {
687 dbg_verbose("RB: read at 2nd extra buffer at %d", r_pointer);
688 return dev->extra_buf2_address + r_pointer;
691 dbg("attempt to read beyong ring bufer end");
695 /* interrupt handler */
696 static irqreturn_t ene_isr(int irq, void *data)
699 int hw_sample, irq_status;
702 irqreturn_t retval = IRQ_NONE;
703 struct ene_device *dev = (struct ene_device *)data;
704 struct ir_raw_event ev;
706 spin_lock_irqsave(&dev->hw_lock, flags);
708 dbg_verbose("ISR called");
709 ene_read_hw_pointer(dev);
710 irq_status = ene_irq_status(dev);
715 retval = IRQ_HANDLED;
717 if (irq_status & ENE_IRQ_TX) {
718 dbg_verbose("TX interrupt");
719 if (!dev->hw_learning_and_tx_capable) {
720 dbg("TX interrupt on unsupported device!");
726 if (!(irq_status & ENE_IRQ_RX))
729 dbg_verbose("RX interrupt");
731 if (dev->carrier_detect_enabled || debug)
732 ene_rx_sense_carrier(dev);
734 /* On hardware that don't support extra buffer we need to trust
735 the interrupt and not track the read pointer */
736 if (!dev->hw_extra_buffer)
737 dev->r_pointer = dev->w_pointer == 0 ? ENE_FW_PACKET_SIZE : 0;
741 reg = ene_get_sample_reg(dev);
743 dbg_verbose("next sample to read at: %04x", reg);
747 hw_value = ene_read_reg(dev, reg);
749 if (dev->rx_fan_input_inuse) {
751 int offset = ENE_FW_SMPL_BUF_FAN - ENE_FW_SAMPLE_BUFFER;
753 /* read high part of the sample */
754 hw_value |= ene_read_reg(dev, reg + offset) << 8;
755 pulse = hw_value & ENE_FW_SMPL_BUF_FAN_PLS;
757 /* clear space bit, and other unused bits */
758 hw_value &= ENE_FW_SMPL_BUF_FAN_MSK;
759 hw_sample = hw_value * ENE_FW_SAMPLE_PERIOD_FAN;
762 pulse = !(hw_value & ENE_FW_SAMPLE_SPACE);
763 hw_value &= ~ENE_FW_SAMPLE_SPACE;
764 hw_sample = hw_value * sample_period;
766 if (dev->rx_period_adjust) {
768 hw_sample /= (100 + dev->rx_period_adjust);
772 if (!dev->hw_extra_buffer && !hw_sample) {
773 dev->r_pointer = dev->w_pointer;
777 dbg("RX: %d (%s)", hw_sample, pulse ? "pulse" : "space");
779 ev.duration = MS_TO_NS(hw_sample);
781 ir_raw_event_store_with_filter(dev->idev, &ev);
784 ir_raw_event_handle(dev->idev);
786 spin_unlock_irqrestore(&dev->hw_lock, flags);
790 /* Initialize default settings */
791 static void ene_setup_settings(struct ene_device *dev)
794 dev->tx_duty_cycle = 50; /*%*/
795 dev->transmitter_mask = 0x03;
797 dev->learning_enabled =
798 (learning_mode && dev->hw_learning_and_tx_capable);
800 /* Set reasonable default timeout */
801 dev->props->timeout = MS_TO_NS(15000);
804 /* outside interface: called on first open*/
805 static int ene_open(void *data)
807 struct ene_device *dev = (struct ene_device *)data;
810 spin_lock_irqsave(&dev->hw_lock, flags);
812 spin_unlock_irqrestore(&dev->hw_lock, flags);
816 /* outside interface: called on device close*/
817 static void ene_close(void *data)
819 struct ene_device *dev = (struct ene_device *)data;
821 spin_lock_irqsave(&dev->hw_lock, flags);
824 spin_unlock_irqrestore(&dev->hw_lock, flags);
827 /* outside interface: set transmitter mask */
828 static int ene_set_tx_mask(void *data, u32 tx_mask)
830 struct ene_device *dev = (struct ene_device *)data;
832 dbg("TX: attempt to set transmitter mask %02x", tx_mask);
835 if (!tx_mask || tx_mask & ~0x03) {
836 dbg("TX: invalid mask");
837 /* return count of transmitters */
841 spin_lock_irqsave(&dev->hw_lock, flags);
842 dev->transmitter_mask = tx_mask;
843 spin_unlock_irqrestore(&dev->hw_lock, flags);
847 /* outside interface : set tx carrier */
848 static int ene_set_tx_carrier(void *data, u32 carrier)
850 struct ene_device *dev = (struct ene_device *)data;
852 u32 period = 2000000 / carrier;
854 dbg("TX: attempt to set tx carrier to %d kHz", carrier);
856 if (period && (period > ENE_CIRMOD_PRD_MAX ||
857 period < ENE_CIRMOD_PRD_MIN)) {
859 dbg("TX: out of range %d-%d kHz carrier",
860 2000 / ENE_CIRMOD_PRD_MIN,
861 2000 / ENE_CIRMOD_PRD_MAX);
866 dbg("TX: set carrier to %d kHz", carrier);
867 spin_lock_irqsave(&dev->hw_lock, flags);
868 dev->tx_period = period;
869 spin_unlock_irqrestore(&dev->hw_lock, flags);
873 /*outside interface : set tx duty cycle */
874 static int ene_set_tx_duty_cycle(void *data, u32 duty_cycle)
876 struct ene_device *dev = (struct ene_device *)data;
879 dbg("TX: setting duty cycle to %d%%", duty_cycle);
881 BUG_ON(!duty_cycle || duty_cycle >= 100);
883 spin_lock_irqsave(&dev->hw_lock, flags);
884 dev->tx_duty_cycle = duty_cycle;
885 spin_unlock_irqrestore(&dev->hw_lock, flags);
889 /* outside interface: enable learning mode */
890 static int ene_set_learning_mode(void *data, int enable)
892 struct ene_device *dev = (struct ene_device *)data;
894 if (enable == dev->learning_enabled)
897 spin_lock_irqsave(&dev->hw_lock, flags);
898 dev->learning_enabled = enable;
902 spin_unlock_irqrestore(&dev->hw_lock, flags);
906 /* outside interface: enable or disable idle mode */
907 static void ene_rx_set_idle(void *data, int idle)
909 struct ene_device *dev = (struct ene_device *)data;
914 dbg("RX: stopping the receiver");
915 ene_clear_reg_mask(dev, ENE_CIRCFG, ENE_CIRCFG_RX_EN);
916 ene_set_reg_mask(dev, ENE_CIRCFG, ENE_CIRCFG_RX_EN);
919 /* outside interface: transmit */
920 static int ene_transmit(void *data, int *buf, u32 n)
922 struct ene_device *dev = (struct ene_device *)data;
925 dev->tx_buffer = buf;
926 dev->tx_len = n / sizeof(int);
931 dev->tx_sample_pulse = 0;
933 dbg("TX: %d samples", dev->tx_len);
935 spin_lock_irqsave(&dev->hw_lock, flags);
939 /* Transmit first two samples */
943 spin_unlock_irqrestore(&dev->hw_lock, flags);
945 if (wait_for_completion_timeout(&dev->tx_complete, 2 * HZ) == 0) {
947 spin_lock_irqsave(&dev->hw_lock, flags);
948 ene_tx_complete(dev);
949 spin_unlock_irqrestore(&dev->hw_lock, flags);
956 static int ene_probe(struct pnp_dev *pnp_dev, const struct pnp_device_id *id)
959 struct ir_dev_props *ir_props;
960 struct input_dev *input_dev;
961 struct ene_device *dev;
963 /* allocate memory */
964 input_dev = input_allocate_device();
965 ir_props = kzalloc(sizeof(struct ir_dev_props), GFP_KERNEL);
966 dev = kzalloc(sizeof(struct ene_device), GFP_KERNEL);
968 if (!input_dev || !ir_props || !dev)
971 /* validate resources */
974 if (!pnp_port_valid(pnp_dev, 0) ||
975 pnp_port_len(pnp_dev, 0) < ENE_IO_SIZE)
978 if (!pnp_irq_valid(pnp_dev, 0))
981 spin_lock_init(&dev->hw_lock);
983 /* claim the resources */
985 dev->hw_io = pnp_port_start(pnp_dev, 0);
986 if (!request_region(dev->hw_io, ENE_IO_SIZE, ENE_DRIVER_NAME)) {
992 dev->irq = pnp_irq(pnp_dev, 0);
993 if (request_irq(dev->irq, ene_isr,
994 IRQF_SHARED, ENE_DRIVER_NAME, (void *)dev)) {
999 pnp_set_drvdata(pnp_dev, dev);
1000 dev->pnp_dev = pnp_dev;
1002 /* don't allow too short/long sample periods */
1003 if (sample_period < 5 || sample_period > 0x7F)
1004 sample_period = ENE_DEFAULT_SAMPLE_PERIOD;
1006 /* detect hardware version and features */
1007 error = ene_hw_detect(dev);
1011 if (!dev->hw_learning_and_tx_capable && txsim) {
1012 dev->hw_learning_and_tx_capable = true;
1013 setup_timer(&dev->tx_sim_timer, ene_tx_irqsim,
1014 (long unsigned int)dev);
1015 ene_warn("Simulation of TX activated");
1018 ir_props->driver_type = RC_DRIVER_IR_RAW;
1019 ir_props->allowed_protos = IR_TYPE_ALL;
1020 ir_props->priv = dev;
1021 ir_props->open = ene_open;
1022 ir_props->close = ene_close;
1023 ir_props->s_idle = ene_rx_set_idle;
1025 dev->props = ir_props;
1026 dev->idev = input_dev;
1028 if (dev->hw_learning_and_tx_capable) {
1029 ir_props->s_learning_mode = ene_set_learning_mode;
1030 init_completion(&dev->tx_complete);
1031 ir_props->tx_ir = ene_transmit;
1032 ir_props->s_tx_mask = ene_set_tx_mask;
1033 ir_props->s_tx_carrier = ene_set_tx_carrier;
1034 ir_props->s_tx_duty_cycle = ene_set_tx_duty_cycle;
1035 /* ir_props->s_carrier_report = ene_set_carrier_report; */
1038 ene_setup_hw_buffer(dev);
1039 ene_setup_settings(dev);
1042 device_set_wakeup_capable(&pnp_dev->dev, true);
1043 device_set_wakeup_enable(&pnp_dev->dev, true);
1045 if (dev->hw_learning_and_tx_capable)
1046 input_dev->name = "ENE eHome Infrared Remote Transceiver";
1048 input_dev->name = "ENE eHome Infrared Remote Receiver";
1051 if (ir_input_register(input_dev, RC_MAP_RC6_MCE, ir_props,
1055 ene_notice("driver has been succesfully loaded");
1058 if (dev && dev->irq >= 0)
1059 free_irq(dev->irq, dev);
1060 if (dev && dev->hw_io >= 0)
1061 release_region(dev->hw_io, ENE_IO_SIZE);
1063 input_free_device(input_dev);
1069 /* main unload function */
1070 static void ene_remove(struct pnp_dev *pnp_dev)
1072 struct ene_device *dev = pnp_get_drvdata(pnp_dev);
1073 unsigned long flags;
1075 spin_lock_irqsave(&dev->hw_lock, flags);
1076 ene_rx_disable(dev);
1077 ene_restore_extra_buffer(dev);
1078 spin_unlock_irqrestore(&dev->hw_lock, flags);
1080 free_irq(dev->irq, dev);
1081 release_region(dev->hw_io, ENE_IO_SIZE);
1082 ir_input_unregister(dev->idev);
1087 /* enable wake on IR (wakes on specific button on original remote) */
1088 static void ene_enable_wake(struct ene_device *dev, int enable)
1090 enable = enable && device_may_wakeup(&dev->pnp_dev->dev);
1091 dbg("wake on IR %s", enable ? "enabled" : "disabled");
1092 ene_set_clear_reg_mask(dev, ENE_FW1, ENE_FW1_WAKE, enable);
1096 static int ene_suspend(struct pnp_dev *pnp_dev, pm_message_t state)
1098 struct ene_device *dev = pnp_get_drvdata(pnp_dev);
1099 ene_enable_wake(dev, true);
1101 /* TODO: add support for wake pattern */
1105 static int ene_resume(struct pnp_dev *pnp_dev)
1107 struct ene_device *dev = pnp_get_drvdata(pnp_dev);
1108 if (dev->rx_enabled) {
1112 ene_enable_wake(dev, false);
1117 static void ene_shutdown(struct pnp_dev *pnp_dev)
1119 struct ene_device *dev = pnp_get_drvdata(pnp_dev);
1120 ene_enable_wake(dev, true);
1123 static const struct pnp_device_id ene_ids[] = {
1131 static struct pnp_driver ene_driver = {
1132 .name = ENE_DRIVER_NAME,
1133 .id_table = ene_ids,
1134 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
1137 .remove = __devexit_p(ene_remove),
1139 .suspend = ene_suspend,
1140 .resume = ene_resume,
1142 .shutdown = ene_shutdown,
1145 static int __init ene_init(void)
1147 return pnp_register_driver(&ene_driver);
1150 static void ene_exit(void)
1152 pnp_unregister_driver(&ene_driver);
1155 module_param(sample_period, int, S_IRUGO);
1156 MODULE_PARM_DESC(sample_period, "Hardware sample period (50 us default)");
1158 module_param(learning_mode, bool, S_IRUGO);
1159 MODULE_PARM_DESC(learning_mode, "Enable learning mode by default");
1161 module_param(debug, int, S_IRUGO | S_IWUSR);
1162 MODULE_PARM_DESC(debug, "Debug level");
1164 module_param(txsim, bool, S_IRUGO);
1165 MODULE_PARM_DESC(txsim,
1166 "Simulate TX features on unsupported hardware (dangerous)");
1168 MODULE_DEVICE_TABLE(pnp, ene_ids);
1170 ("Infrared input driver for KB3926B/C/D/E/F "
1171 "(aka ENE0100/ENE0200/ENE0201/ENE0202) CIR port");
1173 MODULE_AUTHOR("Maxim Levitsky");
1174 MODULE_LICENSE("GPL");
1176 module_init(ene_init);
1177 module_exit(ene_exit);