drivers/kvm/vmx.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * This module enables machines with Intel VT-x extensions to run virtual
   5  * machines without emulation or binary translation.
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  *
   9  * Authors:
  10  *   Avi Kivity   <avi@qumranet.com>
  11  *   Yaniv Kamay  <yaniv@qumranet.com>
  12  *
  13  * This work is licensed under the terms of the GNU GPL, version 2.  See
  14  * the COPYING file in the top-level directory.
  15  *
  16  */
  17
  18 #include "kvm.h"
  19 #include "vmx.h"
  20 #include "kvm_vmx.h"
  21 #include <linux/module.h>
  22 #include <linux/kernel.h>
  23 #include <linux/mm.h>
  24 #include <linux/highmem.h>
  25 #include <linux/profile.h>
  26 #include <asm/io.h>
  27 #include <asm/desc.h>
  28
  29 #include "segment_descriptor.h"
  30
  31 MODULE_AUTHOR("Qumranet");
  32 MODULE_LICENSE("GPL");
  33
  34 static DEFINE_PER_CPU(struct vmcs *, vmxarea);
  35 static DEFINE_PER_CPU(struct vmcs *, current_vmcs);
  36
  37 #ifdef CONFIG_X86_64
  38 #define HOST_IS_64 1
  39 #else
  40 #define HOST_IS_64 0
  41 #endif
  42
  43 static struct vmcs_descriptor {
  44         int size;
  45         int order;
  46         u32 revision_id;
  47 } vmcs_descriptor;
  48
  49 #define VMX_SEGMENT_FIELD(seg)                                  \
  50         [VCPU_SREG_##seg] = {                                   \
  51                 .selector = GUEST_##seg##_SELECTOR,             \
  52                 .base = GUEST_##seg##_BASE,                     \
  53                 .limit = GUEST_##seg##_LIMIT,                   \
  54                 .ar_bytes = GUEST_##seg##_AR_BYTES,             \
  55         }
  56
  57 static struct kvm_vmx_segment_field {
  58         unsigned selector;
  59         unsigned base;
  60         unsigned limit;
  61         unsigned ar_bytes;
  62 } kvm_vmx_segment_fields[] = {
  63         VMX_SEGMENT_FIELD(CS),
  64         VMX_SEGMENT_FIELD(DS),
  65         VMX_SEGMENT_FIELD(ES),
  66         VMX_SEGMENT_FIELD(FS),
  67         VMX_SEGMENT_FIELD(GS),
  68         VMX_SEGMENT_FIELD(SS),
  69         VMX_SEGMENT_FIELD(TR),
  70         VMX_SEGMENT_FIELD(LDTR),
  71 };
  72
  73 static const u32 vmx_msr_index[] = {
  74 #ifdef CONFIG_X86_64
  75         MSR_SYSCALL_MASK, MSR_LSTAR, MSR_CSTAR, MSR_KERNEL_GS_BASE,
  76 #endif
  77         MSR_EFER, MSR_K6_STAR,
  78 };
  79 #define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index)
  80
  81 static inline int is_page_fault(u32 intr_info)
  82 {
  83         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
  84                              INTR_INFO_VALID_MASK)) ==
  85                 (INTR_TYPE_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK);
  86 }
  87
  88 static inline int is_external_interrupt(u32 intr_info)
  89 {
  90         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
  91                 == (INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
  92 }
  93
  94 static struct vmx_msr_entry *find_msr_entry(struct kvm_vcpu *vcpu, u32 msr)
  95 {
  96         int i;
  97
  98         for (i = 0; i < vcpu->nmsrs; ++i)
  99                 if (vcpu->guest_msrs[i].index == msr)
 100                         return &vcpu->guest_msrs[i];
 101         return NULL;
 102 }
 103
 104 static void vmcs_clear(struct vmcs *vmcs)
 105 {
 106         u64 phys_addr = __pa(vmcs);
 107         u8 error;
 108
 109         asm volatile (ASM_VMX_VMCLEAR_RAX "; setna %0"
 110                       : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
 111                       : "cc", "memory");
 112         if (error)
 113                 printk(KERN_ERR "kvm: vmclear fail: %p/%llx\n",
 114                        vmcs, phys_addr);
 115 }
 116
 117 static void __vcpu_clear(void *arg)
 118 {
 119         struct kvm_vcpu *vcpu = arg;
 120         int cpu = raw_smp_processor_id();
 121
 122         if (vcpu->cpu == cpu)
 123                 vmcs_clear(vcpu->vmcs);
 124         if (per_cpu(current_vmcs, cpu) == vcpu->vmcs)
 125                 per_cpu(current_vmcs, cpu) = NULL;
 126 }
 127
 128 static void vcpu_clear(struct kvm_vcpu *vcpu)
 129 {
 130         if (vcpu->cpu != raw_smp_processor_id() && vcpu->cpu != -1)
 131                 smp_call_function_single(vcpu->cpu, __vcpu_clear, vcpu, 0, 1);
 132         else
 133                 __vcpu_clear(vcpu);
 134         vcpu->launched = 0;
 135 }
 136
 137 static unsigned long vmcs_readl(unsigned long field)
 138 {
 139         unsigned long value;
 140
 141         asm volatile (ASM_VMX_VMREAD_RDX_RAX
 142                       : "=a"(value) : "d"(field) : "cc");
 143         return value;
 144 }
 145
 146 static u16 vmcs_read16(unsigned long field)
 147 {
 148         return vmcs_readl(field);
 149 }
 150
 151 static u32 vmcs_read32(unsigned long field)
 152 {
 153         return vmcs_readl(field);
 154 }
 155
 156 static u64 vmcs_read64(unsigned long field)
 157 {
 158 #ifdef CONFIG_X86_64
 159         return vmcs_readl(field);
 160 #else
 161         return vmcs_readl(field) | ((u64)vmcs_readl(field+1) << 32);
 162 #endif
 163 }
 164
 165 static noinline void vmwrite_error(unsigned long field, unsigned long value)
 166 {
 167         printk(KERN_ERR "vmwrite error: reg %lx value %lx (err %d)\n",
 168                field, value, vmcs_read32(VM_INSTRUCTION_ERROR));
 169         dump_stack();
 170 }
 171
 172 static void vmcs_writel(unsigned long field, unsigned long value)
 173 {
 174         u8 error;
 175
 176         asm volatile (ASM_VMX_VMWRITE_RAX_RDX "; setna %0"
 177                        : "=q"(error) : "a"(value), "d"(field) : "cc" );
 178         if (unlikely(error))
 179                 vmwrite_error(field, value);
 180 }
 181
 182 static void vmcs_write16(unsigned long field, u16 value)
 183 {
 184         vmcs_writel(field, value);
 185 }
 186
 187 static void vmcs_write32(unsigned long field, u32 value)
 188 {
 189         vmcs_writel(field, value);
 190 }
 191
 192 static void vmcs_write64(unsigned long field, u64 value)
 193 {
 194 #ifdef CONFIG_X86_64
 195         vmcs_writel(field, value);
 196 #else
 197         vmcs_writel(field, value);
 198         asm volatile ("");
 199         vmcs_writel(field+1, value >> 32);
 200 #endif
 201 }
 202
 203 /*
 204  * Switches to specified vcpu, until a matching vcpu_put(), but assumes
 205  * vcpu mutex is already taken.
 206  */
 207 static struct kvm_vcpu *vmx_vcpu_load(struct kvm_vcpu *vcpu)
 208 {
 209         u64 phys_addr = __pa(vcpu->vmcs);
 210         int cpu;
 211
 212         cpu = get_cpu();
 213
 214         if (vcpu->cpu != cpu)
 215                 vcpu_clear(vcpu);
 216
 217         if (per_cpu(current_vmcs, cpu) != vcpu->vmcs) {
 218                 u8 error;
 219
 220                 per_cpu(current_vmcs, cpu) = vcpu->vmcs;
 221                 asm volatile (ASM_VMX_VMPTRLD_RAX "; setna %0"
 222                               : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
 223                               : "cc");
 224                 if (error)
 225                         printk(KERN_ERR "kvm: vmptrld %p/%llx fail\n",
 226                                vcpu->vmcs, phys_addr);
 227         }
 228
 229         if (vcpu->cpu != cpu) {
 230                 struct descriptor_table dt;
 231                 unsigned long sysenter_esp;
 232
 233                 vcpu->cpu = cpu;
 234                 /*
 235                  * Linux uses per-cpu TSS and GDT, so set these when switching
 236                  * processors.
 237                  */
 238                 vmcs_writel(HOST_TR_BASE, read_tr_base()); /* 22.2.4 */
 239                 get_gdt(&dt);
 240                 vmcs_writel(HOST_GDTR_BASE, dt.base);   /* 22.2.4 */
 241
 242                 rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp);
 243                 vmcs_writel(HOST_IA32_SYSENTER_ESP, sysenter_esp); /* 22.2.3 */
 244         }
 245         return vcpu;
 246 }
 247
 248 static void vmx_vcpu_put(struct kvm_vcpu *vcpu)
 249 {
 250         put_cpu();
 251 }
 252
 253 static void vmx_vcpu_decache(struct kvm_vcpu *vcpu)
 254 {
 255         vcpu_clear(vcpu);
 256 }
 257
 258 static unsigned long vmx_get_rflags(struct kvm_vcpu *vcpu)
 259 {
 260         return vmcs_readl(GUEST_RFLAGS);
 261 }
 262
 263 static void vmx_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
 264 {
 265         vmcs_writel(GUEST_RFLAGS, rflags);
 266 }
 267
 268 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
 269 {
 270         unsigned long rip;
 271         u32 interruptibility;
 272
 273         rip = vmcs_readl(GUEST_RIP);
 274         rip += vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
 275         vmcs_writel(GUEST_RIP, rip);
 276
 277         /*
 278          * We emulated an instruction, so temporary interrupt blocking
 279          * should be removed, if set.
 280          */
 281         interruptibility = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
 282         if (interruptibility & 3)
 283                 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO,
 284                              interruptibility & ~3);
 285         vcpu->interrupt_window_open = 1;
 286 }
 287
 288 static void vmx_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
 289 {
 290         printk(KERN_DEBUG "inject_general_protection: rip 0x%lx\n",
 291                vmcs_readl(GUEST_RIP));
 292         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
 293         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
 294                      GP_VECTOR |
 295                      INTR_TYPE_EXCEPTION |
 296                      INTR_INFO_DELIEVER_CODE_MASK |
 297                      INTR_INFO_VALID_MASK);
 298 }
 299
 300 /*
 301  * reads and returns guest's timestamp counter "register"
 302  * guest_tsc = host_tsc + tsc_offset    -- 21.3
 303  */
 304 static u64 guest_read_tsc(void)
 305 {
 306         u64 host_tsc, tsc_offset;
 307
 308         rdtscll(host_tsc);
 309         tsc_offset = vmcs_read64(TSC_OFFSET);
 310         return host_tsc + tsc_offset;
 311 }
 312
 313 /*
 314  * writes 'guest_tsc' into guest's timestamp counter "register"
 315  * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
 316  */
 317 static void guest_write_tsc(u64 guest_tsc)
 318 {
 319         u64 host_tsc;
 320
 321         rdtscll(host_tsc);
 322         vmcs_write64(TSC_OFFSET, guest_tsc - host_tsc);
 323 }
 324
 325 static void reload_tss(void)
 326 {
 327 #ifndef CONFIG_X86_64
 328
 329         /*
 330          * VT restores TR but not its size.  Useless.
 331          */
 332         struct descriptor_table gdt;
 333         struct segment_descriptor *descs;
 334
 335         get_gdt(&gdt);
 336         descs = (void *)gdt.base;
 337         descs[GDT_ENTRY_TSS].type = 9; /* available TSS */
 338         load_TR_desc();
 339 #endif
 340 }
 341
 342 /*
 343  * Reads an msr value (of 'msr_index') into 'pdata'.
 344  * Returns 0 on success, non-0 otherwise.
 345  * Assumes vcpu_load() was already called.
 346  */
 347 static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
 348 {
 349         u64 data;
 350         struct vmx_msr_entry *msr;
 351
 352         if (!pdata) {
 353                 printk(KERN_ERR "BUG: get_msr called with NULL pdata\n");
 354                 return -EINVAL;
 355         }
 356
 357         switch (msr_index) {
 358 #ifdef CONFIG_X86_64
 359         case MSR_FS_BASE:
 360                 data = vmcs_readl(GUEST_FS_BASE);
 361                 break;
 362         case MSR_GS_BASE:
 363                 data = vmcs_readl(GUEST_GS_BASE);
 364                 break;
 365         case MSR_EFER:
 366                 return kvm_get_msr_common(vcpu, msr_index, pdata);
 367 #endif
 368         case MSR_IA32_TIME_STAMP_COUNTER:
 369                 data = guest_read_tsc();
 370                 break;
 371         case MSR_IA32_SYSENTER_CS:
 372                 data = vmcs_read32(GUEST_SYSENTER_CS);
 373                 break;
 374         case MSR_IA32_SYSENTER_EIP:
 375                 data = vmcs_read32(GUEST_SYSENTER_EIP);
 376                 break;
 377         case MSR_IA32_SYSENTER_ESP:
 378                 data = vmcs_read32(GUEST_SYSENTER_ESP);
 379                 break;
 380         default:
 381                 msr = find_msr_entry(vcpu, msr_index);
 382                 if (msr) {
 383                         data = msr->data;
 384                         break;
 385                 }
 386                 return kvm_get_msr_common(vcpu, msr_index, pdata);
 387         }
 388
 389         *pdata = data;
 390         return 0;
 391 }
 392
 393 /*
 394  * Writes msr value into into the appropriate "register".
 395  * Returns 0 on success, non-0 otherwise.
 396  * Assumes vcpu_load() was already called.
 397  */
 398 static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 399 {
 400         struct vmx_msr_entry *msr;
 401         switch (msr_index) {
 402 #ifdef CONFIG_X86_64
 403         case MSR_EFER:
 404                 return kvm_set_msr_common(vcpu, msr_index, data);
 405         case MSR_FS_BASE:
 406                 vmcs_writel(GUEST_FS_BASE, data);
 407                 break;
 408         case MSR_GS_BASE:
 409                 vmcs_writel(GUEST_GS_BASE, data);
 410                 break;
 411 #endif
 412         case MSR_IA32_SYSENTER_CS:
 413                 vmcs_write32(GUEST_SYSENTER_CS, data);
 414                 break;
 415         case MSR_IA32_SYSENTER_EIP:
 416                 vmcs_write32(GUEST_SYSENTER_EIP, data);
 417                 break;
 418         case MSR_IA32_SYSENTER_ESP:
 419                 vmcs_write32(GUEST_SYSENTER_ESP, data);
 420                 break;
 421         case MSR_IA32_TIME_STAMP_COUNTER:
 422                 guest_write_tsc(data);
 423                 break;
 424         default:
 425                 msr = find_msr_entry(vcpu, msr_index);
 426                 if (msr) {
 427                         msr->data = data;
 428                         break;
 429                 }
 430                 return kvm_set_msr_common(vcpu, msr_index, data);
 431                 msr->data = data;
 432                 break;
 433         }
 434
 435         return 0;
 436 }
 437
 438 /*
 439  * Sync the rsp and rip registers into the vcpu structure.  This allows
 440  * registers to be accessed by indexing vcpu->regs.
 441  */
 442 static void vcpu_load_rsp_rip(struct kvm_vcpu *vcpu)
 443 {
 444         vcpu->regs[VCPU_REGS_RSP] = vmcs_readl(GUEST_RSP);
 445         vcpu->rip = vmcs_readl(GUEST_RIP);
 446 }
 447
 448 /*
 449  * Syncs rsp and rip back into the vmcs.  Should be called after possible
 450  * modification.
 451  */
 452 static void vcpu_put_rsp_rip(struct kvm_vcpu *vcpu)
 453 {
 454         vmcs_writel(GUEST_RSP, vcpu->regs[VCPU_REGS_RSP]);
 455         vmcs_writel(GUEST_RIP, vcpu->rip);
 456 }
 457
 458 static int set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
 459 {
 460         unsigned long dr7 = 0x400;
 461         u32 exception_bitmap;
 462         int old_singlestep;
 463
 464         exception_bitmap = vmcs_read32(EXCEPTION_BITMAP);
 465         old_singlestep = vcpu->guest_debug.singlestep;
 466
 467         vcpu->guest_debug.enabled = dbg->enabled;
 468         if (vcpu->guest_debug.enabled) {
 469                 int i;
 470
 471                 dr7 |= 0x200;  /* exact */
 472                 for (i = 0; i < 4; ++i) {
 473                         if (!dbg->breakpoints[i].enabled)
 474                                 continue;
 475                         vcpu->guest_debug.bp[i] = dbg->breakpoints[i].address;
 476                         dr7 |= 2 << (i*2);    /* global enable */
 477                         dr7 |= 0 << (i*4+16); /* execution breakpoint */
 478                 }
 479
 480                 exception_bitmap |= (1u << 1);  /* Trap debug exceptions */
 481
 482                 vcpu->guest_debug.singlestep = dbg->singlestep;
 483         } else {
 484                 exception_bitmap &= ~(1u << 1); /* Ignore debug exceptions */
 485                 vcpu->guest_debug.singlestep = 0;
 486         }
 487
 488         if (old_singlestep && !vcpu->guest_debug.singlestep) {
 489                 unsigned long flags;
 490
 491                 flags = vmcs_readl(GUEST_RFLAGS);
 492                 flags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
 493                 vmcs_writel(GUEST_RFLAGS, flags);
 494         }
 495
 496         vmcs_write32(EXCEPTION_BITMAP, exception_bitmap);
 497         vmcs_writel(GUEST_DR7, dr7);
 498
 499         return 0;
 500 }
 501
 502 static __init int cpu_has_kvm_support(void)
 503 {
 504         unsigned long ecx = cpuid_ecx(1);
 505         return test_bit(5, &ecx); /* CPUID.1:ECX.VMX[bit 5] -> VT */
 506 }
 507
 508 static __init int vmx_disabled_by_bios(void)
 509 {
 510         u64 msr;
 511
 512         rdmsrl(MSR_IA32_FEATURE_CONTROL, msr);
 513         return (msr & 5) == 1; /* locked but not enabled */
 514 }
 515
 516 static void hardware_enable(void *garbage)
 517 {
 518         int cpu = raw_smp_processor_id();
 519         u64 phys_addr = __pa(per_cpu(vmxarea, cpu));
 520         u64 old;
 521
 522         rdmsrl(MSR_IA32_FEATURE_CONTROL, old);
 523         if ((old & 5) != 5)
 524                 /* enable and lock */
 525                 wrmsrl(MSR_IA32_FEATURE_CONTROL, old | 5);
 526         write_cr4(read_cr4() | CR4_VMXE); /* FIXME: not cpu hotplug safe */
 527         asm volatile (ASM_VMX_VMXON_RAX : : "a"(&phys_addr), "m"(phys_addr)
 528                       : "memory", "cc");
 529 }
 530
 531 static void hardware_disable(void *garbage)
 532 {
 533         asm volatile (ASM_VMX_VMXOFF : : : "cc");
 534 }
 535
 536 static __init void setup_vmcs_descriptor(void)
 537 {
 538         u32 vmx_msr_low, vmx_msr_high;
 539
 540         rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high);
 541         vmcs_descriptor.size = vmx_msr_high & 0x1fff;
 542         vmcs_descriptor.order = get_order(vmcs_descriptor.size);
 543         vmcs_descriptor.revision_id = vmx_msr_low;
 544 }
 545
 546 static struct vmcs *alloc_vmcs_cpu(int cpu)
 547 {
 548         int node = cpu_to_node(cpu);
 549         struct page *pages;
 550         struct vmcs *vmcs;
 551
 552         pages = alloc_pages_node(node, GFP_KERNEL, vmcs_descriptor.order);
 553         if (!pages)
 554                 return NULL;
 555         vmcs = page_address(pages);
 556         memset(vmcs, 0, vmcs_descriptor.size);
 557         vmcs->revision_id = vmcs_descriptor.revision_id; /* vmcs revision id */
 558         return vmcs;
 559 }
 560
 561 static struct vmcs *alloc_vmcs(void)
 562 {
 563         return alloc_vmcs_cpu(raw_smp_processor_id());
 564 }
 565
 566 static void free_vmcs(struct vmcs *vmcs)
 567 {
 568         free_pages((unsigned long)vmcs, vmcs_descriptor.order);
 569 }
 570
 571 static __exit void free_kvm_area(void)
 572 {
 573         int cpu;
 574
 575         for_each_online_cpu(cpu)
 576                 free_vmcs(per_cpu(vmxarea, cpu));
 577 }
 578
 579 extern struct vmcs *alloc_vmcs_cpu(int cpu);
 580
 581 static __init int alloc_kvm_area(void)
 582 {
 583         int cpu;
 584
 585         for_each_online_cpu(cpu) {
 586                 struct vmcs *vmcs;
 587
 588                 vmcs = alloc_vmcs_cpu(cpu);
 589                 if (!vmcs) {
 590                         free_kvm_area();
 591                         return -ENOMEM;
 592                 }
 593
 594                 per_cpu(vmxarea, cpu) = vmcs;
 595         }
 596         return 0;
 597 }
 598
 599 static __init int hardware_setup(void)
 600 {
 601         setup_vmcs_descriptor();
 602         return alloc_kvm_area();
 603 }
 604
 605 static __exit void hardware_unsetup(void)
 606 {
 607         free_kvm_area();
 608 }
 609
 610 static void update_exception_bitmap(struct kvm_vcpu *vcpu)
 611 {
 612         if (vcpu->rmode.active)
 613                 vmcs_write32(EXCEPTION_BITMAP, ~0);
 614         else
 615                 vmcs_write32(EXCEPTION_BITMAP, 1 << PF_VECTOR);
 616 }
 617
 618 static void fix_pmode_dataseg(int seg, struct kvm_save_segment *save)
 619 {
 620         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 621
 622         if (vmcs_readl(sf->base) == save->base) {
 623                 vmcs_write16(sf->selector, save->selector);
 624                 vmcs_writel(sf->base, save->base);
 625                 vmcs_write32(sf->limit, save->limit);
 626                 vmcs_write32(sf->ar_bytes, save->ar);
 627         } else {
 628                 u32 dpl = (vmcs_read16(sf->selector) & SELECTOR_RPL_MASK)
 629                         << AR_DPL_SHIFT;
 630                 vmcs_write32(sf->ar_bytes, 0x93 | dpl);
 631         }
 632 }
 633
 634 static void enter_pmode(struct kvm_vcpu *vcpu)
 635 {
 636         unsigned long flags;
 637
 638         vcpu->rmode.active = 0;
 639
 640         vmcs_writel(GUEST_TR_BASE, vcpu->rmode.tr.base);
 641         vmcs_write32(GUEST_TR_LIMIT, vcpu->rmode.tr.limit);
 642         vmcs_write32(GUEST_TR_AR_BYTES, vcpu->rmode.tr.ar);
 643
 644         flags = vmcs_readl(GUEST_RFLAGS);
 645         flags &= ~(IOPL_MASK | X86_EFLAGS_VM);
 646         flags |= (vcpu->rmode.save_iopl << IOPL_SHIFT);
 647         vmcs_writel(GUEST_RFLAGS, flags);
 648
 649         vmcs_writel(GUEST_CR4, (vmcs_readl(GUEST_CR4) & ~CR4_VME_MASK) |
 650                         (vmcs_readl(CR4_READ_SHADOW) & CR4_VME_MASK));
 651
 652         update_exception_bitmap(vcpu);
 653
 654         fix_pmode_dataseg(VCPU_SREG_ES, &vcpu->rmode.es);
 655         fix_pmode_dataseg(VCPU_SREG_DS, &vcpu->rmode.ds);
 656         fix_pmode_dataseg(VCPU_SREG_GS, &vcpu->rmode.gs);
 657         fix_pmode_dataseg(VCPU_SREG_FS, &vcpu->rmode.fs);
 658
 659         vmcs_write16(GUEST_SS_SELECTOR, 0);
 660         vmcs_write32(GUEST_SS_AR_BYTES, 0x93);
 661
 662         vmcs_write16(GUEST_CS_SELECTOR,
 663                      vmcs_read16(GUEST_CS_SELECTOR) & ~SELECTOR_RPL_MASK);
 664         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
 665 }
 666
 667 static int rmode_tss_base(struct kvm* kvm)
 668 {
 669         gfn_t base_gfn = kvm->memslots[0].base_gfn + kvm->memslots[0].npages - 3;
 670         return base_gfn << PAGE_SHIFT;
 671 }
 672
 673 static void fix_rmode_seg(int seg, struct kvm_save_segment *save)
 674 {
 675         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 676
 677         save->selector = vmcs_read16(sf->selector);
 678         save->base = vmcs_readl(sf->base);
 679         save->limit = vmcs_read32(sf->limit);
 680         save->ar = vmcs_read32(sf->ar_bytes);
 681         vmcs_write16(sf->selector, vmcs_readl(sf->base) >> 4);
 682         vmcs_write32(sf->limit, 0xffff);
 683         vmcs_write32(sf->ar_bytes, 0xf3);
 684 }
 685
 686 static void enter_rmode(struct kvm_vcpu *vcpu)
 687 {
 688         unsigned long flags;
 689
 690         vcpu->rmode.active = 1;
 691
 692         vcpu->rmode.tr.base = vmcs_readl(GUEST_TR_BASE);
 693         vmcs_writel(GUEST_TR_BASE, rmode_tss_base(vcpu->kvm));
 694
 695         vcpu->rmode.tr.limit = vmcs_read32(GUEST_TR_LIMIT);
 696         vmcs_write32(GUEST_TR_LIMIT, RMODE_TSS_SIZE - 1);
 697
 698         vcpu->rmode.tr.ar = vmcs_read32(GUEST_TR_AR_BYTES);
 699         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
 700
 701         flags = vmcs_readl(GUEST_RFLAGS);
 702         vcpu->rmode.save_iopl = (flags & IOPL_MASK) >> IOPL_SHIFT;
 703
 704         flags |= IOPL_MASK | X86_EFLAGS_VM;
 705
 706         vmcs_writel(GUEST_RFLAGS, flags);
 707         vmcs_writel(GUEST_CR4, vmcs_readl(GUEST_CR4) | CR4_VME_MASK);
 708         update_exception_bitmap(vcpu);
 709
 710         vmcs_write16(GUEST_SS_SELECTOR, vmcs_readl(GUEST_SS_BASE) >> 4);
 711         vmcs_write32(GUEST_SS_LIMIT, 0xffff);
 712         vmcs_write32(GUEST_SS_AR_BYTES, 0xf3);
 713
 714         vmcs_write32(GUEST_CS_AR_BYTES, 0xf3);
 715         vmcs_write32(GUEST_CS_LIMIT, 0xffff);
 716         vmcs_write16(GUEST_CS_SELECTOR, vmcs_readl(GUEST_CS_BASE) >> 4);
 717
 718         fix_rmode_seg(VCPU_SREG_ES, &vcpu->rmode.es);
 719         fix_rmode_seg(VCPU_SREG_DS, &vcpu->rmode.ds);
 720         fix_rmode_seg(VCPU_SREG_GS, &vcpu->rmode.gs);
 721         fix_rmode_seg(VCPU_SREG_FS, &vcpu->rmode.fs);
 722 }
 723
 724 #ifdef CONFIG_X86_64
 725
 726 static void enter_lmode(struct kvm_vcpu *vcpu)
 727 {
 728         u32 guest_tr_ar;
 729
 730         guest_tr_ar = vmcs_read32(GUEST_TR_AR_BYTES);
 731         if ((guest_tr_ar & AR_TYPE_MASK) != AR_TYPE_BUSY_64_TSS) {
 732                 printk(KERN_DEBUG "%s: tss fixup for long mode. \n",
 733                        __FUNCTION__);
 734                 vmcs_write32(GUEST_TR_AR_BYTES,
 735                              (guest_tr_ar & ~AR_TYPE_MASK)
 736                              | AR_TYPE_BUSY_64_TSS);
 737         }
 738
 739         vcpu->shadow_efer |= EFER_LMA;
 740
 741         find_msr_entry(vcpu, MSR_EFER)->data |= EFER_LMA | EFER_LME;
 742         vmcs_write32(VM_ENTRY_CONTROLS,
 743                      vmcs_read32(VM_ENTRY_CONTROLS)
 744                      | VM_ENTRY_CONTROLS_IA32E_MASK);
 745 }
 746
 747 static void exit_lmode(struct kvm_vcpu *vcpu)
 748 {
 749         vcpu->shadow_efer &= ~EFER_LMA;
 750
 751         vmcs_write32(VM_ENTRY_CONTROLS,
 752                      vmcs_read32(VM_ENTRY_CONTROLS)
 753                      & ~VM_ENTRY_CONTROLS_IA32E_MASK);
 754 }
 755
 756 #endif
 757
 758 static void vmx_decache_cr0_cr4_guest_bits(struct kvm_vcpu *vcpu)
 759 {
 760         vcpu->cr0 &= KVM_GUEST_CR0_MASK;
 761         vcpu->cr0 |= vmcs_readl(GUEST_CR0) & ~KVM_GUEST_CR0_MASK;
 762
 763         vcpu->cr4 &= KVM_GUEST_CR4_MASK;
 764         vcpu->cr4 |= vmcs_readl(GUEST_CR4) & ~KVM_GUEST_CR4_MASK;
 765 }
 766
 767 static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 768 {
 769         if (vcpu->rmode.active && (cr0 & CR0_PE_MASK))
 770                 enter_pmode(vcpu);
 771
 772         if (!vcpu->rmode.active && !(cr0 & CR0_PE_MASK))
 773                 enter_rmode(vcpu);
 774
 775 #ifdef CONFIG_X86_64
 776         if (vcpu->shadow_efer & EFER_LME) {
 777                 if (!is_paging(vcpu) && (cr0 & CR0_PG_MASK))
 778                         enter_lmode(vcpu);
 779                 if (is_paging(vcpu) && !(cr0 & CR0_PG_MASK))
 780                         exit_lmode(vcpu);
 781         }
 782 #endif
 783
 784         vmcs_writel(CR0_READ_SHADOW, cr0);
 785         vmcs_writel(GUEST_CR0,
 786                     (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON);
 787         vcpu->cr0 = cr0;
 788 }
 789
 790 /*
 791  * Used when restoring the VM to avoid corrupting segment registers
 792  */
 793 static void vmx_set_cr0_no_modeswitch(struct kvm_vcpu *vcpu, unsigned long cr0)
 794 {
 795         if (!vcpu->rmode.active && !(cr0 & CR0_PE_MASK))
 796                 enter_rmode(vcpu);
 797
 798         vcpu->rmode.active = ((cr0 & CR0_PE_MASK) == 0);
 799         update_exception_bitmap(vcpu);
 800         vmcs_writel(CR0_READ_SHADOW, cr0);
 801         vmcs_writel(GUEST_CR0,
 802                     (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON);
 803         vcpu->cr0 = cr0;
 804 }
 805
 806 static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 807 {
 808         vmcs_writel(GUEST_CR3, cr3);
 809 }
 810
 811 static void vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 812 {
 813         vmcs_writel(CR4_READ_SHADOW, cr4);
 814         vmcs_writel(GUEST_CR4, cr4 | (vcpu->rmode.active ?
 815                     KVM_RMODE_VM_CR4_ALWAYS_ON : KVM_PMODE_VM_CR4_ALWAYS_ON));
 816         vcpu->cr4 = cr4;
 817 }
 818
 819 #ifdef CONFIG_X86_64
 820
 821 static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer)
 822 {
 823         struct vmx_msr_entry *msr = find_msr_entry(vcpu, MSR_EFER);
 824
 825         vcpu->shadow_efer = efer;
 826         if (efer & EFER_LMA) {
 827                 vmcs_write32(VM_ENTRY_CONTROLS,
 828                                      vmcs_read32(VM_ENTRY_CONTROLS) |
 829                                      VM_ENTRY_CONTROLS_IA32E_MASK);
 830                 msr->data = efer;
 831
 832         } else {
 833                 vmcs_write32(VM_ENTRY_CONTROLS,
 834                                      vmcs_read32(VM_ENTRY_CONTROLS) &
 835                                      ~VM_ENTRY_CONTROLS_IA32E_MASK);
 836
 837                 msr->data = efer & ~EFER_LME;
 838         }
 839 }
 840
 841 #endif
 842
 843 static u64 vmx_get_segment_base(struct kvm_vcpu *vcpu, int seg)
 844 {
 845         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 846
 847         return vmcs_readl(sf->base);
 848 }
 849
 850 static void vmx_get_segment(struct kvm_vcpu *vcpu,
 851                             struct kvm_segment *var, int seg)
 852 {
 853         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 854         u32 ar;
 855
 856         var->base = vmcs_readl(sf->base);
 857         var->limit = vmcs_read32(sf->limit);
 858         var->selector = vmcs_read16(sf->selector);
 859         ar = vmcs_read32(sf->ar_bytes);
 860         if (ar & AR_UNUSABLE_MASK)
 861                 ar = 0;
 862         var->type = ar & 15;
 863         var->s = (ar >> 4) & 1;
 864         var->dpl = (ar >> 5) & 3;
 865         var->present = (ar >> 7) & 1;
 866         var->avl = (ar >> 12) & 1;
 867         var->l = (ar >> 13) & 1;
 868         var->db = (ar >> 14) & 1;
 869         var->g = (ar >> 15) & 1;
 870         var->unusable = (ar >> 16) & 1;
 871 }
 872
 873 static void vmx_set_segment(struct kvm_vcpu *vcpu,
 874                             struct kvm_segment *var, int seg)
 875 {
 876         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 877         u32 ar;
 878
 879         vmcs_writel(sf->base, var->base);
 880         vmcs_write32(sf->limit, var->limit);
 881         vmcs_write16(sf->selector, var->selector);
 882         if (var->unusable)
 883                 ar = 1 << 16;
 884         else {
 885                 ar = var->type & 15;
 886                 ar |= (var->s & 1) << 4;
 887                 ar |= (var->dpl & 3) << 5;
 888                 ar |= (var->present & 1) << 7;
 889                 ar |= (var->avl & 1) << 12;
 890                 ar |= (var->l & 1) << 13;
 891                 ar |= (var->db & 1) << 14;
 892                 ar |= (var->g & 1) << 15;
 893         }
 894         if (ar == 0) /* a 0 value means unusable */
 895                 ar = AR_UNUSABLE_MASK;
 896         vmcs_write32(sf->ar_bytes, ar);
 897 }
 898
 899 static void vmx_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
 900 {
 901         u32 ar = vmcs_read32(GUEST_CS_AR_BYTES);
 902
 903         *db = (ar >> 14) & 1;
 904         *l = (ar >> 13) & 1;
 905 }
 906
 907 static void vmx_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 908 {
 909         dt->limit = vmcs_read32(GUEST_IDTR_LIMIT);
 910         dt->base = vmcs_readl(GUEST_IDTR_BASE);
 911 }
 912
 913 static void vmx_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 914 {
 915         vmcs_write32(GUEST_IDTR_LIMIT, dt->limit);
 916         vmcs_writel(GUEST_IDTR_BASE, dt->base);
 917 }
 918
 919 static void vmx_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 920 {
 921         dt->limit = vmcs_read32(GUEST_GDTR_LIMIT);
 922         dt->base = vmcs_readl(GUEST_GDTR_BASE);
 923 }
 924
 925 static void vmx_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 926 {
 927         vmcs_write32(GUEST_GDTR_LIMIT, dt->limit);
 928         vmcs_writel(GUEST_GDTR_BASE, dt->base);
 929 }
 930
 931 static int init_rmode_tss(struct kvm* kvm)
 932 {
 933         struct page *p1, *p2, *p3;
 934         gfn_t fn = rmode_tss_base(kvm) >> PAGE_SHIFT;
 935         char *page;
 936
 937         p1 = _gfn_to_page(kvm, fn++);
 938         p2 = _gfn_to_page(kvm, fn++);
 939         p3 = _gfn_to_page(kvm, fn);
 940
 941         if (!p1 || !p2 || !p3) {
 942                 kvm_printf(kvm,"%s: gfn_to_page failed\n", __FUNCTION__);
 943                 return 0;
 944         }
 945
 946         page = kmap_atomic(p1, KM_USER0);
 947         memset(page, 0, PAGE_SIZE);
 948         *(u16*)(page + 0x66) = TSS_BASE_SIZE + TSS_REDIRECTION_SIZE;
 949         kunmap_atomic(page, KM_USER0);
 950
 951         page = kmap_atomic(p2, KM_USER0);
 952         memset(page, 0, PAGE_SIZE);
 953         kunmap_atomic(page, KM_USER0);
 954
 955         page = kmap_atomic(p3, KM_USER0);
 956         memset(page, 0, PAGE_SIZE);
 957         *(page + RMODE_TSS_SIZE - 2 * PAGE_SIZE - 1) = ~0;
 958         kunmap_atomic(page, KM_USER0);
 959
 960         return 1;
 961 }
 962
 963 static void vmcs_write32_fixedbits(u32 msr, u32 vmcs_field, u32 val)
 964 {
 965         u32 msr_high, msr_low;
 966
 967         rdmsr(msr, msr_low, msr_high);
 968
 969         val &= msr_high;
 970         val |= msr_low;
 971         vmcs_write32(vmcs_field, val);
 972 }
 973
 974 static void seg_setup(int seg)
 975 {
 976         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 977
 978         vmcs_write16(sf->selector, 0);
 979         vmcs_writel(sf->base, 0);
 980         vmcs_write32(sf->limit, 0xffff);
 981         vmcs_write32(sf->ar_bytes, 0x93);
 982 }
 983
 984 /*
 985  * Sets up the vmcs for emulated real mode.
 986  */
 987 static int vmx_vcpu_setup(struct kvm_vcpu *vcpu)
 988 {
 989         u32 host_sysenter_cs;
 990         u32 junk;
 991         unsigned long a;
 992         struct descriptor_table dt;
 993         int i;
 994         int ret = 0;
 995         int nr_good_msrs;
 996         extern asmlinkage void kvm_vmx_return(void);
 997
 998         if (!init_rmode_tss(vcpu->kvm)) {
 999                 ret = -ENOMEM;
1000                 goto out;
1001         }
1002
1003         memset(vcpu->regs, 0, sizeof(vcpu->regs));
1004         vcpu->regs[VCPU_REGS_RDX] = get_rdx_init_val();
1005         vcpu->cr8 = 0;
1006         vcpu->apic_base = 0xfee00000 |
1007                         /*for vcpu 0*/ MSR_IA32_APICBASE_BSP |
1008                         MSR_IA32_APICBASE_ENABLE;
1009
1010         fx_init(vcpu);
1011
1012         /*
1013          * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
1014          * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4.  Sigh.
1015          */
1016         vmcs_write16(GUEST_CS_SELECTOR, 0xf000);
1017         vmcs_writel(GUEST_CS_BASE, 0x000f0000);
1018         vmcs_write32(GUEST_CS_LIMIT, 0xffff);
1019         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
1020
1021         seg_setup(VCPU_SREG_DS);
1022         seg_setup(VCPU_SREG_ES);
1023         seg_setup(VCPU_SREG_FS);
1024         seg_setup(VCPU_SREG_GS);
1025         seg_setup(VCPU_SREG_SS);
1026
1027         vmcs_write16(GUEST_TR_SELECTOR, 0);
1028         vmcs_writel(GUEST_TR_BASE, 0);
1029         vmcs_write32(GUEST_TR_LIMIT, 0xffff);
1030         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
1031
1032         vmcs_write16(GUEST_LDTR_SELECTOR, 0);
1033         vmcs_writel(GUEST_LDTR_BASE, 0);
1034         vmcs_write32(GUEST_LDTR_LIMIT, 0xffff);
1035         vmcs_write32(GUEST_LDTR_AR_BYTES, 0x00082);
1036
1037         vmcs_write32(GUEST_SYSENTER_CS, 0);
1038         vmcs_writel(GUEST_SYSENTER_ESP, 0);
1039         vmcs_writel(GUEST_SYSENTER_EIP, 0);
1040
1041         vmcs_writel(GUEST_RFLAGS, 0x02);
1042         vmcs_writel(GUEST_RIP, 0xfff0);
1043         vmcs_writel(GUEST_RSP, 0);
1044
1045         //todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0
1046         vmcs_writel(GUEST_DR7, 0x400);
1047
1048         vmcs_writel(GUEST_GDTR_BASE, 0);
1049         vmcs_write32(GUEST_GDTR_LIMIT, 0xffff);
1050
1051         vmcs_writel(GUEST_IDTR_BASE, 0);
1052         vmcs_write32(GUEST_IDTR_LIMIT, 0xffff);
1053
1054         vmcs_write32(GUEST_ACTIVITY_STATE, 0);
1055         vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, 0);
1056         vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS, 0);
1057
1058         /* I/O */
1059         vmcs_write64(IO_BITMAP_A, 0);
1060         vmcs_write64(IO_BITMAP_B, 0);
1061
1062         guest_write_tsc(0);
1063
1064         vmcs_write64(VMCS_LINK_POINTER, -1ull); /* 22.3.1.5 */
1065
1066         /* Special registers */
1067         vmcs_write64(GUEST_IA32_DEBUGCTL, 0);
1068
1069         /* Control */
1070         vmcs_write32_fixedbits(MSR_IA32_VMX_PINBASED_CTLS,
1071                                PIN_BASED_VM_EXEC_CONTROL,
1072                                PIN_BASED_EXT_INTR_MASK   /* 20.6.1 */
1073                                | PIN_BASED_NMI_EXITING   /* 20.6.1 */
1074                         );
1075         vmcs_write32_fixedbits(MSR_IA32_VMX_PROCBASED_CTLS,
1076                                CPU_BASED_VM_EXEC_CONTROL,
1077                                CPU_BASED_HLT_EXITING         /* 20.6.2 */
1078                                | CPU_BASED_CR8_LOAD_EXITING    /* 20.6.2 */
1079                                | CPU_BASED_CR8_STORE_EXITING   /* 20.6.2 */
1080                                | CPU_BASED_UNCOND_IO_EXITING   /* 20.6.2 */
1081                                | CPU_BASED_MOV_DR_EXITING
1082                                | CPU_BASED_USE_TSC_OFFSETING   /* 21.3 */
1083                         );
1084
1085         vmcs_write32(EXCEPTION_BITMAP, 1 << PF_VECTOR);
1086         vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK, 0);
1087         vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, 0);
1088         vmcs_write32(CR3_TARGET_COUNT, 0);           /* 22.2.1 */
1089
1090         vmcs_writel(HOST_CR0, read_cr0());  /* 22.2.3 */
1091         vmcs_writel(HOST_CR4, read_cr4());  /* 22.2.3, 22.2.5 */
1092         vmcs_writel(HOST_CR3, read_cr3());  /* 22.2.3  FIXME: shadow tables */
1093
1094         vmcs_write16(HOST_CS_SELECTOR, __KERNEL_CS);  /* 22.2.4 */
1095         vmcs_write16(HOST_DS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1096         vmcs_write16(HOST_ES_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1097         vmcs_write16(HOST_FS_SELECTOR, read_fs());    /* 22.2.4 */
1098         vmcs_write16(HOST_GS_SELECTOR, read_gs());    /* 22.2.4 */
1099         vmcs_write16(HOST_SS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1100 #ifdef CONFIG_X86_64
1101         rdmsrl(MSR_FS_BASE, a);
1102         vmcs_writel(HOST_FS_BASE, a); /* 22.2.4 */
1103         rdmsrl(MSR_GS_BASE, a);
1104         vmcs_writel(HOST_GS_BASE, a); /* 22.2.4 */
1105 #else
1106         vmcs_writel(HOST_FS_BASE, 0); /* 22.2.4 */
1107         vmcs_writel(HOST_GS_BASE, 0); /* 22.2.4 */
1108 #endif
1109
1110         vmcs_write16(HOST_TR_SELECTOR, GDT_ENTRY_TSS*8);  /* 22.2.4 */
1111
1112         get_idt(&dt);
1113         vmcs_writel(HOST_IDTR_BASE, dt.base);   /* 22.2.4 */
1114
1115
1116         vmcs_writel(HOST_RIP, (unsigned long)kvm_vmx_return); /* 22.2.5 */
1117
1118         rdmsr(MSR_IA32_SYSENTER_CS, host_sysenter_cs, junk);
1119         vmcs_write32(HOST_IA32_SYSENTER_CS, host_sysenter_cs);
1120         rdmsrl(MSR_IA32_SYSENTER_ESP, a);
1121         vmcs_writel(HOST_IA32_SYSENTER_ESP, a);   /* 22.2.3 */
1122         rdmsrl(MSR_IA32_SYSENTER_EIP, a);
1123         vmcs_writel(HOST_IA32_SYSENTER_EIP, a);   /* 22.2.3 */
1124
1125         for (i = 0; i < NR_VMX_MSR; ++i) {
1126                 u32 index = vmx_msr_index[i];
1127                 u32 data_low, data_high;
1128                 u64 data;
1129                 int j = vcpu->nmsrs;
1130
1131                 if (rdmsr_safe(index, &data_low, &data_high) < 0)
1132                         continue;
1133                 if (wrmsr_safe(index, data_low, data_high) < 0)
1134                         continue;
1135                 data = data_low | ((u64)data_high << 32);
1136                 vcpu->host_msrs[j].index = index;
1137                 vcpu->host_msrs[j].reserved = 0;
1138                 vcpu->host_msrs[j].data = data;
1139                 vcpu->guest_msrs[j] = vcpu->host_msrs[j];
1140                 ++vcpu->nmsrs;
1141         }
1142         printk(KERN_DEBUG "kvm: msrs: %d\n", vcpu->nmsrs);
1143
1144         nr_good_msrs = vcpu->nmsrs - NR_BAD_MSRS;
1145         vmcs_writel(VM_ENTRY_MSR_LOAD_ADDR,
1146                     virt_to_phys(vcpu->guest_msrs + NR_BAD_MSRS));
1147         vmcs_writel(VM_EXIT_MSR_STORE_ADDR,
1148                     virt_to_phys(vcpu->guest_msrs + NR_BAD_MSRS));
1149         vmcs_writel(VM_EXIT_MSR_LOAD_ADDR,
1150                     virt_to_phys(vcpu->host_msrs + NR_BAD_MSRS));
1151         vmcs_write32_fixedbits(MSR_IA32_VMX_EXIT_CTLS, VM_EXIT_CONTROLS,
1152                                (HOST_IS_64 << 9));  /* 22.2,1, 20.7.1 */
1153         vmcs_write32(VM_EXIT_MSR_STORE_COUNT, nr_good_msrs); /* 22.2.2 */
1154         vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, nr_good_msrs);  /* 22.2.2 */
1155         vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, nr_good_msrs); /* 22.2.2 */
1156
1157
1158         /* 22.2.1, 20.8.1 */
1159         vmcs_write32_fixedbits(MSR_IA32_VMX_ENTRY_CTLS,
1160                                VM_ENTRY_CONTROLS, 0);
1161         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0);  /* 22.2.1 */
1162
1163 #ifdef CONFIG_X86_64
1164         vmcs_writel(VIRTUAL_APIC_PAGE_ADDR, 0);
1165         vmcs_writel(TPR_THRESHOLD, 0);
1166 #endif
1167
1168         vmcs_writel(CR0_GUEST_HOST_MASK, KVM_GUEST_CR0_MASK);
1169         vmcs_writel(CR4_GUEST_HOST_MASK, KVM_GUEST_CR4_MASK);
1170
1171         vcpu->cr0 = 0x60000010;
1172         vmx_set_cr0(vcpu, vcpu->cr0); // enter rmode
1173         vmx_set_cr4(vcpu, 0);
1174 #ifdef CONFIG_X86_64
1175         vmx_set_efer(vcpu, 0);
1176 #endif
1177
1178         return 0;
1179
1180 out:
1181         return ret;
1182 }
1183
1184 static void inject_rmode_irq(struct kvm_vcpu *vcpu, int irq)
1185 {
1186         u16 ent[2];
1187         u16 cs;
1188         u16 ip;
1189         unsigned long flags;
1190         unsigned long ss_base = vmcs_readl(GUEST_SS_BASE);
1191         u16 sp =  vmcs_readl(GUEST_RSP);
1192         u32 ss_limit = vmcs_read32(GUEST_SS_LIMIT);
1193
1194         if (sp > ss_limit || sp - 6 > sp) {
1195                 vcpu_printf(vcpu, "%s: #SS, rsp 0x%lx ss 0x%lx limit 0x%x\n",
1196                             __FUNCTION__,
1197                             vmcs_readl(GUEST_RSP),
1198                             vmcs_readl(GUEST_SS_BASE),
1199                             vmcs_read32(GUEST_SS_LIMIT));
1200                 return;
1201         }
1202
1203         if (kvm_read_guest(vcpu, irq * sizeof(ent), sizeof(ent), &ent) !=
1204                                                                 sizeof(ent)) {
1205                 vcpu_printf(vcpu, "%s: read guest err\n", __FUNCTION__);
1206                 return;
1207         }
1208
1209         flags =  vmcs_readl(GUEST_RFLAGS);
1210         cs =  vmcs_readl(GUEST_CS_BASE) >> 4;
1211         ip =  vmcs_readl(GUEST_RIP);
1212
1213
1214         if (kvm_write_guest(vcpu, ss_base + sp - 2, 2, &flags) != 2 ||
1215             kvm_write_guest(vcpu, ss_base + sp - 4, 2, &cs) != 2 ||
1216             kvm_write_guest(vcpu, ss_base + sp - 6, 2, &ip) != 2) {
1217                 vcpu_printf(vcpu, "%s: write guest err\n", __FUNCTION__);
1218                 return;
1219         }
1220
1221         vmcs_writel(GUEST_RFLAGS, flags &
1222                     ~( X86_EFLAGS_IF | X86_EFLAGS_AC | X86_EFLAGS_TF));
1223         vmcs_write16(GUEST_CS_SELECTOR, ent[1]) ;
1224         vmcs_writel(GUEST_CS_BASE, ent[1] << 4);
1225         vmcs_writel(GUEST_RIP, ent[0]);
1226         vmcs_writel(GUEST_RSP, (vmcs_readl(GUEST_RSP) & ~0xffff) | (sp - 6));
1227 }
1228
1229 static void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
1230 {
1231         int word_index = __ffs(vcpu->irq_summary);
1232         int bit_index = __ffs(vcpu->irq_pending[word_index]);
1233         int irq = word_index * BITS_PER_LONG + bit_index;
1234
1235         clear_bit(bit_index, &vcpu->irq_pending[word_index]);
1236         if (!vcpu->irq_pending[word_index])
1237                 clear_bit(word_index, &vcpu->irq_summary);
1238
1239         if (vcpu->rmode.active) {
1240                 inject_rmode_irq(vcpu, irq);
1241                 return;
1242         }
1243         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1244                         irq | INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
1245 }
1246
1247
1248 static void do_interrupt_requests(struct kvm_vcpu *vcpu,
1249                                        struct kvm_run *kvm_run)
1250 {
1251         u32 cpu_based_vm_exec_control;
1252
1253         vcpu->interrupt_window_open =
1254                 ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
1255                  (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0);
1256
1257         if (vcpu->interrupt_window_open &&
1258             vcpu->irq_summary &&
1259             !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD) & INTR_INFO_VALID_MASK))
1260                 /*
1261                  * If interrupts enabled, and not blocked by sti or mov ss. Good.
1262                  */
1263                 kvm_do_inject_irq(vcpu);
1264
1265         cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
1266         if (!vcpu->interrupt_window_open &&
1267             (vcpu->irq_summary || kvm_run->request_interrupt_window))
1268                 /*
1269                  * Interrupts blocked.  Wait for unblock.
1270                  */
1271                 cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_INTR_PENDING;
1272         else
1273                 cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
1274         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
1275 }
1276
1277 static void kvm_guest_debug_pre(struct kvm_vcpu *vcpu)
1278 {
1279         struct kvm_guest_debug *dbg = &vcpu->guest_debug;
1280
1281         set_debugreg(dbg->bp[0], 0);
1282         set_debugreg(dbg->bp[1], 1);
1283         set_debugreg(dbg->bp[2], 2);
1284         set_debugreg(dbg->bp[3], 3);
1285
1286         if (dbg->singlestep) {
1287                 unsigned long flags;
1288
1289                 flags = vmcs_readl(GUEST_RFLAGS);
1290                 flags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
1291                 vmcs_writel(GUEST_RFLAGS, flags);
1292         }
1293 }
1294
1295 static int handle_rmode_exception(struct kvm_vcpu *vcpu,
1296                                   int vec, u32 err_code)
1297 {
1298         if (!vcpu->rmode.active)
1299                 return 0;
1300
1301         if (vec == GP_VECTOR && err_code == 0)
1302                 if (emulate_instruction(vcpu, NULL, 0, 0) == EMULATE_DONE)
1303                         return 1;
1304         return 0;
1305 }
1306
1307 static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1308 {
1309         u32 intr_info, error_code;
1310         unsigned long cr2, rip;
1311         u32 vect_info;
1312         enum emulation_result er;
1313         int r;
1314
1315         vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1316         intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
1317
1318         if ((vect_info & VECTORING_INFO_VALID_MASK) &&
1319                                                 !is_page_fault(intr_info)) {
1320                 printk(KERN_ERR "%s: unexpected, vectoring info 0x%x "
1321                        "intr info 0x%x\n", __FUNCTION__, vect_info, intr_info);
1322         }
1323
1324         if (is_external_interrupt(vect_info)) {
1325                 int irq = vect_info & VECTORING_INFO_VECTOR_MASK;
1326                 set_bit(irq, vcpu->irq_pending);
1327                 set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
1328         }
1329
1330         if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == 0x200) { /* nmi */
1331                 asm ("int $2");
1332                 return 1;
1333         }
1334         error_code = 0;
1335         rip = vmcs_readl(GUEST_RIP);
1336         if (intr_info & INTR_INFO_DELIEVER_CODE_MASK)
1337                 error_code = vmcs_read32(VM_EXIT_INTR_ERROR_CODE);
1338         if (is_page_fault(intr_info)) {
1339                 cr2 = vmcs_readl(EXIT_QUALIFICATION);
1340
1341                 spin_lock(&vcpu->kvm->lock);
1342                 r = kvm_mmu_page_fault(vcpu, cr2, error_code);
1343                 if (r < 0) {
1344                         spin_unlock(&vcpu->kvm->lock);
1345                         return r;
1346                 }
1347                 if (!r) {
1348                         spin_unlock(&vcpu->kvm->lock);
1349                         return 1;
1350                 }
1351
1352                 er = emulate_instruction(vcpu, kvm_run, cr2, error_code);
1353                 spin_unlock(&vcpu->kvm->lock);
1354
1355                 switch (er) {
1356                 case EMULATE_DONE:
1357                         return 1;
1358                 case EMULATE_DO_MMIO:
1359                         ++kvm_stat.mmio_exits;
1360                         kvm_run->exit_reason = KVM_EXIT_MMIO;
1361                         return 0;
1362                  case EMULATE_FAIL:
1363                         vcpu_printf(vcpu, "%s: emulate fail\n", __FUNCTION__);
1364                         break;
1365                 default:
1366                         BUG();
1367                 }
1368         }
1369
1370         if (vcpu->rmode.active &&
1371             handle_rmode_exception(vcpu, intr_info & INTR_INFO_VECTOR_MASK,
1372                                                                 error_code))
1373                 return 1;
1374
1375         if ((intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK)) == (INTR_TYPE_EXCEPTION | 1)) {
1376                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
1377                 return 0;
1378         }
1379         kvm_run->exit_reason = KVM_EXIT_EXCEPTION;
1380         kvm_run->ex.exception = intr_info & INTR_INFO_VECTOR_MASK;
1381         kvm_run->ex.error_code = error_code;
1382         return 0;
1383 }
1384
1385 static int handle_external_interrupt(struct kvm_vcpu *vcpu,
1386                                      struct kvm_run *kvm_run)
1387 {
1388         ++kvm_stat.irq_exits;
1389         return 1;
1390 }
1391
1392 static int handle_triple_fault(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1393 {
1394         kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
1395         return 0;
1396 }
1397
1398 static int get_io_count(struct kvm_vcpu *vcpu, u64 *count)
1399 {
1400         u64 inst;
1401         gva_t rip;
1402         int countr_size;
1403         int i, n;
1404
1405         if ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_VM)) {
1406                 countr_size = 2;
1407         } else {
1408                 u32 cs_ar = vmcs_read32(GUEST_CS_AR_BYTES);
1409
1410                 countr_size = (cs_ar & AR_L_MASK) ? 8:
1411                               (cs_ar & AR_DB_MASK) ? 4: 2;
1412         }
1413
1414         rip =  vmcs_readl(GUEST_RIP);
1415         if (countr_size != 8)
1416                 rip += vmcs_readl(GUEST_CS_BASE);
1417
1418         n = kvm_read_guest(vcpu, rip, sizeof(inst), &inst);
1419
1420         for (i = 0; i < n; i++) {
1421                 switch (((u8*)&inst)[i]) {
1422                 case 0xf0:
1423                 case 0xf2:
1424                 case 0xf3:
1425                 case 0x2e:
1426                 case 0x36:
1427                 case 0x3e:
1428                 case 0x26:
1429                 case 0x64:
1430                 case 0x65:
1431                 case 0x66:
1432                         break;
1433                 case 0x67:
1434                         countr_size = (countr_size == 2) ? 4: (countr_size >> 1);
1435                 default:
1436                         goto done;
1437                 }
1438         }
1439         return 0;
1440 done:
1441         countr_size *= 8;
1442         *count = vcpu->regs[VCPU_REGS_RCX] & (~0ULL >> (64 - countr_size));
1443         return 1;
1444 }
1445
1446 static int handle_io(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1447 {
1448         u64 exit_qualification;
1449
1450         ++kvm_stat.io_exits;
1451         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1452         kvm_run->exit_reason = KVM_EXIT_IO;
1453         if (exit_qualification & 8)
1454                 kvm_run->io.direction = KVM_EXIT_IO_IN;
1455         else
1456                 kvm_run->io.direction = KVM_EXIT_IO_OUT;
1457         kvm_run->io.size = (exit_qualification & 7) + 1;
1458         kvm_run->io.string = (exit_qualification & 16) != 0;
1459         kvm_run->io.string_down
1460                 = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_DF) != 0;
1461         kvm_run->io.rep = (exit_qualification & 32) != 0;
1462         kvm_run->io.port = exit_qualification >> 16;
1463         if (kvm_run->io.string) {
1464                 if (!get_io_count(vcpu, &kvm_run->io.count))
1465                         return 1;
1466                 kvm_run->io.address = vmcs_readl(GUEST_LINEAR_ADDRESS);
1467         } else
1468                 kvm_run->io.value = vcpu->regs[VCPU_REGS_RAX]; /* rax */
1469         return 0;
1470 }
1471
1472 static int handle_cr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1473 {
1474         u64 exit_qualification;
1475         int cr;
1476         int reg;
1477
1478         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1479         cr = exit_qualification & 15;
1480         reg = (exit_qualification >> 8) & 15;
1481         switch ((exit_qualification >> 4) & 3) {
1482         case 0: /* mov to cr */
1483                 switch (cr) {
1484                 case 0:
1485                         vcpu_load_rsp_rip(vcpu);
1486                         set_cr0(vcpu, vcpu->regs[reg]);
1487                         skip_emulated_instruction(vcpu);
1488                         return 1;
1489                 case 3:
1490                         vcpu_load_rsp_rip(vcpu);
1491                         set_cr3(vcpu, vcpu->regs[reg]);
1492                         skip_emulated_instruction(vcpu);
1493                         return 1;
1494                 case 4:
1495                         vcpu_load_rsp_rip(vcpu);
1496                         set_cr4(vcpu, vcpu->regs[reg]);
1497                         skip_emulated_instruction(vcpu);
1498                         return 1;
1499                 case 8:
1500                         vcpu_load_rsp_rip(vcpu);
1501                         set_cr8(vcpu, vcpu->regs[reg]);
1502                         skip_emulated_instruction(vcpu);
1503                         return 1;
1504                 };
1505                 break;
1506         case 1: /*mov from cr*/
1507                 switch (cr) {
1508                 case 3:
1509                         vcpu_load_rsp_rip(vcpu);
1510                         vcpu->regs[reg] = vcpu->cr3;
1511                         vcpu_put_rsp_rip(vcpu);
1512                         skip_emulated_instruction(vcpu);
1513                         return 1;
1514                 case 8:
1515                         printk(KERN_DEBUG "handle_cr: read CR8 "
1516                                "cpu erratum AA15\n");
1517                         vcpu_load_rsp_rip(vcpu);
1518                         vcpu->regs[reg] = vcpu->cr8;
1519                         vcpu_put_rsp_rip(vcpu);
1520                         skip_emulated_instruction(vcpu);
1521                         return 1;
1522                 }
1523                 break;
1524         case 3: /* lmsw */
1525                 lmsw(vcpu, (exit_qualification >> LMSW_SOURCE_DATA_SHIFT) & 0x0f);
1526
1527                 skip_emulated_instruction(vcpu);
1528                 return 1;
1529         default:
1530                 break;
1531         }
1532         kvm_run->exit_reason = 0;
1533         printk(KERN_ERR "kvm: unhandled control register: op %d cr %d\n",
1534                (int)(exit_qualification >> 4) & 3, cr);
1535         return 0;
1536 }
1537
1538 static int handle_dr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1539 {
1540         u64 exit_qualification;
1541         unsigned long val;
1542         int dr, reg;
1543
1544         /*
1545          * FIXME: this code assumes the host is debugging the guest.
1546          *        need to deal with guest debugging itself too.
1547          */
1548         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1549         dr = exit_qualification & 7;
1550         reg = (exit_qualification >> 8) & 15;
1551         vcpu_load_rsp_rip(vcpu);
1552         if (exit_qualification & 16) {
1553                 /* mov from dr */
1554                 switch (dr) {
1555                 case 6:
1556                         val = 0xffff0ff0;
1557                         break;
1558                 case 7:
1559                         val = 0x400;
1560                         break;
1561                 default:
1562                         val = 0;
1563                 }
1564                 vcpu->regs[reg] = val;
1565         } else {
1566                 /* mov to dr */
1567         }
1568         vcpu_put_rsp_rip(vcpu);
1569         skip_emulated_instruction(vcpu);
1570         return 1;
1571 }
1572
1573 static int handle_cpuid(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1574 {
1575         kvm_run->exit_reason = KVM_EXIT_CPUID;
1576         return 0;
1577 }
1578
1579 static int handle_rdmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1580 {
1581         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1582         u64 data;
1583
1584         if (vmx_get_msr(vcpu, ecx, &data)) {
1585                 vmx_inject_gp(vcpu, 0);
1586                 return 1;
1587         }
1588
1589         /* FIXME: handling of bits 32:63 of rax, rdx */
1590         vcpu->regs[VCPU_REGS_RAX] = data & -1u;
1591         vcpu->regs[VCPU_REGS_RDX] = (data >> 32) & -1u;
1592         skip_emulated_instruction(vcpu);
1593         return 1;
1594 }
1595
1596 static int handle_wrmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1597 {
1598         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1599         u64 data = (vcpu->regs[VCPU_REGS_RAX] & -1u)
1600                 | ((u64)(vcpu->regs[VCPU_REGS_RDX] & -1u) << 32);
1601
1602         if (vmx_set_msr(vcpu, ecx, data) != 0) {
1603                 vmx_inject_gp(vcpu, 0);
1604                 return 1;
1605         }
1606
1607         skip_emulated_instruction(vcpu);
1608         return 1;
1609 }
1610
1611 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
1612                               struct kvm_run *kvm_run)
1613 {
1614         kvm_run->if_flag = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) != 0;
1615         kvm_run->cr8 = vcpu->cr8;
1616         kvm_run->apic_base = vcpu->apic_base;
1617         kvm_run->ready_for_interrupt_injection = (vcpu->interrupt_window_open &&
1618                                                   vcpu->irq_summary == 0);
1619 }
1620
1621 static int handle_interrupt_window(struct kvm_vcpu *vcpu,
1622                                    struct kvm_run *kvm_run)
1623 {
1624         /*
1625          * If the user space waits to inject interrupts, exit as soon as
1626          * possible
1627          */
1628         if (kvm_run->request_interrupt_window &&
1629             !vcpu->irq_summary) {
1630                 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
1631                 ++kvm_stat.irq_window_exits;
1632                 return 0;
1633         }
1634         return 1;
1635 }
1636
1637 static int handle_halt(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1638 {
1639         skip_emulated_instruction(vcpu);
1640         if (vcpu->irq_summary)
1641                 return 1;
1642
1643         kvm_run->exit_reason = KVM_EXIT_HLT;
1644         ++kvm_stat.halt_exits;
1645         return 0;
1646 }
1647
1648 /*
1649  * The exit handlers return 1 if the exit was handled fully and guest execution
1650  * may resume.  Otherwise they set the kvm_run parameter to indicate what needs
1651  * to be done to userspace and return 0.
1652  */
1653 static int (*kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu,
1654                                       struct kvm_run *kvm_run) = {
1655         [EXIT_REASON_EXCEPTION_NMI]           = handle_exception,
1656         [EXIT_REASON_EXTERNAL_INTERRUPT]      = handle_external_interrupt,
1657         [EXIT_REASON_TRIPLE_FAULT]            = handle_triple_fault,
1658         [EXIT_REASON_IO_INSTRUCTION]          = handle_io,
1659         [EXIT_REASON_CR_ACCESS]               = handle_cr,
1660         [EXIT_REASON_DR_ACCESS]               = handle_dr,
1661         [EXIT_REASON_CPUID]                   = handle_cpuid,
1662         [EXIT_REASON_MSR_READ]                = handle_rdmsr,
1663         [EXIT_REASON_MSR_WRITE]               = handle_wrmsr,
1664         [EXIT_REASON_PENDING_INTERRUPT]       = handle_interrupt_window,
1665         [EXIT_REASON_HLT]                     = handle_halt,
1666 };
1667
1668 static const int kvm_vmx_max_exit_handlers =
1669         sizeof(kvm_vmx_exit_handlers) / sizeof(*kvm_vmx_exit_handlers);
1670
1671 /*
1672  * The guest has exited.  See if we can fix it or if we need userspace
1673  * assistance.
1674  */
1675 static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
1676 {
1677         u32 vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1678         u32 exit_reason = vmcs_read32(VM_EXIT_REASON);
1679
1680         if ( (vectoring_info & VECTORING_INFO_VALID_MASK) &&
1681                                 exit_reason != EXIT_REASON_EXCEPTION_NMI )
1682                 printk(KERN_WARNING "%s: unexpected, valid vectoring info and "
1683                        "exit reason is 0x%x\n", __FUNCTION__, exit_reason);
1684         kvm_run->instruction_length = vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
1685         if (exit_reason < kvm_vmx_max_exit_handlers
1686             && kvm_vmx_exit_handlers[exit_reason])
1687                 return kvm_vmx_exit_handlers[exit_reason](vcpu, kvm_run);
1688         else {
1689                 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1690                 kvm_run->hw.hardware_exit_reason = exit_reason;
1691         }
1692         return 0;
1693 }
1694
1695 /*
1696  * Check if userspace requested an interrupt window, and that the
1697  * interrupt window is open.
1698  *
1699  * No need to exit to userspace if we already have an interrupt queued.
1700  */
1701 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
1702                                           struct kvm_run *kvm_run)
1703 {
1704         return (!vcpu->irq_summary &&
1705                 kvm_run->request_interrupt_window &&
1706                 vcpu->interrupt_window_open &&
1707                 (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF));
1708 }
1709
1710 static int vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1711 {
1712         u8 fail;
1713         u16 fs_sel, gs_sel, ldt_sel;
1714         int fs_gs_ldt_reload_needed;
1715         int r;
1716
1717 again:
1718         /*
1719          * Set host fs and gs selectors.  Unfortunately, 22.2.3 does not
1720          * allow segment selectors with cpl > 0 or ti == 1.
1721          */
1722         fs_sel = read_fs();
1723         gs_sel = read_gs();
1724         ldt_sel = read_ldt();
1725         fs_gs_ldt_reload_needed = (fs_sel & 7) | (gs_sel & 7) | ldt_sel;
1726         if (!fs_gs_ldt_reload_needed) {
1727                 vmcs_write16(HOST_FS_SELECTOR, fs_sel);
1728                 vmcs_write16(HOST_GS_SELECTOR, gs_sel);
1729         } else {
1730                 vmcs_write16(HOST_FS_SELECTOR, 0);
1731                 vmcs_write16(HOST_GS_SELECTOR, 0);
1732         }
1733
1734 #ifdef CONFIG_X86_64
1735         vmcs_writel(HOST_FS_BASE, read_msr(MSR_FS_BASE));
1736         vmcs_writel(HOST_GS_BASE, read_msr(MSR_GS_BASE));
1737 #else
1738         vmcs_writel(HOST_FS_BASE, segment_base(fs_sel));
1739         vmcs_writel(HOST_GS_BASE, segment_base(gs_sel));
1740 #endif
1741
1742         if (!vcpu->mmio_read_completed)
1743                 do_interrupt_requests(vcpu, kvm_run);
1744
1745         if (vcpu->guest_debug.enabled)
1746                 kvm_guest_debug_pre(vcpu);
1747
1748         fx_save(vcpu->host_fx_image);
1749         fx_restore(vcpu->guest_fx_image);
1750
1751         save_msrs(vcpu->host_msrs, vcpu->nmsrs);
1752         load_msrs(vcpu->guest_msrs, NR_BAD_MSRS);
1753
1754         asm (
1755                 /* Store host registers */
1756                 "pushf \n\t"
1757 #ifdef CONFIG_X86_64
1758                 "push %%rax; push %%rbx; push %%rdx;"
1759                 "push %%rsi; push %%rdi; push %%rbp;"
1760                 "push %%r8;  push %%r9;  push %%r10; push %%r11;"
1761                 "push %%r12; push %%r13; push %%r14; push %%r15;"
1762                 "push %%rcx \n\t"
1763                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
1764 #else
1765                 "pusha; push %%ecx \n\t"
1766                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
1767 #endif
1768                 /* Check if vmlaunch of vmresume is needed */
1769                 "cmp $0, %1 \n\t"
1770                 /* Load guest registers.  Don't clobber flags. */
1771 #ifdef CONFIG_X86_64
1772                 "mov %c[cr2](%3), %%rax \n\t"
1773                 "mov %%rax, %%cr2 \n\t"
1774                 "mov %c[rax](%3), %%rax \n\t"
1775                 "mov %c[rbx](%3), %%rbx \n\t"
1776                 "mov %c[rdx](%3), %%rdx \n\t"
1777                 "mov %c[rsi](%3), %%rsi \n\t"
1778                 "mov %c[rdi](%3), %%rdi \n\t"
1779                 "mov %c[rbp](%3), %%rbp \n\t"
1780                 "mov %c[r8](%3),  %%r8  \n\t"
1781                 "mov %c[r9](%3),  %%r9  \n\t"
1782                 "mov %c[r10](%3), %%r10 \n\t"
1783                 "mov %c[r11](%3), %%r11 \n\t"
1784                 "mov %c[r12](%3), %%r12 \n\t"
1785                 "mov %c[r13](%3), %%r13 \n\t"
1786                 "mov %c[r14](%3), %%r14 \n\t"
1787                 "mov %c[r15](%3), %%r15 \n\t"
1788                 "mov %c[rcx](%3), %%rcx \n\t" /* kills %3 (rcx) */
1789 #else
1790                 "mov %c[cr2](%3), %%eax \n\t"
1791                 "mov %%eax,   %%cr2 \n\t"
1792                 "mov %c[rax](%3), %%eax \n\t"
1793                 "mov %c[rbx](%3), %%ebx \n\t"
1794                 "mov %c[rdx](%3), %%edx \n\t"
1795                 "mov %c[rsi](%3), %%esi \n\t"
1796                 "mov %c[rdi](%3), %%edi \n\t"
1797                 "mov %c[rbp](%3), %%ebp \n\t"
1798                 "mov %c[rcx](%3), %%ecx \n\t" /* kills %3 (ecx) */
1799 #endif
1800                 /* Enter guest mode */
1801                 "jne launched \n\t"
1802                 ASM_VMX_VMLAUNCH "\n\t"
1803                 "jmp kvm_vmx_return \n\t"
1804                 "launched: " ASM_VMX_VMRESUME "\n\t"
1805                 ".globl kvm_vmx_return \n\t"
1806                 "kvm_vmx_return: "
1807                 /* Save guest registers, load host registers, keep flags */
1808 #ifdef CONFIG_X86_64
1809                 "xchg %3,     (%%rsp) \n\t"
1810                 "mov %%rax, %c[rax](%3) \n\t"
1811                 "mov %%rbx, %c[rbx](%3) \n\t"
1812                 "pushq (%%rsp); popq %c[rcx](%3) \n\t"
1813                 "mov %%rdx, %c[rdx](%3) \n\t"
1814                 "mov %%rsi, %c[rsi](%3) \n\t"
1815                 "mov %%rdi, %c[rdi](%3) \n\t"
1816                 "mov %%rbp, %c[rbp](%3) \n\t"
1817                 "mov %%r8,  %c[r8](%3) \n\t"
1818                 "mov %%r9,  %c[r9](%3) \n\t"
1819                 "mov %%r10, %c[r10](%3) \n\t"
1820                 "mov %%r11, %c[r11](%3) \n\t"
1821                 "mov %%r12, %c[r12](%3) \n\t"
1822                 "mov %%r13, %c[r13](%3) \n\t"
1823                 "mov %%r14, %c[r14](%3) \n\t"
1824                 "mov %%r15, %c[r15](%3) \n\t"
1825                 "mov %%cr2, %%rax   \n\t"
1826                 "mov %%rax, %c[cr2](%3) \n\t"
1827                 "mov (%%rsp), %3 \n\t"
1828
1829                 "pop  %%rcx; pop  %%r15; pop  %%r14; pop  %%r13; pop  %%r12;"
1830                 "pop  %%r11; pop  %%r10; pop  %%r9;  pop  %%r8;"
1831                 "pop  %%rbp; pop  %%rdi; pop  %%rsi;"
1832                 "pop  %%rdx; pop  %%rbx; pop  %%rax \n\t"
1833 #else
1834                 "xchg %3, (%%esp) \n\t"
1835                 "mov %%eax, %c[rax](%3) \n\t"
1836                 "mov %%ebx, %c[rbx](%3) \n\t"
1837                 "pushl (%%esp); popl %c[rcx](%3) \n\t"
1838                 "mov %%edx, %c[rdx](%3) \n\t"
1839                 "mov %%esi, %c[rsi](%3) \n\t"
1840                 "mov %%edi, %c[rdi](%3) \n\t"
1841                 "mov %%ebp, %c[rbp](%3) \n\t"
1842                 "mov %%cr2, %%eax  \n\t"
1843                 "mov %%eax, %c[cr2](%3) \n\t"
1844                 "mov (%%esp), %3 \n\t"
1845
1846                 "pop %%ecx; popa \n\t"
1847 #endif
1848                 "setbe %0 \n\t"
1849                 "popf \n\t"
1850               : "=q" (fail)
1851               : "r"(vcpu->launched), "d"((unsigned long)HOST_RSP),
1852                 "c"(vcpu),
1853                 [rax]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RAX])),
1854                 [rbx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBX])),
1855                 [rcx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RCX])),
1856                 [rdx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDX])),
1857                 [rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
1858                 [rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
1859                 [rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP])),
1860 #ifdef CONFIG_X86_64
1861                 [r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
1862                 [r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
1863                 [r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
1864                 [r11]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R11])),
1865                 [r12]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R12])),
1866                 [r13]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R13])),
1867                 [r14]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R14])),
1868                 [r15]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R15])),
1869 #endif
1870                 [cr2]"i"(offsetof(struct kvm_vcpu, cr2))
1871               : "cc", "memory" );
1872
1873         ++kvm_stat.exits;
1874
1875         save_msrs(vcpu->guest_msrs, NR_BAD_MSRS);
1876         load_msrs(vcpu->host_msrs, NR_BAD_MSRS);
1877
1878         fx_save(vcpu->guest_fx_image);
1879         fx_restore(vcpu->host_fx_image);
1880         vcpu->interrupt_window_open = (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0;
1881
1882         asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS));
1883
1884         kvm_run->exit_type = 0;
1885         if (fail) {
1886                 kvm_run->exit_type = KVM_EXIT_TYPE_FAIL_ENTRY;
1887                 kvm_run->exit_reason = vmcs_read32(VM_INSTRUCTION_ERROR);
1888                 r = 0;
1889         } else {
1890                 if (fs_gs_ldt_reload_needed) {
1891                         load_ldt(ldt_sel);
1892                         load_fs(fs_sel);
1893                         /*
1894                          * If we have to reload gs, we must take care to
1895                          * preserve our gs base.
1896                          */
1897                         local_irq_disable();
1898                         load_gs(gs_sel);
1899 #ifdef CONFIG_X86_64
1900                         wrmsrl(MSR_GS_BASE, vmcs_readl(HOST_GS_BASE));
1901 #endif
1902                         local_irq_enable();
1903
1904                         reload_tss();
1905                 }
1906                 /*
1907                  * Profile KVM exit RIPs:
1908                  */
1909                 if (unlikely(prof_on == KVM_PROFILING))
1910                         profile_hit(KVM_PROFILING, (void *)vmcs_readl(GUEST_RIP));
1911
1912                 vcpu->launched = 1;
1913                 kvm_run->exit_type = KVM_EXIT_TYPE_VM_EXIT;
1914                 r = kvm_handle_exit(kvm_run, vcpu);
1915                 if (r > 0) {
1916                         /* Give scheduler a change to reschedule. */
1917                         if (signal_pending(current)) {
1918                                 ++kvm_stat.signal_exits;
1919                                 post_kvm_run_save(vcpu, kvm_run);
1920                                 return -EINTR;
1921                         }
1922
1923                         if (dm_request_for_irq_injection(vcpu, kvm_run)) {
1924                                 ++kvm_stat.request_irq_exits;
1925                                 post_kvm_run_save(vcpu, kvm_run);
1926                                 return -EINTR;
1927                         }
1928
1929                         kvm_resched(vcpu);
1930                         goto again;
1931                 }
1932         }
1933
1934         post_kvm_run_save(vcpu, kvm_run);
1935         return r;
1936 }
1937
1938 static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
1939 {
1940         vmcs_writel(GUEST_CR3, vmcs_readl(GUEST_CR3));
1941 }
1942
1943 static void vmx_inject_page_fault(struct kvm_vcpu *vcpu,
1944                                   unsigned long addr,
1945                                   u32 err_code)
1946 {
1947         u32 vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1948
1949         ++kvm_stat.pf_guest;
1950
1951         if (is_page_fault(vect_info)) {
1952                 printk(KERN_DEBUG "inject_page_fault: "
1953                        "double fault 0x%lx @ 0x%lx\n",
1954                        addr, vmcs_readl(GUEST_RIP));
1955                 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, 0);
1956                 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1957                              DF_VECTOR |
1958                              INTR_TYPE_EXCEPTION |
1959                              INTR_INFO_DELIEVER_CODE_MASK |
1960                              INTR_INFO_VALID_MASK);
1961                 return;
1962         }
1963         vcpu->cr2 = addr;
1964         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, err_code);
1965         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1966                      PF_VECTOR |
1967                      INTR_TYPE_EXCEPTION |
1968                      INTR_INFO_DELIEVER_CODE_MASK |
1969                      INTR_INFO_VALID_MASK);
1970
1971 }
1972
1973 static void vmx_free_vmcs(struct kvm_vcpu *vcpu)
1974 {
1975         if (vcpu->vmcs) {
1976                 on_each_cpu(__vcpu_clear, vcpu, 0, 1);
1977                 free_vmcs(vcpu->vmcs);
1978                 vcpu->vmcs = NULL;
1979         }
1980 }
1981
1982 static void vmx_free_vcpu(struct kvm_vcpu *vcpu)
1983 {
1984         vmx_free_vmcs(vcpu);
1985 }
1986
1987 static int vmx_create_vcpu(struct kvm_vcpu *vcpu)
1988 {
1989         struct vmcs *vmcs;
1990
1991         vcpu->guest_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
1992         if (!vcpu->guest_msrs)
1993                 return -ENOMEM;
1994
1995         vcpu->host_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
1996         if (!vcpu->host_msrs)
1997                 goto out_free_guest_msrs;
1998
1999         vmcs = alloc_vmcs();
2000         if (!vmcs)
2001                 goto out_free_msrs;
2002
2003         vmcs_clear(vmcs);
2004         vcpu->vmcs = vmcs;
2005         vcpu->launched = 0;
2006
2007         return 0;
2008
2009 out_free_msrs:
2010         kfree(vcpu->host_msrs);
2011         vcpu->host_msrs = NULL;
2012
2013 out_free_guest_msrs:
2014         kfree(vcpu->guest_msrs);
2015         vcpu->guest_msrs = NULL;
2016
2017         return -ENOMEM;
2018 }
2019
2020 static struct kvm_arch_ops vmx_arch_ops = {
2021         .cpu_has_kvm_support = cpu_has_kvm_support,
2022         .disabled_by_bios = vmx_disabled_by_bios,
2023         .hardware_setup = hardware_setup,
2024         .hardware_unsetup = hardware_unsetup,
2025         .hardware_enable = hardware_enable,
2026         .hardware_disable = hardware_disable,
2027
2028         .vcpu_create = vmx_create_vcpu,
2029         .vcpu_free = vmx_free_vcpu,
2030
2031         .vcpu_load = vmx_vcpu_load,
2032         .vcpu_put = vmx_vcpu_put,
2033         .vcpu_decache = vmx_vcpu_decache,
2034
2035         .set_guest_debug = set_guest_debug,
2036         .get_msr = vmx_get_msr,
2037         .set_msr = vmx_set_msr,
2038         .get_segment_base = vmx_get_segment_base,
2039         .get_segment = vmx_get_segment,
2040         .set_segment = vmx_set_segment,
2041         .get_cs_db_l_bits = vmx_get_cs_db_l_bits,
2042         .decache_cr0_cr4_guest_bits = vmx_decache_cr0_cr4_guest_bits,
2043         .set_cr0 = vmx_set_cr0,
2044         .set_cr0_no_modeswitch = vmx_set_cr0_no_modeswitch,
2045         .set_cr3 = vmx_set_cr3,
2046         .set_cr4 = vmx_set_cr4,
2047 #ifdef CONFIG_X86_64
2048         .set_efer = vmx_set_efer,
2049 #endif
2050         .get_idt = vmx_get_idt,
2051         .set_idt = vmx_set_idt,
2052         .get_gdt = vmx_get_gdt,
2053         .set_gdt = vmx_set_gdt,
2054         .cache_regs = vcpu_load_rsp_rip,
2055         .decache_regs = vcpu_put_rsp_rip,
2056         .get_rflags = vmx_get_rflags,
2057         .set_rflags = vmx_set_rflags,
2058
2059         .tlb_flush = vmx_flush_tlb,
2060         .inject_page_fault = vmx_inject_page_fault,
2061
2062         .inject_gp = vmx_inject_gp,
2063
2064         .run = vmx_vcpu_run,
2065         .skip_emulated_instruction = skip_emulated_instruction,
2066         .vcpu_setup = vmx_vcpu_setup,
2067 };
2068
2069 static int __init vmx_init(void)
2070 {
2071         return kvm_init_arch(&vmx_arch_ops, THIS_MODULE);
2072 }
2073
2074 static void __exit vmx_exit(void)
2075 {
2076         kvm_exit_arch();
2077 }
2078
2079 module_init(vmx_init)
2080 module_exit(vmx_exit)