drivers/kvm/svm.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * AMD SVM support
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  *
   8  * Authors:
   9  *   Yaniv Kamay  <yaniv@qumranet.com>
  10  *   Avi Kivity   <avi@qumranet.com>
  11  *
  12  * This work is licensed under the terms of the GNU GPL, version 2.  See
  13  * the COPYING file in the top-level directory.
  14  *
  15  */
  16 #include "x86.h"
  17 #include "kvm_svm.h"
  18 #include "x86_emulate.h"
  19 #include "irq.h"
  20
  21 #include <linux/module.h>
  22 #include <linux/kernel.h>
  23 #include <linux/vmalloc.h>
  24 #include <linux/highmem.h>
  25 #include <linux/sched.h>
  26
  27 #include <asm/desc.h>
  28
  29 MODULE_AUTHOR("Qumranet");
  30 MODULE_LICENSE("GPL");
  31
  32 #define IOPM_ALLOC_ORDER 2
  33 #define MSRPM_ALLOC_ORDER 1
  34
  35 #define DB_VECTOR 1
  36 #define UD_VECTOR 6
  37 #define GP_VECTOR 13
  38
  39 #define DR7_GD_MASK (1 << 13)
  40 #define DR6_BD_MASK (1 << 13)
  41
  42 #define SEG_TYPE_LDT 2
  43 #define SEG_TYPE_BUSY_TSS16 3
  44
  45 #define KVM_EFER_LMA (1 << 10)
  46 #define KVM_EFER_LME (1 << 8)
  47
  48 #define SVM_FEATURE_NPT  (1 << 0)
  49 #define SVM_FEATURE_LBRV (1 << 1)
  50 #define SVM_DEATURE_SVML (1 << 2)
  51
  52 static void kvm_reput_irq(struct vcpu_svm *svm);
  53
  54 static inline struct vcpu_svm *to_svm(struct kvm_vcpu *vcpu)
  55 {
  56         return container_of(vcpu, struct vcpu_svm, vcpu);
  57 }
  58
  59 unsigned long iopm_base;
  60 unsigned long msrpm_base;
  61
  62 struct kvm_ldttss_desc {
  63         u16 limit0;
  64         u16 base0;
  65         unsigned base1 : 8, type : 5, dpl : 2, p : 1;
  66         unsigned limit1 : 4, zero0 : 3, g : 1, base2 : 8;
  67         u32 base3;
  68         u32 zero1;
  69 } __attribute__((packed));
  70
  71 struct svm_cpu_data {
  72         int cpu;
  73
  74         u64 asid_generation;
  75         u32 max_asid;
  76         u32 next_asid;
  77         struct kvm_ldttss_desc *tss_desc;
  78
  79         struct page *save_area;
  80 };
  81
  82 static DEFINE_PER_CPU(struct svm_cpu_data *, svm_data);
  83 static uint32_t svm_features;
  84
  85 struct svm_init_data {
  86         int cpu;
  87         int r;
  88 };
  89
  90 static u32 msrpm_ranges[] = {0, 0xc0000000, 0xc0010000};
  91
  92 #define NUM_MSR_MAPS ARRAY_SIZE(msrpm_ranges)
  93 #define MSRS_RANGE_SIZE 2048
  94 #define MSRS_IN_RANGE (MSRS_RANGE_SIZE * 8 / 2)
  95
  96 #define MAX_INST_SIZE 15
  97
  98 static inline u32 svm_has(u32 feat)
  99 {
 100         return svm_features & feat;
 101 }
 102
 103 static inline u8 pop_irq(struct kvm_vcpu *vcpu)
 104 {
 105         int word_index = __ffs(vcpu->irq_summary);
 106         int bit_index = __ffs(vcpu->irq_pending[word_index]);
 107         int irq = word_index * BITS_PER_LONG + bit_index;
 108
 109         clear_bit(bit_index, &vcpu->irq_pending[word_index]);
 110         if (!vcpu->irq_pending[word_index])
 111                 clear_bit(word_index, &vcpu->irq_summary);
 112         return irq;
 113 }
 114
 115 static inline void push_irq(struct kvm_vcpu *vcpu, u8 irq)
 116 {
 117         set_bit(irq, vcpu->irq_pending);
 118         set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
 119 }
 120
 121 static inline void clgi(void)
 122 {
 123         asm volatile (SVM_CLGI);
 124 }
 125
 126 static inline void stgi(void)
 127 {
 128         asm volatile (SVM_STGI);
 129 }
 130
 131 static inline void invlpga(unsigned long addr, u32 asid)
 132 {
 133         asm volatile (SVM_INVLPGA :: "a"(addr), "c"(asid));
 134 }
 135
 136 static inline unsigned long kvm_read_cr2(void)
 137 {
 138         unsigned long cr2;
 139
 140         asm volatile ("mov %%cr2, %0" : "=r" (cr2));
 141         return cr2;
 142 }
 143
 144 static inline void kvm_write_cr2(unsigned long val)
 145 {
 146         asm volatile ("mov %0, %%cr2" :: "r" (val));
 147 }
 148
 149 static inline unsigned long read_dr6(void)
 150 {
 151         unsigned long dr6;
 152
 153         asm volatile ("mov %%dr6, %0" : "=r" (dr6));
 154         return dr6;
 155 }
 156
 157 static inline void write_dr6(unsigned long val)
 158 {
 159         asm volatile ("mov %0, %%dr6" :: "r" (val));
 160 }
 161
 162 static inline unsigned long read_dr7(void)
 163 {
 164         unsigned long dr7;
 165
 166         asm volatile ("mov %%dr7, %0" : "=r" (dr7));
 167         return dr7;
 168 }
 169
 170 static inline void write_dr7(unsigned long val)
 171 {
 172         asm volatile ("mov %0, %%dr7" :: "r" (val));
 173 }
 174
 175 static inline void force_new_asid(struct kvm_vcpu *vcpu)
 176 {
 177         to_svm(vcpu)->asid_generation--;
 178 }
 179
 180 static inline void flush_guest_tlb(struct kvm_vcpu *vcpu)
 181 {
 182         force_new_asid(vcpu);
 183 }
 184
 185 static void svm_set_efer(struct kvm_vcpu *vcpu, u64 efer)
 186 {
 187         if (!(efer & KVM_EFER_LMA))
 188                 efer &= ~KVM_EFER_LME;
 189
 190         to_svm(vcpu)->vmcb->save.efer = efer | MSR_EFER_SVME_MASK;
 191         vcpu->shadow_efer = efer;
 192 }
 193
 194 static void svm_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
 195 {
 196         struct vcpu_svm *svm = to_svm(vcpu);
 197
 198         svm->vmcb->control.event_inj =          SVM_EVTINJ_VALID |
 199                                                 SVM_EVTINJ_VALID_ERR |
 200                                                 SVM_EVTINJ_TYPE_EXEPT |
 201                                                 GP_VECTOR;
 202         svm->vmcb->control.event_inj_err = error_code;
 203 }
 204
 205 static void inject_ud(struct kvm_vcpu *vcpu)
 206 {
 207         to_svm(vcpu)->vmcb->control.event_inj = SVM_EVTINJ_VALID |
 208                                                 SVM_EVTINJ_TYPE_EXEPT |
 209                                                 UD_VECTOR;
 210 }
 211
 212 static int is_page_fault(uint32_t info)
 213 {
 214         info &= SVM_EVTINJ_VEC_MASK | SVM_EVTINJ_TYPE_MASK | SVM_EVTINJ_VALID;
 215         return info == (PF_VECTOR | SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_EXEPT);
 216 }
 217
 218 static int is_external_interrupt(u32 info)
 219 {
 220         info &= SVM_EVTINJ_TYPE_MASK | SVM_EVTINJ_VALID;
 221         return info == (SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_INTR);
 222 }
 223
 224 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
 225 {
 226         struct vcpu_svm *svm = to_svm(vcpu);
 227
 228         if (!svm->next_rip) {
 229                 printk(KERN_DEBUG "%s: NOP\n", __FUNCTION__);
 230                 return;
 231         }
 232         if (svm->next_rip - svm->vmcb->save.rip > MAX_INST_SIZE)
 233                 printk(KERN_ERR "%s: ip 0x%llx next 0x%llx\n",
 234                        __FUNCTION__,
 235                        svm->vmcb->save.rip,
 236                        svm->next_rip);
 237
 238         vcpu->rip = svm->vmcb->save.rip = svm->next_rip;
 239         svm->vmcb->control.int_state &= ~SVM_INTERRUPT_SHADOW_MASK;
 240
 241         vcpu->interrupt_window_open = 1;
 242 }
 243
 244 static int has_svm(void)
 245 {
 246         uint32_t eax, ebx, ecx, edx;
 247
 248         if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) {
 249                 printk(KERN_INFO "has_svm: not amd\n");
 250                 return 0;
 251         }
 252
 253         cpuid(0x80000000, &eax, &ebx, &ecx, &edx);
 254         if (eax < SVM_CPUID_FUNC) {
 255                 printk(KERN_INFO "has_svm: can't execute cpuid_8000000a\n");
 256                 return 0;
 257         }
 258
 259         cpuid(0x80000001, &eax, &ebx, &ecx, &edx);
 260         if (!(ecx & (1 << SVM_CPUID_FEATURE_SHIFT))) {
 261                 printk(KERN_DEBUG "has_svm: svm not available\n");
 262                 return 0;
 263         }
 264         return 1;
 265 }
 266
 267 static void svm_hardware_disable(void *garbage)
 268 {
 269         struct svm_cpu_data *svm_data
 270                 = per_cpu(svm_data, raw_smp_processor_id());
 271
 272         if (svm_data) {
 273                 uint64_t efer;
 274
 275                 wrmsrl(MSR_VM_HSAVE_PA, 0);
 276                 rdmsrl(MSR_EFER, efer);
 277                 wrmsrl(MSR_EFER, efer & ~MSR_EFER_SVME_MASK);
 278                 per_cpu(svm_data, raw_smp_processor_id()) = NULL;
 279                 __free_page(svm_data->save_area);
 280                 kfree(svm_data);
 281         }
 282 }
 283
 284 static void svm_hardware_enable(void *garbage)
 285 {
 286
 287         struct svm_cpu_data *svm_data;
 288         uint64_t efer;
 289 #ifdef CONFIG_X86_64
 290         struct desc_ptr gdt_descr;
 291 #else
 292         struct desc_ptr gdt_descr;
 293 #endif
 294         struct desc_struct *gdt;
 295         int me = raw_smp_processor_id();
 296
 297         if (!has_svm()) {
 298                 printk(KERN_ERR "svm_cpu_init: err EOPNOTSUPP on %d\n", me);
 299                 return;
 300         }
 301         svm_data = per_cpu(svm_data, me);
 302
 303         if (!svm_data) {
 304                 printk(KERN_ERR "svm_cpu_init: svm_data is NULL on %d\n",
 305                        me);
 306                 return;
 307         }
 308
 309         svm_data->asid_generation = 1;
 310         svm_data->max_asid = cpuid_ebx(SVM_CPUID_FUNC) - 1;
 311         svm_data->next_asid = svm_data->max_asid + 1;
 312         svm_features = cpuid_edx(SVM_CPUID_FUNC);
 313
 314         asm volatile ("sgdt %0" : "=m"(gdt_descr));
 315         gdt = (struct desc_struct *)gdt_descr.address;
 316         svm_data->tss_desc = (struct kvm_ldttss_desc *)(gdt + GDT_ENTRY_TSS);
 317
 318         rdmsrl(MSR_EFER, efer);
 319         wrmsrl(MSR_EFER, efer | MSR_EFER_SVME_MASK);
 320
 321         wrmsrl(MSR_VM_HSAVE_PA,
 322                page_to_pfn(svm_data->save_area) << PAGE_SHIFT);
 323 }
 324
 325 static int svm_cpu_init(int cpu)
 326 {
 327         struct svm_cpu_data *svm_data;
 328         int r;
 329
 330         svm_data = kzalloc(sizeof(struct svm_cpu_data), GFP_KERNEL);
 331         if (!svm_data)
 332                 return -ENOMEM;
 333         svm_data->cpu = cpu;
 334         svm_data->save_area = alloc_page(GFP_KERNEL);
 335         r = -ENOMEM;
 336         if (!svm_data->save_area)
 337                 goto err_1;
 338
 339         per_cpu(svm_data, cpu) = svm_data;
 340
 341         return 0;
 342
 343 err_1:
 344         kfree(svm_data);
 345         return r;
 346
 347 }
 348
 349 static void set_msr_interception(u32 *msrpm, unsigned msr,
 350                                  int read, int write)
 351 {
 352         int i;
 353
 354         for (i = 0; i < NUM_MSR_MAPS; i++) {
 355                 if (msr >= msrpm_ranges[i] &&
 356                     msr < msrpm_ranges[i] + MSRS_IN_RANGE) {
 357                         u32 msr_offset = (i * MSRS_IN_RANGE + msr -
 358                                           msrpm_ranges[i]) * 2;
 359
 360                         u32 *base = msrpm + (msr_offset / 32);
 361                         u32 msr_shift = msr_offset % 32;
 362                         u32 mask = ((write) ? 0 : 2) | ((read) ? 0 : 1);
 363                         *base = (*base & ~(0x3 << msr_shift)) |
 364                                 (mask << msr_shift);
 365                         return;
 366                 }
 367         }
 368         BUG();
 369 }
 370
 371 static __init int svm_hardware_setup(void)
 372 {
 373         int cpu;
 374         struct page *iopm_pages;
 375         struct page *msrpm_pages;
 376         void *iopm_va, *msrpm_va;
 377         int r;
 378
 379         iopm_pages = alloc_pages(GFP_KERNEL, IOPM_ALLOC_ORDER);
 380
 381         if (!iopm_pages)
 382                 return -ENOMEM;
 383
 384         iopm_va = page_address(iopm_pages);
 385         memset(iopm_va, 0xff, PAGE_SIZE * (1 << IOPM_ALLOC_ORDER));
 386         clear_bit(0x80, iopm_va); /* allow direct access to PC debug port */
 387         iopm_base = page_to_pfn(iopm_pages) << PAGE_SHIFT;
 388
 389
 390         msrpm_pages = alloc_pages(GFP_KERNEL, MSRPM_ALLOC_ORDER);
 391
 392         r = -ENOMEM;
 393         if (!msrpm_pages)
 394                 goto err_1;
 395
 396         msrpm_va = page_address(msrpm_pages);
 397         memset(msrpm_va, 0xff, PAGE_SIZE * (1 << MSRPM_ALLOC_ORDER));
 398         msrpm_base = page_to_pfn(msrpm_pages) << PAGE_SHIFT;
 399
 400 #ifdef CONFIG_X86_64
 401         set_msr_interception(msrpm_va, MSR_GS_BASE, 1, 1);
 402         set_msr_interception(msrpm_va, MSR_FS_BASE, 1, 1);
 403         set_msr_interception(msrpm_va, MSR_KERNEL_GS_BASE, 1, 1);
 404         set_msr_interception(msrpm_va, MSR_LSTAR, 1, 1);
 405         set_msr_interception(msrpm_va, MSR_CSTAR, 1, 1);
 406         set_msr_interception(msrpm_va, MSR_SYSCALL_MASK, 1, 1);
 407 #endif
 408         set_msr_interception(msrpm_va, MSR_K6_STAR, 1, 1);
 409         set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_CS, 1, 1);
 410         set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_ESP, 1, 1);
 411         set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_EIP, 1, 1);
 412
 413         for_each_online_cpu(cpu) {
 414                 r = svm_cpu_init(cpu);
 415                 if (r)
 416                         goto err_2;
 417         }
 418         return 0;
 419
 420 err_2:
 421         __free_pages(msrpm_pages, MSRPM_ALLOC_ORDER);
 422         msrpm_base = 0;
 423 err_1:
 424         __free_pages(iopm_pages, IOPM_ALLOC_ORDER);
 425         iopm_base = 0;
 426         return r;
 427 }
 428
 429 static __exit void svm_hardware_unsetup(void)
 430 {
 431         __free_pages(pfn_to_page(msrpm_base >> PAGE_SHIFT), MSRPM_ALLOC_ORDER);
 432         __free_pages(pfn_to_page(iopm_base >> PAGE_SHIFT), IOPM_ALLOC_ORDER);
 433         iopm_base = msrpm_base = 0;
 434 }
 435
 436 static void init_seg(struct vmcb_seg *seg)
 437 {
 438         seg->selector = 0;
 439         seg->attrib = SVM_SELECTOR_P_MASK | SVM_SELECTOR_S_MASK |
 440                 SVM_SELECTOR_WRITE_MASK; /* Read/Write Data Segment */
 441         seg->limit = 0xffff;
 442         seg->base = 0;
 443 }
 444
 445 static void init_sys_seg(struct vmcb_seg *seg, uint32_t type)
 446 {
 447         seg->selector = 0;
 448         seg->attrib = SVM_SELECTOR_P_MASK | type;
 449         seg->limit = 0xffff;
 450         seg->base = 0;
 451 }
 452
 453 static void init_vmcb(struct vmcb *vmcb)
 454 {
 455         struct vmcb_control_area *control = &vmcb->control;
 456         struct vmcb_save_area *save = &vmcb->save;
 457
 458         control->intercept_cr_read =    INTERCEPT_CR0_MASK |
 459                                         INTERCEPT_CR3_MASK |
 460                                         INTERCEPT_CR4_MASK;
 461
 462         control->intercept_cr_write =   INTERCEPT_CR0_MASK |
 463                                         INTERCEPT_CR3_MASK |
 464                                         INTERCEPT_CR4_MASK;
 465
 466         control->intercept_dr_read =    INTERCEPT_DR0_MASK |
 467                                         INTERCEPT_DR1_MASK |
 468                                         INTERCEPT_DR2_MASK |
 469                                         INTERCEPT_DR3_MASK;
 470
 471         control->intercept_dr_write =   INTERCEPT_DR0_MASK |
 472                                         INTERCEPT_DR1_MASK |
 473                                         INTERCEPT_DR2_MASK |
 474                                         INTERCEPT_DR3_MASK |
 475                                         INTERCEPT_DR5_MASK |
 476                                         INTERCEPT_DR7_MASK;
 477
 478         control->intercept_exceptions = (1 << PF_VECTOR) |
 479                                         (1 << UD_VECTOR);
 480
 481
 482         control->intercept =    (1ULL << INTERCEPT_INTR) |
 483                                 (1ULL << INTERCEPT_NMI) |
 484                                 (1ULL << INTERCEPT_SMI) |
 485                 /*
 486                  * selective cr0 intercept bug?
 487                  *      0:   0f 22 d8                mov    %eax,%cr3
 488                  *      3:   0f 20 c0                mov    %cr0,%eax
 489                  *      6:   0d 00 00 00 80          or     $0x80000000,%eax
 490                  *      b:   0f 22 c0                mov    %eax,%cr0
 491                  * set cr3 ->interception
 492                  * get cr0 ->interception
 493                  * set cr0 -> no interception
 494                  */
 495                 /*              (1ULL << INTERCEPT_SELECTIVE_CR0) | */
 496                                 (1ULL << INTERCEPT_CPUID) |
 497                                 (1ULL << INTERCEPT_INVD) |
 498                                 (1ULL << INTERCEPT_HLT) |
 499                                 (1ULL << INTERCEPT_INVLPGA) |
 500                                 (1ULL << INTERCEPT_IOIO_PROT) |
 501                                 (1ULL << INTERCEPT_MSR_PROT) |
 502                                 (1ULL << INTERCEPT_TASK_SWITCH) |
 503                                 (1ULL << INTERCEPT_SHUTDOWN) |
 504                                 (1ULL << INTERCEPT_VMRUN) |
 505                                 (1ULL << INTERCEPT_VMMCALL) |
 506                                 (1ULL << INTERCEPT_VMLOAD) |
 507                                 (1ULL << INTERCEPT_VMSAVE) |
 508                                 (1ULL << INTERCEPT_STGI) |
 509                                 (1ULL << INTERCEPT_CLGI) |
 510                                 (1ULL << INTERCEPT_SKINIT) |
 511                                 (1ULL << INTERCEPT_WBINVD) |
 512                                 (1ULL << INTERCEPT_MONITOR) |
 513                                 (1ULL << INTERCEPT_MWAIT);
 514
 515         control->iopm_base_pa = iopm_base;
 516         control->msrpm_base_pa = msrpm_base;
 517         control->tsc_offset = 0;
 518         control->int_ctl = V_INTR_MASKING_MASK;
 519
 520         init_seg(&save->es);
 521         init_seg(&save->ss);
 522         init_seg(&save->ds);
 523         init_seg(&save->fs);
 524         init_seg(&save->gs);
 525
 526         save->cs.selector = 0xf000;
 527         /* Executable/Readable Code Segment */
 528         save->cs.attrib = SVM_SELECTOR_READ_MASK | SVM_SELECTOR_P_MASK |
 529                 SVM_SELECTOR_S_MASK | SVM_SELECTOR_CODE_MASK;
 530         save->cs.limit = 0xffff;
 531         /*
 532          * cs.base should really be 0xffff0000, but vmx can't handle that, so
 533          * be consistent with it.
 534          *
 535          * Replace when we have real mode working for vmx.
 536          */
 537         save->cs.base = 0xf0000;
 538
 539         save->gdtr.limit = 0xffff;
 540         save->idtr.limit = 0xffff;
 541
 542         init_sys_seg(&save->ldtr, SEG_TYPE_LDT);
 543         init_sys_seg(&save->tr, SEG_TYPE_BUSY_TSS16);
 544
 545         save->efer = MSR_EFER_SVME_MASK;
 546         save->dr6 = 0xffff0ff0;
 547         save->dr7 = 0x400;
 548         save->rflags = 2;
 549         save->rip = 0x0000fff0;
 550
 551         /*
 552          * cr0 val on cpu init should be 0x60000010, we enable cpu
 553          * cache by default. the orderly way is to enable cache in bios.
 554          */
 555         save->cr0 = 0x00000010 | X86_CR0_PG | X86_CR0_WP;
 556         save->cr4 = X86_CR4_PAE;
 557         /* rdx = ?? */
 558 }
 559
 560 static int svm_vcpu_reset(struct kvm_vcpu *vcpu)
 561 {
 562         struct vcpu_svm *svm = to_svm(vcpu);
 563
 564         init_vmcb(svm->vmcb);
 565
 566         if (vcpu->vcpu_id != 0) {
 567                 svm->vmcb->save.rip = 0;
 568                 svm->vmcb->save.cs.base = svm->vcpu.sipi_vector << 12;
 569                 svm->vmcb->save.cs.selector = svm->vcpu.sipi_vector << 8;
 570         }
 571
 572         return 0;
 573 }
 574
 575 static struct kvm_vcpu *svm_create_vcpu(struct kvm *kvm, unsigned int id)
 576 {
 577         struct vcpu_svm *svm;
 578         struct page *page;
 579         int err;
 580
 581         svm = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
 582         if (!svm) {
 583                 err = -ENOMEM;
 584                 goto out;
 585         }
 586
 587         err = kvm_vcpu_init(&svm->vcpu, kvm, id);
 588         if (err)
 589                 goto free_svm;
 590
 591         page = alloc_page(GFP_KERNEL);
 592         if (!page) {
 593                 err = -ENOMEM;
 594                 goto uninit;
 595         }
 596
 597         svm->vmcb = page_address(page);
 598         clear_page(svm->vmcb);
 599         svm->vmcb_pa = page_to_pfn(page) << PAGE_SHIFT;
 600         svm->asid_generation = 0;
 601         memset(svm->db_regs, 0, sizeof(svm->db_regs));
 602         init_vmcb(svm->vmcb);
 603
 604         fx_init(&svm->vcpu);
 605         svm->vcpu.fpu_active = 1;
 606         svm->vcpu.apic_base = 0xfee00000 | MSR_IA32_APICBASE_ENABLE;
 607         if (svm->vcpu.vcpu_id == 0)
 608                 svm->vcpu.apic_base |= MSR_IA32_APICBASE_BSP;
 609
 610         return &svm->vcpu;
 611
 612 uninit:
 613         kvm_vcpu_uninit(&svm->vcpu);
 614 free_svm:
 615         kmem_cache_free(kvm_vcpu_cache, svm);
 616 out:
 617         return ERR_PTR(err);
 618 }
 619
 620 static void svm_free_vcpu(struct kvm_vcpu *vcpu)
 621 {
 622         struct vcpu_svm *svm = to_svm(vcpu);
 623
 624         __free_page(pfn_to_page(svm->vmcb_pa >> PAGE_SHIFT));
 625         kvm_vcpu_uninit(vcpu);
 626         kmem_cache_free(kvm_vcpu_cache, svm);
 627 }
 628
 629 static void svm_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
 630 {
 631         struct vcpu_svm *svm = to_svm(vcpu);
 632         int i;
 633
 634         if (unlikely(cpu != vcpu->cpu)) {
 635                 u64 tsc_this, delta;
 636
 637                 /*
 638                  * Make sure that the guest sees a monotonically
 639                  * increasing TSC.
 640                  */
 641                 rdtscll(tsc_this);
 642                 delta = vcpu->host_tsc - tsc_this;
 643                 svm->vmcb->control.tsc_offset += delta;
 644                 vcpu->cpu = cpu;
 645                 kvm_migrate_apic_timer(vcpu);
 646         }
 647
 648         for (i = 0; i < NR_HOST_SAVE_USER_MSRS; i++)
 649                 rdmsrl(host_save_user_msrs[i], svm->host_user_msrs[i]);
 650 }
 651
 652 static void svm_vcpu_put(struct kvm_vcpu *vcpu)
 653 {
 654         struct vcpu_svm *svm = to_svm(vcpu);
 655         int i;
 656
 657         ++vcpu->stat.host_state_reload;
 658         for (i = 0; i < NR_HOST_SAVE_USER_MSRS; i++)
 659                 wrmsrl(host_save_user_msrs[i], svm->host_user_msrs[i]);
 660
 661         rdtscll(vcpu->host_tsc);
 662 }
 663
 664 static void svm_vcpu_decache(struct kvm_vcpu *vcpu)
 665 {
 666 }
 667
 668 static void svm_cache_regs(struct kvm_vcpu *vcpu)
 669 {
 670         struct vcpu_svm *svm = to_svm(vcpu);
 671
 672         vcpu->regs[VCPU_REGS_RAX] = svm->vmcb->save.rax;
 673         vcpu->regs[VCPU_REGS_RSP] = svm->vmcb->save.rsp;
 674         vcpu->rip = svm->vmcb->save.rip;
 675 }
 676
 677 static void svm_decache_regs(struct kvm_vcpu *vcpu)
 678 {
 679         struct vcpu_svm *svm = to_svm(vcpu);
 680         svm->vmcb->save.rax = vcpu->regs[VCPU_REGS_RAX];
 681         svm->vmcb->save.rsp = vcpu->regs[VCPU_REGS_RSP];
 682         svm->vmcb->save.rip = vcpu->rip;
 683 }
 684
 685 static unsigned long svm_get_rflags(struct kvm_vcpu *vcpu)
 686 {
 687         return to_svm(vcpu)->vmcb->save.rflags;
 688 }
 689
 690 static void svm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
 691 {
 692         to_svm(vcpu)->vmcb->save.rflags = rflags;
 693 }
 694
 695 static struct vmcb_seg *svm_seg(struct kvm_vcpu *vcpu, int seg)
 696 {
 697         struct vmcb_save_area *save = &to_svm(vcpu)->vmcb->save;
 698
 699         switch (seg) {
 700         case VCPU_SREG_CS: return &save->cs;
 701         case VCPU_SREG_DS: return &save->ds;
 702         case VCPU_SREG_ES: return &save->es;
 703         case VCPU_SREG_FS: return &save->fs;
 704         case VCPU_SREG_GS: return &save->gs;
 705         case VCPU_SREG_SS: return &save->ss;
 706         case VCPU_SREG_TR: return &save->tr;
 707         case VCPU_SREG_LDTR: return &save->ldtr;
 708         }
 709         BUG();
 710         return NULL;
 711 }
 712
 713 static u64 svm_get_segment_base(struct kvm_vcpu *vcpu, int seg)
 714 {
 715         struct vmcb_seg *s = svm_seg(vcpu, seg);
 716
 717         return s->base;
 718 }
 719
 720 static void svm_get_segment(struct kvm_vcpu *vcpu,
 721                             struct kvm_segment *var, int seg)
 722 {
 723         struct vmcb_seg *s = svm_seg(vcpu, seg);
 724
 725         var->base = s->base;
 726         var->limit = s->limit;
 727         var->selector = s->selector;
 728         var->type = s->attrib & SVM_SELECTOR_TYPE_MASK;
 729         var->s = (s->attrib >> SVM_SELECTOR_S_SHIFT) & 1;
 730         var->dpl = (s->attrib >> SVM_SELECTOR_DPL_SHIFT) & 3;
 731         var->present = (s->attrib >> SVM_SELECTOR_P_SHIFT) & 1;
 732         var->avl = (s->attrib >> SVM_SELECTOR_AVL_SHIFT) & 1;
 733         var->l = (s->attrib >> SVM_SELECTOR_L_SHIFT) & 1;
 734         var->db = (s->attrib >> SVM_SELECTOR_DB_SHIFT) & 1;
 735         var->g = (s->attrib >> SVM_SELECTOR_G_SHIFT) & 1;
 736         var->unusable = !var->present;
 737 }
 738
 739 static void svm_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 740 {
 741         struct vcpu_svm *svm = to_svm(vcpu);
 742
 743         dt->limit = svm->vmcb->save.idtr.limit;
 744         dt->base = svm->vmcb->save.idtr.base;
 745 }
 746
 747 static void svm_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 748 {
 749         struct vcpu_svm *svm = to_svm(vcpu);
 750
 751         svm->vmcb->save.idtr.limit = dt->limit;
 752         svm->vmcb->save.idtr.base = dt->base ;
 753 }
 754
 755 static void svm_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 756 {
 757         struct vcpu_svm *svm = to_svm(vcpu);
 758
 759         dt->limit = svm->vmcb->save.gdtr.limit;
 760         dt->base = svm->vmcb->save.gdtr.base;
 761 }
 762
 763 static void svm_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 764 {
 765         struct vcpu_svm *svm = to_svm(vcpu);
 766
 767         svm->vmcb->save.gdtr.limit = dt->limit;
 768         svm->vmcb->save.gdtr.base = dt->base ;
 769 }
 770
 771 static void svm_decache_cr4_guest_bits(struct kvm_vcpu *vcpu)
 772 {
 773 }
 774
 775 static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 776 {
 777         struct vcpu_svm *svm = to_svm(vcpu);
 778
 779 #ifdef CONFIG_X86_64
 780         if (vcpu->shadow_efer & KVM_EFER_LME) {
 781                 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 782                         vcpu->shadow_efer |= KVM_EFER_LMA;
 783                         svm->vmcb->save.efer |= KVM_EFER_LMA | KVM_EFER_LME;
 784                 }
 785
 786                 if (is_paging(vcpu) && !(cr0 & X86_CR0_PG)) {
 787                         vcpu->shadow_efer &= ~KVM_EFER_LMA;
 788                         svm->vmcb->save.efer &= ~(KVM_EFER_LMA | KVM_EFER_LME);
 789                 }
 790         }
 791 #endif
 792         if ((vcpu->cr0 & X86_CR0_TS) && !(cr0 & X86_CR0_TS)) {
 793                 svm->vmcb->control.intercept_exceptions &= ~(1 << NM_VECTOR);
 794                 vcpu->fpu_active = 1;
 795         }
 796
 797         vcpu->cr0 = cr0;
 798         cr0 |= X86_CR0_PG | X86_CR0_WP;
 799         cr0 &= ~(X86_CR0_CD | X86_CR0_NW);
 800         svm->vmcb->save.cr0 = cr0;
 801 }
 802
 803 static void svm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 804 {
 805        vcpu->cr4 = cr4;
 806        to_svm(vcpu)->vmcb->save.cr4 = cr4 | X86_CR4_PAE;
 807 }
 808
 809 static void svm_set_segment(struct kvm_vcpu *vcpu,
 810                             struct kvm_segment *var, int seg)
 811 {
 812         struct vcpu_svm *svm = to_svm(vcpu);
 813         struct vmcb_seg *s = svm_seg(vcpu, seg);
 814
 815         s->base = var->base;
 816         s->limit = var->limit;
 817         s->selector = var->selector;
 818         if (var->unusable)
 819                 s->attrib = 0;
 820         else {
 821                 s->attrib = (var->type & SVM_SELECTOR_TYPE_MASK);
 822                 s->attrib |= (var->s & 1) << SVM_SELECTOR_S_SHIFT;
 823                 s->attrib |= (var->dpl & 3) << SVM_SELECTOR_DPL_SHIFT;
 824                 s->attrib |= (var->present & 1) << SVM_SELECTOR_P_SHIFT;
 825                 s->attrib |= (var->avl & 1) << SVM_SELECTOR_AVL_SHIFT;
 826                 s->attrib |= (var->l & 1) << SVM_SELECTOR_L_SHIFT;
 827                 s->attrib |= (var->db & 1) << SVM_SELECTOR_DB_SHIFT;
 828                 s->attrib |= (var->g & 1) << SVM_SELECTOR_G_SHIFT;
 829         }
 830         if (seg == VCPU_SREG_CS)
 831                 svm->vmcb->save.cpl
 832                         = (svm->vmcb->save.cs.attrib
 833                            >> SVM_SELECTOR_DPL_SHIFT) & 3;
 834
 835 }
 836
 837 /* FIXME:
 838
 839         svm(vcpu)->vmcb->control.int_ctl &= ~V_TPR_MASK;
 840         svm(vcpu)->vmcb->control.int_ctl |= (sregs->cr8 & V_TPR_MASK);
 841
 842 */
 843
 844 static int svm_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
 845 {
 846         return -EOPNOTSUPP;
 847 }
 848
 849 static int svm_get_irq(struct kvm_vcpu *vcpu)
 850 {
 851         struct vcpu_svm *svm = to_svm(vcpu);
 852         u32 exit_int_info = svm->vmcb->control.exit_int_info;
 853
 854         if (is_external_interrupt(exit_int_info))
 855                 return exit_int_info & SVM_EVTINJ_VEC_MASK;
 856         return -1;
 857 }
 858
 859 static void load_host_msrs(struct kvm_vcpu *vcpu)
 860 {
 861 #ifdef CONFIG_X86_64
 862         wrmsrl(MSR_GS_BASE, to_svm(vcpu)->host_gs_base);
 863 #endif
 864 }
 865
 866 static void save_host_msrs(struct kvm_vcpu *vcpu)
 867 {
 868 #ifdef CONFIG_X86_64
 869         rdmsrl(MSR_GS_BASE, to_svm(vcpu)->host_gs_base);
 870 #endif
 871 }
 872
 873 static void new_asid(struct vcpu_svm *svm, struct svm_cpu_data *svm_data)
 874 {
 875         if (svm_data->next_asid > svm_data->max_asid) {
 876                 ++svm_data->asid_generation;
 877                 svm_data->next_asid = 1;
 878                 svm->vmcb->control.tlb_ctl = TLB_CONTROL_FLUSH_ALL_ASID;
 879         }
 880
 881         svm->vcpu.cpu = svm_data->cpu;
 882         svm->asid_generation = svm_data->asid_generation;
 883         svm->vmcb->control.asid = svm_data->next_asid++;
 884 }
 885
 886 static unsigned long svm_get_dr(struct kvm_vcpu *vcpu, int dr)
 887 {
 888         return to_svm(vcpu)->db_regs[dr];
 889 }
 890
 891 static void svm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long value,
 892                        int *exception)
 893 {
 894         struct vcpu_svm *svm = to_svm(vcpu);
 895
 896         *exception = 0;
 897
 898         if (svm->vmcb->save.dr7 & DR7_GD_MASK) {
 899                 svm->vmcb->save.dr7 &= ~DR7_GD_MASK;
 900                 svm->vmcb->save.dr6 |= DR6_BD_MASK;
 901                 *exception = DB_VECTOR;
 902                 return;
 903         }
 904
 905         switch (dr) {
 906         case 0 ... 3:
 907                 svm->db_regs[dr] = value;
 908                 return;
 909         case 4 ... 5:
 910                 if (vcpu->cr4 & X86_CR4_DE) {
 911                         *exception = UD_VECTOR;
 912                         return;
 913                 }
 914         case 7: {
 915                 if (value & ~((1ULL << 32) - 1)) {
 916                         *exception = GP_VECTOR;
 917                         return;
 918                 }
 919                 svm->vmcb->save.dr7 = value;
 920                 return;
 921         }
 922         default:
 923                 printk(KERN_DEBUG "%s: unexpected dr %u\n",
 924                        __FUNCTION__, dr);
 925                 *exception = UD_VECTOR;
 926                 return;
 927         }
 928 }
 929
 930 static int pf_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
 931 {
 932         u32 exit_int_info = svm->vmcb->control.exit_int_info;
 933         struct kvm *kvm = svm->vcpu.kvm;
 934         u64 fault_address;
 935         u32 error_code;
 936
 937         if (!irqchip_in_kernel(kvm) &&
 938                 is_external_interrupt(exit_int_info))
 939                 push_irq(&svm->vcpu, exit_int_info & SVM_EVTINJ_VEC_MASK);
 940
 941         fault_address  = svm->vmcb->control.exit_info_2;
 942         error_code = svm->vmcb->control.exit_info_1;
 943         return kvm_mmu_page_fault(&svm->vcpu, fault_address, error_code);
 944 }
 945
 946 static int ud_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
 947 {
 948         int er;
 949
 950         er = emulate_instruction(&svm->vcpu, kvm_run, 0, 0, 0);
 951         if (er != EMULATE_DONE)
 952                 inject_ud(&svm->vcpu);
 953
 954         return 1;
 955 }
 956
 957 static int nm_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
 958 {
 959         svm->vmcb->control.intercept_exceptions &= ~(1 << NM_VECTOR);
 960         if (!(svm->vcpu.cr0 & X86_CR0_TS))
 961                 svm->vmcb->save.cr0 &= ~X86_CR0_TS;
 962         svm->vcpu.fpu_active = 1;
 963
 964         return 1;
 965 }
 966
 967 static int shutdown_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
 968 {
 969         /*
 970          * VMCB is undefined after a SHUTDOWN intercept
 971          * so reinitialize it.
 972          */
 973         clear_page(svm->vmcb);
 974         init_vmcb(svm->vmcb);
 975
 976         kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
 977         return 0;
 978 }
 979
 980 static int io_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
 981 {
 982         u32 io_info = svm->vmcb->control.exit_info_1; /* address size bug? */
 983         int size, down, in, string, rep;
 984         unsigned port;
 985
 986         ++svm->vcpu.stat.io_exits;
 987
 988         svm->next_rip = svm->vmcb->control.exit_info_2;
 989
 990         string = (io_info & SVM_IOIO_STR_MASK) != 0;
 991
 992         if (string) {
 993                 if (emulate_instruction(&svm->vcpu,
 994                                         kvm_run, 0, 0, 0) == EMULATE_DO_MMIO)
 995                         return 0;
 996                 return 1;
 997         }
 998
 999         in = (io_info & SVM_IOIO_TYPE_MASK) != 0;
1000         port = io_info >> 16;
1001         size = (io_info & SVM_IOIO_SIZE_MASK) >> SVM_IOIO_SIZE_SHIFT;
1002         rep = (io_info & SVM_IOIO_REP_MASK) != 0;
1003         down = (svm->vmcb->save.rflags & X86_EFLAGS_DF) != 0;
1004
1005         return kvm_emulate_pio(&svm->vcpu, kvm_run, in, size, port);
1006 }
1007
1008 static int nop_on_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
1009 {
1010         return 1;
1011 }
1012
1013 static int halt_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
1014 {
1015         svm->next_rip = svm->vmcb->save.rip + 1;
1016         skip_emulated_instruction(&svm->vcpu);
1017         return kvm_emulate_halt(&svm->vcpu);
1018 }
1019
1020 static int vmmcall_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
1021 {
1022         svm->next_rip = svm->vmcb->save.rip + 3;
1023         skip_emulated_instruction(&svm->vcpu);
1024         kvm_emulate_hypercall(&svm->vcpu);
1025         return 1;
1026 }
1027
1028 static int invalid_op_interception(struct vcpu_svm *svm,
1029                                    struct kvm_run *kvm_run)
1030 {
1031         inject_ud(&svm->vcpu);
1032         return 1;
1033 }
1034
1035 static int task_switch_interception(struct vcpu_svm *svm,
1036                                     struct kvm_run *kvm_run)
1037 {
1038         pr_unimpl(&svm->vcpu, "%s: task switch is unsupported\n", __FUNCTION__);
1039         kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1040         return 0;
1041 }
1042
1043 static int cpuid_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
1044 {
1045         svm->next_rip = svm->vmcb->save.rip + 2;
1046         kvm_emulate_cpuid(&svm->vcpu);
1047         return 1;
1048 }
1049
1050 static int emulate_on_interception(struct vcpu_svm *svm,
1051                                    struct kvm_run *kvm_run)
1052 {
1053         if (emulate_instruction(&svm->vcpu, NULL, 0, 0, 0) != EMULATE_DONE)
1054                 pr_unimpl(&svm->vcpu, "%s: failed\n", __FUNCTION__);
1055         return 1;
1056 }
1057
1058 static int svm_get_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 *data)
1059 {
1060         struct vcpu_svm *svm = to_svm(vcpu);
1061
1062         switch (ecx) {
1063         case MSR_IA32_TIME_STAMP_COUNTER: {
1064                 u64 tsc;
1065
1066                 rdtscll(tsc);
1067                 *data = svm->vmcb->control.tsc_offset + tsc;
1068                 break;
1069         }
1070         case MSR_K6_STAR:
1071                 *data = svm->vmcb->save.star;
1072                 break;
1073 #ifdef CONFIG_X86_64
1074         case MSR_LSTAR:
1075                 *data = svm->vmcb->save.lstar;
1076                 break;
1077         case MSR_CSTAR:
1078                 *data = svm->vmcb->save.cstar;
1079                 break;
1080         case MSR_KERNEL_GS_BASE:
1081                 *data = svm->vmcb->save.kernel_gs_base;
1082                 break;
1083         case MSR_SYSCALL_MASK:
1084                 *data = svm->vmcb->save.sfmask;
1085                 break;
1086 #endif
1087         case MSR_IA32_SYSENTER_CS:
1088                 *data = svm->vmcb->save.sysenter_cs;
1089                 break;
1090         case MSR_IA32_SYSENTER_EIP:
1091                 *data = svm->vmcb->save.sysenter_eip;
1092                 break;
1093         case MSR_IA32_SYSENTER_ESP:
1094                 *data = svm->vmcb->save.sysenter_esp;
1095                 break;
1096         default:
1097                 return kvm_get_msr_common(vcpu, ecx, data);
1098         }
1099         return 0;
1100 }
1101
1102 static int rdmsr_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
1103 {
1104         u32 ecx = svm->vcpu.regs[VCPU_REGS_RCX];
1105         u64 data;
1106
1107         if (svm_get_msr(&svm->vcpu, ecx, &data))
1108                 svm_inject_gp(&svm->vcpu, 0);
1109         else {
1110                 svm->vmcb->save.rax = data & 0xffffffff;
1111                 svm->vcpu.regs[VCPU_REGS_RDX] = data >> 32;
1112                 svm->next_rip = svm->vmcb->save.rip + 2;
1113                 skip_emulated_instruction(&svm->vcpu);
1114         }
1115         return 1;
1116 }
1117
1118 static int svm_set_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 data)
1119 {
1120         struct vcpu_svm *svm = to_svm(vcpu);
1121
1122         switch (ecx) {
1123         case MSR_IA32_TIME_STAMP_COUNTER: {
1124                 u64 tsc;
1125
1126                 rdtscll(tsc);
1127                 svm->vmcb->control.tsc_offset = data - tsc;
1128                 break;
1129         }
1130         case MSR_K6_STAR:
1131                 svm->vmcb->save.star = data;
1132                 break;
1133 #ifdef CONFIG_X86_64
1134         case MSR_LSTAR:
1135                 svm->vmcb->save.lstar = data;
1136                 break;
1137         case MSR_CSTAR:
1138                 svm->vmcb->save.cstar = data;
1139                 break;
1140         case MSR_KERNEL_GS_BASE:
1141                 svm->vmcb->save.kernel_gs_base = data;
1142                 break;
1143         case MSR_SYSCALL_MASK:
1144                 svm->vmcb->save.sfmask = data;
1145                 break;
1146 #endif
1147         case MSR_IA32_SYSENTER_CS:
1148                 svm->vmcb->save.sysenter_cs = data;
1149                 break;
1150         case MSR_IA32_SYSENTER_EIP:
1151                 svm->vmcb->save.sysenter_eip = data;
1152                 break;
1153         case MSR_IA32_SYSENTER_ESP:
1154                 svm->vmcb->save.sysenter_esp = data;
1155                 break;
1156         default:
1157                 return kvm_set_msr_common(vcpu, ecx, data);
1158         }
1159         return 0;
1160 }
1161
1162 static int wrmsr_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
1163 {
1164         u32 ecx = svm->vcpu.regs[VCPU_REGS_RCX];
1165         u64 data = (svm->vmcb->save.rax & -1u)
1166                 | ((u64)(svm->vcpu.regs[VCPU_REGS_RDX] & -1u) << 32);
1167         svm->next_rip = svm->vmcb->save.rip + 2;
1168         if (svm_set_msr(&svm->vcpu, ecx, data))
1169                 svm_inject_gp(&svm->vcpu, 0);
1170         else
1171                 skip_emulated_instruction(&svm->vcpu);
1172         return 1;
1173 }
1174
1175 static int msr_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
1176 {
1177         if (svm->vmcb->control.exit_info_1)
1178                 return wrmsr_interception(svm, kvm_run);
1179         else
1180                 return rdmsr_interception(svm, kvm_run);
1181 }
1182
1183 static int interrupt_window_interception(struct vcpu_svm *svm,
1184                                    struct kvm_run *kvm_run)
1185 {
1186         svm->vmcb->control.intercept &= ~(1ULL << INTERCEPT_VINTR);
1187         svm->vmcb->control.int_ctl &= ~V_IRQ_MASK;
1188         /*
1189          * If the user space waits to inject interrupts, exit as soon as
1190          * possible
1191          */
1192         if (kvm_run->request_interrupt_window &&
1193             !svm->vcpu.irq_summary) {
1194                 ++svm->vcpu.stat.irq_window_exits;
1195                 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
1196                 return 0;
1197         }
1198
1199         return 1;
1200 }
1201
1202 static int (*svm_exit_handlers[])(struct vcpu_svm *svm,
1203                                       struct kvm_run *kvm_run) = {
1204         [SVM_EXIT_READ_CR0]                     = emulate_on_interception,
1205         [SVM_EXIT_READ_CR3]                     = emulate_on_interception,
1206         [SVM_EXIT_READ_CR4]                     = emulate_on_interception,
1207         /* for now: */
1208         [SVM_EXIT_WRITE_CR0]                    = emulate_on_interception,
1209         [SVM_EXIT_WRITE_CR3]                    = emulate_on_interception,
1210         [SVM_EXIT_WRITE_CR4]                    = emulate_on_interception,
1211         [SVM_EXIT_READ_DR0]                     = emulate_on_interception,
1212         [SVM_EXIT_READ_DR1]                     = emulate_on_interception,
1213         [SVM_EXIT_READ_DR2]                     = emulate_on_interception,
1214         [SVM_EXIT_READ_DR3]                     = emulate_on_interception,
1215         [SVM_EXIT_WRITE_DR0]                    = emulate_on_interception,
1216         [SVM_EXIT_WRITE_DR1]                    = emulate_on_interception,
1217         [SVM_EXIT_WRITE_DR2]                    = emulate_on_interception,
1218         [SVM_EXIT_WRITE_DR3]                    = emulate_on_interception,
1219         [SVM_EXIT_WRITE_DR5]                    = emulate_on_interception,
1220         [SVM_EXIT_WRITE_DR7]                    = emulate_on_interception,
1221         [SVM_EXIT_EXCP_BASE + UD_VECTOR]        = ud_interception,
1222         [SVM_EXIT_EXCP_BASE + PF_VECTOR]        = pf_interception,
1223         [SVM_EXIT_EXCP_BASE + NM_VECTOR]        = nm_interception,
1224         [SVM_EXIT_INTR]                         = nop_on_interception,
1225         [SVM_EXIT_NMI]                          = nop_on_interception,
1226         [SVM_EXIT_SMI]                          = nop_on_interception,
1227         [SVM_EXIT_INIT]                         = nop_on_interception,
1228         [SVM_EXIT_VINTR]                        = interrupt_window_interception,
1229         /* [SVM_EXIT_CR0_SEL_WRITE]             = emulate_on_interception, */
1230         [SVM_EXIT_CPUID]                        = cpuid_interception,
1231         [SVM_EXIT_INVD]                         = emulate_on_interception,
1232         [SVM_EXIT_HLT]                          = halt_interception,
1233         [SVM_EXIT_INVLPG]                       = emulate_on_interception,
1234         [SVM_EXIT_INVLPGA]                      = invalid_op_interception,
1235         [SVM_EXIT_IOIO]                         = io_interception,
1236         [SVM_EXIT_MSR]                          = msr_interception,
1237         [SVM_EXIT_TASK_SWITCH]                  = task_switch_interception,
1238         [SVM_EXIT_SHUTDOWN]                     = shutdown_interception,
1239         [SVM_EXIT_VMRUN]                        = invalid_op_interception,
1240         [SVM_EXIT_VMMCALL]                      = vmmcall_interception,
1241         [SVM_EXIT_VMLOAD]                       = invalid_op_interception,
1242         [SVM_EXIT_VMSAVE]                       = invalid_op_interception,
1243         [SVM_EXIT_STGI]                         = invalid_op_interception,
1244         [SVM_EXIT_CLGI]                         = invalid_op_interception,
1245         [SVM_EXIT_SKINIT]                       = invalid_op_interception,
1246         [SVM_EXIT_WBINVD]                       = emulate_on_interception,
1247         [SVM_EXIT_MONITOR]                      = invalid_op_interception,
1248         [SVM_EXIT_MWAIT]                        = invalid_op_interception,
1249 };
1250
1251
1252 static int handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
1253 {
1254         struct vcpu_svm *svm = to_svm(vcpu);
1255         u32 exit_code = svm->vmcb->control.exit_code;
1256
1257         kvm_reput_irq(svm);
1258
1259         if (svm->vmcb->control.exit_code == SVM_EXIT_ERR) {
1260                 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
1261                 kvm_run->fail_entry.hardware_entry_failure_reason
1262                         = svm->vmcb->control.exit_code;
1263                 return 0;
1264         }
1265
1266         if (is_external_interrupt(svm->vmcb->control.exit_int_info) &&
1267             exit_code != SVM_EXIT_EXCP_BASE + PF_VECTOR)
1268                 printk(KERN_ERR "%s: unexpected exit_ini_info 0x%x "
1269                        "exit_code 0x%x\n",
1270                        __FUNCTION__, svm->vmcb->control.exit_int_info,
1271                        exit_code);
1272
1273         if (exit_code >= ARRAY_SIZE(svm_exit_handlers)
1274             || !svm_exit_handlers[exit_code]) {
1275                 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1276                 kvm_run->hw.hardware_exit_reason = exit_code;
1277                 return 0;
1278         }
1279
1280         return svm_exit_handlers[exit_code](svm, kvm_run);
1281 }
1282
1283 static void reload_tss(struct kvm_vcpu *vcpu)
1284 {
1285         int cpu = raw_smp_processor_id();
1286
1287         struct svm_cpu_data *svm_data = per_cpu(svm_data, cpu);
1288         svm_data->tss_desc->type = 9; /* available 32/64-bit TSS */
1289         load_TR_desc();
1290 }
1291
1292 static void pre_svm_run(struct vcpu_svm *svm)
1293 {
1294         int cpu = raw_smp_processor_id();
1295
1296         struct svm_cpu_data *svm_data = per_cpu(svm_data, cpu);
1297
1298         svm->vmcb->control.tlb_ctl = TLB_CONTROL_DO_NOTHING;
1299         if (svm->vcpu.cpu != cpu ||
1300             svm->asid_generation != svm_data->asid_generation)
1301                 new_asid(svm, svm_data);
1302 }
1303
1304
1305 static inline void svm_inject_irq(struct vcpu_svm *svm, int irq)
1306 {
1307         struct vmcb_control_area *control;
1308
1309         control = &svm->vmcb->control;
1310         control->int_vector = irq;
1311         control->int_ctl &= ~V_INTR_PRIO_MASK;
1312         control->int_ctl |= V_IRQ_MASK |
1313                 ((/*control->int_vector >> 4*/ 0xf) << V_INTR_PRIO_SHIFT);
1314 }
1315
1316 static void svm_set_irq(struct kvm_vcpu *vcpu, int irq)
1317 {
1318         struct vcpu_svm *svm = to_svm(vcpu);
1319
1320         svm_inject_irq(svm, irq);
1321 }
1322
1323 static void svm_intr_assist(struct kvm_vcpu *vcpu)
1324 {
1325         struct vcpu_svm *svm = to_svm(vcpu);
1326         struct vmcb *vmcb = svm->vmcb;
1327         int intr_vector = -1;
1328
1329         if ((vmcb->control.exit_int_info & SVM_EVTINJ_VALID) &&
1330             ((vmcb->control.exit_int_info & SVM_EVTINJ_TYPE_MASK) == 0)) {
1331                 intr_vector = vmcb->control.exit_int_info &
1332                               SVM_EVTINJ_VEC_MASK;
1333                 vmcb->control.exit_int_info = 0;
1334                 svm_inject_irq(svm, intr_vector);
1335                 return;
1336         }
1337
1338         if (vmcb->control.int_ctl & V_IRQ_MASK)
1339                 return;
1340
1341         if (!kvm_cpu_has_interrupt(vcpu))
1342                 return;
1343
1344         if (!(vmcb->save.rflags & X86_EFLAGS_IF) ||
1345             (vmcb->control.int_state & SVM_INTERRUPT_SHADOW_MASK) ||
1346             (vmcb->control.event_inj & SVM_EVTINJ_VALID)) {
1347                 /* unable to deliver irq, set pending irq */
1348                 vmcb->control.intercept |= (1ULL << INTERCEPT_VINTR);
1349                 svm_inject_irq(svm, 0x0);
1350                 return;
1351         }
1352         /* Okay, we can deliver the interrupt: grab it and update PIC state. */
1353         intr_vector = kvm_cpu_get_interrupt(vcpu);
1354         svm_inject_irq(svm, intr_vector);
1355         kvm_timer_intr_post(vcpu, intr_vector);
1356 }
1357
1358 static void kvm_reput_irq(struct vcpu_svm *svm)
1359 {
1360         struct vmcb_control_area *control = &svm->vmcb->control;
1361
1362         if ((control->int_ctl & V_IRQ_MASK)
1363             && !irqchip_in_kernel(svm->vcpu.kvm)) {
1364                 control->int_ctl &= ~V_IRQ_MASK;
1365                 push_irq(&svm->vcpu, control->int_vector);
1366         }
1367
1368         svm->vcpu.interrupt_window_open =
1369                 !(control->int_state & SVM_INTERRUPT_SHADOW_MASK);
1370 }
1371
1372 static void svm_do_inject_vector(struct vcpu_svm *svm)
1373 {
1374         struct kvm_vcpu *vcpu = &svm->vcpu;
1375         int word_index = __ffs(vcpu->irq_summary);
1376         int bit_index = __ffs(vcpu->irq_pending[word_index]);
1377         int irq = word_index * BITS_PER_LONG + bit_index;
1378
1379         clear_bit(bit_index, &vcpu->irq_pending[word_index]);
1380         if (!vcpu->irq_pending[word_index])
1381                 clear_bit(word_index, &vcpu->irq_summary);
1382         svm_inject_irq(svm, irq);
1383 }
1384
1385 static void do_interrupt_requests(struct kvm_vcpu *vcpu,
1386                                        struct kvm_run *kvm_run)
1387 {
1388         struct vcpu_svm *svm = to_svm(vcpu);
1389         struct vmcb_control_area *control = &svm->vmcb->control;
1390
1391         svm->vcpu.interrupt_window_open =
1392                 (!(control->int_state & SVM_INTERRUPT_SHADOW_MASK) &&
1393                  (svm->vmcb->save.rflags & X86_EFLAGS_IF));
1394
1395         if (svm->vcpu.interrupt_window_open && svm->vcpu.irq_summary)
1396                 /*
1397                  * If interrupts enabled, and not blocked by sti or mov ss. Good.
1398                  */
1399                 svm_do_inject_vector(svm);
1400
1401         /*
1402          * Interrupts blocked.  Wait for unblock.
1403          */
1404         if (!svm->vcpu.interrupt_window_open &&
1405             (svm->vcpu.irq_summary || kvm_run->request_interrupt_window))
1406                 control->intercept |= 1ULL << INTERCEPT_VINTR;
1407          else
1408                 control->intercept &= ~(1ULL << INTERCEPT_VINTR);
1409 }
1410
1411 static int svm_set_tss_addr(struct kvm *kvm, unsigned int addr)
1412 {
1413         return 0;
1414 }
1415
1416 static void save_db_regs(unsigned long *db_regs)
1417 {
1418         asm volatile ("mov %%dr0, %0" : "=r"(db_regs[0]));
1419         asm volatile ("mov %%dr1, %0" : "=r"(db_regs[1]));
1420         asm volatile ("mov %%dr2, %0" : "=r"(db_regs[2]));
1421         asm volatile ("mov %%dr3, %0" : "=r"(db_regs[3]));
1422 }
1423
1424 static void load_db_regs(unsigned long *db_regs)
1425 {
1426         asm volatile ("mov %0, %%dr0" : : "r"(db_regs[0]));
1427         asm volatile ("mov %0, %%dr1" : : "r"(db_regs[1]));
1428         asm volatile ("mov %0, %%dr2" : : "r"(db_regs[2]));
1429         asm volatile ("mov %0, %%dr3" : : "r"(db_regs[3]));
1430 }
1431
1432 static void svm_flush_tlb(struct kvm_vcpu *vcpu)
1433 {
1434         force_new_asid(vcpu);
1435 }
1436
1437 static void svm_prepare_guest_switch(struct kvm_vcpu *vcpu)
1438 {
1439 }
1440
1441 static void svm_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1442 {
1443         struct vcpu_svm *svm = to_svm(vcpu);
1444         u16 fs_selector;
1445         u16 gs_selector;
1446         u16 ldt_selector;
1447
1448         pre_svm_run(svm);
1449
1450         save_host_msrs(vcpu);
1451         fs_selector = read_fs();
1452         gs_selector = read_gs();
1453         ldt_selector = read_ldt();
1454         svm->host_cr2 = kvm_read_cr2();
1455         svm->host_dr6 = read_dr6();
1456         svm->host_dr7 = read_dr7();
1457         svm->vmcb->save.cr2 = vcpu->cr2;
1458
1459         if (svm->vmcb->save.dr7 & 0xff) {
1460                 write_dr7(0);
1461                 save_db_regs(svm->host_db_regs);
1462                 load_db_regs(svm->db_regs);
1463         }
1464
1465         clgi();
1466
1467         local_irq_enable();
1468
1469         asm volatile (
1470 #ifdef CONFIG_X86_64
1471                 "push %%rbp; \n\t"
1472 #else
1473                 "push %%ebp; \n\t"
1474 #endif
1475
1476 #ifdef CONFIG_X86_64
1477                 "mov %c[rbx](%[svm]), %%rbx \n\t"
1478                 "mov %c[rcx](%[svm]), %%rcx \n\t"
1479                 "mov %c[rdx](%[svm]), %%rdx \n\t"
1480                 "mov %c[rsi](%[svm]), %%rsi \n\t"
1481                 "mov %c[rdi](%[svm]), %%rdi \n\t"
1482                 "mov %c[rbp](%[svm]), %%rbp \n\t"
1483                 "mov %c[r8](%[svm]),  %%r8  \n\t"
1484                 "mov %c[r9](%[svm]),  %%r9  \n\t"
1485                 "mov %c[r10](%[svm]), %%r10 \n\t"
1486                 "mov %c[r11](%[svm]), %%r11 \n\t"
1487                 "mov %c[r12](%[svm]), %%r12 \n\t"
1488                 "mov %c[r13](%[svm]), %%r13 \n\t"
1489                 "mov %c[r14](%[svm]), %%r14 \n\t"
1490                 "mov %c[r15](%[svm]), %%r15 \n\t"
1491 #else
1492                 "mov %c[rbx](%[svm]), %%ebx \n\t"
1493                 "mov %c[rcx](%[svm]), %%ecx \n\t"
1494                 "mov %c[rdx](%[svm]), %%edx \n\t"
1495                 "mov %c[rsi](%[svm]), %%esi \n\t"
1496                 "mov %c[rdi](%[svm]), %%edi \n\t"
1497                 "mov %c[rbp](%[svm]), %%ebp \n\t"
1498 #endif
1499
1500 #ifdef CONFIG_X86_64
1501                 /* Enter guest mode */
1502                 "push %%rax \n\t"
1503                 "mov %c[vmcb](%[svm]), %%rax \n\t"
1504                 SVM_VMLOAD "\n\t"
1505                 SVM_VMRUN "\n\t"
1506                 SVM_VMSAVE "\n\t"
1507                 "pop %%rax \n\t"
1508 #else
1509                 /* Enter guest mode */
1510                 "push %%eax \n\t"
1511                 "mov %c[vmcb](%[svm]), %%eax \n\t"
1512                 SVM_VMLOAD "\n\t"
1513                 SVM_VMRUN "\n\t"
1514                 SVM_VMSAVE "\n\t"
1515                 "pop %%eax \n\t"
1516 #endif
1517
1518                 /* Save guest registers, load host registers */
1519 #ifdef CONFIG_X86_64
1520                 "mov %%rbx, %c[rbx](%[svm]) \n\t"
1521                 "mov %%rcx, %c[rcx](%[svm]) \n\t"
1522                 "mov %%rdx, %c[rdx](%[svm]) \n\t"
1523                 "mov %%rsi, %c[rsi](%[svm]) \n\t"
1524                 "mov %%rdi, %c[rdi](%[svm]) \n\t"
1525                 "mov %%rbp, %c[rbp](%[svm]) \n\t"
1526                 "mov %%r8,  %c[r8](%[svm]) \n\t"
1527                 "mov %%r9,  %c[r9](%[svm]) \n\t"
1528                 "mov %%r10, %c[r10](%[svm]) \n\t"
1529                 "mov %%r11, %c[r11](%[svm]) \n\t"
1530                 "mov %%r12, %c[r12](%[svm]) \n\t"
1531                 "mov %%r13, %c[r13](%[svm]) \n\t"
1532                 "mov %%r14, %c[r14](%[svm]) \n\t"
1533                 "mov %%r15, %c[r15](%[svm]) \n\t"
1534
1535                 "pop  %%rbp; \n\t"
1536 #else
1537                 "mov %%ebx, %c[rbx](%[svm]) \n\t"
1538                 "mov %%ecx, %c[rcx](%[svm]) \n\t"
1539                 "mov %%edx, %c[rdx](%[svm]) \n\t"
1540                 "mov %%esi, %c[rsi](%[svm]) \n\t"
1541                 "mov %%edi, %c[rdi](%[svm]) \n\t"
1542                 "mov %%ebp, %c[rbp](%[svm]) \n\t"
1543
1544                 "pop  %%ebp; \n\t"
1545 #endif
1546                 :
1547                 : [svm]"a"(svm),
1548                   [vmcb]"i"(offsetof(struct vcpu_svm, vmcb_pa)),
1549                   [rbx]"i"(offsetof(struct vcpu_svm, vcpu.regs[VCPU_REGS_RBX])),
1550                   [rcx]"i"(offsetof(struct vcpu_svm, vcpu.regs[VCPU_REGS_RCX])),
1551                   [rdx]"i"(offsetof(struct vcpu_svm, vcpu.regs[VCPU_REGS_RDX])),
1552                   [rsi]"i"(offsetof(struct vcpu_svm, vcpu.regs[VCPU_REGS_RSI])),
1553                   [rdi]"i"(offsetof(struct vcpu_svm, vcpu.regs[VCPU_REGS_RDI])),
1554                   [rbp]"i"(offsetof(struct vcpu_svm, vcpu.regs[VCPU_REGS_RBP]))
1555 #ifdef CONFIG_X86_64
1556                   , [r8]"i"(offsetof(struct vcpu_svm, vcpu.regs[VCPU_REGS_R8])),
1557                   [r9]"i"(offsetof(struct vcpu_svm, vcpu.regs[VCPU_REGS_R9])),
1558                   [r10]"i"(offsetof(struct vcpu_svm, vcpu.regs[VCPU_REGS_R10])),
1559                   [r11]"i"(offsetof(struct vcpu_svm, vcpu.regs[VCPU_REGS_R11])),
1560                   [r12]"i"(offsetof(struct vcpu_svm, vcpu.regs[VCPU_REGS_R12])),
1561                   [r13]"i"(offsetof(struct vcpu_svm, vcpu.regs[VCPU_REGS_R13])),
1562                   [r14]"i"(offsetof(struct vcpu_svm, vcpu.regs[VCPU_REGS_R14])),
1563                   [r15]"i"(offsetof(struct vcpu_svm, vcpu.regs[VCPU_REGS_R15]))
1564 #endif
1565                 : "cc", "memory"
1566 #ifdef CONFIG_X86_64
1567                 , "rbx", "rcx", "rdx", "rsi", "rdi"
1568                 , "r8", "r9", "r10", "r11" , "r12", "r13", "r14", "r15"
1569 #else
1570                 , "ebx", "ecx", "edx" , "esi", "edi"
1571 #endif
1572                 );
1573
1574         if ((svm->vmcb->save.dr7 & 0xff))
1575                 load_db_regs(svm->host_db_regs);
1576
1577         vcpu->cr2 = svm->vmcb->save.cr2;
1578
1579         write_dr6(svm->host_dr6);
1580         write_dr7(svm->host_dr7);
1581         kvm_write_cr2(svm->host_cr2);
1582
1583         load_fs(fs_selector);
1584         load_gs(gs_selector);
1585         load_ldt(ldt_selector);
1586         load_host_msrs(vcpu);
1587
1588         reload_tss(vcpu);
1589
1590         local_irq_disable();
1591
1592         stgi();
1593
1594         svm->next_rip = 0;
1595 }
1596
1597 static void svm_set_cr3(struct kvm_vcpu *vcpu, unsigned long root)
1598 {
1599         struct vcpu_svm *svm = to_svm(vcpu);
1600
1601         svm->vmcb->save.cr3 = root;
1602         force_new_asid(vcpu);
1603
1604         if (vcpu->fpu_active) {
1605                 svm->vmcb->control.intercept_exceptions |= (1 << NM_VECTOR);
1606                 svm->vmcb->save.cr0 |= X86_CR0_TS;
1607                 vcpu->fpu_active = 0;
1608         }
1609 }
1610
1611 static void svm_inject_page_fault(struct kvm_vcpu *vcpu,
1612                                   unsigned long  addr,
1613                                   uint32_t err_code)
1614 {
1615         struct vcpu_svm *svm = to_svm(vcpu);
1616         uint32_t exit_int_info = svm->vmcb->control.exit_int_info;
1617
1618         ++vcpu->stat.pf_guest;
1619
1620         if (is_page_fault(exit_int_info)) {
1621
1622                 svm->vmcb->control.event_inj_err = 0;
1623                 svm->vmcb->control.event_inj =  SVM_EVTINJ_VALID |
1624                                                 SVM_EVTINJ_VALID_ERR |
1625                                                 SVM_EVTINJ_TYPE_EXEPT |
1626                                                 DF_VECTOR;
1627                 return;
1628         }
1629         vcpu->cr2 = addr;
1630         svm->vmcb->save.cr2 = addr;
1631         svm->vmcb->control.event_inj =  SVM_EVTINJ_VALID |
1632                                         SVM_EVTINJ_VALID_ERR |
1633                                         SVM_EVTINJ_TYPE_EXEPT |
1634                                         PF_VECTOR;
1635         svm->vmcb->control.event_inj_err = err_code;
1636 }
1637
1638
1639 static int is_disabled(void)
1640 {
1641         u64 vm_cr;
1642
1643         rdmsrl(MSR_VM_CR, vm_cr);
1644         if (vm_cr & (1 << SVM_VM_CR_SVM_DISABLE))
1645                 return 1;
1646
1647         return 0;
1648 }
1649
1650 static void
1651 svm_patch_hypercall(struct kvm_vcpu *vcpu, unsigned char *hypercall)
1652 {
1653         /*
1654          * Patch in the VMMCALL instruction:
1655          */
1656         hypercall[0] = 0x0f;
1657         hypercall[1] = 0x01;
1658         hypercall[2] = 0xd9;
1659 }
1660
1661 static void svm_check_processor_compat(void *rtn)
1662 {
1663         *(int *)rtn = 0;
1664 }
1665
1666 static struct kvm_x86_ops svm_x86_ops = {
1667         .cpu_has_kvm_support = has_svm,
1668         .disabled_by_bios = is_disabled,
1669         .hardware_setup = svm_hardware_setup,
1670         .hardware_unsetup = svm_hardware_unsetup,
1671         .check_processor_compatibility = svm_check_processor_compat,
1672         .hardware_enable = svm_hardware_enable,
1673         .hardware_disable = svm_hardware_disable,
1674
1675         .vcpu_create = svm_create_vcpu,
1676         .vcpu_free = svm_free_vcpu,
1677         .vcpu_reset = svm_vcpu_reset,
1678
1679         .prepare_guest_switch = svm_prepare_guest_switch,
1680         .vcpu_load = svm_vcpu_load,
1681         .vcpu_put = svm_vcpu_put,
1682         .vcpu_decache = svm_vcpu_decache,
1683
1684         .set_guest_debug = svm_guest_debug,
1685         .get_msr = svm_get_msr,
1686         .set_msr = svm_set_msr,
1687         .get_segment_base = svm_get_segment_base,
1688         .get_segment = svm_get_segment,
1689         .set_segment = svm_set_segment,
1690         .get_cs_db_l_bits = kvm_get_cs_db_l_bits,
1691         .decache_cr4_guest_bits = svm_decache_cr4_guest_bits,
1692         .set_cr0 = svm_set_cr0,
1693         .set_cr3 = svm_set_cr3,
1694         .set_cr4 = svm_set_cr4,
1695         .set_efer = svm_set_efer,
1696         .get_idt = svm_get_idt,
1697         .set_idt = svm_set_idt,
1698         .get_gdt = svm_get_gdt,
1699         .set_gdt = svm_set_gdt,
1700         .get_dr = svm_get_dr,
1701         .set_dr = svm_set_dr,
1702         .cache_regs = svm_cache_regs,
1703         .decache_regs = svm_decache_regs,
1704         .get_rflags = svm_get_rflags,
1705         .set_rflags = svm_set_rflags,
1706
1707         .tlb_flush = svm_flush_tlb,
1708         .inject_page_fault = svm_inject_page_fault,
1709
1710         .inject_gp = svm_inject_gp,
1711
1712         .run = svm_vcpu_run,
1713         .handle_exit = handle_exit,
1714         .skip_emulated_instruction = skip_emulated_instruction,
1715         .patch_hypercall = svm_patch_hypercall,
1716         .get_irq = svm_get_irq,
1717         .set_irq = svm_set_irq,
1718         .inject_pending_irq = svm_intr_assist,
1719         .inject_pending_vectors = do_interrupt_requests,
1720
1721         .set_tss_addr = svm_set_tss_addr,
1722 };
1723
1724 static int __init svm_init(void)
1725 {
1726         return kvm_init(&svm_x86_ops, sizeof(struct vcpu_svm),
1727                               THIS_MODULE);
1728 }
1729
1730 static void __exit svm_exit(void)
1731 {
1732         kvm_exit();
1733 }
1734
1735 module_init(svm_init)
1736 module_exit(svm_exit)