drivers/kvm/paging_tmpl.h

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * This module enables machines with Intel VT-x extensions to run virtual
   5  * machines without emulation or binary translation.
   6  *
   7  * MMU support
   8  *
   9  * Copyright (C) 2006 Qumranet, Inc.
  10  *
  11  * Authors:
  12  *   Yaniv Kamay  <yaniv@qumranet.com>
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *
  15  * This work is licensed under the terms of the GNU GPL, version 2.  See
  16  * the COPYING file in the top-level directory.
  17  *
  18  */
  19
  20 /*
  21  * We need the mmu code to access both 32-bit and 64-bit guest ptes,
  22  * so the code in this file is compiled twice, once per pte size.
  23  */
  24
  25 #if PTTYPE == 64
  26         #define pt_element_t u64
  27         #define guest_walker guest_walker64
  28         #define FNAME(name) paging##64_##name
  29         #define PT_BASE_ADDR_MASK PT64_BASE_ADDR_MASK
  30         #define PT_DIR_BASE_ADDR_MASK PT64_DIR_BASE_ADDR_MASK
  31         #define PT_INDEX(addr, level) PT64_INDEX(addr, level)
  32         #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
  33         #define PT_LEVEL_MASK(level) PT64_LEVEL_MASK(level)
  34         #ifdef CONFIG_X86_64
  35         #define PT_MAX_FULL_LEVELS 4
  36         #else
  37         #define PT_MAX_FULL_LEVELS 2
  38         #endif
  39 #elif PTTYPE == 32
  40         #define pt_element_t u32
  41         #define guest_walker guest_walker32
  42         #define FNAME(name) paging##32_##name
  43         #define PT_BASE_ADDR_MASK PT32_BASE_ADDR_MASK
  44         #define PT_DIR_BASE_ADDR_MASK PT32_DIR_BASE_ADDR_MASK
  45         #define PT_INDEX(addr, level) PT32_INDEX(addr, level)
  46         #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
  47         #define PT_LEVEL_MASK(level) PT32_LEVEL_MASK(level)
  48         #define PT_MAX_FULL_LEVELS 2
  49 #else
  50         #error Invalid PTTYPE value
  51 #endif
  52
  53 /*
  54  * The guest_walker structure emulates the behavior of the hardware page
  55  * table walker.
  56  */
  57 struct guest_walker {
  58         int level;
  59         gfn_t table_gfn[PT_MAX_FULL_LEVELS];
  60         pt_element_t *table;
  61         pt_element_t *ptep;
  62         pt_element_t inherited_ar;
  63         gfn_t gfn;
  64         u32 error_code;
  65 };
  66
  67 /*
  68  * Fetch a guest pte for a guest virtual address
  69  */
  70 static int FNAME(walk_addr)(struct guest_walker *walker,
  71                             struct kvm_vcpu *vcpu, gva_t addr,
  72                             int write_fault, int user_fault, int fetch_fault)
  73 {
  74         hpa_t hpa;
  75         struct kvm_memory_slot *slot;
  76         pt_element_t *ptep;
  77         pt_element_t root;
  78         gfn_t table_gfn;
  79
  80         pgprintk("%s: addr %lx\n", __FUNCTION__, addr);
  81         walker->level = vcpu->mmu.root_level;
  82         walker->table = NULL;
  83         root = vcpu->cr3;
  84 #if PTTYPE == 64
  85         if (!is_long_mode(vcpu)) {
  86                 walker->ptep = &vcpu->pdptrs[(addr >> 30) & 3];
  87                 root = *walker->ptep;
  88                 if (!(root & PT_PRESENT_MASK))
  89                         goto not_present;
  90                 --walker->level;
  91         }
  92 #endif
  93         table_gfn = (root & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  94         walker->table_gfn[walker->level - 1] = table_gfn;
  95         pgprintk("%s: table_gfn[%d] %lx\n", __FUNCTION__,
  96                  walker->level - 1, table_gfn);
  97         slot = gfn_to_memslot(vcpu->kvm, table_gfn);
  98         hpa = safe_gpa_to_hpa(vcpu, root & PT64_BASE_ADDR_MASK);
  99         walker->table = kmap_atomic(pfn_to_page(hpa >> PAGE_SHIFT), KM_USER0);
 100
 101         ASSERT((!is_long_mode(vcpu) && is_pae(vcpu)) ||
 102                (vcpu->cr3 & ~(PAGE_MASK | CR3_FLAGS_MASK)) == 0);
 103
 104         walker->inherited_ar = PT_USER_MASK | PT_WRITABLE_MASK;
 105
 106         for (;;) {
 107                 int index = PT_INDEX(addr, walker->level);
 108                 hpa_t paddr;
 109
 110                 ptep = &walker->table[index];
 111                 ASSERT(((unsigned long)walker->table & PAGE_MASK) ==
 112                        ((unsigned long)ptep & PAGE_MASK));
 113
 114                 if (!is_present_pte(*ptep))
 115                         goto not_present;
 116
 117                 if (write_fault && !is_writeble_pte(*ptep))
 118                         if (user_fault || is_write_protection(vcpu))
 119                                 goto access_error;
 120
 121                 if (user_fault && !(*ptep & PT_USER_MASK))
 122                         goto access_error;
 123
 124 #if PTTYPE == 64
 125                 if (fetch_fault && is_nx(vcpu) && (*ptep & PT64_NX_MASK))
 126                         goto access_error;
 127 #endif
 128
 129                 if (!(*ptep & PT_ACCESSED_MASK)) {
 130                         mark_page_dirty(vcpu->kvm, table_gfn);
 131                         *ptep |= PT_ACCESSED_MASK;
 132                 }
 133
 134                 if (walker->level == PT_PAGE_TABLE_LEVEL) {
 135                         walker->gfn = (*ptep & PT_BASE_ADDR_MASK)
 136                                 >> PAGE_SHIFT;
 137                         break;
 138                 }
 139
 140                 if (walker->level == PT_DIRECTORY_LEVEL
 141                     && (*ptep & PT_PAGE_SIZE_MASK)
 142                     && (PTTYPE == 64 || is_pse(vcpu))) {
 143                         walker->gfn = (*ptep & PT_DIR_BASE_ADDR_MASK)
 144                                 >> PAGE_SHIFT;
 145                         walker->gfn += PT_INDEX(addr, PT_PAGE_TABLE_LEVEL);
 146                         break;
 147                 }
 148
 149                 walker->inherited_ar &= walker->table[index];
 150                 table_gfn = (*ptep & PT_BASE_ADDR_MASK) >> PAGE_SHIFT;
 151                 paddr = safe_gpa_to_hpa(vcpu, *ptep & PT_BASE_ADDR_MASK);
 152                 kunmap_atomic(walker->table, KM_USER0);
 153                 walker->table = kmap_atomic(pfn_to_page(paddr >> PAGE_SHIFT),
 154                                             KM_USER0);
 155                 --walker->level;
 156                 walker->table_gfn[walker->level - 1 ] = table_gfn;
 157                 pgprintk("%s: table_gfn[%d] %lx\n", __FUNCTION__,
 158                          walker->level - 1, table_gfn);
 159         }
 160         walker->ptep = ptep;
 161         pgprintk("%s: pte %llx\n", __FUNCTION__, (u64)*ptep);
 162         return 1;
 163
 164 not_present:
 165         walker->error_code = 0;
 166         goto err;
 167
 168 access_error:
 169         walker->error_code = PFERR_PRESENT_MASK;
 170
 171 err:
 172         if (write_fault)
 173                 walker->error_code |= PFERR_WRITE_MASK;
 174         if (user_fault)
 175                 walker->error_code |= PFERR_USER_MASK;
 176         if (fetch_fault)
 177                 walker->error_code |= PFERR_FETCH_MASK;
 178         return 0;
 179 }
 180
 181 static void FNAME(release_walker)(struct guest_walker *walker)
 182 {
 183         if (walker->table)
 184                 kunmap_atomic(walker->table, KM_USER0);
 185 }
 186
 187 static void FNAME(mark_pagetable_dirty)(struct kvm *kvm,
 188                                         struct guest_walker *walker)
 189 {
 190         mark_page_dirty(kvm, walker->table_gfn[walker->level - 1]);
 191 }
 192
 193 static void FNAME(set_pte_common)(struct kvm_vcpu *vcpu,
 194                                   u64 *shadow_pte,
 195                                   gpa_t gaddr,
 196                                   pt_element_t *gpte,
 197                                   u64 access_bits,
 198                                   int user_fault,
 199                                   int write_fault,
 200                                   int *ptwrite,
 201                                   struct guest_walker *walker,
 202                                   gfn_t gfn)
 203 {
 204         hpa_t paddr;
 205         int dirty = *gpte & PT_DIRTY_MASK;
 206         u64 spte = *shadow_pte;
 207         int was_rmapped = is_rmap_pte(spte);
 208
 209         pgprintk("%s: spte %llx gpte %llx access %llx write_fault %d"
 210                  " user_fault %d gfn %lx\n",
 211                  __FUNCTION__, spte, (u64)*gpte, access_bits,
 212                  write_fault, user_fault, gfn);
 213
 214         if (write_fault && !dirty) {
 215                 *gpte |= PT_DIRTY_MASK;
 216                 dirty = 1;
 217                 FNAME(mark_pagetable_dirty)(vcpu->kvm, walker);
 218         }
 219
 220         spte |= PT_PRESENT_MASK | PT_ACCESSED_MASK | PT_DIRTY_MASK;
 221         spte |= *gpte & PT64_NX_MASK;
 222         spte |= access_bits << PT_SHADOW_BITS_OFFSET;
 223         if (!dirty)
 224                 access_bits &= ~PT_WRITABLE_MASK;
 225
 226         paddr = gpa_to_hpa(vcpu, gaddr & PT64_BASE_ADDR_MASK);
 227
 228         spte |= PT_PRESENT_MASK;
 229         if (access_bits & PT_USER_MASK)
 230                 spte |= PT_USER_MASK;
 231
 232         if (is_error_hpa(paddr)) {
 233                 spte |= gaddr;
 234                 spte |= PT_SHADOW_IO_MARK;
 235                 spte &= ~PT_PRESENT_MASK;
 236                 set_shadow_pte(shadow_pte, spte);
 237                 return;
 238         }
 239
 240         spte |= paddr;
 241
 242         if ((access_bits & PT_WRITABLE_MASK)
 243             || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
 244                 struct kvm_mmu_page *shadow;
 245
 246                 spte |= PT_WRITABLE_MASK;
 247                 if (user_fault) {
 248                         mmu_unshadow(vcpu, gfn);
 249                         goto unshadowed;
 250                 }
 251
 252                 shadow = kvm_mmu_lookup_page(vcpu, gfn);
 253                 if (shadow) {
 254                         pgprintk("%s: found shadow page for %lx, marking ro\n",
 255                                  __FUNCTION__, gfn);
 256                         access_bits &= ~PT_WRITABLE_MASK;
 257                         if (is_writeble_pte(spte)) {
 258                                 spte &= ~PT_WRITABLE_MASK;
 259                                 kvm_arch_ops->tlb_flush(vcpu);
 260                         }
 261                         if (write_fault)
 262                                 *ptwrite = 1;
 263                 }
 264         }
 265
 266 unshadowed:
 267
 268         if (access_bits & PT_WRITABLE_MASK)
 269                 mark_page_dirty(vcpu->kvm, gaddr >> PAGE_SHIFT);
 270
 271         set_shadow_pte(shadow_pte, spte);
 272         page_header_update_slot(vcpu->kvm, shadow_pte, gaddr);
 273         if (!was_rmapped)
 274                 rmap_add(vcpu, shadow_pte);
 275 }
 276
 277 static void FNAME(set_pte)(struct kvm_vcpu *vcpu, pt_element_t *gpte,
 278                            u64 *shadow_pte, u64 access_bits,
 279                            int user_fault, int write_fault, int *ptwrite,
 280                            struct guest_walker *walker, gfn_t gfn)
 281 {
 282         access_bits &= *gpte;
 283         FNAME(set_pte_common)(vcpu, shadow_pte, *gpte & PT_BASE_ADDR_MASK,
 284                               gpte, access_bits, user_fault, write_fault,
 285                               ptwrite, walker, gfn);
 286 }
 287
 288 static void FNAME(update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *page,
 289                               u64 *spte, const void *pte, int bytes)
 290 {
 291         pt_element_t gpte;
 292
 293         if (bytes < sizeof(pt_element_t))
 294                 return;
 295         gpte = *(const pt_element_t *)pte;
 296         if (~gpte & (PT_PRESENT_MASK | PT_ACCESSED_MASK))
 297                 return;
 298         pgprintk("%s: gpte %llx spte %p\n", __FUNCTION__, (u64)gpte, spte);
 299         FNAME(set_pte)(vcpu, &gpte, spte, PT_USER_MASK | PT_WRITABLE_MASK, 0,
 300                        0, NULL, NULL,
 301                        (gpte & PT_BASE_ADDR_MASK) >> PAGE_SHIFT);
 302 }
 303
 304 static void FNAME(set_pde)(struct kvm_vcpu *vcpu, pt_element_t *gpde,
 305                            u64 *shadow_pte, u64 access_bits,
 306                            int user_fault, int write_fault, int *ptwrite,
 307                            struct guest_walker *walker, gfn_t gfn)
 308 {
 309         gpa_t gaddr;
 310
 311         access_bits &= *gpde;
 312         gaddr = (gpa_t)gfn << PAGE_SHIFT;
 313         if (PTTYPE == 32 && is_cpuid_PSE36())
 314                 gaddr |= (*gpde & PT32_DIR_PSE36_MASK) <<
 315                         (32 - PT32_DIR_PSE36_SHIFT);
 316         FNAME(set_pte_common)(vcpu, shadow_pte, gaddr,
 317                               gpde, access_bits, user_fault, write_fault,
 318                               ptwrite, walker, gfn);
 319 }
 320
 321 /*
 322  * Fetch a shadow pte for a specific level in the paging hierarchy.
 323  */
 324 static u64 *FNAME(fetch)(struct kvm_vcpu *vcpu, gva_t addr,
 325                          struct guest_walker *walker,
 326                          int user_fault, int write_fault, int *ptwrite)
 327 {
 328         hpa_t shadow_addr;
 329         int level;
 330         u64 *shadow_ent;
 331         u64 *prev_shadow_ent = NULL;
 332         pt_element_t *guest_ent = walker->ptep;
 333
 334         if (!is_present_pte(*guest_ent))
 335                 return NULL;
 336
 337         shadow_addr = vcpu->mmu.root_hpa;
 338         level = vcpu->mmu.shadow_root_level;
 339         if (level == PT32E_ROOT_LEVEL) {
 340                 shadow_addr = vcpu->mmu.pae_root[(addr >> 30) & 3];
 341                 shadow_addr &= PT64_BASE_ADDR_MASK;
 342                 --level;
 343         }
 344
 345         for (; ; level--) {
 346                 u32 index = SHADOW_PT_INDEX(addr, level);
 347                 struct kvm_mmu_page *shadow_page;
 348                 u64 shadow_pte;
 349                 int metaphysical;
 350                 gfn_t table_gfn;
 351                 unsigned hugepage_access = 0;
 352
 353                 shadow_ent = ((u64 *)__va(shadow_addr)) + index;
 354                 if (is_present_pte(*shadow_ent) || is_io_pte(*shadow_ent)) {
 355                         if (level == PT_PAGE_TABLE_LEVEL)
 356                                 break;
 357                         shadow_addr = *shadow_ent & PT64_BASE_ADDR_MASK;
 358                         prev_shadow_ent = shadow_ent;
 359                         continue;
 360                 }
 361
 362                 if (level == PT_PAGE_TABLE_LEVEL)
 363                         break;
 364
 365                 if (level - 1 == PT_PAGE_TABLE_LEVEL
 366                     && walker->level == PT_DIRECTORY_LEVEL) {
 367                         metaphysical = 1;
 368                         hugepage_access = *guest_ent;
 369                         hugepage_access &= PT_USER_MASK | PT_WRITABLE_MASK;
 370                         hugepage_access >>= PT_WRITABLE_SHIFT;
 371                         table_gfn = (*guest_ent & PT_BASE_ADDR_MASK)
 372                                 >> PAGE_SHIFT;
 373                 } else {
 374                         metaphysical = 0;
 375                         table_gfn = walker->table_gfn[level - 2];
 376                 }
 377                 shadow_page = kvm_mmu_get_page(vcpu, table_gfn, addr, level-1,
 378                                                metaphysical, hugepage_access,
 379                                                shadow_ent);
 380                 shadow_addr = __pa(shadow_page->spt);
 381                 shadow_pte = shadow_addr | PT_PRESENT_MASK | PT_ACCESSED_MASK
 382                         | PT_WRITABLE_MASK | PT_USER_MASK;
 383                 *shadow_ent = shadow_pte;
 384                 prev_shadow_ent = shadow_ent;
 385         }
 386
 387         if (walker->level == PT_DIRECTORY_LEVEL) {
 388                 if (prev_shadow_ent)
 389                         *prev_shadow_ent |= PT_SHADOW_PS_MARK;
 390                 FNAME(set_pde)(vcpu, guest_ent, shadow_ent,
 391                                walker->inherited_ar, user_fault, write_fault,
 392                                ptwrite, walker, walker->gfn);
 393         } else {
 394                 ASSERT(walker->level == PT_PAGE_TABLE_LEVEL);
 395                 FNAME(set_pte)(vcpu, guest_ent, shadow_ent,
 396                                walker->inherited_ar, user_fault, write_fault,
 397                                ptwrite, walker, walker->gfn);
 398         }
 399         return shadow_ent;
 400 }
 401
 402 /*
 403  * Page fault handler.  There are several causes for a page fault:
 404  *   - there is no shadow pte for the guest pte
 405  *   - write access through a shadow pte marked read only so that we can set
 406  *     the dirty bit
 407  *   - write access to a shadow pte marked read only so we can update the page
 408  *     dirty bitmap, when userspace requests it
 409  *   - mmio access; in this case we will never install a present shadow pte
 410  *   - normal guest page fault due to the guest pte marked not present, not
 411  *     writable, or not executable
 412  *
 413  *  Returns: 1 if we need to emulate the instruction, 0 otherwise, or
 414  *           a negative value on error.
 415  */
 416 static int FNAME(page_fault)(struct kvm_vcpu *vcpu, gva_t addr,
 417                                u32 error_code)
 418 {
 419         int write_fault = error_code & PFERR_WRITE_MASK;
 420         int user_fault = error_code & PFERR_USER_MASK;
 421         int fetch_fault = error_code & PFERR_FETCH_MASK;
 422         struct guest_walker walker;
 423         u64 *shadow_pte;
 424         int write_pt = 0;
 425         int r;
 426
 427         pgprintk("%s: addr %lx err %x\n", __FUNCTION__, addr, error_code);
 428         kvm_mmu_audit(vcpu, "pre page fault");
 429
 430         r = mmu_topup_memory_caches(vcpu);
 431         if (r)
 432                 return r;
 433
 434         /*
 435          * Look up the shadow pte for the faulting address.
 436          */
 437         r = FNAME(walk_addr)(&walker, vcpu, addr, write_fault, user_fault,
 438                              fetch_fault);
 439
 440         /*
 441          * The page is not mapped by the guest.  Let the guest handle it.
 442          */
 443         if (!r) {
 444                 pgprintk("%s: guest page fault\n", __FUNCTION__);
 445                 inject_page_fault(vcpu, addr, walker.error_code);
 446                 FNAME(release_walker)(&walker);
 447                 vcpu->last_pt_write_count = 0; /* reset fork detector */
 448                 return 0;
 449         }
 450
 451         shadow_pte = FNAME(fetch)(vcpu, addr, &walker, user_fault, write_fault,
 452                                   &write_pt);
 453         pgprintk("%s: shadow pte %p %llx ptwrite %d\n", __FUNCTION__,
 454                  shadow_pte, *shadow_pte, write_pt);
 455
 456         FNAME(release_walker)(&walker);
 457
 458         if (!write_pt)
 459                 vcpu->last_pt_write_count = 0; /* reset fork detector */
 460
 461         /*
 462          * mmio: emulate if accessible, otherwise its a guest fault.
 463          */
 464         if (is_io_pte(*shadow_pte))
 465                 return 1;
 466
 467         ++vcpu->stat.pf_fixed;
 468         kvm_mmu_audit(vcpu, "post page fault (fixed)");
 469
 470         return write_pt;
 471 }
 472
 473 static gpa_t FNAME(gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t vaddr)
 474 {
 475         struct guest_walker walker;
 476         gpa_t gpa = UNMAPPED_GVA;
 477         int r;
 478
 479         r = FNAME(walk_addr)(&walker, vcpu, vaddr, 0, 0, 0);
 480
 481         if (r) {
 482                 gpa = (gpa_t)walker.gfn << PAGE_SHIFT;
 483                 gpa |= vaddr & ~PAGE_MASK;
 484         }
 485
 486         FNAME(release_walker)(&walker);
 487         return gpa;
 488 }
 489
 490 #undef pt_element_t
 491 #undef guest_walker
 492 #undef FNAME
 493 #undef PT_BASE_ADDR_MASK
 494 #undef PT_INDEX
 495 #undef SHADOW_PT_INDEX
 496 #undef PT_LEVEL_MASK
 497 #undef PT_DIR_BASE_ADDR_MASK
 498 #undef PT_MAX_FULL_LEVELS