2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
21 * We need the mmu code to access both 32-bit and 64-bit guest ptes,
22 * so the code in this file is compiled twice, once per pte size.
26 #define pt_element_t u64
27 #define guest_walker guest_walker64
28 #define FNAME(name) paging##64_##name
29 #define PT_BASE_ADDR_MASK PT64_BASE_ADDR_MASK
30 #define PT_DIR_BASE_ADDR_MASK PT64_DIR_BASE_ADDR_MASK
31 #define PT_INDEX(addr, level) PT64_INDEX(addr, level)
32 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
33 #define PT_LEVEL_MASK(level) PT64_LEVEL_MASK(level)
34 #define PT_PTE_COPY_MASK PT64_PTE_COPY_MASK
36 #define PT_MAX_FULL_LEVELS 4
38 #define PT_MAX_FULL_LEVELS 2
41 #define pt_element_t u32
42 #define guest_walker guest_walker32
43 #define FNAME(name) paging##32_##name
44 #define PT_BASE_ADDR_MASK PT32_BASE_ADDR_MASK
45 #define PT_DIR_BASE_ADDR_MASK PT32_DIR_BASE_ADDR_MASK
46 #define PT_INDEX(addr, level) PT32_INDEX(addr, level)
47 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
48 #define PT_LEVEL_MASK(level) PT32_LEVEL_MASK(level)
49 #define PT_PTE_COPY_MASK PT32_PTE_COPY_MASK
50 #define PT_MAX_FULL_LEVELS 2
52 #error Invalid PTTYPE value
56 * The guest_walker structure emulates the behavior of the hardware page
61 gfn_t table_gfn[PT_MAX_FULL_LEVELS];
64 pt_element_t inherited_ar;
70 * Fetch a guest pte for a guest virtual address
72 static int FNAME(walk_addr)(struct guest_walker *walker,
73 struct kvm_vcpu *vcpu, gva_t addr,
74 int write_fault, int user_fault, int fetch_fault)
77 struct kvm_memory_slot *slot;
82 pgprintk("%s: addr %lx\n", __FUNCTION__, addr);
83 walker->level = vcpu->mmu.root_level;
87 if (!is_long_mode(vcpu)) {
88 walker->ptep = &vcpu->pdptrs[(addr >> 30) & 3];
90 if (!(root & PT_PRESENT_MASK))
95 table_gfn = (root & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
96 walker->table_gfn[walker->level - 1] = table_gfn;
97 pgprintk("%s: table_gfn[%d] %lx\n", __FUNCTION__,
98 walker->level - 1, table_gfn);
99 slot = gfn_to_memslot(vcpu->kvm, table_gfn);
100 hpa = safe_gpa_to_hpa(vcpu, root & PT64_BASE_ADDR_MASK);
101 walker->table = kmap_atomic(pfn_to_page(hpa >> PAGE_SHIFT), KM_USER0);
103 ASSERT((!is_long_mode(vcpu) && is_pae(vcpu)) ||
104 (vcpu->cr3 & ~(PAGE_MASK | CR3_FLAGS_MASK)) == 0);
106 walker->inherited_ar = PT_USER_MASK | PT_WRITABLE_MASK;
109 int index = PT_INDEX(addr, walker->level);
112 ptep = &walker->table[index];
113 ASSERT(((unsigned long)walker->table & PAGE_MASK) ==
114 ((unsigned long)ptep & PAGE_MASK));
116 if (!is_present_pte(*ptep))
119 if (write_fault && !is_writeble_pte(*ptep))
120 if (user_fault || is_write_protection(vcpu))
123 if (user_fault && !(*ptep & PT_USER_MASK))
127 if (fetch_fault && is_nx(vcpu) && (*ptep & PT64_NX_MASK))
131 if (!(*ptep & PT_ACCESSED_MASK)) {
132 mark_page_dirty(vcpu->kvm, table_gfn);
133 *ptep |= PT_ACCESSED_MASK;
136 if (walker->level == PT_PAGE_TABLE_LEVEL) {
137 walker->gfn = (*ptep & PT_BASE_ADDR_MASK)
142 if (walker->level == PT_DIRECTORY_LEVEL
143 && (*ptep & PT_PAGE_SIZE_MASK)
144 && (PTTYPE == 64 || is_pse(vcpu))) {
145 walker->gfn = (*ptep & PT_DIR_BASE_ADDR_MASK)
147 walker->gfn += PT_INDEX(addr, PT_PAGE_TABLE_LEVEL);
151 walker->inherited_ar &= walker->table[index];
152 table_gfn = (*ptep & PT_BASE_ADDR_MASK) >> PAGE_SHIFT;
153 paddr = safe_gpa_to_hpa(vcpu, *ptep & PT_BASE_ADDR_MASK);
154 kunmap_atomic(walker->table, KM_USER0);
155 walker->table = kmap_atomic(pfn_to_page(paddr >> PAGE_SHIFT),
158 walker->table_gfn[walker->level - 1 ] = table_gfn;
159 pgprintk("%s: table_gfn[%d] %lx\n", __FUNCTION__,
160 walker->level - 1, table_gfn);
163 pgprintk("%s: pte %llx\n", __FUNCTION__, (u64)*ptep);
167 walker->error_code = 0;
171 walker->error_code = PFERR_PRESENT_MASK;
175 walker->error_code |= PFERR_WRITE_MASK;
177 walker->error_code |= PFERR_USER_MASK;
179 walker->error_code |= PFERR_FETCH_MASK;
183 static void FNAME(release_walker)(struct guest_walker *walker)
186 kunmap_atomic(walker->table, KM_USER0);
189 static void FNAME(mark_pagetable_dirty)(struct kvm *kvm,
190 struct guest_walker *walker)
192 mark_page_dirty(kvm, walker->table_gfn[walker->level - 1]);
195 static void FNAME(set_pte)(struct kvm_vcpu *vcpu, u64 guest_pte,
196 u64 *shadow_pte, u64 access_bits, gfn_t gfn)
198 ASSERT(*shadow_pte == 0);
199 access_bits &= guest_pte;
200 *shadow_pte = (guest_pte & PT_PTE_COPY_MASK);
201 set_pte_common(vcpu, shadow_pte, guest_pte & PT_BASE_ADDR_MASK,
202 guest_pte & PT_DIRTY_MASK, access_bits, gfn);
205 static void FNAME(update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *page,
206 u64 *spte, const void *pte, int bytes)
210 if (bytes < sizeof(pt_element_t))
212 gpte = *(const pt_element_t *)pte;
213 if (~gpte & (PT_PRESENT_MASK | PT_ACCESSED_MASK))
215 pgprintk("%s: gpte %llx spte %p\n", __FUNCTION__, (u64)gpte, spte);
216 FNAME(set_pte)(vcpu, gpte, spte, PT_USER_MASK | PT_WRITABLE_MASK,
217 (gpte & PT_BASE_ADDR_MASK) >> PAGE_SHIFT);
220 static void FNAME(set_pde)(struct kvm_vcpu *vcpu, u64 guest_pde,
221 u64 *shadow_pte, u64 access_bits, gfn_t gfn)
225 ASSERT(*shadow_pte == 0);
226 access_bits &= guest_pde;
227 gaddr = (gpa_t)gfn << PAGE_SHIFT;
228 if (PTTYPE == 32 && is_cpuid_PSE36())
229 gaddr |= (guest_pde & PT32_DIR_PSE36_MASK) <<
230 (32 - PT32_DIR_PSE36_SHIFT);
231 *shadow_pte = guest_pde & PT_PTE_COPY_MASK;
232 set_pte_common(vcpu, shadow_pte, gaddr,
233 guest_pde & PT_DIRTY_MASK, access_bits, gfn);
237 * Fetch a shadow pte for a specific level in the paging hierarchy.
239 static u64 *FNAME(fetch)(struct kvm_vcpu *vcpu, gva_t addr,
240 struct guest_walker *walker)
245 u64 *prev_shadow_ent = NULL;
246 pt_element_t *guest_ent = walker->ptep;
248 if (!is_present_pte(*guest_ent))
251 shadow_addr = vcpu->mmu.root_hpa;
252 level = vcpu->mmu.shadow_root_level;
253 if (level == PT32E_ROOT_LEVEL) {
254 shadow_addr = vcpu->mmu.pae_root[(addr >> 30) & 3];
255 shadow_addr &= PT64_BASE_ADDR_MASK;
260 u32 index = SHADOW_PT_INDEX(addr, level);
261 struct kvm_mmu_page *shadow_page;
265 unsigned hugepage_access = 0;
267 shadow_ent = ((u64 *)__va(shadow_addr)) + index;
268 if (is_present_pte(*shadow_ent) || is_io_pte(*shadow_ent)) {
269 if (level == PT_PAGE_TABLE_LEVEL)
271 shadow_addr = *shadow_ent & PT64_BASE_ADDR_MASK;
272 prev_shadow_ent = shadow_ent;
276 if (level == PT_PAGE_TABLE_LEVEL)
279 if (level - 1 == PT_PAGE_TABLE_LEVEL
280 && walker->level == PT_DIRECTORY_LEVEL) {
282 hugepage_access = *guest_ent;
283 hugepage_access &= PT_USER_MASK | PT_WRITABLE_MASK;
284 hugepage_access >>= PT_WRITABLE_SHIFT;
285 table_gfn = (*guest_ent & PT_BASE_ADDR_MASK)
289 table_gfn = walker->table_gfn[level - 2];
291 shadow_page = kvm_mmu_get_page(vcpu, table_gfn, addr, level-1,
292 metaphysical, hugepage_access,
294 shadow_addr = __pa(shadow_page->spt);
295 shadow_pte = shadow_addr | PT_PRESENT_MASK | PT_ACCESSED_MASK
296 | PT_WRITABLE_MASK | PT_USER_MASK;
297 *shadow_ent = shadow_pte;
298 prev_shadow_ent = shadow_ent;
301 if (walker->level == PT_DIRECTORY_LEVEL) {
303 *prev_shadow_ent |= PT_SHADOW_PS_MARK;
304 FNAME(set_pde)(vcpu, *guest_ent, shadow_ent,
305 walker->inherited_ar, walker->gfn);
307 ASSERT(walker->level == PT_PAGE_TABLE_LEVEL);
308 FNAME(set_pte)(vcpu, *guest_ent, shadow_ent,
309 walker->inherited_ar,
316 * The guest faulted for write. We need to
318 * - check write permissions
319 * - update the guest pte dirty bit
320 * - update our own dirty page tracking structures
322 static int FNAME(fix_write_pf)(struct kvm_vcpu *vcpu,
324 struct guest_walker *walker,
329 pt_element_t *guest_ent;
332 struct kvm_mmu_page *page;
334 if (is_writeble_pte(*shadow_ent))
335 return !user || (*shadow_ent & PT_USER_MASK);
337 writable_shadow = *shadow_ent & PT_SHADOW_WRITABLE_MASK;
340 * User mode access. Fail if it's a kernel page or a read-only
343 if (!(*shadow_ent & PT_SHADOW_USER_MASK) || !writable_shadow)
345 ASSERT(*shadow_ent & PT_USER_MASK);
348 * Kernel mode access. Fail if it's a read-only page and
349 * supervisor write protection is enabled.
351 if (!writable_shadow) {
352 if (is_write_protection(vcpu))
354 *shadow_ent &= ~PT_USER_MASK;
357 guest_ent = walker->ptep;
359 if (!is_present_pte(*guest_ent)) {
368 * Usermode page faults won't be for page table updates.
370 while ((page = kvm_mmu_lookup_page(vcpu, gfn)) != NULL) {
371 pgprintk("%s: zap %lx %x\n",
372 __FUNCTION__, gfn, page->role.word);
373 kvm_mmu_zap_page(vcpu, page);
375 } else if (kvm_mmu_lookup_page(vcpu, gfn)) {
376 pgprintk("%s: found shadow page for %lx, marking ro\n",
378 mark_page_dirty(vcpu->kvm, gfn);
379 FNAME(mark_pagetable_dirty)(vcpu->kvm, walker);
380 *guest_ent |= PT_DIRTY_MASK;
384 mark_page_dirty(vcpu->kvm, gfn);
385 *shadow_ent |= PT_WRITABLE_MASK;
386 FNAME(mark_pagetable_dirty)(vcpu->kvm, walker);
387 *guest_ent |= PT_DIRTY_MASK;
388 rmap_add(vcpu, shadow_ent);
394 * Page fault handler. There are several causes for a page fault:
395 * - there is no shadow pte for the guest pte
396 * - write access through a shadow pte marked read only so that we can set
398 * - write access to a shadow pte marked read only so we can update the page
399 * dirty bitmap, when userspace requests it
400 * - mmio access; in this case we will never install a present shadow pte
401 * - normal guest page fault due to the guest pte marked not present, not
402 * writable, or not executable
404 * Returns: 1 if we need to emulate the instruction, 0 otherwise, or
405 * a negative value on error.
407 static int FNAME(page_fault)(struct kvm_vcpu *vcpu, gva_t addr,
410 int write_fault = error_code & PFERR_WRITE_MASK;
411 int user_fault = error_code & PFERR_USER_MASK;
412 int fetch_fault = error_code & PFERR_FETCH_MASK;
413 struct guest_walker walker;
419 pgprintk("%s: addr %lx err %x\n", __FUNCTION__, addr, error_code);
420 kvm_mmu_audit(vcpu, "pre page fault");
422 r = mmu_topup_memory_caches(vcpu);
427 * Look up the shadow pte for the faulting address.
429 r = FNAME(walk_addr)(&walker, vcpu, addr, write_fault, user_fault,
433 * The page is not mapped by the guest. Let the guest handle it.
436 pgprintk("%s: guest page fault\n", __FUNCTION__);
437 inject_page_fault(vcpu, addr, walker.error_code);
438 FNAME(release_walker)(&walker);
439 vcpu->last_pt_write_count = 0; /* reset fork detector */
443 shadow_pte = FNAME(fetch)(vcpu, addr, &walker);
444 pgprintk("%s: shadow pte %p %llx\n", __FUNCTION__,
445 shadow_pte, *shadow_pte);
448 * Update the shadow pte.
451 fixed = FNAME(fix_write_pf)(vcpu, shadow_pte, &walker, addr,
452 user_fault, &write_pt);
454 fixed = fix_read_pf(shadow_pte);
456 pgprintk("%s: updated shadow pte %p %llx\n", __FUNCTION__,
457 shadow_pte, *shadow_pte);
459 FNAME(release_walker)(&walker);
462 vcpu->last_pt_write_count = 0; /* reset fork detector */
465 * mmio: emulate if accessible, otherwise its a guest fault.
467 if (is_io_pte(*shadow_pte))
470 ++vcpu->stat.pf_fixed;
471 kvm_mmu_audit(vcpu, "post page fault (fixed)");
476 static gpa_t FNAME(gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t vaddr)
478 struct guest_walker walker;
479 gpa_t gpa = UNMAPPED_GVA;
482 r = FNAME(walk_addr)(&walker, vcpu, vaddr, 0, 0, 0);
485 gpa = (gpa_t)walker.gfn << PAGE_SHIFT;
486 gpa |= vaddr & ~PAGE_MASK;
489 FNAME(release_walker)(&walker);
496 #undef PT_BASE_ADDR_MASK
498 #undef SHADOW_PT_INDEX
500 #undef PT_PTE_COPY_MASK
501 #undef PT_NON_PTE_COPY_MASK
502 #undef PT_DIR_BASE_ADDR_MASK
503 #undef PT_MAX_FULL_LEVELS