Merge branch 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik...
[pandora-kernel.git] / drivers / kvm / paging_tmpl.h
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * This module enables machines with Intel VT-x extensions to run virtual
5  * machines without emulation or binary translation.
6  *
7  * MMU support
8  *
9  * Copyright (C) 2006 Qumranet, Inc.
10  *
11  * Authors:
12  *   Yaniv Kamay  <yaniv@qumranet.com>
13  *   Avi Kivity   <avi@qumranet.com>
14  *
15  * This work is licensed under the terms of the GNU GPL, version 2.  See
16  * the COPYING file in the top-level directory.
17  *
18  */
19
20 /*
21  * We need the mmu code to access both 32-bit and 64-bit guest ptes,
22  * so the code in this file is compiled twice, once per pte size.
23  */
24
25 #if PTTYPE == 64
26         #define pt_element_t u64
27         #define guest_walker guest_walker64
28         #define FNAME(name) paging##64_##name
29         #define PT_BASE_ADDR_MASK PT64_BASE_ADDR_MASK
30         #define PT_DIR_BASE_ADDR_MASK PT64_DIR_BASE_ADDR_MASK
31         #define PT_INDEX(addr, level) PT64_INDEX(addr, level)
32         #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
33         #define PT_LEVEL_MASK(level) PT64_LEVEL_MASK(level)
34         #define PT_PTE_COPY_MASK PT64_PTE_COPY_MASK
35         #ifdef CONFIG_X86_64
36         #define PT_MAX_FULL_LEVELS 4
37         #else
38         #define PT_MAX_FULL_LEVELS 2
39         #endif
40 #elif PTTYPE == 32
41         #define pt_element_t u32
42         #define guest_walker guest_walker32
43         #define FNAME(name) paging##32_##name
44         #define PT_BASE_ADDR_MASK PT32_BASE_ADDR_MASK
45         #define PT_DIR_BASE_ADDR_MASK PT32_DIR_BASE_ADDR_MASK
46         #define PT_INDEX(addr, level) PT32_INDEX(addr, level)
47         #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
48         #define PT_LEVEL_MASK(level) PT32_LEVEL_MASK(level)
49         #define PT_PTE_COPY_MASK PT32_PTE_COPY_MASK
50         #define PT_MAX_FULL_LEVELS 2
51 #else
52         #error Invalid PTTYPE value
53 #endif
54
55 /*
56  * The guest_walker structure emulates the behavior of the hardware page
57  * table walker.
58  */
59 struct guest_walker {
60         int level;
61         gfn_t table_gfn[PT_MAX_FULL_LEVELS];
62         pt_element_t *table;
63         pt_element_t *ptep;
64         pt_element_t inherited_ar;
65         gfn_t gfn;
66         u32 error_code;
67 };
68
69 /*
70  * Fetch a guest pte for a guest virtual address
71  */
72 static int FNAME(walk_addr)(struct guest_walker *walker,
73                             struct kvm_vcpu *vcpu, gva_t addr,
74                             int write_fault, int user_fault, int fetch_fault)
75 {
76         hpa_t hpa;
77         struct kvm_memory_slot *slot;
78         pt_element_t *ptep;
79         pt_element_t root;
80         gfn_t table_gfn;
81
82         pgprintk("%s: addr %lx\n", __FUNCTION__, addr);
83         walker->level = vcpu->mmu.root_level;
84         walker->table = NULL;
85         root = vcpu->cr3;
86 #if PTTYPE == 64
87         if (!is_long_mode(vcpu)) {
88                 walker->ptep = &vcpu->pdptrs[(addr >> 30) & 3];
89                 root = *walker->ptep;
90                 if (!(root & PT_PRESENT_MASK))
91                         goto not_present;
92                 --walker->level;
93         }
94 #endif
95         table_gfn = (root & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
96         walker->table_gfn[walker->level - 1] = table_gfn;
97         pgprintk("%s: table_gfn[%d] %lx\n", __FUNCTION__,
98                  walker->level - 1, table_gfn);
99         slot = gfn_to_memslot(vcpu->kvm, table_gfn);
100         hpa = safe_gpa_to_hpa(vcpu, root & PT64_BASE_ADDR_MASK);
101         walker->table = kmap_atomic(pfn_to_page(hpa >> PAGE_SHIFT), KM_USER0);
102
103         ASSERT((!is_long_mode(vcpu) && is_pae(vcpu)) ||
104                (vcpu->cr3 & ~(PAGE_MASK | CR3_FLAGS_MASK)) == 0);
105
106         walker->inherited_ar = PT_USER_MASK | PT_WRITABLE_MASK;
107
108         for (;;) {
109                 int index = PT_INDEX(addr, walker->level);
110                 hpa_t paddr;
111
112                 ptep = &walker->table[index];
113                 ASSERT(((unsigned long)walker->table & PAGE_MASK) ==
114                        ((unsigned long)ptep & PAGE_MASK));
115
116                 if (!is_present_pte(*ptep))
117                         goto not_present;
118
119                 if (write_fault && !is_writeble_pte(*ptep))
120                         if (user_fault || is_write_protection(vcpu))
121                                 goto access_error;
122
123                 if (user_fault && !(*ptep & PT_USER_MASK))
124                         goto access_error;
125
126 #if PTTYPE == 64
127                 if (fetch_fault && is_nx(vcpu) && (*ptep & PT64_NX_MASK))
128                         goto access_error;
129 #endif
130
131                 if (!(*ptep & PT_ACCESSED_MASK)) {
132                         mark_page_dirty(vcpu->kvm, table_gfn);
133                         *ptep |= PT_ACCESSED_MASK;
134                 }
135
136                 if (walker->level == PT_PAGE_TABLE_LEVEL) {
137                         walker->gfn = (*ptep & PT_BASE_ADDR_MASK)
138                                 >> PAGE_SHIFT;
139                         break;
140                 }
141
142                 if (walker->level == PT_DIRECTORY_LEVEL
143                     && (*ptep & PT_PAGE_SIZE_MASK)
144                     && (PTTYPE == 64 || is_pse(vcpu))) {
145                         walker->gfn = (*ptep & PT_DIR_BASE_ADDR_MASK)
146                                 >> PAGE_SHIFT;
147                         walker->gfn += PT_INDEX(addr, PT_PAGE_TABLE_LEVEL);
148                         break;
149                 }
150
151                 if (walker->level != 3 || is_long_mode(vcpu))
152                         walker->inherited_ar &= walker->table[index];
153                 table_gfn = (*ptep & PT_BASE_ADDR_MASK) >> PAGE_SHIFT;
154                 paddr = safe_gpa_to_hpa(vcpu, *ptep & PT_BASE_ADDR_MASK);
155                 kunmap_atomic(walker->table, KM_USER0);
156                 walker->table = kmap_atomic(pfn_to_page(paddr >> PAGE_SHIFT),
157                                             KM_USER0);
158                 --walker->level;
159                 walker->table_gfn[walker->level - 1 ] = table_gfn;
160                 pgprintk("%s: table_gfn[%d] %lx\n", __FUNCTION__,
161                          walker->level - 1, table_gfn);
162         }
163         walker->ptep = ptep;
164         pgprintk("%s: pte %llx\n", __FUNCTION__, (u64)*ptep);
165         return 1;
166
167 not_present:
168         walker->error_code = 0;
169         goto err;
170
171 access_error:
172         walker->error_code = PFERR_PRESENT_MASK;
173
174 err:
175         if (write_fault)
176                 walker->error_code |= PFERR_WRITE_MASK;
177         if (user_fault)
178                 walker->error_code |= PFERR_USER_MASK;
179         if (fetch_fault)
180                 walker->error_code |= PFERR_FETCH_MASK;
181         return 0;
182 }
183
184 static void FNAME(release_walker)(struct guest_walker *walker)
185 {
186         if (walker->table)
187                 kunmap_atomic(walker->table, KM_USER0);
188 }
189
190 static void FNAME(mark_pagetable_dirty)(struct kvm *kvm,
191                                         struct guest_walker *walker)
192 {
193         mark_page_dirty(kvm, walker->table_gfn[walker->level - 1]);
194 }
195
196 static void FNAME(set_pte)(struct kvm_vcpu *vcpu, u64 guest_pte,
197                            u64 *shadow_pte, u64 access_bits, gfn_t gfn)
198 {
199         ASSERT(*shadow_pte == 0);
200         access_bits &= guest_pte;
201         *shadow_pte = (guest_pte & PT_PTE_COPY_MASK);
202         set_pte_common(vcpu, shadow_pte, guest_pte & PT_BASE_ADDR_MASK,
203                        guest_pte & PT_DIRTY_MASK, access_bits, gfn);
204 }
205
206 static void FNAME(set_pde)(struct kvm_vcpu *vcpu, u64 guest_pde,
207                            u64 *shadow_pte, u64 access_bits, gfn_t gfn)
208 {
209         gpa_t gaddr;
210
211         ASSERT(*shadow_pte == 0);
212         access_bits &= guest_pde;
213         gaddr = (gpa_t)gfn << PAGE_SHIFT;
214         if (PTTYPE == 32 && is_cpuid_PSE36())
215                 gaddr |= (guest_pde & PT32_DIR_PSE36_MASK) <<
216                         (32 - PT32_DIR_PSE36_SHIFT);
217         *shadow_pte = guest_pde & PT_PTE_COPY_MASK;
218         set_pte_common(vcpu, shadow_pte, gaddr,
219                        guest_pde & PT_DIRTY_MASK, access_bits, gfn);
220 }
221
222 /*
223  * Fetch a shadow pte for a specific level in the paging hierarchy.
224  */
225 static u64 *FNAME(fetch)(struct kvm_vcpu *vcpu, gva_t addr,
226                               struct guest_walker *walker)
227 {
228         hpa_t shadow_addr;
229         int level;
230         u64 *prev_shadow_ent = NULL;
231         pt_element_t *guest_ent = walker->ptep;
232
233         if (!is_present_pte(*guest_ent))
234                 return NULL;
235
236         shadow_addr = vcpu->mmu.root_hpa;
237         level = vcpu->mmu.shadow_root_level;
238         if (level == PT32E_ROOT_LEVEL) {
239                 shadow_addr = vcpu->mmu.pae_root[(addr >> 30) & 3];
240                 shadow_addr &= PT64_BASE_ADDR_MASK;
241                 --level;
242         }
243
244         for (; ; level--) {
245                 u32 index = SHADOW_PT_INDEX(addr, level);
246                 u64 *shadow_ent = ((u64 *)__va(shadow_addr)) + index;
247                 struct kvm_mmu_page *shadow_page;
248                 u64 shadow_pte;
249                 int metaphysical;
250                 gfn_t table_gfn;
251
252                 if (is_present_pte(*shadow_ent) || is_io_pte(*shadow_ent)) {
253                         if (level == PT_PAGE_TABLE_LEVEL)
254                                 return shadow_ent;
255                         shadow_addr = *shadow_ent & PT64_BASE_ADDR_MASK;
256                         prev_shadow_ent = shadow_ent;
257                         continue;
258                 }
259
260                 if (level == PT_PAGE_TABLE_LEVEL) {
261
262                         if (walker->level == PT_DIRECTORY_LEVEL) {
263                                 if (prev_shadow_ent)
264                                         *prev_shadow_ent |= PT_SHADOW_PS_MARK;
265                                 FNAME(set_pde)(vcpu, *guest_ent, shadow_ent,
266                                                walker->inherited_ar,
267                                                walker->gfn);
268                         } else {
269                                 ASSERT(walker->level == PT_PAGE_TABLE_LEVEL);
270                                 FNAME(set_pte)(vcpu, *guest_ent, shadow_ent,
271                                                walker->inherited_ar,
272                                                walker->gfn);
273                         }
274                         return shadow_ent;
275                 }
276
277                 if (level - 1 == PT_PAGE_TABLE_LEVEL
278                     && walker->level == PT_DIRECTORY_LEVEL) {
279                         metaphysical = 1;
280                         table_gfn = (*guest_ent & PT_BASE_ADDR_MASK)
281                                 >> PAGE_SHIFT;
282                 } else {
283                         metaphysical = 0;
284                         table_gfn = walker->table_gfn[level - 2];
285                 }
286                 shadow_page = kvm_mmu_get_page(vcpu, table_gfn, addr, level-1,
287                                                metaphysical, shadow_ent);
288                 shadow_addr = shadow_page->page_hpa;
289                 shadow_pte = shadow_addr | PT_PRESENT_MASK | PT_ACCESSED_MASK
290                         | PT_WRITABLE_MASK | PT_USER_MASK;
291                 *shadow_ent = shadow_pte;
292                 prev_shadow_ent = shadow_ent;
293         }
294 }
295
296 /*
297  * The guest faulted for write.  We need to
298  *
299  * - check write permissions
300  * - update the guest pte dirty bit
301  * - update our own dirty page tracking structures
302  */
303 static int FNAME(fix_write_pf)(struct kvm_vcpu *vcpu,
304                                u64 *shadow_ent,
305                                struct guest_walker *walker,
306                                gva_t addr,
307                                int user,
308                                int *write_pt)
309 {
310         pt_element_t *guest_ent;
311         int writable_shadow;
312         gfn_t gfn;
313         struct kvm_mmu_page *page;
314
315         if (is_writeble_pte(*shadow_ent))
316                 return !user || (*shadow_ent & PT_USER_MASK);
317
318         writable_shadow = *shadow_ent & PT_SHADOW_WRITABLE_MASK;
319         if (user) {
320                 /*
321                  * User mode access.  Fail if it's a kernel page or a read-only
322                  * page.
323                  */
324                 if (!(*shadow_ent & PT_SHADOW_USER_MASK) || !writable_shadow)
325                         return 0;
326                 ASSERT(*shadow_ent & PT_USER_MASK);
327         } else
328                 /*
329                  * Kernel mode access.  Fail if it's a read-only page and
330                  * supervisor write protection is enabled.
331                  */
332                 if (!writable_shadow) {
333                         if (is_write_protection(vcpu))
334                                 return 0;
335                         *shadow_ent &= ~PT_USER_MASK;
336                 }
337
338         guest_ent = walker->ptep;
339
340         if (!is_present_pte(*guest_ent)) {
341                 *shadow_ent = 0;
342                 return 0;
343         }
344
345         gfn = walker->gfn;
346
347         if (user) {
348                 /*
349                  * Usermode page faults won't be for page table updates.
350                  */
351                 while ((page = kvm_mmu_lookup_page(vcpu, gfn)) != NULL) {
352                         pgprintk("%s: zap %lx %x\n",
353                                  __FUNCTION__, gfn, page->role.word);
354                         kvm_mmu_zap_page(vcpu, page);
355                 }
356         } else if (kvm_mmu_lookup_page(vcpu, gfn)) {
357                 pgprintk("%s: found shadow page for %lx, marking ro\n",
358                          __FUNCTION__, gfn);
359                 mark_page_dirty(vcpu->kvm, gfn);
360                 FNAME(mark_pagetable_dirty)(vcpu->kvm, walker);
361                 *guest_ent |= PT_DIRTY_MASK;
362                 *write_pt = 1;
363                 return 0;
364         }
365         mark_page_dirty(vcpu->kvm, gfn);
366         *shadow_ent |= PT_WRITABLE_MASK;
367         FNAME(mark_pagetable_dirty)(vcpu->kvm, walker);
368         *guest_ent |= PT_DIRTY_MASK;
369         rmap_add(vcpu, shadow_ent);
370
371         return 1;
372 }
373
374 /*
375  * Page fault handler.  There are several causes for a page fault:
376  *   - there is no shadow pte for the guest pte
377  *   - write access through a shadow pte marked read only so that we can set
378  *     the dirty bit
379  *   - write access to a shadow pte marked read only so we can update the page
380  *     dirty bitmap, when userspace requests it
381  *   - mmio access; in this case we will never install a present shadow pte
382  *   - normal guest page fault due to the guest pte marked not present, not
383  *     writable, or not executable
384  *
385  *  Returns: 1 if we need to emulate the instruction, 0 otherwise, or
386  *           a negative value on error.
387  */
388 static int FNAME(page_fault)(struct kvm_vcpu *vcpu, gva_t addr,
389                                u32 error_code)
390 {
391         int write_fault = error_code & PFERR_WRITE_MASK;
392         int user_fault = error_code & PFERR_USER_MASK;
393         int fetch_fault = error_code & PFERR_FETCH_MASK;
394         struct guest_walker walker;
395         u64 *shadow_pte;
396         int fixed;
397         int write_pt = 0;
398         int r;
399
400         pgprintk("%s: addr %lx err %x\n", __FUNCTION__, addr, error_code);
401         kvm_mmu_audit(vcpu, "pre page fault");
402
403         r = mmu_topup_memory_caches(vcpu);
404         if (r)
405                 return r;
406
407         /*
408          * Look up the shadow pte for the faulting address.
409          */
410         r = FNAME(walk_addr)(&walker, vcpu, addr, write_fault, user_fault,
411                              fetch_fault);
412
413         /*
414          * The page is not mapped by the guest.  Let the guest handle it.
415          */
416         if (!r) {
417                 pgprintk("%s: guest page fault\n", __FUNCTION__);
418                 inject_page_fault(vcpu, addr, walker.error_code);
419                 FNAME(release_walker)(&walker);
420                 return 0;
421         }
422
423         shadow_pte = FNAME(fetch)(vcpu, addr, &walker);
424         pgprintk("%s: shadow pte %p %llx\n", __FUNCTION__,
425                  shadow_pte, *shadow_pte);
426
427         /*
428          * Update the shadow pte.
429          */
430         if (write_fault)
431                 fixed = FNAME(fix_write_pf)(vcpu, shadow_pte, &walker, addr,
432                                             user_fault, &write_pt);
433         else
434                 fixed = fix_read_pf(shadow_pte);
435
436         pgprintk("%s: updated shadow pte %p %llx\n", __FUNCTION__,
437                  shadow_pte, *shadow_pte);
438
439         FNAME(release_walker)(&walker);
440
441         /*
442          * mmio: emulate if accessible, otherwise its a guest fault.
443          */
444         if (is_io_pte(*shadow_pte))
445                 return 1;
446
447         ++kvm_stat.pf_fixed;
448         kvm_mmu_audit(vcpu, "post page fault (fixed)");
449
450         return write_pt;
451 }
452
453 static gpa_t FNAME(gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t vaddr)
454 {
455         struct guest_walker walker;
456         gpa_t gpa = UNMAPPED_GVA;
457         int r;
458
459         r = FNAME(walk_addr)(&walker, vcpu, vaddr, 0, 0, 0);
460
461         if (r) {
462                 gpa = (gpa_t)walker.gfn << PAGE_SHIFT;
463                 gpa |= vaddr & ~PAGE_MASK;
464         }
465
466         FNAME(release_walker)(&walker);
467         return gpa;
468 }
469
470 #undef pt_element_t
471 #undef guest_walker
472 #undef FNAME
473 #undef PT_BASE_ADDR_MASK
474 #undef PT_INDEX
475 #undef SHADOW_PT_INDEX
476 #undef PT_LEVEL_MASK
477 #undef PT_PTE_COPY_MASK
478 #undef PT_NON_PTE_COPY_MASK
479 #undef PT_DIR_BASE_ADDR_MASK
480 #undef PT_MAX_FULL_LEVELS