drivers/kvm/paging_tmpl.h

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * This module enables machines with Intel VT-x extensions to run virtual
   5  * machines without emulation or binary translation.
   6  *
   7  * MMU support
   8  *
   9  * Copyright (C) 2006 Qumranet, Inc.
  10  *
  11  * Authors:
  12  *   Yaniv Kamay  <yaniv@qumranet.com>
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *
  15  * This work is licensed under the terms of the GNU GPL, version 2.  See
  16  * the COPYING file in the top-level directory.
  17  *
  18  */
  19
  20 /*
  21  * We need the mmu code to access both 32-bit and 64-bit guest ptes,
  22  * so the code in this file is compiled twice, once per pte size.
  23  */
  24
  25 #if PTTYPE == 64
  26         #define pt_element_t u64
  27         #define guest_walker guest_walker64
  28         #define FNAME(name) paging##64_##name
  29         #define PT_BASE_ADDR_MASK PT64_BASE_ADDR_MASK
  30         #define PT_DIR_BASE_ADDR_MASK PT64_DIR_BASE_ADDR_MASK
  31         #define PT_INDEX(addr, level) PT64_INDEX(addr, level)
  32         #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
  33         #define PT_LEVEL_MASK(level) PT64_LEVEL_MASK(level)
  34         #define PT_PTE_COPY_MASK PT64_PTE_COPY_MASK
  35         #ifdef CONFIG_X86_64
  36         #define PT_MAX_FULL_LEVELS 4
  37         #else
  38         #define PT_MAX_FULL_LEVELS 2
  39         #endif
  40 #elif PTTYPE == 32
  41         #define pt_element_t u32
  42         #define guest_walker guest_walker32
  43         #define FNAME(name) paging##32_##name
  44         #define PT_BASE_ADDR_MASK PT32_BASE_ADDR_MASK
  45         #define PT_DIR_BASE_ADDR_MASK PT32_DIR_BASE_ADDR_MASK
  46         #define PT_INDEX(addr, level) PT32_INDEX(addr, level)
  47         #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
  48         #define PT_LEVEL_MASK(level) PT32_LEVEL_MASK(level)
  49         #define PT_PTE_COPY_MASK PT32_PTE_COPY_MASK
  50         #define PT_MAX_FULL_LEVELS 2
  51 #else
  52         #error Invalid PTTYPE value
  53 #endif
  54
  55 /*
  56  * The guest_walker structure emulates the behavior of the hardware page
  57  * table walker.
  58  */
  59 struct guest_walker {
  60         int level;
  61         gfn_t table_gfn[PT_MAX_FULL_LEVELS];
  62         pt_element_t *table;
  63         pt_element_t *ptep;
  64         pt_element_t inherited_ar;
  65         gfn_t gfn;
  66         u32 error_code;
  67 };
  68
  69 /*
  70  * Fetch a guest pte for a guest virtual address
  71  */
  72 static int FNAME(walk_addr)(struct guest_walker *walker,
  73                             struct kvm_vcpu *vcpu, gva_t addr,
  74                             int write_fault, int user_fault, int fetch_fault)
  75 {
  76         hpa_t hpa;
  77         struct kvm_memory_slot *slot;
  78         pt_element_t *ptep;
  79         pt_element_t root;
  80         gfn_t table_gfn;
  81
  82         pgprintk("%s: addr %lx\n", __FUNCTION__, addr);
  83         walker->level = vcpu->mmu.root_level;
  84         walker->table = NULL;
  85         root = vcpu->cr3;
  86 #if PTTYPE == 64
  87         if (!is_long_mode(vcpu)) {
  88                 walker->ptep = &vcpu->pdptrs[(addr >> 30) & 3];
  89                 root = *walker->ptep;
  90                 if (!(root & PT_PRESENT_MASK))
  91                         goto not_present;
  92                 --walker->level;
  93         }
  94 #endif
  95         table_gfn = (root & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  96         walker->table_gfn[walker->level - 1] = table_gfn;
  97         pgprintk("%s: table_gfn[%d] %lx\n", __FUNCTION__,
  98                  walker->level - 1, table_gfn);
  99         slot = gfn_to_memslot(vcpu->kvm, table_gfn);
 100         hpa = safe_gpa_to_hpa(vcpu, root & PT64_BASE_ADDR_MASK);
 101         walker->table = kmap_atomic(pfn_to_page(hpa >> PAGE_SHIFT), KM_USER0);
 102
 103         ASSERT((!is_long_mode(vcpu) && is_pae(vcpu)) ||
 104                (vcpu->cr3 & ~(PAGE_MASK | CR3_FLAGS_MASK)) == 0);
 105
 106         walker->inherited_ar = PT_USER_MASK | PT_WRITABLE_MASK;
 107
 108         for (;;) {
 109                 int index = PT_INDEX(addr, walker->level);
 110                 hpa_t paddr;
 111
 112                 ptep = &walker->table[index];
 113                 ASSERT(((unsigned long)walker->table & PAGE_MASK) ==
 114                        ((unsigned long)ptep & PAGE_MASK));
 115
 116                 if (!is_present_pte(*ptep))
 117                         goto not_present;
 118
 119                 if (write_fault && !is_writeble_pte(*ptep))
 120                         if (user_fault || is_write_protection(vcpu))
 121                                 goto access_error;
 122
 123                 if (user_fault && !(*ptep & PT_USER_MASK))
 124                         goto access_error;
 125
 126 #if PTTYPE == 64
 127                 if (fetch_fault && is_nx(vcpu) && (*ptep & PT64_NX_MASK))
 128                         goto access_error;
 129 #endif
 130
 131                 if (!(*ptep & PT_ACCESSED_MASK)) {
 132                         mark_page_dirty(vcpu->kvm, table_gfn);
 133                         *ptep |= PT_ACCESSED_MASK;
 134                 }
 135
 136                 if (walker->level == PT_PAGE_TABLE_LEVEL) {
 137                         walker->gfn = (*ptep & PT_BASE_ADDR_MASK)
 138                                 >> PAGE_SHIFT;
 139                         break;
 140                 }
 141
 142                 if (walker->level == PT_DIRECTORY_LEVEL
 143                     && (*ptep & PT_PAGE_SIZE_MASK)
 144                     && (PTTYPE == 64 || is_pse(vcpu))) {
 145                         walker->gfn = (*ptep & PT_DIR_BASE_ADDR_MASK)
 146                                 >> PAGE_SHIFT;
 147                         walker->gfn += PT_INDEX(addr, PT_PAGE_TABLE_LEVEL);
 148                         break;
 149                 }
 150
 151                 walker->inherited_ar &= walker->table[index];
 152                 table_gfn = (*ptep & PT_BASE_ADDR_MASK) >> PAGE_SHIFT;
 153                 paddr = safe_gpa_to_hpa(vcpu, *ptep & PT_BASE_ADDR_MASK);
 154                 kunmap_atomic(walker->table, KM_USER0);
 155                 walker->table = kmap_atomic(pfn_to_page(paddr >> PAGE_SHIFT),
 156                                             KM_USER0);
 157                 --walker->level;
 158                 walker->table_gfn[walker->level - 1 ] = table_gfn;
 159                 pgprintk("%s: table_gfn[%d] %lx\n", __FUNCTION__,
 160                          walker->level - 1, table_gfn);
 161         }
 162         walker->ptep = ptep;
 163         pgprintk("%s: pte %llx\n", __FUNCTION__, (u64)*ptep);
 164         return 1;
 165
 166 not_present:
 167         walker->error_code = 0;
 168         goto err;
 169
 170 access_error:
 171         walker->error_code = PFERR_PRESENT_MASK;
 172
 173 err:
 174         if (write_fault)
 175                 walker->error_code |= PFERR_WRITE_MASK;
 176         if (user_fault)
 177                 walker->error_code |= PFERR_USER_MASK;
 178         if (fetch_fault)
 179                 walker->error_code |= PFERR_FETCH_MASK;
 180         return 0;
 181 }
 182
 183 static void FNAME(release_walker)(struct guest_walker *walker)
 184 {
 185         if (walker->table)
 186                 kunmap_atomic(walker->table, KM_USER0);
 187 }
 188
 189 static void FNAME(mark_pagetable_dirty)(struct kvm *kvm,
 190                                         struct guest_walker *walker)
 191 {
 192         mark_page_dirty(kvm, walker->table_gfn[walker->level - 1]);
 193 }
 194
 195 static void FNAME(set_pte_common)(struct kvm_vcpu *vcpu,
 196                                   u64 *shadow_pte,
 197                                   gpa_t gaddr,
 198                                   pt_element_t *gpte,
 199                                   u64 access_bits,
 200                                   int user_fault,
 201                                   int write_fault,
 202                                   int *ptwrite,
 203                                   struct guest_walker *walker,
 204                                   gfn_t gfn)
 205 {
 206         hpa_t paddr;
 207         int dirty = *gpte & PT_DIRTY_MASK;
 208         u64 spte = *shadow_pte;
 209         int was_rmapped = is_rmap_pte(spte);
 210
 211         pgprintk("%s: spte %llx gpte %llx access %llx write_fault %d"
 212                  " user_fault %d gfn %lx\n",
 213                  __FUNCTION__, spte, (u64)*gpte, access_bits,
 214                  write_fault, user_fault, gfn);
 215
 216         if (write_fault && !dirty) {
 217                 *gpte |= PT_DIRTY_MASK;
 218                 dirty = 1;
 219                 FNAME(mark_pagetable_dirty)(vcpu->kvm, walker);
 220         }
 221
 222         spte |= *gpte & PT_PTE_COPY_MASK;
 223         spte |= access_bits << PT_SHADOW_BITS_OFFSET;
 224         if (!dirty)
 225                 access_bits &= ~PT_WRITABLE_MASK;
 226
 227         paddr = gpa_to_hpa(vcpu, gaddr & PT64_BASE_ADDR_MASK);
 228
 229         spte |= PT_PRESENT_MASK;
 230         if (access_bits & PT_USER_MASK)
 231                 spte |= PT_USER_MASK;
 232
 233         if (is_error_hpa(paddr)) {
 234                 spte |= gaddr;
 235                 spte |= PT_SHADOW_IO_MARK;
 236                 spte &= ~PT_PRESENT_MASK;
 237                 set_shadow_pte(shadow_pte, spte);
 238                 return;
 239         }
 240
 241         spte |= paddr;
 242
 243         if ((access_bits & PT_WRITABLE_MASK)
 244             || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
 245                 struct kvm_mmu_page *shadow;
 246
 247                 spte |= PT_WRITABLE_MASK;
 248                 if (user_fault) {
 249                         mmu_unshadow(vcpu, gfn);
 250                         goto unshadowed;
 251                 }
 252
 253                 shadow = kvm_mmu_lookup_page(vcpu, gfn);
 254                 if (shadow) {
 255                         pgprintk("%s: found shadow page for %lx, marking ro\n",
 256                                  __FUNCTION__, gfn);
 257                         access_bits &= ~PT_WRITABLE_MASK;
 258                         if (is_writeble_pte(spte)) {
 259                                 spte &= ~PT_WRITABLE_MASK;
 260                                 kvm_arch_ops->tlb_flush(vcpu);
 261                         }
 262                         if (write_fault)
 263                                 *ptwrite = 1;
 264                 }
 265         }
 266
 267 unshadowed:
 268
 269         if (access_bits & PT_WRITABLE_MASK)
 270                 mark_page_dirty(vcpu->kvm, gaddr >> PAGE_SHIFT);
 271
 272         set_shadow_pte(shadow_pte, spte);
 273         page_header_update_slot(vcpu->kvm, shadow_pte, gaddr);
 274         if (!was_rmapped)
 275                 rmap_add(vcpu, shadow_pte);
 276 }
 277
 278 static void FNAME(set_pte)(struct kvm_vcpu *vcpu, pt_element_t *gpte,
 279                            u64 *shadow_pte, u64 access_bits,
 280                            int user_fault, int write_fault, int *ptwrite,
 281                            struct guest_walker *walker, gfn_t gfn)
 282 {
 283         access_bits &= *gpte;
 284         FNAME(set_pte_common)(vcpu, shadow_pte, *gpte & PT_BASE_ADDR_MASK,
 285                               gpte, access_bits, user_fault, write_fault,
 286                               ptwrite, walker, gfn);
 287 }
 288
 289 static void FNAME(update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *page,
 290                               u64 *spte, const void *pte, int bytes)
 291 {
 292         pt_element_t gpte;
 293
 294         if (bytes < sizeof(pt_element_t))
 295                 return;
 296         gpte = *(const pt_element_t *)pte;
 297         if (~gpte & (PT_PRESENT_MASK | PT_ACCESSED_MASK))
 298                 return;
 299         pgprintk("%s: gpte %llx spte %p\n", __FUNCTION__, (u64)gpte, spte);
 300         FNAME(set_pte)(vcpu, &gpte, spte, PT_USER_MASK | PT_WRITABLE_MASK, 0,
 301                        0, NULL, NULL,
 302                        (gpte & PT_BASE_ADDR_MASK) >> PAGE_SHIFT);
 303 }
 304
 305 static void FNAME(set_pde)(struct kvm_vcpu *vcpu, pt_element_t *gpde,
 306                            u64 *shadow_pte, u64 access_bits,
 307                            int user_fault, int write_fault, int *ptwrite,
 308                            struct guest_walker *walker, gfn_t gfn)
 309 {
 310         gpa_t gaddr;
 311
 312         access_bits &= *gpde;
 313         gaddr = (gpa_t)gfn << PAGE_SHIFT;
 314         if (PTTYPE == 32 && is_cpuid_PSE36())
 315                 gaddr |= (*gpde & PT32_DIR_PSE36_MASK) <<
 316                         (32 - PT32_DIR_PSE36_SHIFT);
 317         FNAME(set_pte_common)(vcpu, shadow_pte, gaddr,
 318                               gpde, access_bits, user_fault, write_fault,
 319                               ptwrite, walker, gfn);
 320 }
 321
 322 /*
 323  * Fetch a shadow pte for a specific level in the paging hierarchy.
 324  */
 325 static u64 *FNAME(fetch)(struct kvm_vcpu *vcpu, gva_t addr,
 326                          struct guest_walker *walker,
 327                          int user_fault, int write_fault, int *ptwrite)
 328 {
 329         hpa_t shadow_addr;
 330         int level;
 331         u64 *shadow_ent;
 332         u64 *prev_shadow_ent = NULL;
 333         pt_element_t *guest_ent = walker->ptep;
 334
 335         if (!is_present_pte(*guest_ent))
 336                 return NULL;
 337
 338         shadow_addr = vcpu->mmu.root_hpa;
 339         level = vcpu->mmu.shadow_root_level;
 340         if (level == PT32E_ROOT_LEVEL) {
 341                 shadow_addr = vcpu->mmu.pae_root[(addr >> 30) & 3];
 342                 shadow_addr &= PT64_BASE_ADDR_MASK;
 343                 --level;
 344         }
 345
 346         for (; ; level--) {
 347                 u32 index = SHADOW_PT_INDEX(addr, level);
 348                 struct kvm_mmu_page *shadow_page;
 349                 u64 shadow_pte;
 350                 int metaphysical;
 351                 gfn_t table_gfn;
 352                 unsigned hugepage_access = 0;
 353
 354                 shadow_ent = ((u64 *)__va(shadow_addr)) + index;
 355                 if (is_present_pte(*shadow_ent) || is_io_pte(*shadow_ent)) {
 356                         if (level == PT_PAGE_TABLE_LEVEL)
 357                                 break;
 358                         shadow_addr = *shadow_ent & PT64_BASE_ADDR_MASK;
 359                         prev_shadow_ent = shadow_ent;
 360                         continue;
 361                 }
 362
 363                 if (level == PT_PAGE_TABLE_LEVEL)
 364                         break;
 365
 366                 if (level - 1 == PT_PAGE_TABLE_LEVEL
 367                     && walker->level == PT_DIRECTORY_LEVEL) {
 368                         metaphysical = 1;
 369                         hugepage_access = *guest_ent;
 370                         hugepage_access &= PT_USER_MASK | PT_WRITABLE_MASK;
 371                         hugepage_access >>= PT_WRITABLE_SHIFT;
 372                         table_gfn = (*guest_ent & PT_BASE_ADDR_MASK)
 373                                 >> PAGE_SHIFT;
 374                 } else {
 375                         metaphysical = 0;
 376                         table_gfn = walker->table_gfn[level - 2];
 377                 }
 378                 shadow_page = kvm_mmu_get_page(vcpu, table_gfn, addr, level-1,
 379                                                metaphysical, hugepage_access,
 380                                                shadow_ent);
 381                 shadow_addr = __pa(shadow_page->spt);
 382                 shadow_pte = shadow_addr | PT_PRESENT_MASK | PT_ACCESSED_MASK
 383                         | PT_WRITABLE_MASK | PT_USER_MASK;
 384                 *shadow_ent = shadow_pte;
 385                 prev_shadow_ent = shadow_ent;
 386         }
 387
 388         if (walker->level == PT_DIRECTORY_LEVEL) {
 389                 if (prev_shadow_ent)
 390                         *prev_shadow_ent |= PT_SHADOW_PS_MARK;
 391                 FNAME(set_pde)(vcpu, guest_ent, shadow_ent,
 392                                walker->inherited_ar, user_fault, write_fault,
 393                                ptwrite, walker, walker->gfn);
 394         } else {
 395                 ASSERT(walker->level == PT_PAGE_TABLE_LEVEL);
 396                 FNAME(set_pte)(vcpu, guest_ent, shadow_ent,
 397                                walker->inherited_ar, user_fault, write_fault,
 398                                ptwrite, walker, walker->gfn);
 399         }
 400         return shadow_ent;
 401 }
 402
 403 /*
 404  * Page fault handler.  There are several causes for a page fault:
 405  *   - there is no shadow pte for the guest pte
 406  *   - write access through a shadow pte marked read only so that we can set
 407  *     the dirty bit
 408  *   - write access to a shadow pte marked read only so we can update the page
 409  *     dirty bitmap, when userspace requests it
 410  *   - mmio access; in this case we will never install a present shadow pte
 411  *   - normal guest page fault due to the guest pte marked not present, not
 412  *     writable, or not executable
 413  *
 414  *  Returns: 1 if we need to emulate the instruction, 0 otherwise, or
 415  *           a negative value on error.
 416  */
 417 static int FNAME(page_fault)(struct kvm_vcpu *vcpu, gva_t addr,
 418                                u32 error_code)
 419 {
 420         int write_fault = error_code & PFERR_WRITE_MASK;
 421         int user_fault = error_code & PFERR_USER_MASK;
 422         int fetch_fault = error_code & PFERR_FETCH_MASK;
 423         struct guest_walker walker;
 424         u64 *shadow_pte;
 425         int write_pt = 0;
 426         int r;
 427
 428         pgprintk("%s: addr %lx err %x\n", __FUNCTION__, addr, error_code);
 429         kvm_mmu_audit(vcpu, "pre page fault");
 430
 431         r = mmu_topup_memory_caches(vcpu);
 432         if (r)
 433                 return r;
 434
 435         /*
 436          * Look up the shadow pte for the faulting address.
 437          */
 438         r = FNAME(walk_addr)(&walker, vcpu, addr, write_fault, user_fault,
 439                              fetch_fault);
 440
 441         /*
 442          * The page is not mapped by the guest.  Let the guest handle it.
 443          */
 444         if (!r) {
 445                 pgprintk("%s: guest page fault\n", __FUNCTION__);
 446                 inject_page_fault(vcpu, addr, walker.error_code);
 447                 FNAME(release_walker)(&walker);
 448                 vcpu->last_pt_write_count = 0; /* reset fork detector */
 449                 return 0;
 450         }
 451
 452         shadow_pte = FNAME(fetch)(vcpu, addr, &walker, user_fault, write_fault,
 453                                   &write_pt);
 454         pgprintk("%s: shadow pte %p %llx ptwrite %d\n", __FUNCTION__,
 455                  shadow_pte, *shadow_pte, write_pt);
 456
 457         FNAME(release_walker)(&walker);
 458
 459         if (!write_pt)
 460                 vcpu->last_pt_write_count = 0; /* reset fork detector */
 461
 462         /*
 463          * mmio: emulate if accessible, otherwise its a guest fault.
 464          */
 465         if (is_io_pte(*shadow_pte))
 466                 return 1;
 467
 468         ++vcpu->stat.pf_fixed;
 469         kvm_mmu_audit(vcpu, "post page fault (fixed)");
 470
 471         return write_pt;
 472 }
 473
 474 static gpa_t FNAME(gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t vaddr)
 475 {
 476         struct guest_walker walker;
 477         gpa_t gpa = UNMAPPED_GVA;
 478         int r;
 479
 480         r = FNAME(walk_addr)(&walker, vcpu, vaddr, 0, 0, 0);
 481
 482         if (r) {
 483                 gpa = (gpa_t)walker.gfn << PAGE_SHIFT;
 484                 gpa |= vaddr & ~PAGE_MASK;
 485         }
 486
 487         FNAME(release_walker)(&walker);
 488         return gpa;
 489 }
 490
 491 #undef pt_element_t
 492 #undef guest_walker
 493 #undef FNAME
 494 #undef PT_BASE_ADDR_MASK
 495 #undef PT_INDEX
 496 #undef SHADOW_PT_INDEX
 497 #undef PT_LEVEL_MASK
 498 #undef PT_PTE_COPY_MASK
 499 #undef PT_NON_PTE_COPY_MASK
 500 #undef PT_DIR_BASE_ADDR_MASK
 501 #undef PT_MAX_FULL_LEVELS