2 * i8042 keyboard and mouse controller driver for Linux
4 * Copyright (c) 1999-2004 Vojtech Pavlik
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published by
10 * the Free Software Foundation.
13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15 #include <linux/types.h>
16 #include <linux/delay.h>
17 #include <linux/module.h>
18 #include <linux/interrupt.h>
19 #include <linux/ioport.h>
20 #include <linux/init.h>
21 #include <linux/serio.h>
22 #include <linux/err.h>
23 #include <linux/rcupdate.h>
24 #include <linux/platform_device.h>
25 #include <linux/i8042.h>
26 #include <linux/slab.h>
30 MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
31 MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
32 MODULE_LICENSE("GPL");
34 static bool i8042_nokbd;
35 module_param_named(nokbd, i8042_nokbd, bool, 0);
36 MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port.");
38 static bool i8042_noaux;
39 module_param_named(noaux, i8042_noaux, bool, 0);
40 MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port.");
42 static bool i8042_nomux;
43 module_param_named(nomux, i8042_nomux, bool, 0);
44 MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing controller is present.");
46 static bool i8042_unlock;
47 module_param_named(unlock, i8042_unlock, bool, 0);
48 MODULE_PARM_DESC(unlock, "Ignore keyboard lock.");
50 static bool i8042_reset;
51 module_param_named(reset, i8042_reset, bool, 0);
52 MODULE_PARM_DESC(reset, "Reset controller during init and cleanup.");
54 static bool i8042_direct;
55 module_param_named(direct, i8042_direct, bool, 0);
56 MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode.");
58 static bool i8042_dumbkbd;
59 module_param_named(dumbkbd, i8042_dumbkbd, bool, 0);
60 MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard");
62 static bool i8042_noloop;
63 module_param_named(noloop, i8042_noloop, bool, 0);
64 MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port");
66 static bool i8042_notimeout;
67 module_param_named(notimeout, i8042_notimeout, bool, 0);
68 MODULE_PARM_DESC(notimeout, "Ignore timeouts signalled by i8042");
70 static bool i8042_kbdreset;
71 module_param_named(kbdreset, i8042_kbdreset, bool, 0);
72 MODULE_PARM_DESC(kbdreset, "Reset device connected to KBD port");
75 static bool i8042_dritek;
76 module_param_named(dritek, i8042_dritek, bool, 0);
77 MODULE_PARM_DESC(dritek, "Force enable the Dritek keyboard extension");
81 static bool i8042_nopnp;
82 module_param_named(nopnp, i8042_nopnp, bool, 0);
83 MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings");
88 static bool i8042_debug;
89 module_param_named(debug, i8042_debug, bool, 0600);
90 MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off");
93 static bool i8042_bypass_aux_irq_test;
98 * i8042_lock protects serialization between i8042_command and
99 * the interrupt handler.
101 static DEFINE_SPINLOCK(i8042_lock);
104 * Writers to AUX and KBD ports as well as users issuing i8042_command
105 * directly should acquire i8042_mutex (by means of calling
106 * i8042_lock_chip() and i8042_unlock_ship() helpers) to ensure that
107 * they do not disturb each other (unfortunately in many i8042
108 * implementations write to one of the ports will immediately abort
109 * command that is being processed by another port).
111 static DEFINE_MUTEX(i8042_mutex);
120 #define I8042_KBD_PORT_NO 0
121 #define I8042_AUX_PORT_NO 1
122 #define I8042_MUX_PORT_NO 2
123 #define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2)
125 static struct i8042_port i8042_ports[I8042_NUM_PORTS];
127 static unsigned char i8042_initial_ctr;
128 static unsigned char i8042_ctr;
129 static bool i8042_mux_present;
130 static bool i8042_kbd_irq_registered;
131 static bool i8042_aux_irq_registered;
132 static unsigned char i8042_suppress_kbd_ack;
133 static struct platform_device *i8042_platform_device;
135 static irqreturn_t i8042_interrupt(int irq, void *dev_id);
136 static bool (*i8042_platform_filter)(unsigned char data, unsigned char str,
137 struct serio *serio);
139 void i8042_lock_chip(void)
141 mutex_lock(&i8042_mutex);
143 EXPORT_SYMBOL(i8042_lock_chip);
145 void i8042_unlock_chip(void)
147 mutex_unlock(&i8042_mutex);
149 EXPORT_SYMBOL(i8042_unlock_chip);
151 int i8042_install_filter(bool (*filter)(unsigned char data, unsigned char str,
152 struct serio *serio))
157 spin_lock_irqsave(&i8042_lock, flags);
159 if (i8042_platform_filter) {
164 i8042_platform_filter = filter;
167 spin_unlock_irqrestore(&i8042_lock, flags);
170 EXPORT_SYMBOL(i8042_install_filter);
172 int i8042_remove_filter(bool (*filter)(unsigned char data, unsigned char str,
178 spin_lock_irqsave(&i8042_lock, flags);
180 if (i8042_platform_filter != filter) {
185 i8042_platform_filter = NULL;
188 spin_unlock_irqrestore(&i8042_lock, flags);
191 EXPORT_SYMBOL(i8042_remove_filter);
194 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
195 * be ready for reading values from it / writing values to it.
196 * Called always with i8042_lock held.
199 static int i8042_wait_read(void)
203 while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) {
207 return -(i == I8042_CTL_TIMEOUT);
210 static int i8042_wait_write(void)
214 while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) {
218 return -(i == I8042_CTL_TIMEOUT);
222 * i8042_flush() flushes all data that may be in the keyboard and mouse buffers
223 * of the i8042 down the toilet.
226 static int i8042_flush(void)
229 unsigned char data, str;
232 spin_lock_irqsave(&i8042_lock, flags);
234 while (((str = i8042_read_status()) & I8042_STR_OBF) && (i < I8042_BUFFER_SIZE)) {
236 data = i8042_read_data();
238 dbg("%02x <- i8042 (flush, %s)\n",
239 data, str & I8042_STR_AUXDATA ? "aux" : "kbd");
242 spin_unlock_irqrestore(&i8042_lock, flags);
248 * i8042_command() executes a command on the i8042. It also sends the input
249 * parameter(s) of the commands to it, and receives the output value(s). The
250 * parameters are to be stored in the param array, and the output is placed
251 * into the same array. The number of the parameters and output values is
252 * encoded in bits 8-11 of the command number.
255 static int __i8042_command(unsigned char *param, int command)
259 if (i8042_noloop && command == I8042_CMD_AUX_LOOP)
262 error = i8042_wait_write();
266 dbg("%02x -> i8042 (command)\n", command & 0xff);
267 i8042_write_command(command & 0xff);
269 for (i = 0; i < ((command >> 12) & 0xf); i++) {
270 error = i8042_wait_write();
273 dbg("%02x -> i8042 (parameter)\n", param[i]);
274 i8042_write_data(param[i]);
277 for (i = 0; i < ((command >> 8) & 0xf); i++) {
278 error = i8042_wait_read();
280 dbg(" -- i8042 (timeout)\n");
284 if (command == I8042_CMD_AUX_LOOP &&
285 !(i8042_read_status() & I8042_STR_AUXDATA)) {
286 dbg(" -- i8042 (auxerr)\n");
290 param[i] = i8042_read_data();
291 dbg("%02x <- i8042 (return)\n", param[i]);
297 int i8042_command(unsigned char *param, int command)
302 spin_lock_irqsave(&i8042_lock, flags);
303 retval = __i8042_command(param, command);
304 spin_unlock_irqrestore(&i8042_lock, flags);
308 EXPORT_SYMBOL(i8042_command);
311 * i8042_kbd_write() sends a byte out through the keyboard interface.
314 static int i8042_kbd_write(struct serio *port, unsigned char c)
319 spin_lock_irqsave(&i8042_lock, flags);
321 if (!(retval = i8042_wait_write())) {
322 dbg("%02x -> i8042 (kbd-data)\n", c);
326 spin_unlock_irqrestore(&i8042_lock, flags);
332 * i8042_aux_write() sends a byte out through the aux interface.
335 static int i8042_aux_write(struct serio *serio, unsigned char c)
337 struct i8042_port *port = serio->port_data;
339 return i8042_command(&c, port->mux == -1 ?
341 I8042_CMD_MUX_SEND + port->mux);
346 * i8042_aux_close attempts to clear AUX or KBD port state by disabling
347 * and then re-enabling it.
350 static void i8042_port_close(struct serio *serio)
354 const char *port_name;
356 if (serio == i8042_ports[I8042_AUX_PORT_NO].serio) {
357 irq_bit = I8042_CTR_AUXINT;
358 disable_bit = I8042_CTR_AUXDIS;
361 irq_bit = I8042_CTR_KBDINT;
362 disable_bit = I8042_CTR_KBDDIS;
366 i8042_ctr &= ~irq_bit;
367 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
368 pr_warn("Can't write CTR while closing %s port\n", port_name);
372 i8042_ctr &= ~disable_bit;
373 i8042_ctr |= irq_bit;
374 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
375 pr_err("Can't reactivate %s port\n", port_name);
378 * See if there is any data appeared while we were messing with
381 i8042_interrupt(0, NULL);
385 * i8042_start() is called by serio core when port is about to finish
386 * registering. It will mark port as existing so i8042_interrupt can
387 * start sending data through it.
389 static int i8042_start(struct serio *serio)
391 struct i8042_port *port = serio->port_data;
393 spin_lock_irq(&i8042_lock);
395 spin_unlock_irq(&i8042_lock);
401 * i8042_stop() marks serio port as non-existing so i8042_interrupt
402 * will not try to send data to the port that is about to go away.
403 * The function is called by serio core as part of unregister procedure.
405 static void i8042_stop(struct serio *serio)
407 struct i8042_port *port = serio->port_data;
409 spin_lock_irq(&i8042_lock);
410 port->exists = false;
412 spin_unlock_irq(&i8042_lock);
415 * We need to make sure that interrupt handler finishes using
416 * our serio port before we return from this function.
417 * We synchronize with both AUX and KBD IRQs because there is
418 * a (very unlikely) chance that AUX IRQ is raised for KBD port
421 synchronize_irq(I8042_AUX_IRQ);
422 synchronize_irq(I8042_KBD_IRQ);
426 * i8042_filter() filters out unwanted bytes from the input data stream.
427 * It is called from i8042_interrupt and thus is running with interrupts
428 * off and i8042_lock held.
430 static bool i8042_filter(unsigned char data, unsigned char str,
433 if (unlikely(i8042_suppress_kbd_ack)) {
434 if ((~str & I8042_STR_AUXDATA) &&
435 (data == 0xfa || data == 0xfe)) {
436 i8042_suppress_kbd_ack--;
437 dbg("Extra keyboard ACK - filtered out\n");
442 if (i8042_platform_filter && i8042_platform_filter(data, str, serio)) {
443 dbg("Filtered out by platform filter\n");
451 * i8042_interrupt() is the most important function in this driver -
452 * it handles the interrupts from the i8042, and sends incoming bytes
453 * to the upper layers.
456 static irqreturn_t i8042_interrupt(int irq, void *dev_id)
458 struct i8042_port *port;
461 unsigned char str, data;
463 unsigned int port_no;
467 spin_lock_irqsave(&i8042_lock, flags);
469 str = i8042_read_status();
470 if (unlikely(~str & I8042_STR_OBF)) {
471 spin_unlock_irqrestore(&i8042_lock, flags);
473 dbg("Interrupt %d, without any data\n", irq);
478 data = i8042_read_data();
480 if (i8042_mux_present && (str & I8042_STR_AUXDATA)) {
481 static unsigned long last_transmit;
482 static unsigned char last_str;
485 if (str & I8042_STR_MUXERR) {
486 dbg("MUX error, status is %02x, data is %02x\n",
489 * When MUXERR condition is signalled the data register can only contain
490 * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
491 * it is not always the case. Some KBCs also report 0xfc when there is
492 * nothing connected to the port while others sometimes get confused which
493 * port the data came from and signal error leaving the data intact. They
494 * _do not_ revert to legacy mode (actually I've never seen KBC reverting
495 * to legacy mode yet, when we see one we'll add proper handling).
496 * Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the
497 * rest assume that the data came from the same serio last byte
498 * was transmitted (if transmission happened not too long ago).
503 if (time_before(jiffies, last_transmit + HZ/10)) {
507 /* fall through - report timeout */
510 case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break;
511 case 0xff: dfl = SERIO_PARITY; data = 0xfe; break;
515 port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3);
517 last_transmit = jiffies;
520 dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) |
521 ((str & I8042_STR_TIMEOUT && !i8042_notimeout) ? SERIO_TIMEOUT : 0);
523 port_no = (str & I8042_STR_AUXDATA) ?
524 I8042_AUX_PORT_NO : I8042_KBD_PORT_NO;
527 port = &i8042_ports[port_no];
528 serio = port->exists ? port->serio : NULL;
530 dbg("%02x <- i8042 (interrupt, %d, %d%s%s)\n",
532 dfl & SERIO_PARITY ? ", bad parity" : "",
533 dfl & SERIO_TIMEOUT ? ", timeout" : "");
535 filtered = i8042_filter(data, str, serio);
537 spin_unlock_irqrestore(&i8042_lock, flags);
539 if (likely(serio && !filtered))
540 serio_interrupt(serio, data, dfl);
543 return IRQ_RETVAL(ret);
547 * i8042_enable_kbd_port enables keyboard port on chip
550 static int i8042_enable_kbd_port(void)
552 i8042_ctr &= ~I8042_CTR_KBDDIS;
553 i8042_ctr |= I8042_CTR_KBDINT;
555 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
556 i8042_ctr &= ~I8042_CTR_KBDINT;
557 i8042_ctr |= I8042_CTR_KBDDIS;
558 pr_err("Failed to enable KBD port\n");
566 * i8042_enable_aux_port enables AUX (mouse) port on chip
569 static int i8042_enable_aux_port(void)
571 i8042_ctr &= ~I8042_CTR_AUXDIS;
572 i8042_ctr |= I8042_CTR_AUXINT;
574 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
575 i8042_ctr &= ~I8042_CTR_AUXINT;
576 i8042_ctr |= I8042_CTR_AUXDIS;
577 pr_err("Failed to enable AUX port\n");
585 * i8042_enable_mux_ports enables 4 individual AUX ports after
586 * the controller has been switched into Multiplexed mode
589 static int i8042_enable_mux_ports(void)
594 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
595 i8042_command(¶m, I8042_CMD_MUX_PFX + i);
596 i8042_command(¶m, I8042_CMD_AUX_ENABLE);
599 return i8042_enable_aux_port();
603 * i8042_set_mux_mode checks whether the controller has an
604 * active multiplexor and puts the chip into Multiplexed (true)
605 * or Legacy (false) mode.
608 static int i8042_set_mux_mode(bool multiplex, unsigned char *mux_version)
611 unsigned char param, val;
613 * Get rid of bytes in the queue.
619 * Internal loopback test - send three bytes, they should come back from the
620 * mouse interface, the last should be version.
624 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != val)
626 param = val = multiplex ? 0x56 : 0xf6;
627 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != val)
629 param = val = multiplex ? 0xa4 : 0xa5;
630 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param == val)
634 * Workaround for interference with USB Legacy emulation
635 * that causes a v10.12 MUX to be found.
641 *mux_version = param;
647 * i8042_check_mux() checks whether the controller supports the PS/2 Active
648 * Multiplexing specification by Synaptics, Phoenix, Insyde and
652 static int __init i8042_check_mux(void)
654 unsigned char mux_version;
656 if (i8042_set_mux_mode(true, &mux_version))
659 pr_info("Detected active multiplexing controller, rev %d.%d\n",
660 (mux_version >> 4) & 0xf, mux_version & 0xf);
663 * Disable all muxed ports by disabling AUX.
665 i8042_ctr |= I8042_CTR_AUXDIS;
666 i8042_ctr &= ~I8042_CTR_AUXINT;
668 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
669 pr_err("Failed to disable AUX port, can't use MUX\n");
673 i8042_mux_present = true;
679 * The following is used to test AUX IRQ delivery.
681 static struct completion i8042_aux_irq_delivered __initdata;
682 static bool i8042_irq_being_tested __initdata;
684 static irqreturn_t __init i8042_aux_test_irq(int irq, void *dev_id)
687 unsigned char str, data;
690 spin_lock_irqsave(&i8042_lock, flags);
691 str = i8042_read_status();
692 if (str & I8042_STR_OBF) {
693 data = i8042_read_data();
694 dbg("%02x <- i8042 (aux_test_irq, %s)\n",
695 data, str & I8042_STR_AUXDATA ? "aux" : "kbd");
696 if (i8042_irq_being_tested &&
697 data == 0xa5 && (str & I8042_STR_AUXDATA))
698 complete(&i8042_aux_irq_delivered);
701 spin_unlock_irqrestore(&i8042_lock, flags);
703 return IRQ_RETVAL(ret);
707 * i8042_toggle_aux - enables or disables AUX port on i8042 via command and
708 * verifies success by readinng CTR. Used when testing for presence of AUX
711 static int __init i8042_toggle_aux(bool on)
716 if (i8042_command(¶m,
717 on ? I8042_CMD_AUX_ENABLE : I8042_CMD_AUX_DISABLE))
720 /* some chips need some time to set the I8042_CTR_AUXDIS bit */
721 for (i = 0; i < 100; i++) {
724 if (i8042_command(¶m, I8042_CMD_CTL_RCTR))
727 if (!(param & I8042_CTR_AUXDIS) == on)
735 * i8042_check_aux() applies as much paranoia as it can at detecting
736 * the presence of an AUX interface.
739 static int __init i8042_check_aux(void)
742 bool irq_registered = false;
743 bool aux_loop_broken = false;
748 * Get rid of bytes in the queue.
754 * Internal loopback test - filters out AT-type i8042's. Unfortunately
755 * SiS screwed up and their 5597 doesn't support the LOOP command even
756 * though it has an AUX port.
760 retval = i8042_command(¶m, I8042_CMD_AUX_LOOP);
761 if (retval || param != 0x5a) {
764 * External connection test - filters out AT-soldered PS/2 i8042's
765 * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
766 * 0xfa - no error on some notebooks which ignore the spec
767 * Because it's common for chipsets to return error on perfectly functioning
768 * AUX ports, we test for this only when the LOOP command failed.
771 if (i8042_command(¶m, I8042_CMD_AUX_TEST) ||
772 (param && param != 0xfa && param != 0xff))
776 * If AUX_LOOP completed without error but returned unexpected data
780 aux_loop_broken = true;
784 * Bit assignment test - filters out PS/2 i8042's in AT mode
787 if (i8042_toggle_aux(false)) {
788 pr_warn("Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
789 pr_warn("If AUX port is really absent please use the 'i8042.noaux' option\n");
792 if (i8042_toggle_aux(true))
796 * Reset keyboard (needed on some laptops to successfully detect
797 * touchpad, e.g., some Gigabyte laptop models with Elantech
800 if (i8042_kbdreset) {
801 pr_warn("Attempting to reset device connected to KBD port\n");
802 i8042_kbd_write(NULL, (unsigned char) 0xff);
806 * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and
807 * used it for a PCI card or somethig else.
810 if (i8042_noloop || i8042_bypass_aux_irq_test || aux_loop_broken) {
812 * Without LOOP command we can't test AUX IRQ delivery. Assume the port
813 * is working and hope we are right.
819 if (request_irq(I8042_AUX_IRQ, i8042_aux_test_irq, IRQF_SHARED,
820 "i8042", i8042_platform_device))
823 irq_registered = true;
825 if (i8042_enable_aux_port())
828 spin_lock_irqsave(&i8042_lock, flags);
830 init_completion(&i8042_aux_irq_delivered);
831 i8042_irq_being_tested = true;
834 retval = __i8042_command(¶m, I8042_CMD_AUX_LOOP & 0xf0ff);
836 spin_unlock_irqrestore(&i8042_lock, flags);
841 if (wait_for_completion_timeout(&i8042_aux_irq_delivered,
842 msecs_to_jiffies(250)) == 0) {
844 * AUX IRQ was never delivered so we need to flush the controller to
845 * get rid of the byte we put there; otherwise keyboard may not work.
847 dbg(" -- i8042 (aux irq test timeout)\n");
855 * Disable the interface.
858 i8042_ctr |= I8042_CTR_AUXDIS;
859 i8042_ctr &= ~I8042_CTR_AUXINT;
861 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
865 free_irq(I8042_AUX_IRQ, i8042_platform_device);
870 static int i8042_controller_check(void)
872 if (i8042_flush() == I8042_BUFFER_SIZE) {
873 pr_err("No controller found\n");
880 static int i8042_controller_selftest(void)
886 * We try this 5 times; on some really fragile systems this does not
887 * take the first time...
891 if (i8042_command(¶m, I8042_CMD_CTL_TEST)) {
892 pr_err("i8042 controller selftest timeout\n");
896 if (param == I8042_RET_CTL_TEST)
899 dbg("i8042 controller selftest: %#x != %#x\n",
900 param, I8042_RET_CTL_TEST);
906 * On x86, we don't fail entire i8042 initialization if controller
907 * reset fails in hopes that keyboard port will still be functional
908 * and user will still get a working keyboard. This is especially
909 * important on netbooks. On other arches we trust hardware more.
911 pr_info("giving up on controller selftest, continuing anyway...\n");
914 pr_err("i8042 controller selftest failed\n");
920 * i8042_controller init initializes the i8042 controller, and,
921 * most importantly, sets it into non-xlated mode if that's
925 static int i8042_controller_init(void)
929 unsigned char ctr[2];
932 * Save the CTR for restore on unload / reboot.
937 pr_err("Unable to get stable CTR read\n");
944 if (i8042_command(&ctr[n++ % 2], I8042_CMD_CTL_RCTR)) {
945 pr_err("Can't read CTR while initializing i8042\n");
949 } while (n < 2 || ctr[0] != ctr[1]);
951 i8042_initial_ctr = i8042_ctr = ctr[0];
954 * Disable the keyboard interface and interrupt.
957 i8042_ctr |= I8042_CTR_KBDDIS;
958 i8042_ctr &= ~I8042_CTR_KBDINT;
964 spin_lock_irqsave(&i8042_lock, flags);
965 if (~i8042_read_status() & I8042_STR_KEYLOCK) {
967 i8042_ctr |= I8042_CTR_IGNKEYLOCK;
969 pr_warn("Warning: Keylock active\n");
971 spin_unlock_irqrestore(&i8042_lock, flags);
974 * If the chip is configured into nontranslated mode by the BIOS, don't
975 * bother enabling translating and be happy.
978 if (~i8042_ctr & I8042_CTR_XLATE)
982 * Set nontranslated mode for the kbd interface if requested by an option.
983 * After this the kbd interface becomes a simple serial in/out, like the aux
984 * interface is. We don't do this by default, since it can confuse notebook
989 i8042_ctr &= ~I8042_CTR_XLATE;
995 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
996 pr_err("Can't write CTR while initializing i8042\n");
1001 * Flush whatever accumulated while we were disabling keyboard port.
1011 * Reset the controller and reset CRT to the original value set by BIOS.
1014 static void i8042_controller_reset(bool force_reset)
1019 * Disable both KBD and AUX interfaces so they don't get in the way
1022 i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS;
1023 i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT);
1025 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
1026 pr_warn("Can't write CTR while resetting\n");
1029 * Disable MUX mode if present.
1032 if (i8042_mux_present)
1033 i8042_set_mux_mode(false, NULL);
1036 * Reset the controller if requested.
1039 if (i8042_reset || force_reset)
1040 i8042_controller_selftest();
1043 * Restore the original control register setting.
1046 if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR))
1047 pr_warn("Can't restore CTR\n");
1052 * i8042_panic_blink() will turn the keyboard LEDs on or off and is called
1053 * when kernel panics. Flashing LEDs is useful for users running X who may
1054 * not see the console and will help distingushing panics from "real"
1057 * Note that DELAY has a limit of 10ms so we will not get stuck here
1058 * waiting for KBC to free up even if KBD interrupt is off
1061 #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
1063 static long i8042_panic_blink(int state)
1068 led = (state) ? 0x01 | 0x04 : 0;
1069 while (i8042_read_status() & I8042_STR_IBF)
1071 dbg("%02x -> i8042 (panic blink)\n", 0xed);
1072 i8042_suppress_kbd_ack = 2;
1073 i8042_write_data(0xed); /* set leds */
1075 while (i8042_read_status() & I8042_STR_IBF)
1078 dbg("%02x -> i8042 (panic blink)\n", led);
1079 i8042_write_data(led);
1087 static void i8042_dritek_enable(void)
1089 unsigned char param = 0x90;
1092 error = i8042_command(¶m, 0x1059);
1094 pr_warn("Failed to enable DRITEK extension: %d\n", error);
1101 * Here we try to reset everything back to a state we had
1102 * before suspending.
1105 static int i8042_controller_resume(bool force_reset)
1109 error = i8042_controller_check();
1113 if (i8042_reset || force_reset) {
1114 error = i8042_controller_selftest();
1120 * Restore original CTR value and disable all ports
1123 i8042_ctr = i8042_initial_ctr;
1125 i8042_ctr &= ~I8042_CTR_XLATE;
1126 i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS;
1127 i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT);
1128 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
1129 pr_warn("Can't write CTR to resume, retrying...\n");
1131 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
1132 pr_err("CTR write retry failed\n");
1140 i8042_dritek_enable();
1143 if (i8042_mux_present) {
1144 if (i8042_set_mux_mode(true, NULL) || i8042_enable_mux_ports())
1145 pr_warn("failed to resume active multiplexor, mouse won't work\n");
1146 } else if (i8042_ports[I8042_AUX_PORT_NO].serio)
1147 i8042_enable_aux_port();
1149 if (i8042_ports[I8042_KBD_PORT_NO].serio)
1150 i8042_enable_kbd_port();
1152 i8042_interrupt(0, NULL);
1158 * Here we try to restore the original BIOS settings to avoid
1162 static int i8042_pm_suspend(struct device *dev)
1164 i8042_controller_reset(true);
1169 static int i8042_pm_resume(struct device *dev)
1172 * On resume from S2R we always try to reset the controller
1173 * to bring it in a sane state. (In case of S2D we expect
1174 * BIOS to reset the controller for us.)
1176 return i8042_controller_resume(true);
1179 static int i8042_pm_thaw(struct device *dev)
1181 i8042_interrupt(0, NULL);
1186 static int i8042_pm_reset(struct device *dev)
1188 i8042_controller_reset(false);
1193 static int i8042_pm_restore(struct device *dev)
1195 return i8042_controller_resume(false);
1198 static const struct dev_pm_ops i8042_pm_ops = {
1199 .suspend = i8042_pm_suspend,
1200 .resume = i8042_pm_resume,
1201 .thaw = i8042_pm_thaw,
1202 .poweroff = i8042_pm_reset,
1203 .restore = i8042_pm_restore,
1206 #endif /* CONFIG_PM */
1209 * We need to reset the 8042 back to original mode on system shutdown,
1210 * because otherwise BIOSes will be confused.
1213 static void i8042_shutdown(struct platform_device *dev)
1215 i8042_controller_reset(false);
1218 static int __init i8042_create_kbd_port(void)
1220 struct serio *serio;
1221 struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO];
1223 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
1227 serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL;
1228 serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write;
1229 serio->start = i8042_start;
1230 serio->stop = i8042_stop;
1231 serio->close = i8042_port_close;
1232 serio->ps2_cmd_mutex = &i8042_mutex;
1233 serio->port_data = port;
1234 serio->dev.parent = &i8042_platform_device->dev;
1235 strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name));
1236 strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys));
1238 port->serio = serio;
1239 port->irq = I8042_KBD_IRQ;
1244 static int __init i8042_create_aux_port(int idx)
1246 struct serio *serio;
1247 int port_no = idx < 0 ? I8042_AUX_PORT_NO : I8042_MUX_PORT_NO + idx;
1248 struct i8042_port *port = &i8042_ports[port_no];
1250 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
1254 serio->id.type = SERIO_8042;
1255 serio->write = i8042_aux_write;
1256 serio->start = i8042_start;
1257 serio->stop = i8042_stop;
1258 serio->ps2_cmd_mutex = &i8042_mutex;
1259 serio->port_data = port;
1260 serio->dev.parent = &i8042_platform_device->dev;
1262 strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name));
1263 strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys));
1264 serio->close = i8042_port_close;
1266 snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx);
1267 snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1);
1270 port->serio = serio;
1272 port->irq = I8042_AUX_IRQ;
1277 static void __init i8042_free_kbd_port(void)
1279 kfree(i8042_ports[I8042_KBD_PORT_NO].serio);
1280 i8042_ports[I8042_KBD_PORT_NO].serio = NULL;
1283 static void __init i8042_free_aux_ports(void)
1287 for (i = I8042_AUX_PORT_NO; i < I8042_NUM_PORTS; i++) {
1288 kfree(i8042_ports[i].serio);
1289 i8042_ports[i].serio = NULL;
1293 static void __init i8042_register_ports(void)
1297 for (i = 0; i < I8042_NUM_PORTS; i++) {
1298 if (i8042_ports[i].serio) {
1299 printk(KERN_INFO "serio: %s at %#lx,%#lx irq %d\n",
1300 i8042_ports[i].serio->name,
1301 (unsigned long) I8042_DATA_REG,
1302 (unsigned long) I8042_COMMAND_REG,
1303 i8042_ports[i].irq);
1304 serio_register_port(i8042_ports[i].serio);
1309 static void __devexit i8042_unregister_ports(void)
1313 for (i = 0; i < I8042_NUM_PORTS; i++) {
1314 if (i8042_ports[i].serio) {
1315 serio_unregister_port(i8042_ports[i].serio);
1316 i8042_ports[i].serio = NULL;
1321 static void i8042_free_irqs(void)
1323 if (i8042_aux_irq_registered)
1324 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1325 if (i8042_kbd_irq_registered)
1326 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1328 i8042_aux_irq_registered = i8042_kbd_irq_registered = false;
1331 static int __init i8042_setup_aux(void)
1333 int (*aux_enable)(void);
1337 if (i8042_check_aux())
1340 if (i8042_nomux || i8042_check_mux()) {
1341 error = i8042_create_aux_port(-1);
1343 goto err_free_ports;
1344 aux_enable = i8042_enable_aux_port;
1346 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
1347 error = i8042_create_aux_port(i);
1349 goto err_free_ports;
1351 aux_enable = i8042_enable_mux_ports;
1354 error = request_irq(I8042_AUX_IRQ, i8042_interrupt, IRQF_SHARED,
1355 "i8042", i8042_platform_device);
1357 goto err_free_ports;
1362 i8042_aux_irq_registered = true;
1366 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1368 i8042_free_aux_ports();
1372 static int __init i8042_setup_kbd(void)
1376 error = i8042_create_kbd_port();
1380 error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED,
1381 "i8042", i8042_platform_device);
1385 error = i8042_enable_kbd_port();
1389 i8042_kbd_irq_registered = true;
1393 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1395 i8042_free_kbd_port();
1399 static int __init i8042_probe(struct platform_device *dev)
1403 i8042_platform_device = dev;
1406 error = i8042_controller_selftest();
1411 error = i8042_controller_init();
1417 i8042_dritek_enable();
1421 error = i8042_setup_aux();
1422 if (error && error != -ENODEV && error != -EBUSY)
1427 error = i8042_setup_kbd();
1432 * Ok, everything is ready, let's register all serio ports
1434 i8042_register_ports();
1439 i8042_free_aux_ports(); /* in case KBD failed but AUX not */
1441 i8042_controller_reset(false);
1442 i8042_platform_device = NULL;
1447 static int __devexit i8042_remove(struct platform_device *dev)
1449 i8042_unregister_ports();
1451 i8042_controller_reset(false);
1452 i8042_platform_device = NULL;
1457 static struct platform_driver i8042_driver = {
1460 .owner = THIS_MODULE,
1462 .pm = &i8042_pm_ops,
1465 .remove = __devexit_p(i8042_remove),
1466 .shutdown = i8042_shutdown,
1469 static int __init i8042_init(void)
1471 struct platform_device *pdev;
1476 err = i8042_platform_init();
1480 err = i8042_controller_check();
1482 goto err_platform_exit;
1484 pdev = platform_create_bundle(&i8042_driver, i8042_probe, NULL, 0, NULL, 0);
1486 err = PTR_ERR(pdev);
1487 goto err_platform_exit;
1490 panic_blink = i8042_panic_blink;
1495 i8042_platform_exit();
1499 static void __exit i8042_exit(void)
1501 platform_device_unregister(i8042_platform_device);
1502 platform_driver_unregister(&i8042_driver);
1503 i8042_platform_exit();
1508 module_init(i8042_init);
1509 module_exit(i8042_exit);