2 * Keyboard class input driver for the NVIDIA Tegra SoC internal matrix
5 * Copyright (c) 2009-2011, NVIDIA Corporation.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
22 #include <linux/module.h>
23 #include <linux/input.h>
24 #include <linux/platform_device.h>
25 #include <linux/delay.h>
27 #include <linux/interrupt.h>
28 #include <linux/clk.h>
29 #include <linux/slab.h>
33 #define KBC_MAX_DEBOUNCE_CNT 0x3ffu
35 /* KBC row scan time and delay for beginning the row scan. */
36 #define KBC_ROW_SCAN_TIME 16
37 #define KBC_ROW_SCAN_DLY 5
39 /* KBC uses a 32KHz clock so a cycle = 1/32Khz */
40 #define KBC_CYCLE_USEC 32
44 /* KBC Control Register */
45 #define KBC_CONTROL_0 0x0
46 #define KBC_FIFO_TH_CNT_SHIFT(cnt) (cnt << 14)
47 #define KBC_DEBOUNCE_CNT_SHIFT(cnt) (cnt << 4)
48 #define KBC_CONTROL_FIFO_CNT_INT_EN (1 << 3)
49 #define KBC_CONTROL_KBC_EN (1 << 0)
51 /* KBC Interrupt Register */
53 #define KBC_INT_FIFO_CNT_INT_STATUS (1 << 2)
55 #define KBC_ROW_CFG0_0 0x8
56 #define KBC_COL_CFG0_0 0x18
57 #define KBC_INIT_DLY_0 0x28
58 #define KBC_RPT_DLY_0 0x2c
59 #define KBC_KP_ENT0_0 0x30
60 #define KBC_KP_ENT1_0 0x34
61 #define KBC_ROW0_MASK_0 0x38
63 #define KBC_ROW_SHIFT 3
67 struct input_dev *idev;
69 unsigned int wake_enable_rows;
70 unsigned int wake_enable_cols;
72 unsigned int repoll_dly;
73 unsigned long cp_dly_jiffies;
75 bool use_ghost_filter;
76 const struct tegra_kbc_platform_data *pdata;
77 unsigned short keycode[KBC_MAX_KEY * 2];
78 unsigned short current_keys[KBC_MAX_KPENT];
79 unsigned int num_pressed_keys;
80 struct timer_list timer;
84 static const u32 tegra_kbc_default_keymap[] = {
91 KEY(1, 7, KEY_LEFTMETA),
93 KEY(2, 6, KEY_RIGHTALT),
94 KEY(2, 7, KEY_LEFTALT),
111 KEY(4, 7, KEY_SPACE),
120 KEY(5, 7, KEY_BACKSLASH),
122 KEY(6, 0, KEY_MINUS),
128 KEY(6, 6, KEY_COMMA),
131 KEY(7, 1, KEY_EQUAL),
132 KEY(7, 2, KEY_RIGHTBRACE),
133 KEY(7, 3, KEY_ENTER),
136 KEY(8, 4, KEY_RIGHTSHIFT),
137 KEY(8, 5, KEY_LEFTSHIFT),
139 KEY(9, 5, KEY_RIGHTCTRL),
140 KEY(9, 7, KEY_LEFTCTRL),
142 KEY(11, 0, KEY_LEFTBRACE),
144 KEY(11, 2, KEY_APOSTROPHE),
145 KEY(11, 3, KEY_SEMICOLON),
146 KEY(11, 4, KEY_SLASH),
151 KEY(12, 2, KEY_BACKSPACE),
155 KEY(12, 6, KEY_PRINT),
156 KEY(12, 7, KEY_PAUSE),
158 KEY(13, 0, KEY_INSERT),
159 KEY(13, 1, KEY_DELETE),
160 KEY(13, 3, KEY_PAGEUP),
161 KEY(13, 4, KEY_PAGEDOWN),
162 KEY(13, 5, KEY_RIGHT),
163 KEY(13, 6, KEY_DOWN),
164 KEY(13, 7, KEY_LEFT),
176 KEY(15, 1, KEY_GRAVE),
181 KEY(15, 6, KEY_CAPSLOCK),
184 /* Software Handled Function Keys */
192 KEY(22, 1, KEY_KPSLASH),
199 KEY(27, 1, KEY_KPASTERISK),
200 KEY(27, 3, KEY_KPMINUS),
201 KEY(27, 4, KEY_KPPLUS),
202 KEY(27, 5, KEY_KPDOT),
204 KEY(28, 5, KEY_VOLUMEUP),
206 KEY(29, 3, KEY_HOME),
208 KEY(29, 5, KEY_BRIGHTNESSDOWN),
209 KEY(29, 6, KEY_VOLUMEDOWN),
210 KEY(29, 7, KEY_BRIGHTNESSUP),
212 KEY(30, 0, KEY_NUMLOCK),
213 KEY(30, 1, KEY_SCROLLLOCK),
214 KEY(30, 2, KEY_MUTE),
216 KEY(31, 4, KEY_HELP),
219 static const struct matrix_keymap_data tegra_kbc_default_keymap_data = {
220 .keymap = tegra_kbc_default_keymap,
221 .keymap_size = ARRAY_SIZE(tegra_kbc_default_keymap),
224 static void tegra_kbc_report_released_keys(struct input_dev *input,
225 unsigned short old_keycodes[],
226 unsigned int old_num_keys,
227 unsigned short new_keycodes[],
228 unsigned int new_num_keys)
232 for (i = 0; i < old_num_keys; i++) {
233 for (j = 0; j < new_num_keys; j++)
234 if (old_keycodes[i] == new_keycodes[j])
237 if (j == new_num_keys)
238 input_report_key(input, old_keycodes[i], 0);
242 static void tegra_kbc_report_pressed_keys(struct input_dev *input,
243 unsigned char scancodes[],
244 unsigned short keycodes[],
245 unsigned int num_pressed_keys)
249 for (i = 0; i < num_pressed_keys; i++) {
250 input_event(input, EV_MSC, MSC_SCAN, scancodes[i]);
251 input_report_key(input, keycodes[i], 1);
255 static void tegra_kbc_report_keys(struct tegra_kbc *kbc)
257 unsigned char scancodes[KBC_MAX_KPENT];
258 unsigned short keycodes[KBC_MAX_KPENT];
261 unsigned int num_down = 0;
263 bool fn_keypress = false;
264 bool key_in_same_row = false;
265 bool key_in_same_col = false;
267 spin_lock_irqsave(&kbc->lock, flags);
268 for (i = 0; i < KBC_MAX_KPENT; i++) {
270 val = readl(kbc->mmio + KBC_KP_ENT0_0 + i);
273 unsigned int col = val & 0x07;
274 unsigned int row = (val >> 3) & 0x0f;
275 unsigned char scancode =
276 MATRIX_SCAN_CODE(row, col, KBC_ROW_SHIFT);
278 scancodes[num_down] = scancode;
279 keycodes[num_down] = kbc->keycode[scancode];
280 /* If driver uses Fn map, do not report the Fn key. */
281 if ((keycodes[num_down] == KEY_FN) && kbc->use_fn_map)
291 * Matrix keyboard designs are prone to keyboard ghosting.
292 * Ghosting occurs if there are 3 keys such that -
293 * any 2 of the 3 keys share a row, and any 2 of them share a column.
294 * If so ignore the key presses for this iteration.
296 if ((kbc->use_ghost_filter) && (num_down >= 3)) {
297 for (i = 0; i < num_down; i++) {
299 u8 curr_col = scancodes[i] & 0x07;
300 u8 curr_row = scancodes[i] >> KBC_ROW_SHIFT;
303 * Find 2 keys such that one key is in the same row
304 * and the other is in the same column as the i-th key.
306 for (j = i + 1; j < num_down; j++) {
307 u8 col = scancodes[j] & 0x07;
308 u8 row = scancodes[j] >> KBC_ROW_SHIFT;
311 key_in_same_col = true;
313 key_in_same_row = true;
319 * If the platform uses Fn keymaps, translate keys on a Fn keypress.
320 * Function keycodes are KBC_MAX_KEY apart from the plain keycodes.
323 for (i = 0; i < num_down; i++) {
324 scancodes[i] += KBC_MAX_KEY;
325 keycodes[i] = kbc->keycode[scancodes[i]];
329 spin_unlock_irqrestore(&kbc->lock, flags);
331 /* Ignore the key presses for this iteration? */
332 if (key_in_same_col && key_in_same_row)
335 tegra_kbc_report_released_keys(kbc->idev,
336 kbc->current_keys, kbc->num_pressed_keys,
338 tegra_kbc_report_pressed_keys(kbc->idev, scancodes, keycodes, num_down);
339 input_sync(kbc->idev);
341 memcpy(kbc->current_keys, keycodes, sizeof(kbc->current_keys));
342 kbc->num_pressed_keys = num_down;
345 static void tegra_kbc_keypress_timer(unsigned long data)
347 struct tegra_kbc *kbc = (struct tegra_kbc *)data;
352 val = (readl(kbc->mmio + KBC_INT_0) >> 4) & 0xf;
356 tegra_kbc_report_keys(kbc);
359 * If more than one keys are pressed we need not wait
360 * for the repoll delay.
362 dly = (val == 1) ? kbc->repoll_dly : 1;
363 mod_timer(&kbc->timer, jiffies + msecs_to_jiffies(dly));
365 /* Release any pressed keys and exit the polling loop */
366 for (i = 0; i < kbc->num_pressed_keys; i++)
367 input_report_key(kbc->idev, kbc->current_keys[i], 0);
368 input_sync(kbc->idev);
370 kbc->num_pressed_keys = 0;
372 /* All keys are released so enable the keypress interrupt */
373 spin_lock_irqsave(&kbc->lock, flags);
374 val = readl(kbc->mmio + KBC_CONTROL_0);
375 val |= KBC_CONTROL_FIFO_CNT_INT_EN;
376 writel(val, kbc->mmio + KBC_CONTROL_0);
377 spin_unlock_irqrestore(&kbc->lock, flags);
381 static irqreturn_t tegra_kbc_isr(int irq, void *args)
383 struct tegra_kbc *kbc = args;
387 * Until all keys are released, defer further processing to
388 * the polling loop in tegra_kbc_keypress_timer
390 ctl = readl(kbc->mmio + KBC_CONTROL_0);
391 ctl &= ~KBC_CONTROL_FIFO_CNT_INT_EN;
392 writel(ctl, kbc->mmio + KBC_CONTROL_0);
395 * Quickly bail out & reenable interrupts if the fifo threshold
396 * count interrupt wasn't the interrupt source
398 val = readl(kbc->mmio + KBC_INT_0);
399 writel(val, kbc->mmio + KBC_INT_0);
401 if (val & KBC_INT_FIFO_CNT_INT_STATUS) {
403 * Schedule timer to run when hardware is in continuous
406 mod_timer(&kbc->timer, jiffies + kbc->cp_dly_jiffies);
408 ctl |= KBC_CONTROL_FIFO_CNT_INT_EN;
409 writel(ctl, kbc->mmio + KBC_CONTROL_0);
415 static void tegra_kbc_setup_wakekeys(struct tegra_kbc *kbc, bool filter)
417 const struct tegra_kbc_platform_data *pdata = kbc->pdata;
419 unsigned int rst_val;
421 BUG_ON(pdata->wake_cnt > KBC_MAX_KEY);
422 rst_val = (filter && pdata->wake_cnt) ? ~0 : 0;
424 for (i = 0; i < KBC_MAX_ROW; i++)
425 writel(rst_val, kbc->mmio + KBC_ROW0_MASK_0 + i * 4);
428 for (i = 0; i < pdata->wake_cnt; i++) {
430 addr = pdata->wake_cfg[i].row * 4 + KBC_ROW0_MASK_0;
431 val = readl(kbc->mmio + addr);
432 val &= ~(1 << pdata->wake_cfg[i].col);
433 writel(val, kbc->mmio + addr);
438 static void tegra_kbc_config_pins(struct tegra_kbc *kbc)
440 const struct tegra_kbc_platform_data *pdata = kbc->pdata;
443 for (i = 0; i < KBC_MAX_GPIO; i++) {
444 u32 r_shft = 5 * (i % 6);
445 u32 c_shft = 4 * (i % 8);
446 u32 r_mask = 0x1f << r_shft;
447 u32 c_mask = 0x0f << c_shft;
448 u32 r_offs = (i / 6) * 4 + KBC_ROW_CFG0_0;
449 u32 c_offs = (i / 8) * 4 + KBC_COL_CFG0_0;
450 u32 row_cfg = readl(kbc->mmio + r_offs);
451 u32 col_cfg = readl(kbc->mmio + c_offs);
456 if (pdata->pin_cfg[i].is_row)
457 row_cfg |= ((pdata->pin_cfg[i].num << 1) | 1) << r_shft;
459 col_cfg |= ((pdata->pin_cfg[i].num << 1) | 1) << c_shft;
461 writel(row_cfg, kbc->mmio + r_offs);
462 writel(col_cfg, kbc->mmio + c_offs);
466 static int tegra_kbc_start(struct tegra_kbc *kbc)
468 const struct tegra_kbc_platform_data *pdata = kbc->pdata;
470 unsigned int debounce_cnt;
473 clk_enable(kbc->clk);
475 /* Reset the KBC controller to clear all previous status.*/
476 tegra_periph_reset_assert(kbc->clk);
478 tegra_periph_reset_deassert(kbc->clk);
481 tegra_kbc_config_pins(kbc);
482 tegra_kbc_setup_wakekeys(kbc, false);
484 writel(pdata->repeat_cnt, kbc->mmio + KBC_RPT_DLY_0);
486 /* Keyboard debounce count is maximum of 12 bits. */
487 debounce_cnt = min(pdata->debounce_cnt, KBC_MAX_DEBOUNCE_CNT);
488 val = KBC_DEBOUNCE_CNT_SHIFT(debounce_cnt);
489 val |= KBC_FIFO_TH_CNT_SHIFT(1); /* set fifo interrupt threshold to 1 */
490 val |= KBC_CONTROL_FIFO_CNT_INT_EN; /* interrupt on FIFO threshold */
491 val |= KBC_CONTROL_KBC_EN; /* enable */
492 writel(val, kbc->mmio + KBC_CONTROL_0);
495 * Compute the delay(ns) from interrupt mode to continuous polling
496 * mode so the timer routine is scheduled appropriately.
498 val = readl(kbc->mmio + KBC_INIT_DLY_0);
499 kbc->cp_dly_jiffies = usecs_to_jiffies((val & 0xfffff) * 32);
501 kbc->num_pressed_keys = 0;
504 * Atomically clear out any remaining entries in the key FIFO
505 * and enable keyboard interrupts.
507 spin_lock_irqsave(&kbc->lock, flags);
509 val = readl(kbc->mmio + KBC_INT_0);
514 val = readl(kbc->mmio + KBC_KP_ENT0_0);
515 val = readl(kbc->mmio + KBC_KP_ENT1_0);
517 writel(0x7, kbc->mmio + KBC_INT_0);
518 spin_unlock_irqrestore(&kbc->lock, flags);
520 enable_irq(kbc->irq);
525 static void tegra_kbc_stop(struct tegra_kbc *kbc)
530 spin_lock_irqsave(&kbc->lock, flags);
531 val = readl(kbc->mmio + KBC_CONTROL_0);
533 writel(val, kbc->mmio + KBC_CONTROL_0);
534 spin_unlock_irqrestore(&kbc->lock, flags);
536 disable_irq(kbc->irq);
537 del_timer_sync(&kbc->timer);
539 clk_disable(kbc->clk);
542 static int tegra_kbc_open(struct input_dev *dev)
544 struct tegra_kbc *kbc = input_get_drvdata(dev);
546 return tegra_kbc_start(kbc);
549 static void tegra_kbc_close(struct input_dev *dev)
551 struct tegra_kbc *kbc = input_get_drvdata(dev);
553 return tegra_kbc_stop(kbc);
556 static bool __devinit
557 tegra_kbc_check_pin_cfg(const struct tegra_kbc_platform_data *pdata,
558 struct device *dev, unsigned int *num_rows)
564 for (i = 0; i < KBC_MAX_GPIO; i++) {
565 const struct tegra_kbc_pin_cfg *pin_cfg = &pdata->pin_cfg[i];
567 if (pin_cfg->is_row) {
568 if (pin_cfg->num >= KBC_MAX_ROW) {
570 "pin_cfg[%d]: invalid row number %d\n",
576 if (pin_cfg->num >= KBC_MAX_COL) {
578 "pin_cfg[%d]: invalid column number %d\n",
588 static int __devinit tegra_kbc_probe(struct platform_device *pdev)
590 const struct tegra_kbc_platform_data *pdata = pdev->dev.platform_data;
591 const struct matrix_keymap_data *keymap_data;
592 struct tegra_kbc *kbc;
593 struct input_dev *input_dev;
594 struct resource *res;
599 unsigned int debounce_cnt;
600 unsigned int scan_time_rows;
605 if (!tegra_kbc_check_pin_cfg(pdata, &pdev->dev, &num_rows))
608 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
610 dev_err(&pdev->dev, "failed to get I/O memory\n");
614 irq = platform_get_irq(pdev, 0);
616 dev_err(&pdev->dev, "failed to get keyboard IRQ\n");
620 kbc = kzalloc(sizeof(*kbc), GFP_KERNEL);
621 input_dev = input_allocate_device();
622 if (!kbc || !input_dev) {
628 kbc->idev = input_dev;
630 spin_lock_init(&kbc->lock);
631 setup_timer(&kbc->timer, tegra_kbc_keypress_timer, (unsigned long)kbc);
633 res = request_mem_region(res->start, resource_size(res), pdev->name);
635 dev_err(&pdev->dev, "failed to request I/O memory\n");
640 kbc->mmio = ioremap(res->start, resource_size(res));
642 dev_err(&pdev->dev, "failed to remap I/O memory\n");
644 goto err_free_mem_region;
647 kbc->clk = clk_get(&pdev->dev, NULL);
648 if (IS_ERR(kbc->clk)) {
649 dev_err(&pdev->dev, "failed to get keyboard clock\n");
650 err = PTR_ERR(kbc->clk);
654 kbc->wake_enable_rows = 0;
655 kbc->wake_enable_cols = 0;
656 for (i = 0; i < pdata->wake_cnt; i++) {
657 kbc->wake_enable_rows |= (1 << pdata->wake_cfg[i].row);
658 kbc->wake_enable_cols |= (1 << pdata->wake_cfg[i].col);
662 * The time delay between two consecutive reads of the FIFO is
663 * the sum of the repeat time and the time taken for scanning
664 * the rows. There is an additional delay before the row scanning
665 * starts. The repoll delay is computed in milliseconds.
667 debounce_cnt = min(pdata->debounce_cnt, KBC_MAX_DEBOUNCE_CNT);
668 scan_time_rows = (KBC_ROW_SCAN_TIME + debounce_cnt) * num_rows;
669 kbc->repoll_dly = KBC_ROW_SCAN_DLY + scan_time_rows + pdata->repeat_cnt;
670 kbc->repoll_dly = ((kbc->repoll_dly * KBC_CYCLE_USEC) + 999) / 1000;
672 input_dev->name = pdev->name;
673 input_dev->id.bustype = BUS_HOST;
674 input_dev->dev.parent = &pdev->dev;
675 input_dev->open = tegra_kbc_open;
676 input_dev->close = tegra_kbc_close;
678 input_set_drvdata(input_dev, kbc);
680 input_dev->evbit[0] = BIT_MASK(EV_KEY);
681 input_set_capability(input_dev, EV_MSC, MSC_SCAN);
683 input_dev->keycode = kbc->keycode;
684 input_dev->keycodesize = sizeof(kbc->keycode[0]);
685 input_dev->keycodemax = KBC_MAX_KEY;
686 if (pdata->use_fn_map)
687 input_dev->keycodemax *= 2;
689 kbc->use_fn_map = pdata->use_fn_map;
690 kbc->use_ghost_filter = pdata->use_ghost_filter;
691 keymap_data = pdata->keymap_data ?: &tegra_kbc_default_keymap_data;
692 matrix_keypad_build_keymap(keymap_data, KBC_ROW_SHIFT,
693 input_dev->keycode, input_dev->keybit);
695 err = request_irq(kbc->irq, tegra_kbc_isr, IRQF_TRIGGER_HIGH,
698 dev_err(&pdev->dev, "failed to request keyboard IRQ\n");
702 disable_irq(kbc->irq);
704 err = input_register_device(kbc->idev);
706 dev_err(&pdev->dev, "failed to register input device\n");
710 platform_set_drvdata(pdev, kbc);
711 device_init_wakeup(&pdev->dev, pdata->wakeup);
716 free_irq(kbc->irq, pdev);
722 release_mem_region(res->start, resource_size(res));
724 input_free_device(kbc->idev);
730 static int __devexit tegra_kbc_remove(struct platform_device *pdev)
732 struct tegra_kbc *kbc = platform_get_drvdata(pdev);
733 struct resource *res;
735 free_irq(kbc->irq, pdev);
738 input_unregister_device(kbc->idev);
740 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
741 release_mem_region(res->start, resource_size(res));
745 platform_set_drvdata(pdev, NULL);
750 #ifdef CONFIG_PM_SLEEP
751 static int tegra_kbc_suspend(struct device *dev)
753 struct platform_device *pdev = to_platform_device(dev);
754 struct tegra_kbc *kbc = platform_get_drvdata(pdev);
756 if (device_may_wakeup(&pdev->dev)) {
757 tegra_kbc_setup_wakekeys(kbc, true);
758 enable_irq_wake(kbc->irq);
759 /* Forcefully clear the interrupt status */
760 writel(0x7, kbc->mmio + KBC_INT_0);
763 mutex_lock(&kbc->idev->mutex);
764 if (kbc->idev->users)
766 mutex_unlock(&kbc->idev->mutex);
772 static int tegra_kbc_resume(struct device *dev)
774 struct platform_device *pdev = to_platform_device(dev);
775 struct tegra_kbc *kbc = platform_get_drvdata(pdev);
778 if (device_may_wakeup(&pdev->dev)) {
779 disable_irq_wake(kbc->irq);
780 tegra_kbc_setup_wakekeys(kbc, false);
782 mutex_lock(&kbc->idev->mutex);
783 if (kbc->idev->users)
784 err = tegra_kbc_start(kbc);
785 mutex_unlock(&kbc->idev->mutex);
792 static SIMPLE_DEV_PM_OPS(tegra_kbc_pm_ops, tegra_kbc_suspend, tegra_kbc_resume);
794 static struct platform_driver tegra_kbc_driver = {
795 .probe = tegra_kbc_probe,
796 .remove = __devexit_p(tegra_kbc_remove),
799 .owner = THIS_MODULE,
800 .pm = &tegra_kbc_pm_ops,
804 static void __exit tegra_kbc_exit(void)
806 platform_driver_unregister(&tegra_kbc_driver);
808 module_exit(tegra_kbc_exit);
810 static int __init tegra_kbc_init(void)
812 return platform_driver_register(&tegra_kbc_driver);
814 module_init(tegra_kbc_init);
816 MODULE_LICENSE("GPL");
817 MODULE_AUTHOR("Rakesh Iyer <riyer@nvidia.com>");
818 MODULE_DESCRIPTION("Tegra matrix keyboard controller driver");
819 MODULE_ALIAS("platform:tegra-kbc");