2 * Copyright (c) 2006, 2007, 2008, 2009, 2010 QLogic Corporation.
4 * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
35 #include <linux/pci.h>
36 #include <linux/poll.h>
37 #include <linux/cdev.h>
38 #include <linux/swap.h>
39 #include <linux/vmalloc.h>
40 #include <linux/highmem.h>
42 #include <linux/uio.h>
43 #include <linux/jiffies.h>
44 #include <asm/pgtable.h>
45 #include <linux/delay.h>
48 #include "qib_common.h"
49 #include "qib_user_sdma.h"
51 static int qib_open(struct inode *, struct file *);
52 static int qib_close(struct inode *, struct file *);
53 static ssize_t qib_write(struct file *, const char __user *, size_t, loff_t *);
54 static ssize_t qib_aio_write(struct kiocb *, const struct iovec *,
55 unsigned long, loff_t);
56 static unsigned int qib_poll(struct file *, struct poll_table_struct *);
57 static int qib_mmapf(struct file *, struct vm_area_struct *);
59 static const struct file_operations qib_file_ops = {
62 .aio_write = qib_aio_write,
70 * Convert kernel virtual addresses to physical addresses so they don't
71 * potentially conflict with the chip addresses used as mmap offsets.
72 * It doesn't really matter what mmap offset we use as long as we can
73 * interpret it correctly.
75 static u64 cvt_kvaddr(void *p)
80 page = vmalloc_to_page(p);
82 paddr = page_to_pfn(page) << PAGE_SHIFT;
87 static int qib_get_base_info(struct file *fp, void __user *ubase,
90 struct qib_ctxtdata *rcd = ctxt_fp(fp);
92 struct qib_base_info *kinfo = NULL;
93 struct qib_devdata *dd = rcd->dd;
94 struct qib_pportdata *ppd = rcd->ppd;
99 subctxt_cnt = rcd->subctxt_cnt;
106 master = !subctxt_fp(fp);
110 /* If context sharing is not requested, allow the old size structure */
112 sz -= 7 * sizeof(u64);
113 if (ubase_size < sz) {
118 kinfo = kzalloc(sizeof(*kinfo), GFP_KERNEL);
124 ret = dd->f_get_base_info(rcd, kinfo);
128 kinfo->spi_rcvhdr_cnt = dd->rcvhdrcnt;
129 kinfo->spi_rcvhdrent_size = dd->rcvhdrentsize;
130 kinfo->spi_tidegrcnt = rcd->rcvegrcnt;
131 kinfo->spi_rcv_egrbufsize = dd->rcvegrbufsize;
133 * have to mmap whole thing
135 kinfo->spi_rcv_egrbuftotlen =
136 rcd->rcvegrbuf_chunks * rcd->rcvegrbuf_size;
137 kinfo->spi_rcv_egrperchunk = rcd->rcvegrbufs_perchunk;
138 kinfo->spi_rcv_egrchunksize = kinfo->spi_rcv_egrbuftotlen /
139 rcd->rcvegrbuf_chunks;
140 kinfo->spi_tidcnt = dd->rcvtidcnt / subctxt_cnt;
142 kinfo->spi_tidcnt += dd->rcvtidcnt % subctxt_cnt;
144 * for this use, may be cfgctxts summed over all chips that
145 * are are configured and present
147 kinfo->spi_nctxts = dd->cfgctxts;
148 /* unit (chip/board) our context is on */
149 kinfo->spi_unit = dd->unit;
150 kinfo->spi_port = ppd->port;
151 /* for now, only a single page */
152 kinfo->spi_tid_maxsize = PAGE_SIZE;
155 * Doing this per context, and based on the skip value, etc. This has
156 * to be the actual buffer size, since the protocol code treats it
159 * These have to be set to user addresses in the user code via mmap.
160 * These values are used on return to user code for the mmap target
161 * addresses only. For 32 bit, same 44 bit address problem, so use
162 * the physical address, not virtual. Before 2.6.11, using the
163 * page_address() macro worked, but in 2.6.11, even that returns the
164 * full 64 bit address (upper bits all 1's). So far, using the
165 * physical addresses (or chip offsets, for chip mapping) works, but
166 * no doubt some future kernel release will change that, and we'll be
167 * on to yet another method of dealing with this.
168 * Normally only one of rcvhdr_tailaddr or rhf_offset is useful
169 * since the chips with non-zero rhf_offset don't normally
170 * enable tail register updates to host memory, but for testing,
171 * both can be enabled and used.
173 kinfo->spi_rcvhdr_base = (u64) rcd->rcvhdrq_phys;
174 kinfo->spi_rcvhdr_tailaddr = (u64) rcd->rcvhdrqtailaddr_phys;
175 kinfo->spi_rhf_offset = dd->rhf_offset;
176 kinfo->spi_rcv_egrbufs = (u64) rcd->rcvegr_phys;
177 kinfo->spi_pioavailaddr = (u64) dd->pioavailregs_phys;
178 /* setup per-unit (not port) status area for user programs */
179 kinfo->spi_status = (u64) kinfo->spi_pioavailaddr +
180 (char *) ppd->statusp -
181 (char *) dd->pioavailregs_dma;
182 kinfo->spi_uregbase = (u64) dd->uregbase + dd->ureg_align * rcd->ctxt;
184 kinfo->spi_piocnt = rcd->piocnt;
185 kinfo->spi_piobufbase = (u64) rcd->piobufs;
186 kinfo->spi_sendbuf_status = cvt_kvaddr(rcd->user_event_mask);
188 kinfo->spi_piocnt = (rcd->piocnt / subctxt_cnt) +
189 (rcd->piocnt % subctxt_cnt);
190 /* Master's PIO buffers are after all the slave's */
191 kinfo->spi_piobufbase = (u64) rcd->piobufs +
193 (rcd->piocnt - kinfo->spi_piocnt);
195 unsigned slave = subctxt_fp(fp) - 1;
197 kinfo->spi_piocnt = rcd->piocnt / subctxt_cnt;
198 kinfo->spi_piobufbase = (u64) rcd->piobufs +
199 dd->palign * kinfo->spi_piocnt * slave;
203 kinfo->spi_sendbuf_status =
204 cvt_kvaddr(&rcd->user_event_mask[subctxt_fp(fp)]);
205 /* only spi_subctxt_* fields should be set in this block! */
206 kinfo->spi_subctxt_uregbase = cvt_kvaddr(rcd->subctxt_uregbase);
208 kinfo->spi_subctxt_rcvegrbuf =
209 cvt_kvaddr(rcd->subctxt_rcvegrbuf);
210 kinfo->spi_subctxt_rcvhdr_base =
211 cvt_kvaddr(rcd->subctxt_rcvhdr_base);
215 * All user buffers are 2KB buffers. If we ever support
216 * giving 4KB buffers to user processes, this will need some
217 * work. Can't use piobufbase directly, because it has
218 * both 2K and 4K buffer base values.
220 kinfo->spi_pioindex = (kinfo->spi_piobufbase - dd->pio2k_bufbase) /
222 kinfo->spi_pioalign = dd->palign;
223 kinfo->spi_qpair = QIB_KD_QP;
225 * user mode PIO buffers are always 2KB, even when 4KB can
226 * be received, and sent via the kernel; this is ibmaxlen
229 kinfo->spi_piosize = dd->piosize2k - 2 * sizeof(u32);
230 kinfo->spi_mtu = ppd->ibmaxlen; /* maxlen, not ibmtu */
231 kinfo->spi_ctxt = rcd->ctxt;
232 kinfo->spi_subctxt = subctxt_fp(fp);
233 kinfo->spi_sw_version = QIB_KERN_SWVERSION;
234 kinfo->spi_sw_version |= 1U << 31; /* QLogic-built, not kernel.org */
235 kinfo->spi_hw_version = dd->revision;
238 kinfo->spi_runtime_flags |= QIB_RUNTIME_MASTER;
240 sz = (ubase_size < sizeof(*kinfo)) ? ubase_size : sizeof(*kinfo);
241 if (copy_to_user(ubase, kinfo, sz))
249 * qib_tid_update - update a context TID
251 * @fp: the qib device file
252 * @ti: the TID information
254 * The new implementation as of Oct 2004 is that the driver assigns
255 * the tid and returns it to the caller. To reduce search time, we
256 * keep a cursor for each context, walking the shadow tid array to find
257 * one that's not in use.
259 * For now, if we can't allocate the full list, we fail, although
260 * in the long run, we'll allocate as many as we can, and the
261 * caller will deal with that by trying the remaining pages later.
262 * That means that when we fail, we have to mark the tids as not in
263 * use again, in our shadow copy.
265 * It's up to the caller to free the tids when they are done.
266 * We'll unlock the pages as they free them.
268 * Also, right now we are locking one page at a time, but since
269 * the intended use of this routine is for a single group of
270 * virtually contiguous pages, that should change to improve
273 static int qib_tid_update(struct qib_ctxtdata *rcd, struct file *fp,
274 const struct qib_tid_info *ti)
277 u32 tid, ctxttid, cnt, i, tidcnt, tidoff;
279 struct qib_devdata *dd = rcd->dd;
282 u64 __iomem *tidbase;
283 unsigned long tidmap[8];
284 struct page **pagep = NULL;
285 unsigned subctxt = subctxt_fp(fp);
287 if (!dd->pageshadow) {
297 ctxttid = rcd->ctxt * dd->rcvtidcnt;
298 if (!rcd->subctxt_cnt) {
299 tidcnt = dd->rcvtidcnt;
300 tid = rcd->tidcursor;
302 } else if (!subctxt) {
303 tidcnt = (dd->rcvtidcnt / rcd->subctxt_cnt) +
304 (dd->rcvtidcnt % rcd->subctxt_cnt);
305 tidoff = dd->rcvtidcnt - tidcnt;
307 tid = tidcursor_fp(fp);
309 tidcnt = dd->rcvtidcnt / rcd->subctxt_cnt;
310 tidoff = tidcnt * (subctxt - 1);
312 tid = tidcursor_fp(fp);
315 /* make sure it all fits in tid_pg_list */
316 qib_devinfo(dd->pcidev, "Process tried to allocate %u "
317 "TIDs, only trying max (%u)\n", cnt, tidcnt);
320 pagep = (struct page **) rcd->tid_pg_list;
321 tidlist = (u16 *) &pagep[dd->rcvtidcnt];
325 memset(tidmap, 0, sizeof(tidmap));
326 /* before decrement; chip actual # */
328 tidbase = (u64 __iomem *) (((char __iomem *) dd->kregbase) +
330 ctxttid * sizeof(*tidbase));
332 /* virtual address of first page in transfer */
333 vaddr = ti->tidvaddr;
334 if (!access_ok(VERIFY_WRITE, (void __user *) vaddr,
339 ret = qib_get_user_pages(vaddr, cnt, pagep);
343 * We can't continue because the pagep array won't be
344 * initialized. This should never happen,
345 * unless perhaps the user has mpin'ed the pages
348 qib_devinfo(dd->pcidev,
349 "Failed to lock addr %p, %u pages: "
350 "errno %d\n", (void *) vaddr, cnt, -ret);
353 for (i = 0; i < cnt; i++, vaddr += PAGE_SIZE) {
354 for (; ntids--; tid++) {
357 if (!dd->pageshadow[ctxttid + tid])
362 * Oops, wrapped all the way through their TIDs,
363 * and didn't have enough free; see comments at
366 i--; /* last tidlist[i] not filled in */
370 tidlist[i] = tid + tidoff;
371 /* we "know" system pages and TID pages are same size */
372 dd->pageshadow[ctxttid + tid] = pagep[i];
373 dd->physshadow[ctxttid + tid] =
374 qib_map_page(dd->pcidev, pagep[i], 0, PAGE_SIZE,
377 * don't need atomic or it's overhead
379 __set_bit(tid, tidmap);
380 physaddr = dd->physshadow[ctxttid + tid];
381 /* PERFORMANCE: below should almost certainly be cached */
382 dd->f_put_tid(dd, &tidbase[tid],
383 RCVHQ_RCV_TYPE_EXPECTED, physaddr);
385 * don't check this tid in qib_ctxtshadow, since we
386 * just filled it in; start with the next one.
394 /* jump here if copy out of updated info failed... */
395 /* same code that's in qib_free_tid() */
396 limit = sizeof(tidmap) * BITS_PER_BYTE;
398 /* just in case size changes in future */
400 tid = find_first_bit((const unsigned long *)tidmap, limit);
401 for (; tid < limit; tid++) {
402 if (!test_bit(tid, tidmap))
404 if (dd->pageshadow[ctxttid + tid]) {
407 phys = dd->physshadow[ctxttid + tid];
408 dd->physshadow[ctxttid + tid] = dd->tidinvalid;
409 /* PERFORMANCE: below should almost certainly
412 dd->f_put_tid(dd, &tidbase[tid],
413 RCVHQ_RCV_TYPE_EXPECTED,
415 pci_unmap_page(dd->pcidev, phys, PAGE_SIZE,
417 dd->pageshadow[ctxttid + tid] = NULL;
420 qib_release_user_pages(pagep, cnt);
423 * Copy the updated array, with qib_tid's filled in, back
424 * to user. Since we did the copy in already, this "should
425 * never fail" If it does, we have to clean up...
427 if (copy_to_user((void __user *)
428 (unsigned long) ti->tidlist,
429 tidlist, cnt * sizeof(*tidlist))) {
433 if (copy_to_user((void __user *) (unsigned long) ti->tidmap,
434 tidmap, sizeof tidmap)) {
440 if (!rcd->subctxt_cnt)
441 rcd->tidcursor = tid;
443 tidcursor_fp(fp) = tid;
451 * qib_tid_free - free a context TID
453 * @subctxt: the subcontext
456 * right now we are unlocking one page at a time, but since
457 * the intended use of this routine is for a single group of
458 * virtually contiguous pages, that should change to improve
459 * performance. We check that the TID is in range for this context
460 * but otherwise don't check validity; if user has an error and
461 * frees the wrong tid, it's only their own data that can thereby
462 * be corrupted. We do check that the TID was in use, for sanity
463 * We always use our idea of the saved address, not the address that
464 * they pass in to us.
466 static int qib_tid_free(struct qib_ctxtdata *rcd, unsigned subctxt,
467 const struct qib_tid_info *ti)
470 u32 tid, ctxttid, cnt, limit, tidcnt;
471 struct qib_devdata *dd = rcd->dd;
472 u64 __iomem *tidbase;
473 unsigned long tidmap[8];
475 if (!dd->pageshadow) {
480 if (copy_from_user(tidmap, (void __user *)(unsigned long)ti->tidmap,
486 ctxttid = rcd->ctxt * dd->rcvtidcnt;
487 if (!rcd->subctxt_cnt)
488 tidcnt = dd->rcvtidcnt;
490 tidcnt = (dd->rcvtidcnt / rcd->subctxt_cnt) +
491 (dd->rcvtidcnt % rcd->subctxt_cnt);
492 ctxttid += dd->rcvtidcnt - tidcnt;
494 tidcnt = dd->rcvtidcnt / rcd->subctxt_cnt;
495 ctxttid += tidcnt * (subctxt - 1);
497 tidbase = (u64 __iomem *) ((char __iomem *)(dd->kregbase) +
499 ctxttid * sizeof(*tidbase));
501 limit = sizeof(tidmap) * BITS_PER_BYTE;
503 /* just in case size changes in future */
505 tid = find_first_bit(tidmap, limit);
506 for (cnt = 0; tid < limit; tid++) {
508 * small optimization; if we detect a run of 3 or so without
509 * any set, use find_first_bit again. That's mainly to
510 * accelerate the case where we wrapped, so we have some at
511 * the beginning, and some at the end, and a big gap
514 if (!test_bit(tid, tidmap))
517 if (dd->pageshadow[ctxttid + tid]) {
521 p = dd->pageshadow[ctxttid + tid];
522 dd->pageshadow[ctxttid + tid] = NULL;
523 phys = dd->physshadow[ctxttid + tid];
524 dd->physshadow[ctxttid + tid] = dd->tidinvalid;
525 /* PERFORMANCE: below should almost certainly be
528 dd->f_put_tid(dd, &tidbase[tid],
529 RCVHQ_RCV_TYPE_EXPECTED, dd->tidinvalid);
530 pci_unmap_page(dd->pcidev, phys, PAGE_SIZE,
532 qib_release_user_pages(&p, 1);
540 * qib_set_part_key - set a partition key
544 * We can have up to 4 active at a time (other than the default, which is
545 * always allowed). This is somewhat tricky, since multiple contexts may set
546 * the same key, so we reference count them, and clean up at exit. All 4
547 * partition keys are packed into a single qlogic_ib register. It's an
548 * error for a process to set the same pkey multiple times. We provide no
549 * mechanism to de-allocate a pkey at this time, we may eventually need to
550 * do that. I've used the atomic operations, and no locking, and only make
551 * a single pass through what's available. This should be more than
552 * adequate for some time. I'll think about spinlocks or the like if and as
555 static int qib_set_part_key(struct qib_ctxtdata *rcd, u16 key)
557 struct qib_pportdata *ppd = rcd->ppd;
558 int i, any = 0, pidx = -1;
559 u16 lkey = key & 0x7FFF;
562 if (lkey == (QIB_DEFAULT_P_KEY & 0x7FFF)) {
563 /* nothing to do; this key always valid */
574 * Set the full membership bit, because it has to be
575 * set in the register or the packet, and it seems
576 * cleaner to set in the register than to force all
581 for (i = 0; i < ARRAY_SIZE(rcd->pkeys); i++) {
582 if (!rcd->pkeys[i] && pidx == -1)
584 if (rcd->pkeys[i] == key) {
593 for (any = i = 0; i < ARRAY_SIZE(ppd->pkeys); i++) {
594 if (!ppd->pkeys[i]) {
598 if (ppd->pkeys[i] == key) {
599 atomic_t *pkrefs = &ppd->pkeyrefs[i];
601 if (atomic_inc_return(pkrefs) > 1) {
602 rcd->pkeys[pidx] = key;
607 * lost race, decrement count, catch below
613 if ((ppd->pkeys[i] & 0x7FFF) == lkey) {
615 * It makes no sense to have both the limited and
616 * full membership PKEY set at the same time since
617 * the unlimited one will disable the limited one.
627 for (any = i = 0; i < ARRAY_SIZE(ppd->pkeys); i++) {
628 if (!ppd->pkeys[i] &&
629 atomic_inc_return(&ppd->pkeyrefs[i]) == 1) {
630 rcd->pkeys[pidx] = key;
632 (void) ppd->dd->f_set_ib_cfg(ppd, QIB_IB_CFG_PKEYS, 0);
644 * qib_manage_rcvq - manage a context's receive queue
646 * @subctxt: the subcontext
647 * @start_stop: action to carry out
649 * start_stop == 0 disables receive on the context, for use in queue
650 * overflow conditions. start_stop==1 re-enables, to be used to
651 * re-init the software copy of the head register
653 static int qib_manage_rcvq(struct qib_ctxtdata *rcd, unsigned subctxt,
656 struct qib_devdata *dd = rcd->dd;
657 unsigned int rcvctrl_op;
661 /* atomically clear receive enable ctxt. */
664 * On enable, force in-memory copy of the tail register to
665 * 0, so that protocol code doesn't have to worry about
666 * whether or not the chip has yet updated the in-memory
667 * copy or not on return from the system call. The chip
668 * always resets it's tail register back to 0 on a
669 * transition from disabled to enabled.
671 if (rcd->rcvhdrtail_kvaddr)
672 qib_clear_rcvhdrtail(rcd);
673 rcvctrl_op = QIB_RCVCTRL_CTXT_ENB;
675 rcvctrl_op = QIB_RCVCTRL_CTXT_DIS;
676 dd->f_rcvctrl(rcd->ppd, rcvctrl_op, rcd->ctxt);
677 /* always; new head should be equal to new tail; see above */
682 static void qib_clean_part_key(struct qib_ctxtdata *rcd,
683 struct qib_devdata *dd)
685 int i, j, pchanged = 0;
687 struct qib_pportdata *ppd = rcd->ppd;
689 /* for debugging only */
690 oldpkey = (u64) ppd->pkeys[0] |
691 ((u64) ppd->pkeys[1] << 16) |
692 ((u64) ppd->pkeys[2] << 32) |
693 ((u64) ppd->pkeys[3] << 48);
695 for (i = 0; i < ARRAY_SIZE(rcd->pkeys); i++) {
698 for (j = 0; j < ARRAY_SIZE(ppd->pkeys); j++) {
699 /* check for match independent of the global bit */
700 if ((ppd->pkeys[j] & 0x7fff) !=
701 (rcd->pkeys[i] & 0x7fff))
703 if (atomic_dec_and_test(&ppd->pkeyrefs[j])) {
712 (void) ppd->dd->f_set_ib_cfg(ppd, QIB_IB_CFG_PKEYS, 0);
715 /* common code for the mappings on dma_alloc_coherent mem */
716 static int qib_mmap_mem(struct vm_area_struct *vma, struct qib_ctxtdata *rcd,
717 unsigned len, void *kvaddr, u32 write_ok, char *what)
719 struct qib_devdata *dd = rcd->dd;
723 if ((vma->vm_end - vma->vm_start) > len) {
724 qib_devinfo(dd->pcidev,
725 "FAIL on %s: len %lx > %x\n", what,
726 vma->vm_end - vma->vm_start, len);
732 * shared context user code requires rcvhdrq mapped r/w, others
733 * only allowed readonly mapping.
736 if (vma->vm_flags & VM_WRITE) {
737 qib_devinfo(dd->pcidev,
738 "%s must be mapped readonly\n", what);
743 /* don't allow them to later change with mprotect */
744 vma->vm_flags &= ~VM_MAYWRITE;
747 pfn = virt_to_phys(kvaddr) >> PAGE_SHIFT;
748 ret = remap_pfn_range(vma, vma->vm_start, pfn,
749 len, vma->vm_page_prot);
751 qib_devinfo(dd->pcidev, "%s ctxt%u mmap of %lx, %x "
752 "bytes failed: %d\n", what, rcd->ctxt,
758 static int mmap_ureg(struct vm_area_struct *vma, struct qib_devdata *dd,
766 * This is real hardware, so use io_remap. This is the mechanism
767 * for the user process to update the head registers for their ctxt
770 sz = dd->flags & QIB_HAS_HDRSUPP ? 2 * PAGE_SIZE : PAGE_SIZE;
771 if ((vma->vm_end - vma->vm_start) > sz) {
772 qib_devinfo(dd->pcidev, "FAIL mmap userreg: reqlen "
773 "%lx > PAGE\n", vma->vm_end - vma->vm_start);
776 phys = dd->physaddr + ureg;
777 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
779 vma->vm_flags |= VM_DONTCOPY | VM_DONTEXPAND;
780 ret = io_remap_pfn_range(vma, vma->vm_start,
782 vma->vm_end - vma->vm_start,
788 static int mmap_piobufs(struct vm_area_struct *vma,
789 struct qib_devdata *dd,
790 struct qib_ctxtdata *rcd,
791 unsigned piobufs, unsigned piocnt)
797 * When we map the PIO buffers in the chip, we want to map them as
798 * writeonly, no read possible; unfortunately, x86 doesn't allow
799 * for this in hardware, but we still prevent users from asking
802 if ((vma->vm_end - vma->vm_start) > (piocnt * dd->palign)) {
803 qib_devinfo(dd->pcidev, "FAIL mmap piobufs: "
804 "reqlen %lx > PAGE\n",
805 vma->vm_end - vma->vm_start);
810 phys = dd->physaddr + piobufs;
812 #if defined(__powerpc__)
813 /* There isn't a generic way to specify writethrough mappings */
814 pgprot_val(vma->vm_page_prot) |= _PAGE_NO_CACHE;
815 pgprot_val(vma->vm_page_prot) |= _PAGE_WRITETHRU;
816 pgprot_val(vma->vm_page_prot) &= ~_PAGE_GUARDED;
820 * don't allow them to later change to readable with mprotect (for when
821 * not initially mapped readable, as is normally the case)
823 vma->vm_flags &= ~VM_MAYREAD;
824 vma->vm_flags |= VM_DONTCOPY | VM_DONTEXPAND;
827 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
829 ret = io_remap_pfn_range(vma, vma->vm_start, phys >> PAGE_SHIFT,
830 vma->vm_end - vma->vm_start,
836 static int mmap_rcvegrbufs(struct vm_area_struct *vma,
837 struct qib_ctxtdata *rcd)
839 struct qib_devdata *dd = rcd->dd;
840 unsigned long start, size;
841 size_t total_size, i;
845 size = rcd->rcvegrbuf_size;
846 total_size = rcd->rcvegrbuf_chunks * size;
847 if ((vma->vm_end - vma->vm_start) > total_size) {
848 qib_devinfo(dd->pcidev, "FAIL on egr bufs: "
849 "reqlen %lx > actual %lx\n",
850 vma->vm_end - vma->vm_start,
851 (unsigned long) total_size);
856 if (vma->vm_flags & VM_WRITE) {
857 qib_devinfo(dd->pcidev, "Can't map eager buffers as "
858 "writable (flags=%lx)\n", vma->vm_flags);
862 /* don't allow them to later change to writeable with mprotect */
863 vma->vm_flags &= ~VM_MAYWRITE;
865 start = vma->vm_start;
867 for (i = 0; i < rcd->rcvegrbuf_chunks; i++, start += size) {
868 pfn = virt_to_phys(rcd->rcvegrbuf[i]) >> PAGE_SHIFT;
869 ret = remap_pfn_range(vma, start, pfn, size,
881 * qib_file_vma_fault - handle a VMA page fault.
883 static int qib_file_vma_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
887 page = vmalloc_to_page((void *)(vmf->pgoff << PAGE_SHIFT));
889 return VM_FAULT_SIGBUS;
897 static struct vm_operations_struct qib_file_vm_ops = {
898 .fault = qib_file_vma_fault,
901 static int mmap_kvaddr(struct vm_area_struct *vma, u64 pgaddr,
902 struct qib_ctxtdata *rcd, unsigned subctxt)
904 struct qib_devdata *dd = rcd->dd;
905 unsigned subctxt_cnt;
911 subctxt_cnt = rcd->subctxt_cnt;
912 size = rcd->rcvegrbuf_chunks * rcd->rcvegrbuf_size;
915 * Each process has all the subctxt uregbase, rcvhdrq, and
916 * rcvegrbufs mmapped - as an array for all the processes,
917 * and also separately for this process.
919 if (pgaddr == cvt_kvaddr(rcd->subctxt_uregbase)) {
920 addr = rcd->subctxt_uregbase;
921 size = PAGE_SIZE * subctxt_cnt;
922 } else if (pgaddr == cvt_kvaddr(rcd->subctxt_rcvhdr_base)) {
923 addr = rcd->subctxt_rcvhdr_base;
924 size = rcd->rcvhdrq_size * subctxt_cnt;
925 } else if (pgaddr == cvt_kvaddr(rcd->subctxt_rcvegrbuf)) {
926 addr = rcd->subctxt_rcvegrbuf;
928 } else if (pgaddr == cvt_kvaddr(rcd->subctxt_uregbase +
929 PAGE_SIZE * subctxt)) {
930 addr = rcd->subctxt_uregbase + PAGE_SIZE * subctxt;
932 } else if (pgaddr == cvt_kvaddr(rcd->subctxt_rcvhdr_base +
933 rcd->rcvhdrq_size * subctxt)) {
934 addr = rcd->subctxt_rcvhdr_base +
935 rcd->rcvhdrq_size * subctxt;
936 size = rcd->rcvhdrq_size;
937 } else if (pgaddr == cvt_kvaddr(&rcd->user_event_mask[subctxt])) {
938 addr = rcd->user_event_mask;
940 } else if (pgaddr == cvt_kvaddr(rcd->subctxt_rcvegrbuf +
942 addr = rcd->subctxt_rcvegrbuf + size * subctxt;
943 /* rcvegrbufs are read-only on the slave */
944 if (vma->vm_flags & VM_WRITE) {
945 qib_devinfo(dd->pcidev,
946 "Can't map eager buffers as "
947 "writable (flags=%lx)\n", vma->vm_flags);
952 * Don't allow permission to later change to writeable
955 vma->vm_flags &= ~VM_MAYWRITE;
958 len = vma->vm_end - vma->vm_start;
964 vma->vm_pgoff = (unsigned long) addr >> PAGE_SHIFT;
965 vma->vm_ops = &qib_file_vm_ops;
966 vma->vm_flags |= VM_RESERVED | VM_DONTEXPAND;
974 * qib_mmapf - mmap various structures into user space
975 * @fp: the file pointer
978 * We use this to have a shared buffer between the kernel and the user code
979 * for the rcvhdr queue, egr buffers, and the per-context user regs and pio
980 * buffers in the chip. We have the open and close entries so we can bump
981 * the ref count and keep the driver from being unloaded while still mapped.
983 static int qib_mmapf(struct file *fp, struct vm_area_struct *vma)
985 struct qib_ctxtdata *rcd;
986 struct qib_devdata *dd;
988 unsigned piobufs, piocnt;
992 if (!rcd || !(vma->vm_flags & VM_SHARED)) {
999 * This is the qib_do_user_init() code, mapping the shared buffers
1000 * and per-context user registers into the user process. The address
1001 * referred to by vm_pgoff is the file offset passed via mmap().
1002 * For shared contexts, this is the kernel vmalloc() address of the
1003 * pages to share with the master.
1004 * For non-shared or master ctxts, this is a physical address.
1005 * We only do one mmap for each space mapped.
1007 pgaddr = vma->vm_pgoff << PAGE_SHIFT;
1010 * Check for 0 in case one of the allocations failed, but user
1011 * called mmap anyway.
1019 * Physical addresses must fit in 40 bits for our hardware.
1020 * Check for kernel virtual addresses first, anything else must
1021 * match a HW or memory address.
1023 ret = mmap_kvaddr(vma, pgaddr, rcd, subctxt_fp(fp));
1030 ureg = dd->uregbase + dd->ureg_align * rcd->ctxt;
1031 if (!rcd->subctxt_cnt) {
1032 /* ctxt is not shared */
1033 piocnt = rcd->piocnt;
1034 piobufs = rcd->piobufs;
1035 } else if (!subctxt_fp(fp)) {
1036 /* caller is the master */
1037 piocnt = (rcd->piocnt / rcd->subctxt_cnt) +
1038 (rcd->piocnt % rcd->subctxt_cnt);
1039 piobufs = rcd->piobufs +
1040 dd->palign * (rcd->piocnt - piocnt);
1042 unsigned slave = subctxt_fp(fp) - 1;
1044 /* caller is a slave */
1045 piocnt = rcd->piocnt / rcd->subctxt_cnt;
1046 piobufs = rcd->piobufs + dd->palign * piocnt * slave;
1050 ret = mmap_ureg(vma, dd, ureg);
1051 else if (pgaddr == piobufs)
1052 ret = mmap_piobufs(vma, dd, rcd, piobufs, piocnt);
1053 else if (pgaddr == dd->pioavailregs_phys)
1054 /* in-memory copy of pioavail registers */
1055 ret = qib_mmap_mem(vma, rcd, PAGE_SIZE,
1056 (void *) dd->pioavailregs_dma, 0,
1057 "pioavail registers");
1058 else if (pgaddr == rcd->rcvegr_phys)
1059 ret = mmap_rcvegrbufs(vma, rcd);
1060 else if (pgaddr == (u64) rcd->rcvhdrq_phys)
1062 * The rcvhdrq itself; multiple pages, contiguous
1063 * from an i/o perspective. Shared contexts need
1064 * to map r/w, so we allow writing.
1066 ret = qib_mmap_mem(vma, rcd, rcd->rcvhdrq_size,
1067 rcd->rcvhdrq, 1, "rcvhdrq");
1068 else if (pgaddr == (u64) rcd->rcvhdrqtailaddr_phys)
1069 /* in-memory copy of rcvhdrq tail register */
1070 ret = qib_mmap_mem(vma, rcd, PAGE_SIZE,
1071 rcd->rcvhdrtail_kvaddr, 0,
1078 vma->vm_private_data = NULL;
1081 qib_devinfo(dd->pcidev,
1082 "mmap Failure %d: off %llx len %lx\n",
1083 -ret, (unsigned long long)pgaddr,
1084 vma->vm_end - vma->vm_start);
1089 static unsigned int qib_poll_urgent(struct qib_ctxtdata *rcd,
1091 struct poll_table_struct *pt)
1093 struct qib_devdata *dd = rcd->dd;
1096 poll_wait(fp, &rcd->wait, pt);
1098 spin_lock_irq(&dd->uctxt_lock);
1099 if (rcd->urgent != rcd->urgent_poll) {
1100 pollflag = POLLIN | POLLRDNORM;
1101 rcd->urgent_poll = rcd->urgent;
1104 set_bit(QIB_CTXT_WAITING_URG, &rcd->flag);
1106 spin_unlock_irq(&dd->uctxt_lock);
1111 static unsigned int qib_poll_next(struct qib_ctxtdata *rcd,
1113 struct poll_table_struct *pt)
1115 struct qib_devdata *dd = rcd->dd;
1118 poll_wait(fp, &rcd->wait, pt);
1120 spin_lock_irq(&dd->uctxt_lock);
1121 if (dd->f_hdrqempty(rcd)) {
1122 set_bit(QIB_CTXT_WAITING_RCV, &rcd->flag);
1123 dd->f_rcvctrl(rcd->ppd, QIB_RCVCTRL_INTRAVAIL_ENB, rcd->ctxt);
1126 pollflag = POLLIN | POLLRDNORM;
1127 spin_unlock_irq(&dd->uctxt_lock);
1132 static unsigned int qib_poll(struct file *fp, struct poll_table_struct *pt)
1134 struct qib_ctxtdata *rcd;
1140 else if (rcd->poll_type == QIB_POLL_TYPE_URGENT)
1141 pollflag = qib_poll_urgent(rcd, fp, pt);
1142 else if (rcd->poll_type == QIB_POLL_TYPE_ANYRCV)
1143 pollflag = qib_poll_next(rcd, fp, pt);
1151 * Check that userland and driver are compatible for subcontexts.
1153 static int qib_compatible_subctxts(int user_swmajor, int user_swminor)
1155 /* this code is written long-hand for clarity */
1156 if (QIB_USER_SWMAJOR != user_swmajor) {
1157 /* no promise of compatibility if major mismatch */
1160 if (QIB_USER_SWMAJOR == 1) {
1161 switch (QIB_USER_SWMINOR) {
1165 /* no subctxt implementation so cannot be compatible */
1168 /* 3 is only compatible with itself */
1169 return user_swminor == 3;
1171 /* >= 4 are compatible (or are expected to be) */
1172 return user_swminor >= 4;
1175 /* make no promises yet for future major versions */
1179 static int init_subctxts(struct qib_devdata *dd,
1180 struct qib_ctxtdata *rcd,
1181 const struct qib_user_info *uinfo)
1184 unsigned num_subctxts;
1188 * If the user is requesting zero subctxts,
1189 * skip the subctxt allocation.
1191 if (uinfo->spu_subctxt_cnt <= 0)
1193 num_subctxts = uinfo->spu_subctxt_cnt;
1195 /* Check for subctxt compatibility */
1196 if (!qib_compatible_subctxts(uinfo->spu_userversion >> 16,
1197 uinfo->spu_userversion & 0xffff)) {
1198 qib_devinfo(dd->pcidev,
1199 "Mismatched user version (%d.%d) and driver "
1200 "version (%d.%d) while context sharing. Ensure "
1201 "that driver and library are from the same "
1203 (int) (uinfo->spu_userversion >> 16),
1204 (int) (uinfo->spu_userversion & 0xffff),
1205 QIB_USER_SWMAJOR, QIB_USER_SWMINOR);
1208 if (num_subctxts > QLOGIC_IB_MAX_SUBCTXT) {
1213 rcd->subctxt_uregbase = vmalloc_user(PAGE_SIZE * num_subctxts);
1214 if (!rcd->subctxt_uregbase) {
1218 /* Note: rcd->rcvhdrq_size isn't initialized yet. */
1219 size = ALIGN(dd->rcvhdrcnt * dd->rcvhdrentsize *
1220 sizeof(u32), PAGE_SIZE) * num_subctxts;
1221 rcd->subctxt_rcvhdr_base = vmalloc_user(size);
1222 if (!rcd->subctxt_rcvhdr_base) {
1227 rcd->subctxt_rcvegrbuf = vmalloc_user(rcd->rcvegrbuf_chunks *
1228 rcd->rcvegrbuf_size *
1230 if (!rcd->subctxt_rcvegrbuf) {
1235 rcd->subctxt_cnt = uinfo->spu_subctxt_cnt;
1236 rcd->subctxt_id = uinfo->spu_subctxt_id;
1237 rcd->active_slaves = 1;
1238 rcd->redirect_seq_cnt = 1;
1239 set_bit(QIB_CTXT_MASTER_UNINIT, &rcd->flag);
1243 vfree(rcd->subctxt_rcvhdr_base);
1245 vfree(rcd->subctxt_uregbase);
1246 rcd->subctxt_uregbase = NULL;
1251 static int setup_ctxt(struct qib_pportdata *ppd, int ctxt,
1252 struct file *fp, const struct qib_user_info *uinfo)
1254 struct qib_devdata *dd = ppd->dd;
1255 struct qib_ctxtdata *rcd;
1259 rcd = qib_create_ctxtdata(ppd, ctxt);
1262 * Allocate memory for use in qib_tid_update() at open to
1263 * reduce cost of expected send setup per message segment
1266 ptmp = kmalloc(dd->rcvtidcnt * sizeof(u16) +
1267 dd->rcvtidcnt * sizeof(struct page **),
1270 if (!rcd || !ptmp) {
1271 qib_dev_err(dd, "Unable to allocate ctxtdata "
1272 "memory, failing open\n");
1276 rcd->userversion = uinfo->spu_userversion;
1277 ret = init_subctxts(dd, rcd, uinfo);
1280 rcd->tid_pg_list = ptmp;
1281 rcd->pid = current->pid;
1282 init_waitqueue_head(&dd->rcd[ctxt]->wait);
1283 strlcpy(rcd->comm, current->comm, sizeof(rcd->comm));
1285 qib_stats.sps_ctxts++;
1290 dd->rcd[ctxt] = NULL;
1297 static inline int usable(struct qib_pportdata *ppd, int active_only)
1299 struct qib_devdata *dd = ppd->dd;
1300 u32 linkok = active_only ? QIBL_LINKACTIVE :
1301 (QIBL_LINKINIT | QIBL_LINKARMED | QIBL_LINKACTIVE);
1303 return dd && (dd->flags & QIB_PRESENT) && dd->kregbase && ppd->lid &&
1304 (ppd->lflags & linkok);
1307 static int find_free_ctxt(int unit, struct file *fp,
1308 const struct qib_user_info *uinfo)
1310 struct qib_devdata *dd = qib_lookup(unit);
1311 struct qib_pportdata *ppd = NULL;
1315 if (!dd || (uinfo->spu_port && uinfo->spu_port > dd->num_pports)) {
1321 * If users requests specific port, only try that one port, else
1322 * select "best" port below, based on context.
1324 if (uinfo->spu_port) {
1325 ppd = dd->pport + uinfo->spu_port - 1;
1326 if (!usable(ppd, 0)) {
1332 for (ctxt = dd->first_user_ctxt; ctxt < dd->cfgctxts; ctxt++) {
1336 * The setting and clearing of user context rcd[x] protected
1340 /* choose port based on ctxt, if up, else 1st up */
1341 ppd = dd->pport + (ctxt % dd->num_pports);
1342 if (!usable(ppd, 0)) {
1344 for (i = 0; i < dd->num_pports; i++) {
1345 ppd = dd->pport + i;
1349 if (i == dd->num_pports) {
1355 ret = setup_ctxt(ppd, ctxt, fp, uinfo);
1364 static int get_a_ctxt(struct file *fp, const struct qib_user_info *uinfo)
1366 struct qib_pportdata *ppd;
1367 int ret = 0, devmax;
1370 u32 port = uinfo->spu_port, ctxt;
1372 devmax = qib_count_units(&npresent, &nup);
1374 for (ndev = 0; ndev < devmax; ndev++) {
1375 struct qib_devdata *dd = qib_lookup(ndev);
1377 /* device portion of usable() */
1378 if (!(dd && (dd->flags & QIB_PRESENT) && dd->kregbase))
1380 for (ctxt = dd->first_user_ctxt; ctxt < dd->cfgctxts; ctxt++) {
1384 if (port > dd->num_pports)
1386 ppd = dd->pport + port - 1;
1387 if (!usable(ppd, 0))
1391 * choose port based on ctxt, if up, else
1392 * first port that's up for multi-port HCA
1394 ppd = dd->pport + (ctxt % dd->num_pports);
1395 if (!usable(ppd, 0)) {
1399 for (j = 0; j < dd->num_pports &&
1401 if (usable(dd->pport + j, 0))
1402 ppd = dd->pport + j;
1404 continue; /* to next unit */
1407 ret = setup_ctxt(ppd, ctxt, fp, uinfo);
1424 static int find_shared_ctxt(struct file *fp,
1425 const struct qib_user_info *uinfo)
1427 int devmax, ndev, i;
1430 devmax = qib_count_units(NULL, NULL);
1432 for (ndev = 0; ndev < devmax; ndev++) {
1433 struct qib_devdata *dd = qib_lookup(ndev);
1435 /* device portion of usable() */
1436 if (!(dd && (dd->flags & QIB_PRESENT) && dd->kregbase))
1438 for (i = dd->first_user_ctxt; i < dd->cfgctxts; i++) {
1439 struct qib_ctxtdata *rcd = dd->rcd[i];
1441 /* Skip ctxts which are not yet open */
1442 if (!rcd || !rcd->cnt)
1444 /* Skip ctxt if it doesn't match the requested one */
1445 if (rcd->subctxt_id != uinfo->spu_subctxt_id)
1447 /* Verify the sharing process matches the master */
1448 if (rcd->subctxt_cnt != uinfo->spu_subctxt_cnt ||
1449 rcd->userversion != uinfo->spu_userversion ||
1450 rcd->cnt >= rcd->subctxt_cnt) {
1455 subctxt_fp(fp) = rcd->cnt++;
1456 rcd->subpid[subctxt_fp(fp)] = current->pid;
1457 tidcursor_fp(fp) = 0;
1458 rcd->active_slaves |= 1 << subctxt_fp(fp);
1468 static int qib_open(struct inode *in, struct file *fp)
1470 /* The real work is performed later in qib_assign_ctxt() */
1471 fp->private_data = kzalloc(sizeof(struct qib_filedata), GFP_KERNEL);
1472 if (fp->private_data) /* no cpu affinity by default */
1473 ((struct qib_filedata *)fp->private_data)->rec_cpu_num = -1;
1474 return fp->private_data ? 0 : -ENOMEM;
1478 * Get ctxt early, so can set affinity prior to memory allocation.
1480 static int qib_assign_ctxt(struct file *fp, const struct qib_user_info *uinfo)
1484 unsigned swmajor, swminor;
1486 /* Check to be sure we haven't already initialized this file */
1492 /* for now, if major version is different, bail */
1493 swmajor = uinfo->spu_userversion >> 16;
1494 if (swmajor != QIB_USER_SWMAJOR) {
1499 swminor = uinfo->spu_userversion & 0xffff;
1501 mutex_lock(&qib_mutex);
1503 if (qib_compatible_subctxts(swmajor, swminor) &&
1504 uinfo->spu_subctxt_cnt) {
1505 ret = find_shared_ctxt(fp, uinfo);
1513 i_minor = iminor(fp->f_dentry->d_inode) - QIB_USER_MINOR_BASE;
1515 ret = find_free_ctxt(i_minor - 1, fp, uinfo);
1517 ret = get_a_ctxt(fp, uinfo);
1521 struct qib_filedata *fd = fp->private_data;
1522 const struct qib_ctxtdata *rcd = fd->rcd;
1523 const struct qib_devdata *dd = rcd->dd;
1525 if (dd->flags & QIB_HAS_SEND_DMA) {
1526 fd->pq = qib_user_sdma_queue_create(&dd->pcidev->dev,
1535 * If process has NOT already set it's affinity, select and
1536 * reserve a processor for it, as a rendevous for all
1537 * users of the driver. If they don't actually later
1538 * set affinity to this cpu, or set it to some other cpu,
1539 * it just means that sooner or later we don't recommend
1540 * a cpu, and let the scheduler do it's best.
1542 if (!ret && cpus_weight(current->cpus_allowed) >=
1543 qib_cpulist_count) {
1545 cpu = find_first_zero_bit(qib_cpulist,
1547 if (cpu != qib_cpulist_count) {
1548 __set_bit(cpu, qib_cpulist);
1549 fd->rec_cpu_num = cpu;
1551 } else if (cpus_weight(current->cpus_allowed) == 1 &&
1552 test_bit(first_cpu(current->cpus_allowed),
1554 qib_devinfo(dd->pcidev, "%s PID %u affinity "
1555 "set to cpu %d; already allocated\n",
1556 current->comm, current->pid,
1557 first_cpu(current->cpus_allowed));
1560 mutex_unlock(&qib_mutex);
1567 static int qib_do_user_init(struct file *fp,
1568 const struct qib_user_info *uinfo)
1571 struct qib_ctxtdata *rcd = ctxt_fp(fp);
1572 struct qib_devdata *dd;
1575 /* Subctxts don't need to initialize anything since master did it. */
1576 if (subctxt_fp(fp)) {
1577 ret = wait_event_interruptible(rcd->wait,
1578 !test_bit(QIB_CTXT_MASTER_UNINIT, &rcd->flag));
1584 /* some ctxts may get extra buffers, calculate that here */
1585 uctxt = rcd->ctxt - dd->first_user_ctxt;
1586 if (uctxt < dd->ctxts_extrabuf) {
1587 rcd->piocnt = dd->pbufsctxt + 1;
1588 rcd->pio_base = rcd->piocnt * uctxt;
1590 rcd->piocnt = dd->pbufsctxt;
1591 rcd->pio_base = rcd->piocnt * uctxt +
1596 * All user buffers are 2KB buffers. If we ever support
1597 * giving 4KB buffers to user processes, this will need some
1598 * work. Can't use piobufbase directly, because it has
1599 * both 2K and 4K buffer base values. So check and handle.
1601 if ((rcd->pio_base + rcd->piocnt) > dd->piobcnt2k) {
1602 if (rcd->pio_base >= dd->piobcnt2k) {
1604 "%u:ctxt%u: no 2KB buffers available\n",
1605 dd->unit, rcd->ctxt);
1609 rcd->piocnt = dd->piobcnt2k - rcd->pio_base;
1610 qib_dev_err(dd, "Ctxt%u: would use 4KB bufs, using %u\n",
1611 rcd->ctxt, rcd->piocnt);
1614 rcd->piobufs = dd->pio2k_bufbase + rcd->pio_base * dd->palign;
1615 qib_chg_pioavailkernel(dd, rcd->pio_base, rcd->piocnt,
1616 TXCHK_CHG_TYPE_USER, rcd);
1618 * try to ensure that processes start up with consistent avail update
1619 * for their own range, at least. If system very quiet, it might
1620 * have the in-memory copy out of date at startup for this range of
1621 * buffers, when a context gets re-used. Do after the chg_pioavail
1622 * and before the rest of setup, so it's "almost certain" the dma
1623 * will have occurred (can't 100% guarantee, but should be many
1624 * decimals of 9s, with this ordering), given how much else happens
1627 dd->f_sendctrl(dd->pport, QIB_SENDCTRL_AVAIL_BLIP);
1630 * Now allocate the rcvhdr Q and eager TIDs; skip the TID
1631 * array for time being. If rcd->ctxt > chip-supported,
1632 * we need to do extra stuff here to handle by handling overflow
1633 * through ctxt 0, someday
1635 ret = qib_create_rcvhdrq(dd, rcd);
1637 ret = qib_setup_eagerbufs(rcd);
1641 rcd->tidcursor = 0; /* start at beginning after open */
1643 /* initialize poll variables... */
1645 rcd->urgent_poll = 0;
1648 * Now enable the ctxt for receive.
1649 * For chips that are set to DMA the tail register to memory
1650 * when they change (and when the update bit transitions from
1651 * 0 to 1. So for those chips, we turn it off and then back on.
1652 * This will (very briefly) affect any other open ctxts, but the
1653 * duration is very short, and therefore isn't an issue. We
1654 * explictly set the in-memory tail copy to 0 beforehand, so we
1655 * don't have to wait to be sure the DMA update has happened
1656 * (chip resets head/tail to 0 on transition to enable).
1658 if (rcd->rcvhdrtail_kvaddr)
1659 qib_clear_rcvhdrtail(rcd);
1661 dd->f_rcvctrl(rcd->ppd, QIB_RCVCTRL_CTXT_ENB | QIB_RCVCTRL_TIDFLOW_ENB,
1664 /* Notify any waiting slaves */
1665 if (rcd->subctxt_cnt) {
1666 clear_bit(QIB_CTXT_MASTER_UNINIT, &rcd->flag);
1667 wake_up(&rcd->wait);
1672 qib_chg_pioavailkernel(dd, rcd->pio_base, rcd->piocnt,
1673 TXCHK_CHG_TYPE_KERN, rcd);
1679 * unlock_exptid - unlock any expected TID entries context still had in use
1682 * We don't actually update the chip here, because we do a bulk update
1683 * below, using f_clear_tids.
1685 static void unlock_expected_tids(struct qib_ctxtdata *rcd)
1687 struct qib_devdata *dd = rcd->dd;
1688 int ctxt_tidbase = rcd->ctxt * dd->rcvtidcnt;
1689 int i, cnt = 0, maxtid = ctxt_tidbase + dd->rcvtidcnt;
1691 for (i = ctxt_tidbase; i < maxtid; i++) {
1692 struct page *p = dd->pageshadow[i];
1698 phys = dd->physshadow[i];
1699 dd->physshadow[i] = dd->tidinvalid;
1700 dd->pageshadow[i] = NULL;
1701 pci_unmap_page(dd->pcidev, phys, PAGE_SIZE,
1702 PCI_DMA_FROMDEVICE);
1703 qib_release_user_pages(&p, 1);
1708 static int qib_close(struct inode *in, struct file *fp)
1711 struct qib_filedata *fd;
1712 struct qib_ctxtdata *rcd;
1713 struct qib_devdata *dd;
1714 unsigned long flags;
1718 mutex_lock(&qib_mutex);
1720 fd = (struct qib_filedata *) fp->private_data;
1721 fp->private_data = NULL;
1724 mutex_unlock(&qib_mutex);
1730 /* ensure all pio buffer writes in progress are flushed */
1733 /* drain user sdma queue */
1735 qib_user_sdma_queue_drain(rcd->ppd, fd->pq);
1736 qib_user_sdma_queue_destroy(fd->pq);
1739 if (fd->rec_cpu_num != -1)
1740 __clear_bit(fd->rec_cpu_num, qib_cpulist);
1744 * XXX If the master closes the context before the slave(s),
1745 * revoke the mmap for the eager receive queue so
1746 * the slave(s) don't wait for receive data forever.
1748 rcd->active_slaves &= ~(1 << fd->subctxt);
1749 rcd->subpid[fd->subctxt] = 0;
1750 mutex_unlock(&qib_mutex);
1754 /* early; no interrupt users after this */
1755 spin_lock_irqsave(&dd->uctxt_lock, flags);
1757 dd->rcd[ctxt] = NULL;
1760 spin_unlock_irqrestore(&dd->uctxt_lock, flags);
1762 if (rcd->rcvwait_to || rcd->piowait_to ||
1763 rcd->rcvnowait || rcd->pionowait) {
1764 rcd->rcvwait_to = 0;
1765 rcd->piowait_to = 0;
1773 /* atomically clear receive enable ctxt and intr avail. */
1774 dd->f_rcvctrl(rcd->ppd, QIB_RCVCTRL_CTXT_DIS |
1775 QIB_RCVCTRL_INTRAVAIL_DIS, ctxt);
1777 /* clean up the pkeys for this ctxt user */
1778 qib_clean_part_key(rcd, dd);
1779 qib_disarm_piobufs(dd, rcd->pio_base, rcd->piocnt);
1780 qib_chg_pioavailkernel(dd, rcd->pio_base,
1781 rcd->piocnt, TXCHK_CHG_TYPE_KERN, NULL);
1783 dd->f_clear_tids(dd, rcd);
1786 unlock_expected_tids(rcd);
1787 qib_stats.sps_ctxts--;
1790 mutex_unlock(&qib_mutex);
1791 qib_free_ctxtdata(dd, rcd); /* after releasing the mutex */
1798 static int qib_ctxt_info(struct file *fp, struct qib_ctxt_info __user *uinfo)
1800 struct qib_ctxt_info info;
1803 struct qib_ctxtdata *rcd = ctxt_fp(fp);
1804 struct qib_filedata *fd;
1806 fd = (struct qib_filedata *) fp->private_data;
1808 info.num_active = qib_count_active_units();
1809 info.unit = rcd->dd->unit;
1810 info.port = rcd->ppd->port;
1811 info.ctxt = rcd->ctxt;
1812 info.subctxt = subctxt_fp(fp);
1813 /* Number of user ctxts available for this device. */
1814 info.num_ctxts = rcd->dd->cfgctxts - rcd->dd->first_user_ctxt;
1815 info.num_subctxts = rcd->subctxt_cnt;
1816 info.rec_cpu = fd->rec_cpu_num;
1819 if (copy_to_user(uinfo, &info, sz)) {
1829 static int qib_sdma_get_inflight(struct qib_user_sdma_queue *pq,
1830 u32 __user *inflightp)
1832 const u32 val = qib_user_sdma_inflight_counter(pq);
1834 if (put_user(val, inflightp))
1840 static int qib_sdma_get_complete(struct qib_pportdata *ppd,
1841 struct qib_user_sdma_queue *pq,
1842 u32 __user *completep)
1850 err = qib_user_sdma_make_progress(ppd, pq);
1854 val = qib_user_sdma_complete_counter(pq);
1855 if (put_user(val, completep))
1861 static int disarm_req_delay(struct qib_ctxtdata *rcd)
1865 if (!usable(rcd->ppd, 1)) {
1868 * if link is down, or otherwise not usable, delay
1869 * the caller up to 30 seconds, so we don't thrash
1870 * in trying to get the chip back to ACTIVE, and
1871 * set flag so they make the call again.
1873 if (rcd->user_event_mask) {
1875 * subctxt_cnt is 0 if not shared, so do base
1876 * separately, first, then remaining subctxt, if any
1878 set_bit(_QIB_EVENT_DISARM_BUFS_BIT,
1879 &rcd->user_event_mask[0]);
1880 for (i = 1; i < rcd->subctxt_cnt; i++)
1881 set_bit(_QIB_EVENT_DISARM_BUFS_BIT,
1882 &rcd->user_event_mask[i]);
1884 for (i = 0; !usable(rcd->ppd, 1) && i < 300; i++)
1892 * Find all user contexts in use, and set the specified bit in their
1894 * See also find_ctxt() for a similar use, that is specific to send buffers.
1896 int qib_set_uevent_bits(struct qib_pportdata *ppd, const int evtbit)
1898 struct qib_ctxtdata *rcd;
1902 spin_lock(&ppd->dd->uctxt_lock);
1903 for (ctxt = ppd->dd->first_user_ctxt; ctxt < ppd->dd->cfgctxts;
1905 rcd = ppd->dd->rcd[ctxt];
1908 if (rcd->user_event_mask) {
1911 * subctxt_cnt is 0 if not shared, so do base
1912 * separately, first, then remaining subctxt, if any
1914 set_bit(evtbit, &rcd->user_event_mask[0]);
1915 for (i = 1; i < rcd->subctxt_cnt; i++)
1916 set_bit(evtbit, &rcd->user_event_mask[i]);
1921 spin_unlock(&ppd->dd->uctxt_lock);
1927 * clear the event notifier events for this context.
1928 * For the DISARM_BUFS case, we also take action (this obsoletes
1929 * the older QIB_CMD_DISARM_BUFS, but we keep it for backwards
1931 * Other bits don't currently require actions, just atomically clear.
1932 * User process then performs actions appropriate to bit having been
1933 * set, if desired, and checks again in future.
1935 static int qib_user_event_ack(struct qib_ctxtdata *rcd, int subctxt,
1936 unsigned long events)
1940 for (i = 0; i <= _QIB_MAX_EVENT_BIT; i++) {
1941 if (!test_bit(i, &events))
1943 if (i == _QIB_EVENT_DISARM_BUFS_BIT) {
1944 (void)qib_disarm_piobufs_ifneeded(rcd);
1945 ret = disarm_req_delay(rcd);
1947 clear_bit(i, &rcd->user_event_mask[subctxt]);
1952 static ssize_t qib_write(struct file *fp, const char __user *data,
1953 size_t count, loff_t *off)
1955 const struct qib_cmd __user *ucmd;
1956 struct qib_ctxtdata *rcd;
1957 const void __user *src;
1958 size_t consumed, copy = 0;
1963 if (count < sizeof(cmd.type)) {
1968 ucmd = (const struct qib_cmd __user *) data;
1970 if (copy_from_user(&cmd.type, &ucmd->type, sizeof(cmd.type))) {
1975 consumed = sizeof(cmd.type);
1978 case QIB_CMD_ASSIGN_CTXT:
1979 case QIB_CMD_USER_INIT:
1980 copy = sizeof(cmd.cmd.user_info);
1981 dest = &cmd.cmd.user_info;
1982 src = &ucmd->cmd.user_info;
1985 case QIB_CMD_RECV_CTRL:
1986 copy = sizeof(cmd.cmd.recv_ctrl);
1987 dest = &cmd.cmd.recv_ctrl;
1988 src = &ucmd->cmd.recv_ctrl;
1991 case QIB_CMD_CTXT_INFO:
1992 copy = sizeof(cmd.cmd.ctxt_info);
1993 dest = &cmd.cmd.ctxt_info;
1994 src = &ucmd->cmd.ctxt_info;
1997 case QIB_CMD_TID_UPDATE:
1998 case QIB_CMD_TID_FREE:
1999 copy = sizeof(cmd.cmd.tid_info);
2000 dest = &cmd.cmd.tid_info;
2001 src = &ucmd->cmd.tid_info;
2004 case QIB_CMD_SET_PART_KEY:
2005 copy = sizeof(cmd.cmd.part_key);
2006 dest = &cmd.cmd.part_key;
2007 src = &ucmd->cmd.part_key;
2010 case QIB_CMD_DISARM_BUFS:
2011 case QIB_CMD_PIOAVAILUPD: /* force an update of PIOAvail reg */
2017 case QIB_CMD_POLL_TYPE:
2018 copy = sizeof(cmd.cmd.poll_type);
2019 dest = &cmd.cmd.poll_type;
2020 src = &ucmd->cmd.poll_type;
2023 case QIB_CMD_ARMLAUNCH_CTRL:
2024 copy = sizeof(cmd.cmd.armlaunch_ctrl);
2025 dest = &cmd.cmd.armlaunch_ctrl;
2026 src = &ucmd->cmd.armlaunch_ctrl;
2029 case QIB_CMD_SDMA_INFLIGHT:
2030 copy = sizeof(cmd.cmd.sdma_inflight);
2031 dest = &cmd.cmd.sdma_inflight;
2032 src = &ucmd->cmd.sdma_inflight;
2035 case QIB_CMD_SDMA_COMPLETE:
2036 copy = sizeof(cmd.cmd.sdma_complete);
2037 dest = &cmd.cmd.sdma_complete;
2038 src = &ucmd->cmd.sdma_complete;
2041 case QIB_CMD_ACK_EVENT:
2042 copy = sizeof(cmd.cmd.event_mask);
2043 dest = &cmd.cmd.event_mask;
2044 src = &ucmd->cmd.event_mask;
2053 if ((count - consumed) < copy) {
2057 if (copy_from_user(dest, src, copy)) {
2065 if (!rcd && cmd.type != QIB_CMD_ASSIGN_CTXT) {
2071 case QIB_CMD_ASSIGN_CTXT:
2072 ret = qib_assign_ctxt(fp, &cmd.cmd.user_info);
2077 case QIB_CMD_USER_INIT:
2078 ret = qib_do_user_init(fp, &cmd.cmd.user_info);
2081 ret = qib_get_base_info(fp, (void __user *) (unsigned long)
2082 cmd.cmd.user_info.spu_base_info,
2083 cmd.cmd.user_info.spu_base_info_size);
2086 case QIB_CMD_RECV_CTRL:
2087 ret = qib_manage_rcvq(rcd, subctxt_fp(fp), cmd.cmd.recv_ctrl);
2090 case QIB_CMD_CTXT_INFO:
2091 ret = qib_ctxt_info(fp, (struct qib_ctxt_info __user *)
2092 (unsigned long) cmd.cmd.ctxt_info);
2095 case QIB_CMD_TID_UPDATE:
2096 ret = qib_tid_update(rcd, fp, &cmd.cmd.tid_info);
2099 case QIB_CMD_TID_FREE:
2100 ret = qib_tid_free(rcd, subctxt_fp(fp), &cmd.cmd.tid_info);
2103 case QIB_CMD_SET_PART_KEY:
2104 ret = qib_set_part_key(rcd, cmd.cmd.part_key);
2107 case QIB_CMD_DISARM_BUFS:
2108 (void)qib_disarm_piobufs_ifneeded(rcd);
2109 ret = disarm_req_delay(rcd);
2112 case QIB_CMD_PIOAVAILUPD:
2113 qib_force_pio_avail_update(rcd->dd);
2116 case QIB_CMD_POLL_TYPE:
2117 rcd->poll_type = cmd.cmd.poll_type;
2120 case QIB_CMD_ARMLAUNCH_CTRL:
2121 rcd->dd->f_set_armlaunch(rcd->dd, cmd.cmd.armlaunch_ctrl);
2124 case QIB_CMD_SDMA_INFLIGHT:
2125 ret = qib_sdma_get_inflight(user_sdma_queue_fp(fp),
2126 (u32 __user *) (unsigned long)
2127 cmd.cmd.sdma_inflight);
2130 case QIB_CMD_SDMA_COMPLETE:
2131 ret = qib_sdma_get_complete(rcd->ppd,
2132 user_sdma_queue_fp(fp),
2133 (u32 __user *) (unsigned long)
2134 cmd.cmd.sdma_complete);
2137 case QIB_CMD_ACK_EVENT:
2138 ret = qib_user_event_ack(rcd, subctxt_fp(fp),
2139 cmd.cmd.event_mask);
2150 static ssize_t qib_aio_write(struct kiocb *iocb, const struct iovec *iov,
2151 unsigned long dim, loff_t off)
2153 struct qib_filedata *fp = iocb->ki_filp->private_data;
2154 struct qib_ctxtdata *rcd = ctxt_fp(iocb->ki_filp);
2155 struct qib_user_sdma_queue *pq = fp->pq;
2160 return qib_user_sdma_writev(rcd, pq, iov, dim);
2163 static struct class *qib_class;
2164 static dev_t qib_dev;
2166 int qib_cdev_init(int minor, const char *name,
2167 const struct file_operations *fops,
2168 struct cdev **cdevp, struct device **devp)
2170 const dev_t dev = MKDEV(MAJOR(qib_dev), minor);
2172 struct device *device = NULL;
2175 cdev = cdev_alloc();
2177 printk(KERN_ERR QIB_DRV_NAME
2178 ": Could not allocate cdev for minor %d, %s\n",
2184 cdev->owner = THIS_MODULE;
2186 kobject_set_name(&cdev->kobj, name);
2188 ret = cdev_add(cdev, dev, 1);
2190 printk(KERN_ERR QIB_DRV_NAME
2191 ": Could not add cdev for minor %d, %s (err %d)\n",
2196 device = device_create(qib_class, NULL, dev, NULL, name);
2197 if (!IS_ERR(device))
2199 ret = PTR_ERR(device);
2201 printk(KERN_ERR QIB_DRV_NAME ": Could not create "
2202 "device for minor %d, %s (err %d)\n",
2213 void qib_cdev_cleanup(struct cdev **cdevp, struct device **devp)
2215 struct device *device = *devp;
2218 device_unregister(device);
2228 static struct cdev *wildcard_cdev;
2229 static struct device *wildcard_device;
2231 int __init qib_dev_init(void)
2235 ret = alloc_chrdev_region(&qib_dev, 0, QIB_NMINORS, QIB_DRV_NAME);
2237 printk(KERN_ERR QIB_DRV_NAME ": Could not allocate "
2238 "chrdev region (err %d)\n", -ret);
2242 qib_class = class_create(THIS_MODULE, "ipath");
2243 if (IS_ERR(qib_class)) {
2244 ret = PTR_ERR(qib_class);
2245 printk(KERN_ERR QIB_DRV_NAME ": Could not create "
2246 "device class (err %d)\n", -ret);
2247 unregister_chrdev_region(qib_dev, QIB_NMINORS);
2254 void qib_dev_cleanup(void)
2257 class_destroy(qib_class);
2261 unregister_chrdev_region(qib_dev, QIB_NMINORS);
2264 static atomic_t user_count = ATOMIC_INIT(0);
2266 static void qib_user_remove(struct qib_devdata *dd)
2268 if (atomic_dec_return(&user_count) == 0)
2269 qib_cdev_cleanup(&wildcard_cdev, &wildcard_device);
2271 qib_cdev_cleanup(&dd->user_cdev, &dd->user_device);
2274 static int qib_user_add(struct qib_devdata *dd)
2279 if (atomic_inc_return(&user_count) == 1) {
2280 ret = qib_cdev_init(0, "ipath", &qib_file_ops,
2281 &wildcard_cdev, &wildcard_device);
2286 snprintf(name, sizeof(name), "ipath%d", dd->unit);
2287 ret = qib_cdev_init(dd->unit + 1, name, &qib_file_ops,
2288 &dd->user_cdev, &dd->user_device);
2290 qib_user_remove(dd);
2296 * Create per-unit files in /dev
2298 int qib_device_create(struct qib_devdata *dd)
2302 r = qib_user_add(dd);
2303 ret = qib_diag_add(dd);
2310 * Remove per-unit files in /dev
2311 * void, core kernel returns no errors for this stuff
2313 void qib_device_remove(struct qib_devdata *dd)
2315 qib_user_remove(dd);
2316 qib_diag_remove(dd);