drivers/infiniband/hw/ipath/ipath_verbs.c

   1 /*
   2  * Copyright (c) 2006, 2007 QLogic Corporation. All rights reserved.
   3  * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
   4  *
   5  * This software is available to you under a choice of one of two
   6  * licenses.  You may choose to be licensed under the terms of the GNU
   7  * General Public License (GPL) Version 2, available from the file
   8  * COPYING in the main directory of this source tree, or the
   9  * OpenIB.org BSD license below:
  10  *
  11  *     Redistribution and use in source and binary forms, with or
  12  *     without modification, are permitted provided that the following
  13  *     conditions are met:
  14  *
  15  *      - Redistributions of source code must retain the above
  16  *        copyright notice, this list of conditions and the following
  17  *        disclaimer.
  18  *
  19  *      - Redistributions in binary form must reproduce the above
  20  *        copyright notice, this list of conditions and the following
  21  *        disclaimer in the documentation and/or other materials
  22  *        provided with the distribution.
  23  *
  24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31  * SOFTWARE.
  32  */
  33
  34 #include <rdma/ib_mad.h>
  35 #include <rdma/ib_user_verbs.h>
  36 #include <linux/io.h>
  37 #include <linux/utsname.h>
  38
  39 #include "ipath_kernel.h"
  40 #include "ipath_verbs.h"
  41 #include "ipath_common.h"
  42
  43 static unsigned int ib_ipath_qp_table_size = 251;
  44 module_param_named(qp_table_size, ib_ipath_qp_table_size, uint, S_IRUGO);
  45 MODULE_PARM_DESC(qp_table_size, "QP table size");
  46
  47 unsigned int ib_ipath_lkey_table_size = 12;
  48 module_param_named(lkey_table_size, ib_ipath_lkey_table_size, uint,
  49                    S_IRUGO);
  50 MODULE_PARM_DESC(lkey_table_size,
  51                  "LKEY table size in bits (2^n, 1 <= n <= 23)");
  52
  53 static unsigned int ib_ipath_max_pds = 0xFFFF;
  54 module_param_named(max_pds, ib_ipath_max_pds, uint, S_IWUSR | S_IRUGO);
  55 MODULE_PARM_DESC(max_pds,
  56                  "Maximum number of protection domains to support");
  57
  58 static unsigned int ib_ipath_max_ahs = 0xFFFF;
  59 module_param_named(max_ahs, ib_ipath_max_ahs, uint, S_IWUSR | S_IRUGO);
  60 MODULE_PARM_DESC(max_ahs, "Maximum number of address handles to support");
  61
  62 unsigned int ib_ipath_max_cqes = 0x2FFFF;
  63 module_param_named(max_cqes, ib_ipath_max_cqes, uint, S_IWUSR | S_IRUGO);
  64 MODULE_PARM_DESC(max_cqes,
  65                  "Maximum number of completion queue entries to support");
  66
  67 unsigned int ib_ipath_max_cqs = 0x1FFFF;
  68 module_param_named(max_cqs, ib_ipath_max_cqs, uint, S_IWUSR | S_IRUGO);
  69 MODULE_PARM_DESC(max_cqs, "Maximum number of completion queues to support");
  70
  71 unsigned int ib_ipath_max_qp_wrs = 0x3FFF;
  72 module_param_named(max_qp_wrs, ib_ipath_max_qp_wrs, uint,
  73                    S_IWUSR | S_IRUGO);
  74 MODULE_PARM_DESC(max_qp_wrs, "Maximum number of QP WRs to support");
  75
  76 unsigned int ib_ipath_max_qps = 16384;
  77 module_param_named(max_qps, ib_ipath_max_qps, uint, S_IWUSR | S_IRUGO);
  78 MODULE_PARM_DESC(max_qps, "Maximum number of QPs to support");
  79
  80 unsigned int ib_ipath_max_sges = 0x60;
  81 module_param_named(max_sges, ib_ipath_max_sges, uint, S_IWUSR | S_IRUGO);
  82 MODULE_PARM_DESC(max_sges, "Maximum number of SGEs to support");
  83
  84 unsigned int ib_ipath_max_mcast_grps = 16384;
  85 module_param_named(max_mcast_grps, ib_ipath_max_mcast_grps, uint,
  86                    S_IWUSR | S_IRUGO);
  87 MODULE_PARM_DESC(max_mcast_grps,
  88                  "Maximum number of multicast groups to support");
  89
  90 unsigned int ib_ipath_max_mcast_qp_attached = 16;
  91 module_param_named(max_mcast_qp_attached, ib_ipath_max_mcast_qp_attached,
  92                    uint, S_IWUSR | S_IRUGO);
  93 MODULE_PARM_DESC(max_mcast_qp_attached,
  94                  "Maximum number of attached QPs to support");
  95
  96 unsigned int ib_ipath_max_srqs = 1024;
  97 module_param_named(max_srqs, ib_ipath_max_srqs, uint, S_IWUSR | S_IRUGO);
  98 MODULE_PARM_DESC(max_srqs, "Maximum number of SRQs to support");
  99
 100 unsigned int ib_ipath_max_srq_sges = 128;
 101 module_param_named(max_srq_sges, ib_ipath_max_srq_sges,
 102                    uint, S_IWUSR | S_IRUGO);
 103 MODULE_PARM_DESC(max_srq_sges, "Maximum number of SRQ SGEs to support");
 104
 105 unsigned int ib_ipath_max_srq_wrs = 0x1FFFF;
 106 module_param_named(max_srq_wrs, ib_ipath_max_srq_wrs,
 107                    uint, S_IWUSR | S_IRUGO);
 108 MODULE_PARM_DESC(max_srq_wrs, "Maximum number of SRQ WRs support");
 109
 110 static unsigned int ib_ipath_disable_sma;
 111 module_param_named(disable_sma, ib_ipath_disable_sma, uint, S_IWUSR | S_IRUGO);
 112 MODULE_PARM_DESC(ib_ipath_disable_sma, "Disable the SMA");
 113
 114 const int ib_ipath_state_ops[IB_QPS_ERR + 1] = {
 115         [IB_QPS_RESET] = 0,
 116         [IB_QPS_INIT] = IPATH_POST_RECV_OK,
 117         [IB_QPS_RTR] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK,
 118         [IB_QPS_RTS] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK |
 119             IPATH_POST_SEND_OK | IPATH_PROCESS_SEND_OK,
 120         [IB_QPS_SQD] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK |
 121             IPATH_POST_SEND_OK,
 122         [IB_QPS_SQE] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK,
 123         [IB_QPS_ERR] = 0,
 124 };
 125
 126 struct ipath_ucontext {
 127         struct ib_ucontext ibucontext;
 128 };
 129
 130 static inline struct ipath_ucontext *to_iucontext(struct ib_ucontext
 131                                                   *ibucontext)
 132 {
 133         return container_of(ibucontext, struct ipath_ucontext, ibucontext);
 134 }
 135
 136 /*
 137  * Translate ib_wr_opcode into ib_wc_opcode.
 138  */
 139 const enum ib_wc_opcode ib_ipath_wc_opcode[] = {
 140         [IB_WR_RDMA_WRITE] = IB_WC_RDMA_WRITE,
 141         [IB_WR_RDMA_WRITE_WITH_IMM] = IB_WC_RDMA_WRITE,
 142         [IB_WR_SEND] = IB_WC_SEND,
 143         [IB_WR_SEND_WITH_IMM] = IB_WC_SEND,
 144         [IB_WR_RDMA_READ] = IB_WC_RDMA_READ,
 145         [IB_WR_ATOMIC_CMP_AND_SWP] = IB_WC_COMP_SWAP,
 146         [IB_WR_ATOMIC_FETCH_AND_ADD] = IB_WC_FETCH_ADD
 147 };
 148
 149 /*
 150  * System image GUID.
 151  */
 152 static __be64 sys_image_guid;
 153
 154 /**
 155  * ipath_copy_sge - copy data to SGE memory
 156  * @ss: the SGE state
 157  * @data: the data to copy
 158  * @length: the length of the data
 159  */
 160 void ipath_copy_sge(struct ipath_sge_state *ss, void *data, u32 length)
 161 {
 162         struct ipath_sge *sge = &ss->sge;
 163
 164         while (length) {
 165                 u32 len = sge->length;
 166
 167                 if (len > length)
 168                         len = length;
 169                 if (len > sge->sge_length)
 170                         len = sge->sge_length;
 171                 BUG_ON(len == 0);
 172                 memcpy(sge->vaddr, data, len);
 173                 sge->vaddr += len;
 174                 sge->length -= len;
 175                 sge->sge_length -= len;
 176                 if (sge->sge_length == 0) {
 177                         if (--ss->num_sge)
 178                                 *sge = *ss->sg_list++;
 179                 } else if (sge->length == 0 && sge->mr != NULL) {
 180                         if (++sge->n >= IPATH_SEGSZ) {
 181                                 if (++sge->m >= sge->mr->mapsz)
 182                                         break;
 183                                 sge->n = 0;
 184                         }
 185                         sge->vaddr =
 186                                 sge->mr->map[sge->m]->segs[sge->n].vaddr;
 187                         sge->length =
 188                                 sge->mr->map[sge->m]->segs[sge->n].length;
 189                 }
 190                 data += len;
 191                 length -= len;
 192         }
 193 }
 194
 195 /**
 196  * ipath_skip_sge - skip over SGE memory - XXX almost dup of prev func
 197  * @ss: the SGE state
 198  * @length: the number of bytes to skip
 199  */
 200 void ipath_skip_sge(struct ipath_sge_state *ss, u32 length)
 201 {
 202         struct ipath_sge *sge = &ss->sge;
 203
 204         while (length) {
 205                 u32 len = sge->length;
 206
 207                 if (len > length)
 208                         len = length;
 209                 if (len > sge->sge_length)
 210                         len = sge->sge_length;
 211                 BUG_ON(len == 0);
 212                 sge->vaddr += len;
 213                 sge->length -= len;
 214                 sge->sge_length -= len;
 215                 if (sge->sge_length == 0) {
 216                         if (--ss->num_sge)
 217                                 *sge = *ss->sg_list++;
 218                 } else if (sge->length == 0 && sge->mr != NULL) {
 219                         if (++sge->n >= IPATH_SEGSZ) {
 220                                 if (++sge->m >= sge->mr->mapsz)
 221                                         break;
 222                                 sge->n = 0;
 223                         }
 224                         sge->vaddr =
 225                                 sge->mr->map[sge->m]->segs[sge->n].vaddr;
 226                         sge->length =
 227                                 sge->mr->map[sge->m]->segs[sge->n].length;
 228                 }
 229                 length -= len;
 230         }
 231 }
 232
 233 /**
 234  * ipath_post_one_send - post one RC, UC, or UD send work request
 235  * @qp: the QP to post on
 236  * @wr: the work request to send
 237  */
 238 static int ipath_post_one_send(struct ipath_qp *qp, struct ib_send_wr *wr)
 239 {
 240         struct ipath_swqe *wqe;
 241         u32 next;
 242         int i;
 243         int j;
 244         int acc;
 245         int ret;
 246         unsigned long flags;
 247
 248         spin_lock_irqsave(&qp->s_lock, flags);
 249
 250         /* Check that state is OK to post send. */
 251         if (!(ib_ipath_state_ops[qp->state] & IPATH_POST_SEND_OK))
 252                 goto bail_inval;
 253
 254         /* IB spec says that num_sge == 0 is OK. */
 255         if (wr->num_sge > qp->s_max_sge)
 256                 goto bail_inval;
 257
 258         /*
 259          * Don't allow RDMA reads or atomic operations on UC or
 260          * undefined operations.
 261          * Make sure buffer is large enough to hold the result for atomics.
 262          */
 263         if (qp->ibqp.qp_type == IB_QPT_UC) {
 264                 if ((unsigned) wr->opcode >= IB_WR_RDMA_READ)
 265                         goto bail_inval;
 266         } else if (qp->ibqp.qp_type == IB_QPT_UD) {
 267                 /* Check UD opcode */
 268                 if (wr->opcode != IB_WR_SEND &&
 269                     wr->opcode != IB_WR_SEND_WITH_IMM)
 270                         goto bail_inval;
 271                 /* Check UD destination address PD */
 272                 if (qp->ibqp.pd != wr->wr.ud.ah->pd)
 273                         goto bail_inval;
 274         } else if ((unsigned) wr->opcode > IB_WR_ATOMIC_FETCH_AND_ADD)
 275                 goto bail_inval;
 276         else if (wr->opcode >= IB_WR_ATOMIC_CMP_AND_SWP &&
 277                    (wr->num_sge == 0 ||
 278                     wr->sg_list[0].length < sizeof(u64) ||
 279                     wr->sg_list[0].addr & (sizeof(u64) - 1)))
 280                 goto bail_inval;
 281         else if (wr->opcode >= IB_WR_RDMA_READ && !qp->s_max_rd_atomic)
 282                 goto bail_inval;
 283
 284         next = qp->s_head + 1;
 285         if (next >= qp->s_size)
 286                 next = 0;
 287         if (next == qp->s_last)
 288                 goto bail_inval;
 289
 290         wqe = get_swqe_ptr(qp, qp->s_head);
 291         wqe->wr = *wr;
 292         wqe->ssn = qp->s_ssn++;
 293         wqe->length = 0;
 294         if (wr->num_sge) {
 295                 acc = wr->opcode >= IB_WR_RDMA_READ ?
 296                         IB_ACCESS_LOCAL_WRITE : 0;
 297                 for (i = 0, j = 0; i < wr->num_sge; i++) {
 298                         u32 length = wr->sg_list[i].length;
 299                         int ok;
 300
 301                         if (length == 0)
 302                                 continue;
 303                         ok = ipath_lkey_ok(qp, &wqe->sg_list[j],
 304                                            &wr->sg_list[i], acc);
 305                         if (!ok)
 306                                 goto bail_inval;
 307                         wqe->length += length;
 308                         j++;
 309                 }
 310                 wqe->wr.num_sge = j;
 311         }
 312         if (qp->ibqp.qp_type == IB_QPT_UC ||
 313             qp->ibqp.qp_type == IB_QPT_RC) {
 314                 if (wqe->length > 0x80000000U)
 315                         goto bail_inval;
 316         } else if (wqe->length > to_idev(qp->ibqp.device)->dd->ipath_ibmtu)
 317                 goto bail_inval;
 318         qp->s_head = next;
 319
 320         ret = 0;
 321         goto bail;
 322
 323 bail_inval:
 324         ret = -EINVAL;
 325 bail:
 326         spin_unlock_irqrestore(&qp->s_lock, flags);
 327         return ret;
 328 }
 329
 330 /**
 331  * ipath_post_send - post a send on a QP
 332  * @ibqp: the QP to post the send on
 333  * @wr: the list of work requests to post
 334  * @bad_wr: the first bad WR is put here
 335  *
 336  * This may be called from interrupt context.
 337  */
 338 static int ipath_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
 339                            struct ib_send_wr **bad_wr)
 340 {
 341         struct ipath_qp *qp = to_iqp(ibqp);
 342         int err = 0;
 343
 344         for (; wr; wr = wr->next) {
 345                 err = ipath_post_one_send(qp, wr);
 346                 if (err) {
 347                         *bad_wr = wr;
 348                         goto bail;
 349                 }
 350         }
 351
 352         /* Try to do the send work in the caller's context. */
 353         ipath_do_send((unsigned long) qp);
 354
 355 bail:
 356         return err;
 357 }
 358
 359 /**
 360  * ipath_post_receive - post a receive on a QP
 361  * @ibqp: the QP to post the receive on
 362  * @wr: the WR to post
 363  * @bad_wr: the first bad WR is put here
 364  *
 365  * This may be called from interrupt context.
 366  */
 367 static int ipath_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
 368                               struct ib_recv_wr **bad_wr)
 369 {
 370         struct ipath_qp *qp = to_iqp(ibqp);
 371         struct ipath_rwq *wq = qp->r_rq.wq;
 372         unsigned long flags;
 373         int ret;
 374
 375         /* Check that state is OK to post receive. */
 376         if (!(ib_ipath_state_ops[qp->state] & IPATH_POST_RECV_OK) || !wq) {
 377                 *bad_wr = wr;
 378                 ret = -EINVAL;
 379                 goto bail;
 380         }
 381
 382         for (; wr; wr = wr->next) {
 383                 struct ipath_rwqe *wqe;
 384                 u32 next;
 385                 int i;
 386
 387                 if ((unsigned) wr->num_sge > qp->r_rq.max_sge) {
 388                         *bad_wr = wr;
 389                         ret = -ENOMEM;
 390                         goto bail;
 391                 }
 392
 393                 spin_lock_irqsave(&qp->r_rq.lock, flags);
 394                 next = wq->head + 1;
 395                 if (next >= qp->r_rq.size)
 396                         next = 0;
 397                 if (next == wq->tail) {
 398                         spin_unlock_irqrestore(&qp->r_rq.lock, flags);
 399                         *bad_wr = wr;
 400                         ret = -ENOMEM;
 401                         goto bail;
 402                 }
 403
 404                 wqe = get_rwqe_ptr(&qp->r_rq, wq->head);
 405                 wqe->wr_id = wr->wr_id;
 406                 wqe->num_sge = wr->num_sge;
 407                 for (i = 0; i < wr->num_sge; i++)
 408                         wqe->sg_list[i] = wr->sg_list[i];
 409                 /* Make sure queue entry is written before the head index. */
 410                 smp_wmb();
 411                 wq->head = next;
 412                 spin_unlock_irqrestore(&qp->r_rq.lock, flags);
 413         }
 414         ret = 0;
 415
 416 bail:
 417         return ret;
 418 }
 419
 420 /**
 421  * ipath_qp_rcv - processing an incoming packet on a QP
 422  * @dev: the device the packet came on
 423  * @hdr: the packet header
 424  * @has_grh: true if the packet has a GRH
 425  * @data: the packet data
 426  * @tlen: the packet length
 427  * @qp: the QP the packet came on
 428  *
 429  * This is called from ipath_ib_rcv() to process an incoming packet
 430  * for the given QP.
 431  * Called at interrupt level.
 432  */
 433 static void ipath_qp_rcv(struct ipath_ibdev *dev,
 434                          struct ipath_ib_header *hdr, int has_grh,
 435                          void *data, u32 tlen, struct ipath_qp *qp)
 436 {
 437         /* Check for valid receive state. */
 438         if (!(ib_ipath_state_ops[qp->state] & IPATH_PROCESS_RECV_OK)) {
 439                 dev->n_pkt_drops++;
 440                 return;
 441         }
 442
 443         switch (qp->ibqp.qp_type) {
 444         case IB_QPT_SMI:
 445         case IB_QPT_GSI:
 446                 if (ib_ipath_disable_sma)
 447                         break;
 448                 /* FALLTHROUGH */
 449         case IB_QPT_UD:
 450                 ipath_ud_rcv(dev, hdr, has_grh, data, tlen, qp);
 451                 break;
 452
 453         case IB_QPT_RC:
 454                 ipath_rc_rcv(dev, hdr, has_grh, data, tlen, qp);
 455                 break;
 456
 457         case IB_QPT_UC:
 458                 ipath_uc_rcv(dev, hdr, has_grh, data, tlen, qp);
 459                 break;
 460
 461         default:
 462                 break;
 463         }
 464 }
 465
 466 /**
 467  * ipath_ib_rcv - process an incoming packet
 468  * @arg: the device pointer
 469  * @rhdr: the header of the packet
 470  * @data: the packet data
 471  * @tlen: the packet length
 472  *
 473  * This is called from ipath_kreceive() to process an incoming packet at
 474  * interrupt level. Tlen is the length of the header + data + CRC in bytes.
 475  */
 476 void ipath_ib_rcv(struct ipath_ibdev *dev, void *rhdr, void *data,
 477                   u32 tlen)
 478 {
 479         struct ipath_ib_header *hdr = rhdr;
 480         struct ipath_other_headers *ohdr;
 481         struct ipath_qp *qp;
 482         u32 qp_num;
 483         int lnh;
 484         u8 opcode;
 485         u16 lid;
 486
 487         if (unlikely(dev == NULL))
 488                 goto bail;
 489
 490         if (unlikely(tlen < 24)) {      /* LRH+BTH+CRC */
 491                 dev->rcv_errors++;
 492                 goto bail;
 493         }
 494
 495         /* Check for a valid destination LID (see ch. 7.11.1). */
 496         lid = be16_to_cpu(hdr->lrh[1]);
 497         if (lid < IPATH_MULTICAST_LID_BASE) {
 498                 lid &= ~((1 << (dev->mkeyprot_resv_lmc & 7)) - 1);
 499                 if (unlikely(lid != dev->dd->ipath_lid)) {
 500                         dev->rcv_errors++;
 501                         goto bail;
 502                 }
 503         }
 504
 505         /* Check for GRH */
 506         lnh = be16_to_cpu(hdr->lrh[0]) & 3;
 507         if (lnh == IPATH_LRH_BTH)
 508                 ohdr = &hdr->u.oth;
 509         else if (lnh == IPATH_LRH_GRH)
 510                 ohdr = &hdr->u.l.oth;
 511         else {
 512                 dev->rcv_errors++;
 513                 goto bail;
 514         }
 515
 516         opcode = be32_to_cpu(ohdr->bth[0]) >> 24;
 517         dev->opstats[opcode].n_bytes += tlen;
 518         dev->opstats[opcode].n_packets++;
 519
 520         /* Get the destination QP number. */
 521         qp_num = be32_to_cpu(ohdr->bth[1]) & IPATH_QPN_MASK;
 522         if (qp_num == IPATH_MULTICAST_QPN) {
 523                 struct ipath_mcast *mcast;
 524                 struct ipath_mcast_qp *p;
 525
 526                 if (lnh != IPATH_LRH_GRH) {
 527                         dev->n_pkt_drops++;
 528                         goto bail;
 529                 }
 530                 mcast = ipath_mcast_find(&hdr->u.l.grh.dgid);
 531                 if (mcast == NULL) {
 532                         dev->n_pkt_drops++;
 533                         goto bail;
 534                 }
 535                 dev->n_multicast_rcv++;
 536                 list_for_each_entry_rcu(p, &mcast->qp_list, list)
 537                         ipath_qp_rcv(dev, hdr, 1, data, tlen, p->qp);
 538                 /*
 539                  * Notify ipath_multicast_detach() if it is waiting for us
 540                  * to finish.
 541                  */
 542                 if (atomic_dec_return(&mcast->refcount) <= 1)
 543                         wake_up(&mcast->wait);
 544         } else {
 545                 qp = ipath_lookup_qpn(&dev->qp_table, qp_num);
 546                 if (qp) {
 547                         dev->n_unicast_rcv++;
 548                         ipath_qp_rcv(dev, hdr, lnh == IPATH_LRH_GRH, data,
 549                                      tlen, qp);
 550                         /*
 551                          * Notify ipath_destroy_qp() if it is waiting
 552                          * for us to finish.
 553                          */
 554                         if (atomic_dec_and_test(&qp->refcount))
 555                                 wake_up(&qp->wait);
 556                 } else
 557                         dev->n_pkt_drops++;
 558         }
 559
 560 bail:;
 561 }
 562
 563 /**
 564  * ipath_ib_timer - verbs timer
 565  * @arg: the device pointer
 566  *
 567  * This is called from ipath_do_rcv_timer() at interrupt level to check for
 568  * QPs which need retransmits and to collect performance numbers.
 569  */
 570 static void ipath_ib_timer(struct ipath_ibdev *dev)
 571 {
 572         struct ipath_qp *resend = NULL;
 573         struct list_head *last;
 574         struct ipath_qp *qp;
 575         unsigned long flags;
 576
 577         if (dev == NULL)
 578                 return;
 579
 580         spin_lock_irqsave(&dev->pending_lock, flags);
 581         /* Start filling the next pending queue. */
 582         if (++dev->pending_index >= ARRAY_SIZE(dev->pending))
 583                 dev->pending_index = 0;
 584         /* Save any requests still in the new queue, they have timed out. */
 585         last = &dev->pending[dev->pending_index];
 586         while (!list_empty(last)) {
 587                 qp = list_entry(last->next, struct ipath_qp, timerwait);
 588                 list_del_init(&qp->timerwait);
 589                 qp->timer_next = resend;
 590                 resend = qp;
 591                 atomic_inc(&qp->refcount);
 592         }
 593         last = &dev->rnrwait;
 594         if (!list_empty(last)) {
 595                 qp = list_entry(last->next, struct ipath_qp, timerwait);
 596                 if (--qp->s_rnr_timeout == 0) {
 597                         do {
 598                                 list_del_init(&qp->timerwait);
 599                                 tasklet_hi_schedule(&qp->s_task);
 600                                 if (list_empty(last))
 601                                         break;
 602                                 qp = list_entry(last->next, struct ipath_qp,
 603                                                 timerwait);
 604                         } while (qp->s_rnr_timeout == 0);
 605                 }
 606         }
 607         /*
 608          * We should only be in the started state if pma_sample_start != 0
 609          */
 610         if (dev->pma_sample_status == IB_PMA_SAMPLE_STATUS_STARTED &&
 611             --dev->pma_sample_start == 0) {
 612                 dev->pma_sample_status = IB_PMA_SAMPLE_STATUS_RUNNING;
 613                 ipath_snapshot_counters(dev->dd, &dev->ipath_sword,
 614                                         &dev->ipath_rword,
 615                                         &dev->ipath_spkts,
 616                                         &dev->ipath_rpkts,
 617                                         &dev->ipath_xmit_wait);
 618         }
 619         if (dev->pma_sample_status == IB_PMA_SAMPLE_STATUS_RUNNING) {
 620                 if (dev->pma_sample_interval == 0) {
 621                         u64 ta, tb, tc, td, te;
 622
 623                         dev->pma_sample_status = IB_PMA_SAMPLE_STATUS_DONE;
 624                         ipath_snapshot_counters(dev->dd, &ta, &tb,
 625                                                 &tc, &td, &te);
 626
 627                         dev->ipath_sword = ta - dev->ipath_sword;
 628                         dev->ipath_rword = tb - dev->ipath_rword;
 629                         dev->ipath_spkts = tc - dev->ipath_spkts;
 630                         dev->ipath_rpkts = td - dev->ipath_rpkts;
 631                         dev->ipath_xmit_wait = te - dev->ipath_xmit_wait;
 632                 }
 633                 else
 634                         dev->pma_sample_interval--;
 635         }
 636         spin_unlock_irqrestore(&dev->pending_lock, flags);
 637
 638         /* XXX What if timer fires again while this is running? */
 639         for (qp = resend; qp != NULL; qp = qp->timer_next) {
 640                 struct ib_wc wc;
 641
 642                 spin_lock_irqsave(&qp->s_lock, flags);
 643                 if (qp->s_last != qp->s_tail && qp->state == IB_QPS_RTS) {
 644                         dev->n_timeouts++;
 645                         ipath_restart_rc(qp, qp->s_last_psn + 1, &wc);
 646                 }
 647                 spin_unlock_irqrestore(&qp->s_lock, flags);
 648
 649                 /* Notify ipath_destroy_qp() if it is waiting. */
 650                 if (atomic_dec_and_test(&qp->refcount))
 651                         wake_up(&qp->wait);
 652         }
 653 }
 654
 655 static void update_sge(struct ipath_sge_state *ss, u32 length)
 656 {
 657         struct ipath_sge *sge = &ss->sge;
 658
 659         sge->vaddr += length;
 660         sge->length -= length;
 661         sge->sge_length -= length;
 662         if (sge->sge_length == 0) {
 663                 if (--ss->num_sge)
 664                         *sge = *ss->sg_list++;
 665         } else if (sge->length == 0 && sge->mr != NULL) {
 666                 if (++sge->n >= IPATH_SEGSZ) {
 667                         if (++sge->m >= sge->mr->mapsz)
 668                                 return;
 669                         sge->n = 0;
 670                 }
 671                 sge->vaddr = sge->mr->map[sge->m]->segs[sge->n].vaddr;
 672                 sge->length = sge->mr->map[sge->m]->segs[sge->n].length;
 673         }
 674 }
 675
 676 #ifdef __LITTLE_ENDIAN
 677 static inline u32 get_upper_bits(u32 data, u32 shift)
 678 {
 679         return data >> shift;
 680 }
 681
 682 static inline u32 set_upper_bits(u32 data, u32 shift)
 683 {
 684         return data << shift;
 685 }
 686
 687 static inline u32 clear_upper_bytes(u32 data, u32 n, u32 off)
 688 {
 689         data <<= ((sizeof(u32) - n) * BITS_PER_BYTE);
 690         data >>= ((sizeof(u32) - n - off) * BITS_PER_BYTE);
 691         return data;
 692 }
 693 #else
 694 static inline u32 get_upper_bits(u32 data, u32 shift)
 695 {
 696         return data << shift;
 697 }
 698
 699 static inline u32 set_upper_bits(u32 data, u32 shift)
 700 {
 701         return data >> shift;
 702 }
 703
 704 static inline u32 clear_upper_bytes(u32 data, u32 n, u32 off)
 705 {
 706         data >>= ((sizeof(u32) - n) * BITS_PER_BYTE);
 707         data <<= ((sizeof(u32) - n - off) * BITS_PER_BYTE);
 708         return data;
 709 }
 710 #endif
 711
 712 static void copy_io(u32 __iomem *piobuf, struct ipath_sge_state *ss,
 713                     u32 length, unsigned flush_wc)
 714 {
 715         u32 extra = 0;
 716         u32 data = 0;
 717         u32 last;
 718
 719         while (1) {
 720                 u32 len = ss->sge.length;
 721                 u32 off;
 722
 723                 if (len > length)
 724                         len = length;
 725                 if (len > ss->sge.sge_length)
 726                         len = ss->sge.sge_length;
 727                 BUG_ON(len == 0);
 728                 /* If the source address is not aligned, try to align it. */
 729                 off = (unsigned long)ss->sge.vaddr & (sizeof(u32) - 1);
 730                 if (off) {
 731                         u32 *addr = (u32 *)((unsigned long)ss->sge.vaddr &
 732                                             ~(sizeof(u32) - 1));
 733                         u32 v = get_upper_bits(*addr, off * BITS_PER_BYTE);
 734                         u32 y;
 735
 736                         y = sizeof(u32) - off;
 737                         if (len > y)
 738                                 len = y;
 739                         if (len + extra >= sizeof(u32)) {
 740                                 data |= set_upper_bits(v, extra *
 741                                                        BITS_PER_BYTE);
 742                                 len = sizeof(u32) - extra;
 743                                 if (len == length) {
 744                                         last = data;
 745                                         break;
 746                                 }
 747                                 __raw_writel(data, piobuf);
 748                                 piobuf++;
 749                                 extra = 0;
 750                                 data = 0;
 751                         } else {
 752                                 /* Clear unused upper bytes */
 753                                 data |= clear_upper_bytes(v, len, extra);
 754                                 if (len == length) {
 755                                         last = data;
 756                                         break;
 757                                 }
 758                                 extra += len;
 759                         }
 760                 } else if (extra) {
 761                         /* Source address is aligned. */
 762                         u32 *addr = (u32 *) ss->sge.vaddr;
 763                         int shift = extra * BITS_PER_BYTE;
 764                         int ushift = 32 - shift;
 765                         u32 l = len;
 766
 767                         while (l >= sizeof(u32)) {
 768                                 u32 v = *addr;
 769
 770                                 data |= set_upper_bits(v, shift);
 771                                 __raw_writel(data, piobuf);
 772                                 data = get_upper_bits(v, ushift);
 773                                 piobuf++;
 774                                 addr++;
 775                                 l -= sizeof(u32);
 776                         }
 777                         /*
 778                          * We still have 'extra' number of bytes leftover.
 779                          */
 780                         if (l) {
 781                                 u32 v = *addr;
 782
 783                                 if (l + extra >= sizeof(u32)) {
 784                                         data |= set_upper_bits(v, shift);
 785                                         len -= l + extra - sizeof(u32);
 786                                         if (len == length) {
 787                                                 last = data;
 788                                                 break;
 789                                         }
 790                                         __raw_writel(data, piobuf);
 791                                         piobuf++;
 792                                         extra = 0;
 793                                         data = 0;
 794                                 } else {
 795                                         /* Clear unused upper bytes */
 796                                         data |= clear_upper_bytes(v, l,
 797                                                                   extra);
 798                                         if (len == length) {
 799                                                 last = data;
 800                                                 break;
 801                                         }
 802                                         extra += l;
 803                                 }
 804                         } else if (len == length) {
 805                                 last = data;
 806                                 break;
 807                         }
 808                 } else if (len == length) {
 809                         u32 w;
 810
 811                         /*
 812                          * Need to round up for the last dword in the
 813                          * packet.
 814                          */
 815                         w = (len + 3) >> 2;
 816                         __iowrite32_copy(piobuf, ss->sge.vaddr, w - 1);
 817                         piobuf += w - 1;
 818                         last = ((u32 *) ss->sge.vaddr)[w - 1];
 819                         break;
 820                 } else {
 821                         u32 w = len >> 2;
 822
 823                         __iowrite32_copy(piobuf, ss->sge.vaddr, w);
 824                         piobuf += w;
 825
 826                         extra = len & (sizeof(u32) - 1);
 827                         if (extra) {
 828                                 u32 v = ((u32 *) ss->sge.vaddr)[w];
 829
 830                                 /* Clear unused upper bytes */
 831                                 data = clear_upper_bytes(v, extra, 0);
 832                         }
 833                 }
 834                 update_sge(ss, len);
 835                 length -= len;
 836         }
 837         /* Update address before sending packet. */
 838         update_sge(ss, length);
 839         if (flush_wc) {
 840                 /* must flush early everything before trigger word */
 841                 ipath_flush_wc();
 842                 __raw_writel(last, piobuf);
 843                 /* be sure trigger word is written */
 844                 ipath_flush_wc();
 845         } else
 846                 __raw_writel(last, piobuf);
 847 }
 848
 849 static int ipath_verbs_send_pio(struct ipath_qp *qp, u32 *hdr, u32 hdrwords,
 850                                 struct ipath_sge_state *ss, u32 len,
 851                                 u32 plen, u32 dwords)
 852 {
 853         struct ipath_devdata *dd = to_idev(qp->ibqp.device)->dd;
 854         u32 __iomem *piobuf;
 855         unsigned flush_wc;
 856         int ret;
 857
 858         piobuf = ipath_getpiobuf(dd, NULL);
 859         if (unlikely(piobuf == NULL)) {
 860                 ret = -EBUSY;
 861                 goto bail;
 862         }
 863
 864         /*
 865          * Write len to control qword, no flags.
 866          * We have to flush after the PBC for correctness on some cpus
 867          * or WC buffer can be written out of order.
 868          */
 869         writeq(plen, piobuf);
 870         piobuf += 2;
 871
 872         flush_wc = dd->ipath_flags & IPATH_PIO_FLUSH_WC;
 873         if (len == 0) {
 874                 /*
 875                  * If there is just the header portion, must flush before
 876                  * writing last word of header for correctness, and after
 877                  * the last header word (trigger word).
 878                  */
 879                 if (flush_wc) {
 880                         ipath_flush_wc();
 881                         __iowrite32_copy(piobuf, hdr, hdrwords - 1);
 882                         ipath_flush_wc();
 883                         __raw_writel(hdr[hdrwords - 1], piobuf + hdrwords - 1);
 884                         ipath_flush_wc();
 885                 } else
 886                         __iowrite32_copy(piobuf, hdr, hdrwords);
 887                 goto done;
 888         }
 889
 890         if (flush_wc)
 891                 ipath_flush_wc();
 892         __iowrite32_copy(piobuf, hdr, hdrwords);
 893         piobuf += hdrwords;
 894
 895         /* The common case is aligned and contained in one segment. */
 896         if (likely(ss->num_sge == 1 && len <= ss->sge.length &&
 897                    !((unsigned long)ss->sge.vaddr & (sizeof(u32) - 1)))) {
 898                 u32 *addr = (u32 *) ss->sge.vaddr;
 899
 900                 /* Update address before sending packet. */
 901                 update_sge(ss, len);
 902                 if (flush_wc) {
 903                         __iowrite32_copy(piobuf, addr, dwords - 1);
 904                         /* must flush early everything before trigger word */
 905                         ipath_flush_wc();
 906                         __raw_writel(addr[dwords - 1], piobuf + dwords - 1);
 907                         /* be sure trigger word is written */
 908                         ipath_flush_wc();
 909                 } else
 910                         __iowrite32_copy(piobuf, addr, dwords);
 911                 goto done;
 912         }
 913         copy_io(piobuf, ss, len, flush_wc);
 914 done:
 915         if (qp->s_wqe)
 916                 ipath_send_complete(qp, qp->s_wqe, IB_WC_SUCCESS);
 917         ret = 0;
 918 bail:
 919         return ret;
 920 }
 921
 922 /**
 923  * ipath_verbs_send - send a packet
 924  * @qp: the QP to send on
 925  * @hdr: the packet header
 926  * @hdrwords: the number of words in the header
 927  * @ss: the SGE to send
 928  * @len: the length of the packet in bytes
 929  */
 930 int ipath_verbs_send(struct ipath_qp *qp, struct ipath_ib_header *hdr,
 931                      u32 hdrwords, struct ipath_sge_state *ss, u32 len)
 932 {
 933         u32 plen;
 934         int ret;
 935         u32 dwords = (len + 3) >> 2;
 936
 937         /* +1 is for the qword padding of pbc */
 938         plen = hdrwords + dwords + 1;
 939
 940         ret = ipath_verbs_send_pio(qp, (u32 *) hdr, hdrwords,
 941                                    ss, len, plen, dwords);
 942
 943         return ret;
 944 }
 945
 946 int ipath_snapshot_counters(struct ipath_devdata *dd, u64 *swords,
 947                             u64 *rwords, u64 *spkts, u64 *rpkts,
 948                             u64 *xmit_wait)
 949 {
 950         int ret;
 951
 952         if (!(dd->ipath_flags & IPATH_INITTED)) {
 953                 /* no hardware, freeze, etc. */
 954                 ret = -EINVAL;
 955                 goto bail;
 956         }
 957         *swords = ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordsendcnt);
 958         *rwords = ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordrcvcnt);
 959         *spkts = ipath_snap_cntr(dd, dd->ipath_cregs->cr_pktsendcnt);
 960         *rpkts = ipath_snap_cntr(dd, dd->ipath_cregs->cr_pktrcvcnt);
 961         *xmit_wait = ipath_snap_cntr(dd, dd->ipath_cregs->cr_sendstallcnt);
 962
 963         ret = 0;
 964
 965 bail:
 966         return ret;
 967 }
 968
 969 /**
 970  * ipath_get_counters - get various chip counters
 971  * @dd: the infinipath device
 972  * @cntrs: counters are placed here
 973  *
 974  * Return the counters needed by recv_pma_get_portcounters().
 975  */
 976 int ipath_get_counters(struct ipath_devdata *dd,
 977                        struct ipath_verbs_counters *cntrs)
 978 {
 979         struct ipath_cregs const *crp = dd->ipath_cregs;
 980         int ret;
 981
 982         if (!(dd->ipath_flags & IPATH_INITTED)) {
 983                 /* no hardware, freeze, etc. */
 984                 ret = -EINVAL;
 985                 goto bail;
 986         }
 987         cntrs->symbol_error_counter =
 988                 ipath_snap_cntr(dd, crp->cr_ibsymbolerrcnt);
 989         cntrs->link_error_recovery_counter =
 990                 ipath_snap_cntr(dd, crp->cr_iblinkerrrecovcnt);
 991         /*
 992          * The link downed counter counts when the other side downs the
 993          * connection.  We add in the number of times we downed the link
 994          * due to local link integrity errors to compensate.
 995          */
 996         cntrs->link_downed_counter =
 997                 ipath_snap_cntr(dd, crp->cr_iblinkdowncnt);
 998         cntrs->port_rcv_errors =
 999                 ipath_snap_cntr(dd, crp->cr_rxdroppktcnt) +
1000                 ipath_snap_cntr(dd, crp->cr_rcvovflcnt) +
1001                 ipath_snap_cntr(dd, crp->cr_portovflcnt) +
1002                 ipath_snap_cntr(dd, crp->cr_err_rlencnt) +
1003                 ipath_snap_cntr(dd, crp->cr_invalidrlencnt) +
1004                 ipath_snap_cntr(dd, crp->cr_errlinkcnt) +
1005                 ipath_snap_cntr(dd, crp->cr_erricrccnt) +
1006                 ipath_snap_cntr(dd, crp->cr_errvcrccnt) +
1007                 ipath_snap_cntr(dd, crp->cr_errlpcrccnt) +
1008                 ipath_snap_cntr(dd, crp->cr_badformatcnt) +
1009                 dd->ipath_rxfc_unsupvl_errs;
1010         cntrs->port_rcv_remphys_errors =
1011                 ipath_snap_cntr(dd, crp->cr_rcvebpcnt);
1012         cntrs->port_xmit_discards = ipath_snap_cntr(dd, crp->cr_unsupvlcnt);
1013         cntrs->port_xmit_data = ipath_snap_cntr(dd, crp->cr_wordsendcnt);
1014         cntrs->port_rcv_data = ipath_snap_cntr(dd, crp->cr_wordrcvcnt);
1015         cntrs->port_xmit_packets = ipath_snap_cntr(dd, crp->cr_pktsendcnt);
1016         cntrs->port_rcv_packets = ipath_snap_cntr(dd, crp->cr_pktrcvcnt);
1017         cntrs->local_link_integrity_errors =
1018                 (dd->ipath_flags & IPATH_GPIO_ERRINTRS) ?
1019                 dd->ipath_lli_errs : dd->ipath_lli_errors;
1020         cntrs->excessive_buffer_overrun_errors = dd->ipath_overrun_thresh_errs;
1021
1022         ret = 0;
1023
1024 bail:
1025         return ret;
1026 }
1027
1028 /**
1029  * ipath_ib_piobufavail - callback when a PIO buffer is available
1030  * @arg: the device pointer
1031  *
1032  * This is called from ipath_intr() at interrupt level when a PIO buffer is
1033  * available after ipath_verbs_send() returned an error that no buffers were
1034  * available.  Return 1 if we consumed all the PIO buffers and we still have
1035  * QPs waiting for buffers (for now, just do a tasklet_hi_schedule and
1036  * return zero).
1037  */
1038 int ipath_ib_piobufavail(struct ipath_ibdev *dev)
1039 {
1040         struct ipath_qp *qp;
1041         unsigned long flags;
1042
1043         if (dev == NULL)
1044                 goto bail;
1045
1046         spin_lock_irqsave(&dev->pending_lock, flags);
1047         while (!list_empty(&dev->piowait)) {
1048                 qp = list_entry(dev->piowait.next, struct ipath_qp,
1049                                 piowait);
1050                 list_del_init(&qp->piowait);
1051                 clear_bit(IPATH_S_BUSY, &qp->s_busy);
1052                 tasklet_hi_schedule(&qp->s_task);
1053         }
1054         spin_unlock_irqrestore(&dev->pending_lock, flags);
1055
1056 bail:
1057         return 0;
1058 }
1059
1060 static int ipath_query_device(struct ib_device *ibdev,
1061                               struct ib_device_attr *props)
1062 {
1063         struct ipath_ibdev *dev = to_idev(ibdev);
1064
1065         memset(props, 0, sizeof(*props));
1066
1067         props->device_cap_flags = IB_DEVICE_BAD_PKEY_CNTR |
1068                 IB_DEVICE_BAD_QKEY_CNTR | IB_DEVICE_SHUTDOWN_PORT |
1069                 IB_DEVICE_SYS_IMAGE_GUID;
1070         props->page_size_cap = PAGE_SIZE;
1071         props->vendor_id = dev->dd->ipath_vendorid;
1072         props->vendor_part_id = dev->dd->ipath_deviceid;
1073         props->hw_ver = dev->dd->ipath_pcirev;
1074
1075         props->sys_image_guid = dev->sys_image_guid;
1076
1077         props->max_mr_size = ~0ull;
1078         props->max_qp = ib_ipath_max_qps;
1079         props->max_qp_wr = ib_ipath_max_qp_wrs;
1080         props->max_sge = ib_ipath_max_sges;
1081         props->max_cq = ib_ipath_max_cqs;
1082         props->max_ah = ib_ipath_max_ahs;
1083         props->max_cqe = ib_ipath_max_cqes;
1084         props->max_mr = dev->lk_table.max;
1085         props->max_fmr = dev->lk_table.max;
1086         props->max_map_per_fmr = 32767;
1087         props->max_pd = ib_ipath_max_pds;
1088         props->max_qp_rd_atom = IPATH_MAX_RDMA_ATOMIC;
1089         props->max_qp_init_rd_atom = 255;
1090         /* props->max_res_rd_atom */
1091         props->max_srq = ib_ipath_max_srqs;
1092         props->max_srq_wr = ib_ipath_max_srq_wrs;
1093         props->max_srq_sge = ib_ipath_max_srq_sges;
1094         /* props->local_ca_ack_delay */
1095         props->atomic_cap = IB_ATOMIC_GLOB;
1096         props->max_pkeys = ipath_get_npkeys(dev->dd);
1097         props->max_mcast_grp = ib_ipath_max_mcast_grps;
1098         props->max_mcast_qp_attach = ib_ipath_max_mcast_qp_attached;
1099         props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
1100                 props->max_mcast_grp;
1101
1102         return 0;
1103 }
1104
1105 const u8 ipath_cvt_physportstate[16] = {
1106         [INFINIPATH_IBCS_LT_STATE_DISABLED] = 3,
1107         [INFINIPATH_IBCS_LT_STATE_LINKUP] = 5,
1108         [INFINIPATH_IBCS_LT_STATE_POLLACTIVE] = 2,
1109         [INFINIPATH_IBCS_LT_STATE_POLLQUIET] = 2,
1110         [INFINIPATH_IBCS_LT_STATE_SLEEPDELAY] = 1,
1111         [INFINIPATH_IBCS_LT_STATE_SLEEPQUIET] = 1,
1112         [INFINIPATH_IBCS_LT_STATE_CFGDEBOUNCE] = 4,
1113         [INFINIPATH_IBCS_LT_STATE_CFGRCVFCFG] = 4,
1114         [INFINIPATH_IBCS_LT_STATE_CFGWAITRMT] = 4,
1115         [INFINIPATH_IBCS_LT_STATE_CFGIDLE] = 4,
1116         [INFINIPATH_IBCS_LT_STATE_RECOVERRETRAIN] = 6,
1117         [INFINIPATH_IBCS_LT_STATE_RECOVERWAITRMT] = 6,
1118         [INFINIPATH_IBCS_LT_STATE_RECOVERIDLE] = 6,
1119 };
1120
1121 u32 ipath_get_cr_errpkey(struct ipath_devdata *dd)
1122 {
1123         return ipath_read_creg32(dd, dd->ipath_cregs->cr_errpkey);
1124 }
1125
1126 static int ipath_query_port(struct ib_device *ibdev,
1127                             u8 port, struct ib_port_attr *props)
1128 {
1129         struct ipath_ibdev *dev = to_idev(ibdev);
1130         struct ipath_devdata *dd = dev->dd;
1131         enum ib_mtu mtu;
1132         u16 lid = dd->ipath_lid;
1133         u64 ibcstat;
1134
1135         memset(props, 0, sizeof(*props));
1136         props->lid = lid ? lid : __constant_be16_to_cpu(IB_LID_PERMISSIVE);
1137         props->lmc = dev->mkeyprot_resv_lmc & 7;
1138         props->sm_lid = dev->sm_lid;
1139         props->sm_sl = dev->sm_sl;
1140         ibcstat = dd->ipath_lastibcstat;
1141         props->state = ((ibcstat >> 4) & 0x3) + 1;
1142         /* See phys_state_show() */
1143         props->phys_state = ipath_cvt_physportstate[
1144                 dd->ipath_lastibcstat & 0xf];
1145         props->port_cap_flags = dev->port_cap_flags;
1146         props->gid_tbl_len = 1;
1147         props->max_msg_sz = 0x80000000;
1148         props->pkey_tbl_len = ipath_get_npkeys(dd);
1149         props->bad_pkey_cntr = ipath_get_cr_errpkey(dd) -
1150                 dev->z_pkey_violations;
1151         props->qkey_viol_cntr = dev->qkey_violations;
1152         props->active_width = IB_WIDTH_4X;
1153         /* See rate_show() */
1154         props->active_speed = 1;        /* Regular 10Mbs speed. */
1155         props->max_vl_num = 1;          /* VLCap = VL0 */
1156         props->init_type_reply = 0;
1157
1158         /*
1159          * Note: the chip supports a maximum MTU of 4096, but the driver
1160          * hasn't implemented this feature yet, so set the maximum value
1161          * to 2048.
1162          */
1163         props->max_mtu = IB_MTU_2048;
1164         switch (dd->ipath_ibmtu) {
1165         case 4096:
1166                 mtu = IB_MTU_4096;
1167                 break;
1168         case 2048:
1169                 mtu = IB_MTU_2048;
1170                 break;
1171         case 1024:
1172                 mtu = IB_MTU_1024;
1173                 break;
1174         case 512:
1175                 mtu = IB_MTU_512;
1176                 break;
1177         case 256:
1178                 mtu = IB_MTU_256;
1179                 break;
1180         default:
1181                 mtu = IB_MTU_2048;
1182         }
1183         props->active_mtu = mtu;
1184         props->subnet_timeout = dev->subnet_timeout;
1185
1186         return 0;
1187 }
1188
1189 static int ipath_modify_device(struct ib_device *device,
1190                                int device_modify_mask,
1191                                struct ib_device_modify *device_modify)
1192 {
1193         int ret;
1194
1195         if (device_modify_mask & ~(IB_DEVICE_MODIFY_SYS_IMAGE_GUID |
1196                                    IB_DEVICE_MODIFY_NODE_DESC)) {
1197                 ret = -EOPNOTSUPP;
1198                 goto bail;
1199         }
1200
1201         if (device_modify_mask & IB_DEVICE_MODIFY_NODE_DESC)
1202                 memcpy(device->node_desc, device_modify->node_desc, 64);
1203
1204         if (device_modify_mask & IB_DEVICE_MODIFY_SYS_IMAGE_GUID)
1205                 to_idev(device)->sys_image_guid =
1206                         cpu_to_be64(device_modify->sys_image_guid);
1207
1208         ret = 0;
1209
1210 bail:
1211         return ret;
1212 }
1213
1214 static int ipath_modify_port(struct ib_device *ibdev,
1215                              u8 port, int port_modify_mask,
1216                              struct ib_port_modify *props)
1217 {
1218         struct ipath_ibdev *dev = to_idev(ibdev);
1219
1220         dev->port_cap_flags |= props->set_port_cap_mask;
1221         dev->port_cap_flags &= ~props->clr_port_cap_mask;
1222         if (port_modify_mask & IB_PORT_SHUTDOWN)
1223                 ipath_set_linkstate(dev->dd, IPATH_IB_LINKDOWN);
1224         if (port_modify_mask & IB_PORT_RESET_QKEY_CNTR)
1225                 dev->qkey_violations = 0;
1226         return 0;
1227 }
1228
1229 static int ipath_query_gid(struct ib_device *ibdev, u8 port,
1230                            int index, union ib_gid *gid)
1231 {
1232         struct ipath_ibdev *dev = to_idev(ibdev);
1233         int ret;
1234
1235         if (index >= 1) {
1236                 ret = -EINVAL;
1237                 goto bail;
1238         }
1239         gid->global.subnet_prefix = dev->gid_prefix;
1240         gid->global.interface_id = dev->dd->ipath_guid;
1241
1242         ret = 0;
1243
1244 bail:
1245         return ret;
1246 }
1247
1248 static struct ib_pd *ipath_alloc_pd(struct ib_device *ibdev,
1249                                     struct ib_ucontext *context,
1250                                     struct ib_udata *udata)
1251 {
1252         struct ipath_ibdev *dev = to_idev(ibdev);
1253         struct ipath_pd *pd;
1254         struct ib_pd *ret;
1255
1256         /*
1257          * This is actually totally arbitrary.  Some correctness tests
1258          * assume there's a maximum number of PDs that can be allocated.
1259          * We don't actually have this limit, but we fail the test if
1260          * we allow allocations of more than we report for this value.
1261          */
1262
1263         pd = kmalloc(sizeof *pd, GFP_KERNEL);
1264         if (!pd) {
1265                 ret = ERR_PTR(-ENOMEM);
1266                 goto bail;
1267         }
1268
1269         spin_lock(&dev->n_pds_lock);
1270         if (dev->n_pds_allocated == ib_ipath_max_pds) {
1271                 spin_unlock(&dev->n_pds_lock);
1272                 kfree(pd);
1273                 ret = ERR_PTR(-ENOMEM);
1274                 goto bail;
1275         }
1276
1277         dev->n_pds_allocated++;
1278         spin_unlock(&dev->n_pds_lock);
1279
1280         /* ib_alloc_pd() will initialize pd->ibpd. */
1281         pd->user = udata != NULL;
1282
1283         ret = &pd->ibpd;
1284
1285 bail:
1286         return ret;
1287 }
1288
1289 static int ipath_dealloc_pd(struct ib_pd *ibpd)
1290 {
1291         struct ipath_pd *pd = to_ipd(ibpd);
1292         struct ipath_ibdev *dev = to_idev(ibpd->device);
1293
1294         spin_lock(&dev->n_pds_lock);
1295         dev->n_pds_allocated--;
1296         spin_unlock(&dev->n_pds_lock);
1297
1298         kfree(pd);
1299
1300         return 0;
1301 }
1302
1303 /**
1304  * ipath_create_ah - create an address handle
1305  * @pd: the protection domain
1306  * @ah_attr: the attributes of the AH
1307  *
1308  * This may be called from interrupt context.
1309  */
1310 static struct ib_ah *ipath_create_ah(struct ib_pd *pd,
1311                                      struct ib_ah_attr *ah_attr)
1312 {
1313         struct ipath_ah *ah;
1314         struct ib_ah *ret;
1315         struct ipath_ibdev *dev = to_idev(pd->device);
1316         unsigned long flags;
1317
1318         /* A multicast address requires a GRH (see ch. 8.4.1). */
1319         if (ah_attr->dlid >= IPATH_MULTICAST_LID_BASE &&
1320             ah_attr->dlid != IPATH_PERMISSIVE_LID &&
1321             !(ah_attr->ah_flags & IB_AH_GRH)) {
1322                 ret = ERR_PTR(-EINVAL);
1323                 goto bail;
1324         }
1325
1326         if (ah_attr->dlid == 0) {
1327                 ret = ERR_PTR(-EINVAL);
1328                 goto bail;
1329         }
1330
1331         if (ah_attr->port_num < 1 ||
1332             ah_attr->port_num > pd->device->phys_port_cnt) {
1333                 ret = ERR_PTR(-EINVAL);
1334                 goto bail;
1335         }
1336
1337         ah = kmalloc(sizeof *ah, GFP_ATOMIC);
1338         if (!ah) {
1339                 ret = ERR_PTR(-ENOMEM);
1340                 goto bail;
1341         }
1342
1343         spin_lock_irqsave(&dev->n_ahs_lock, flags);
1344         if (dev->n_ahs_allocated == ib_ipath_max_ahs) {
1345                 spin_unlock_irqrestore(&dev->n_ahs_lock, flags);
1346                 kfree(ah);
1347                 ret = ERR_PTR(-ENOMEM);
1348                 goto bail;
1349         }
1350
1351         dev->n_ahs_allocated++;
1352         spin_unlock_irqrestore(&dev->n_ahs_lock, flags);
1353
1354         /* ib_create_ah() will initialize ah->ibah. */
1355         ah->attr = *ah_attr;
1356
1357         ret = &ah->ibah;
1358
1359 bail:
1360         return ret;
1361 }
1362
1363 /**
1364  * ipath_destroy_ah - destroy an address handle
1365  * @ibah: the AH to destroy
1366  *
1367  * This may be called from interrupt context.
1368  */
1369 static int ipath_destroy_ah(struct ib_ah *ibah)
1370 {
1371         struct ipath_ibdev *dev = to_idev(ibah->device);
1372         struct ipath_ah *ah = to_iah(ibah);
1373         unsigned long flags;
1374
1375         spin_lock_irqsave(&dev->n_ahs_lock, flags);
1376         dev->n_ahs_allocated--;
1377         spin_unlock_irqrestore(&dev->n_ahs_lock, flags);
1378
1379         kfree(ah);
1380
1381         return 0;
1382 }
1383
1384 static int ipath_query_ah(struct ib_ah *ibah, struct ib_ah_attr *ah_attr)
1385 {
1386         struct ipath_ah *ah = to_iah(ibah);
1387
1388         *ah_attr = ah->attr;
1389
1390         return 0;
1391 }
1392
1393 /**
1394  * ipath_get_npkeys - return the size of the PKEY table for port 0
1395  * @dd: the infinipath device
1396  */
1397 unsigned ipath_get_npkeys(struct ipath_devdata *dd)
1398 {
1399         return ARRAY_SIZE(dd->ipath_pd[0]->port_pkeys);
1400 }
1401
1402 /**
1403  * ipath_get_pkey - return the indexed PKEY from the port 0 PKEY table
1404  * @dd: the infinipath device
1405  * @index: the PKEY index
1406  */
1407 unsigned ipath_get_pkey(struct ipath_devdata *dd, unsigned index)
1408 {
1409         unsigned ret;
1410
1411         if (index >= ARRAY_SIZE(dd->ipath_pd[0]->port_pkeys))
1412                 ret = 0;
1413         else
1414                 ret = dd->ipath_pd[0]->port_pkeys[index];
1415
1416         return ret;
1417 }
1418
1419 static int ipath_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
1420                             u16 *pkey)
1421 {
1422         struct ipath_ibdev *dev = to_idev(ibdev);
1423         int ret;
1424
1425         if (index >= ipath_get_npkeys(dev->dd)) {
1426                 ret = -EINVAL;
1427                 goto bail;
1428         }
1429
1430         *pkey = ipath_get_pkey(dev->dd, index);
1431         ret = 0;
1432
1433 bail:
1434         return ret;
1435 }
1436
1437 /**
1438  * ipath_alloc_ucontext - allocate a ucontest
1439  * @ibdev: the infiniband device
1440  * @udata: not used by the InfiniPath driver
1441  */
1442
1443 static struct ib_ucontext *ipath_alloc_ucontext(struct ib_device *ibdev,
1444                                                 struct ib_udata *udata)
1445 {
1446         struct ipath_ucontext *context;
1447         struct ib_ucontext *ret;
1448
1449         context = kmalloc(sizeof *context, GFP_KERNEL);
1450         if (!context) {
1451                 ret = ERR_PTR(-ENOMEM);
1452                 goto bail;
1453         }
1454
1455         ret = &context->ibucontext;
1456
1457 bail:
1458         return ret;
1459 }
1460
1461 static int ipath_dealloc_ucontext(struct ib_ucontext *context)
1462 {
1463         kfree(to_iucontext(context));
1464         return 0;
1465 }
1466
1467 static int ipath_verbs_register_sysfs(struct ib_device *dev);
1468
1469 static void __verbs_timer(unsigned long arg)
1470 {
1471         struct ipath_devdata *dd = (struct ipath_devdata *) arg;
1472
1473         /* Handle verbs layer timeouts. */
1474         ipath_ib_timer(dd->verbs_dev);
1475
1476         mod_timer(&dd->verbs_timer, jiffies + 1);
1477 }
1478
1479 static int enable_timer(struct ipath_devdata *dd)
1480 {
1481         /*
1482          * Early chips had a design flaw where the chip and kernel idea
1483          * of the tail register don't always agree, and therefore we won't
1484          * get an interrupt on the next packet received.
1485          * If the board supports per packet receive interrupts, use it.
1486          * Otherwise, the timer function periodically checks for packets
1487          * to cover this case.
1488          * Either way, the timer is needed for verbs layer related
1489          * processing.
1490          */
1491         if (dd->ipath_flags & IPATH_GPIO_INTR) {
1492                 ipath_write_kreg(dd, dd->ipath_kregs->kr_debugportselect,
1493                                  0x2074076542310ULL);
1494                 /* Enable GPIO bit 2 interrupt */
1495                 dd->ipath_gpio_mask |= (u64) (1 << IPATH_GPIO_PORT0_BIT);
1496                 ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_mask,
1497                                  dd->ipath_gpio_mask);
1498         }
1499
1500         init_timer(&dd->verbs_timer);
1501         dd->verbs_timer.function = __verbs_timer;
1502         dd->verbs_timer.data = (unsigned long)dd;
1503         dd->verbs_timer.expires = jiffies + 1;
1504         add_timer(&dd->verbs_timer);
1505
1506         return 0;
1507 }
1508
1509 static int disable_timer(struct ipath_devdata *dd)
1510 {
1511         /* Disable GPIO bit 2 interrupt */
1512         if (dd->ipath_flags & IPATH_GPIO_INTR) {
1513                 /* Disable GPIO bit 2 interrupt */
1514                 dd->ipath_gpio_mask &= ~((u64) (1 << IPATH_GPIO_PORT0_BIT));
1515                 ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_mask,
1516                                  dd->ipath_gpio_mask);
1517                 /*
1518                  * We might want to undo changes to debugportselect,
1519                  * but how?
1520                  */
1521         }
1522
1523         del_timer_sync(&dd->verbs_timer);
1524
1525         return 0;
1526 }
1527
1528 /**
1529  * ipath_register_ib_device - register our device with the infiniband core
1530  * @dd: the device data structure
1531  * Return the allocated ipath_ibdev pointer or NULL on error.
1532  */
1533 int ipath_register_ib_device(struct ipath_devdata *dd)
1534 {
1535         struct ipath_verbs_counters cntrs;
1536         struct ipath_ibdev *idev;
1537         struct ib_device *dev;
1538         int ret;
1539
1540         idev = (struct ipath_ibdev *)ib_alloc_device(sizeof *idev);
1541         if (idev == NULL) {
1542                 ret = -ENOMEM;
1543                 goto bail;
1544         }
1545
1546         dev = &idev->ibdev;
1547
1548         /* Only need to initialize non-zero fields. */
1549         spin_lock_init(&idev->n_pds_lock);
1550         spin_lock_init(&idev->n_ahs_lock);
1551         spin_lock_init(&idev->n_cqs_lock);
1552         spin_lock_init(&idev->n_qps_lock);
1553         spin_lock_init(&idev->n_srqs_lock);
1554         spin_lock_init(&idev->n_mcast_grps_lock);
1555
1556         spin_lock_init(&idev->qp_table.lock);
1557         spin_lock_init(&idev->lk_table.lock);
1558         idev->sm_lid = __constant_be16_to_cpu(IB_LID_PERMISSIVE);
1559         /* Set the prefix to the default value (see ch. 4.1.1) */
1560         idev->gid_prefix = __constant_cpu_to_be64(0xfe80000000000000ULL);
1561
1562         ret = ipath_init_qp_table(idev, ib_ipath_qp_table_size);
1563         if (ret)
1564                 goto err_qp;
1565
1566         /*
1567          * The top ib_ipath_lkey_table_size bits are used to index the
1568          * table.  The lower 8 bits can be owned by the user (copied from
1569          * the LKEY).  The remaining bits act as a generation number or tag.
1570          */
1571         idev->lk_table.max = 1 << ib_ipath_lkey_table_size;
1572         idev->lk_table.table = kzalloc(idev->lk_table.max *
1573                                        sizeof(*idev->lk_table.table),
1574                                        GFP_KERNEL);
1575         if (idev->lk_table.table == NULL) {
1576                 ret = -ENOMEM;
1577                 goto err_lk;
1578         }
1579         INIT_LIST_HEAD(&idev->pending_mmaps);
1580         spin_lock_init(&idev->pending_lock);
1581         idev->mmap_offset = PAGE_SIZE;
1582         spin_lock_init(&idev->mmap_offset_lock);
1583         INIT_LIST_HEAD(&idev->pending[0]);
1584         INIT_LIST_HEAD(&idev->pending[1]);
1585         INIT_LIST_HEAD(&idev->pending[2]);
1586         INIT_LIST_HEAD(&idev->piowait);
1587         INIT_LIST_HEAD(&idev->rnrwait);
1588         idev->pending_index = 0;
1589         idev->port_cap_flags =
1590                 IB_PORT_SYS_IMAGE_GUID_SUP | IB_PORT_CLIENT_REG_SUP;
1591         idev->pma_counter_select[0] = IB_PMA_PORT_XMIT_DATA;
1592         idev->pma_counter_select[1] = IB_PMA_PORT_RCV_DATA;
1593         idev->pma_counter_select[2] = IB_PMA_PORT_XMIT_PKTS;
1594         idev->pma_counter_select[3] = IB_PMA_PORT_RCV_PKTS;
1595         idev->pma_counter_select[4] = IB_PMA_PORT_XMIT_WAIT;
1596         idev->link_width_enabled = 3;   /* 1x or 4x */
1597
1598         /* Snapshot current HW counters to "clear" them. */
1599         ipath_get_counters(dd, &cntrs);
1600         idev->z_symbol_error_counter = cntrs.symbol_error_counter;
1601         idev->z_link_error_recovery_counter =
1602                 cntrs.link_error_recovery_counter;
1603         idev->z_link_downed_counter = cntrs.link_downed_counter;
1604         idev->z_port_rcv_errors = cntrs.port_rcv_errors;
1605         idev->z_port_rcv_remphys_errors =
1606                 cntrs.port_rcv_remphys_errors;
1607         idev->z_port_xmit_discards = cntrs.port_xmit_discards;
1608         idev->z_port_xmit_data = cntrs.port_xmit_data;
1609         idev->z_port_rcv_data = cntrs.port_rcv_data;
1610         idev->z_port_xmit_packets = cntrs.port_xmit_packets;
1611         idev->z_port_rcv_packets = cntrs.port_rcv_packets;
1612         idev->z_local_link_integrity_errors =
1613                 cntrs.local_link_integrity_errors;
1614         idev->z_excessive_buffer_overrun_errors =
1615                 cntrs.excessive_buffer_overrun_errors;
1616
1617         /*
1618          * The system image GUID is supposed to be the same for all
1619          * IB HCAs in a single system but since there can be other
1620          * device types in the system, we can't be sure this is unique.
1621          */
1622         if (!sys_image_guid)
1623                 sys_image_guid = dd->ipath_guid;
1624         idev->sys_image_guid = sys_image_guid;
1625         idev->ib_unit = dd->ipath_unit;
1626         idev->dd = dd;
1627
1628         strlcpy(dev->name, "ipath%d", IB_DEVICE_NAME_MAX);
1629         dev->owner = THIS_MODULE;
1630         dev->node_guid = dd->ipath_guid;
1631         dev->uverbs_abi_ver = IPATH_UVERBS_ABI_VERSION;
1632         dev->uverbs_cmd_mask =
1633                 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT)         |
1634                 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE)        |
1635                 (1ull << IB_USER_VERBS_CMD_QUERY_PORT)          |
1636                 (1ull << IB_USER_VERBS_CMD_ALLOC_PD)            |
1637                 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD)          |
1638                 (1ull << IB_USER_VERBS_CMD_CREATE_AH)           |
1639                 (1ull << IB_USER_VERBS_CMD_DESTROY_AH)          |
1640                 (1ull << IB_USER_VERBS_CMD_QUERY_AH)            |
1641                 (1ull << IB_USER_VERBS_CMD_REG_MR)              |
1642                 (1ull << IB_USER_VERBS_CMD_DEREG_MR)            |
1643                 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
1644                 (1ull << IB_USER_VERBS_CMD_CREATE_CQ)           |
1645                 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ)           |
1646                 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ)          |
1647                 (1ull << IB_USER_VERBS_CMD_POLL_CQ)             |
1648                 (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ)       |
1649                 (1ull << IB_USER_VERBS_CMD_CREATE_QP)           |
1650                 (1ull << IB_USER_VERBS_CMD_QUERY_QP)            |
1651                 (1ull << IB_USER_VERBS_CMD_MODIFY_QP)           |
1652                 (1ull << IB_USER_VERBS_CMD_DESTROY_QP)          |
1653                 (1ull << IB_USER_VERBS_CMD_POST_SEND)           |
1654                 (1ull << IB_USER_VERBS_CMD_POST_RECV)           |
1655                 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST)        |
1656                 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST)        |
1657                 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ)          |
1658                 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ)          |
1659                 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ)           |
1660                 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ)         |
1661                 (1ull << IB_USER_VERBS_CMD_POST_SRQ_RECV);
1662         dev->node_type = RDMA_NODE_IB_CA;
1663         dev->phys_port_cnt = 1;
1664         dev->num_comp_vectors = 1;
1665         dev->dma_device = &dd->pcidev->dev;
1666         dev->query_device = ipath_query_device;
1667         dev->modify_device = ipath_modify_device;
1668         dev->query_port = ipath_query_port;
1669         dev->modify_port = ipath_modify_port;
1670         dev->query_pkey = ipath_query_pkey;
1671         dev->query_gid = ipath_query_gid;
1672         dev->alloc_ucontext = ipath_alloc_ucontext;
1673         dev->dealloc_ucontext = ipath_dealloc_ucontext;
1674         dev->alloc_pd = ipath_alloc_pd;
1675         dev->dealloc_pd = ipath_dealloc_pd;
1676         dev->create_ah = ipath_create_ah;
1677         dev->destroy_ah = ipath_destroy_ah;
1678         dev->query_ah = ipath_query_ah;
1679         dev->create_srq = ipath_create_srq;
1680         dev->modify_srq = ipath_modify_srq;
1681         dev->query_srq = ipath_query_srq;
1682         dev->destroy_srq = ipath_destroy_srq;
1683         dev->create_qp = ipath_create_qp;
1684         dev->modify_qp = ipath_modify_qp;
1685         dev->query_qp = ipath_query_qp;
1686         dev->destroy_qp = ipath_destroy_qp;
1687         dev->post_send = ipath_post_send;
1688         dev->post_recv = ipath_post_receive;
1689         dev->post_srq_recv = ipath_post_srq_receive;
1690         dev->create_cq = ipath_create_cq;
1691         dev->destroy_cq = ipath_destroy_cq;
1692         dev->resize_cq = ipath_resize_cq;
1693         dev->poll_cq = ipath_poll_cq;
1694         dev->req_notify_cq = ipath_req_notify_cq;
1695         dev->get_dma_mr = ipath_get_dma_mr;
1696         dev->reg_phys_mr = ipath_reg_phys_mr;
1697         dev->reg_user_mr = ipath_reg_user_mr;
1698         dev->dereg_mr = ipath_dereg_mr;
1699         dev->alloc_fmr = ipath_alloc_fmr;
1700         dev->map_phys_fmr = ipath_map_phys_fmr;
1701         dev->unmap_fmr = ipath_unmap_fmr;
1702         dev->dealloc_fmr = ipath_dealloc_fmr;
1703         dev->attach_mcast = ipath_multicast_attach;
1704         dev->detach_mcast = ipath_multicast_detach;
1705         dev->process_mad = ipath_process_mad;
1706         dev->mmap = ipath_mmap;
1707         dev->dma_ops = &ipath_dma_mapping_ops;
1708
1709         snprintf(dev->node_desc, sizeof(dev->node_desc),
1710                  IPATH_IDSTR " %s", init_utsname()->nodename);
1711
1712         ret = ib_register_device(dev);
1713         if (ret)
1714                 goto err_reg;
1715
1716         if (ipath_verbs_register_sysfs(dev))
1717                 goto err_class;
1718
1719         enable_timer(dd);
1720
1721         goto bail;
1722
1723 err_class:
1724         ib_unregister_device(dev);
1725 err_reg:
1726         kfree(idev->lk_table.table);
1727 err_lk:
1728         kfree(idev->qp_table.table);
1729 err_qp:
1730         ib_dealloc_device(dev);
1731         ipath_dev_err(dd, "cannot register verbs: %d!\n", -ret);
1732         idev = NULL;
1733
1734 bail:
1735         dd->verbs_dev = idev;
1736         return ret;
1737 }
1738
1739 void ipath_unregister_ib_device(struct ipath_ibdev *dev)
1740 {
1741         struct ib_device *ibdev = &dev->ibdev;
1742
1743         disable_timer(dev->dd);
1744
1745         ib_unregister_device(ibdev);
1746
1747         if (!list_empty(&dev->pending[0]) ||
1748             !list_empty(&dev->pending[1]) ||
1749             !list_empty(&dev->pending[2]))
1750                 ipath_dev_err(dev->dd, "pending list not empty!\n");
1751         if (!list_empty(&dev->piowait))
1752                 ipath_dev_err(dev->dd, "piowait list not empty!\n");
1753         if (!list_empty(&dev->rnrwait))
1754                 ipath_dev_err(dev->dd, "rnrwait list not empty!\n");
1755         if (!ipath_mcast_tree_empty())
1756                 ipath_dev_err(dev->dd, "multicast table memory leak!\n");
1757         /*
1758          * Note that ipath_unregister_ib_device() can be called before all
1759          * the QPs are destroyed!
1760          */
1761         ipath_free_all_qps(&dev->qp_table);
1762         kfree(dev->qp_table.table);
1763         kfree(dev->lk_table.table);
1764         ib_dealloc_device(ibdev);
1765 }
1766
1767 static ssize_t show_rev(struct class_device *cdev, char *buf)
1768 {
1769         struct ipath_ibdev *dev =
1770                 container_of(cdev, struct ipath_ibdev, ibdev.class_dev);
1771
1772         return sprintf(buf, "%x\n", dev->dd->ipath_pcirev);
1773 }
1774
1775 static ssize_t show_hca(struct class_device *cdev, char *buf)
1776 {
1777         struct ipath_ibdev *dev =
1778                 container_of(cdev, struct ipath_ibdev, ibdev.class_dev);
1779         int ret;
1780
1781         ret = dev->dd->ipath_f_get_boardname(dev->dd, buf, 128);
1782         if (ret < 0)
1783                 goto bail;
1784         strcat(buf, "\n");
1785         ret = strlen(buf);
1786
1787 bail:
1788         return ret;
1789 }
1790
1791 static ssize_t show_stats(struct class_device *cdev, char *buf)
1792 {
1793         struct ipath_ibdev *dev =
1794                 container_of(cdev, struct ipath_ibdev, ibdev.class_dev);
1795         int i;
1796         int len;
1797
1798         len = sprintf(buf,
1799                       "RC resends  %d\n"
1800                       "RC no QACK  %d\n"
1801                       "RC ACKs     %d\n"
1802                       "RC SEQ NAKs %d\n"
1803                       "RC RDMA seq %d\n"
1804                       "RC RNR NAKs %d\n"
1805                       "RC OTH NAKs %d\n"
1806                       "RC timeouts %d\n"
1807                       "RC RDMA dup %d\n"
1808                       "RC stalls   %d\n"
1809                       "piobuf wait %d\n"
1810                       "no piobuf   %d\n"
1811                       "PKT drops   %d\n"
1812                       "WQE errs    %d\n",
1813                       dev->n_rc_resends, dev->n_rc_qacks, dev->n_rc_acks,
1814                       dev->n_seq_naks, dev->n_rdma_seq, dev->n_rnr_naks,
1815                       dev->n_other_naks, dev->n_timeouts,
1816                       dev->n_rdma_dup_busy, dev->n_rc_stalls, dev->n_piowait,
1817                       dev->n_no_piobuf, dev->n_pkt_drops, dev->n_wqe_errs);
1818         for (i = 0; i < ARRAY_SIZE(dev->opstats); i++) {
1819                 const struct ipath_opcode_stats *si = &dev->opstats[i];
1820
1821                 if (!si->n_packets && !si->n_bytes)
1822                         continue;
1823                 len += sprintf(buf + len, "%02x %llu/%llu\n", i,
1824                                (unsigned long long) si->n_packets,
1825                                (unsigned long long) si->n_bytes);
1826         }
1827         return len;
1828 }
1829
1830 static CLASS_DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
1831 static CLASS_DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
1832 static CLASS_DEVICE_ATTR(board_id, S_IRUGO, show_hca, NULL);
1833 static CLASS_DEVICE_ATTR(stats, S_IRUGO, show_stats, NULL);
1834
1835 static struct class_device_attribute *ipath_class_attributes[] = {
1836         &class_device_attr_hw_rev,
1837         &class_device_attr_hca_type,
1838         &class_device_attr_board_id,
1839         &class_device_attr_stats
1840 };
1841
1842 static int ipath_verbs_register_sysfs(struct ib_device *dev)
1843 {
1844         int i;
1845         int ret;
1846
1847         for (i = 0; i < ARRAY_SIZE(ipath_class_attributes); ++i)
1848                 if (class_device_create_file(&dev->class_dev,
1849                                              ipath_class_attributes[i])) {
1850                         ret = 1;
1851                         goto bail;
1852                 }
1853
1854         ret = 0;
1855
1856 bail:
1857         return ret;
1858 }