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3 * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
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34 #include "ipath_kernel.h"
36 struct infinipath_stats ipath_stats;
39 * ipath_snap_cntr - snapshot a chip counter
40 * @dd: the infinipath device
41 * @creg: the counter to snapshot
43 * called from add_timer and user counter read calls, to deal with
44 * counters that wrap in "human time". The words sent and received, and
45 * the packets sent and received are all that we worry about. For now,
46 * at least, we don't worry about error counters, because if they wrap
47 * that quickly, we probably don't care. We may eventually just make this
48 * handle all the counters. word counters can wrap in about 20 seconds
49 * of full bandwidth traffic, packet counters in a few hours.
52 u64 ipath_snap_cntr(struct ipath_devdata *dd, ipath_creg creg)
60 /* If fast increment counters are only 32 bits, snapshot them,
61 * and maintain them as 64bit values in the driver */
62 if (!(dd->ipath_flags & IPATH_32BITCOUNTERS) &&
63 (creg == dd->ipath_cregs->cr_wordsendcnt ||
64 creg == dd->ipath_cregs->cr_wordrcvcnt ||
65 creg == dd->ipath_cregs->cr_pktsendcnt ||
66 creg == dd->ipath_cregs->cr_pktrcvcnt)) {
67 val64 = ipath_read_creg(dd, creg);
68 val = val64 == ~0ULL ? ~0U : 0;
70 } else /* val64 just to keep gcc quiet... */
71 val64 = val = ipath_read_creg32(dd, creg);
73 * See if a second has passed. This is just a way to detect things
74 * that are quite broken. Normally this should take just a few
75 * cycles (the check is for long enough that we don't care if we get
76 * pre-empted.) An Opteron HT O read timeout is 4 seconds with
80 if (time_before(t0 + HZ, t1) && val == -1) {
81 ipath_dev_err(dd, "Error! Read counter 0x%x timed out\n",
91 if (creg == dd->ipath_cregs->cr_wordsendcnt) {
92 if (val != dd->ipath_lastsword) {
93 dd->ipath_sword += val - dd->ipath_lastsword;
94 dd->ipath_lastsword = val;
96 val64 = dd->ipath_sword;
97 } else if (creg == dd->ipath_cregs->cr_wordrcvcnt) {
98 if (val != dd->ipath_lastrword) {
99 dd->ipath_rword += val - dd->ipath_lastrword;
100 dd->ipath_lastrword = val;
102 val64 = dd->ipath_rword;
103 } else if (creg == dd->ipath_cregs->cr_pktsendcnt) {
104 if (val != dd->ipath_lastspkts) {
105 dd->ipath_spkts += val - dd->ipath_lastspkts;
106 dd->ipath_lastspkts = val;
108 val64 = dd->ipath_spkts;
109 } else if (creg == dd->ipath_cregs->cr_pktrcvcnt) {
110 if (val != dd->ipath_lastrpkts) {
111 dd->ipath_rpkts += val - dd->ipath_lastrpkts;
112 dd->ipath_lastrpkts = val;
114 val64 = dd->ipath_rpkts;
125 * ipath_qcheck - print delta of egrfull/hdrqfull errors for kernel ports
126 * @dd: the infinipath device
128 * print the delta of egrfull/hdrqfull errors for kernel ports no more than
129 * every 5 seconds. User processes are printed at close, but kernel doesn't
130 * close, so... Separate routine so may call from other places someday, and
131 * so function name when printed by _IPATH_INFO is meaningfull
133 static void ipath_qcheck(struct ipath_devdata *dd)
135 static u64 last_tot_hdrqfull;
136 struct ipath_portdata *pd = dd->ipath_pd[0];
142 if (pd->port_hdrqfull != dd->ipath_p0_hdrqfull) {
143 blen = snprintf(buf, sizeof buf, "port 0 hdrqfull %u",
145 dd->ipath_p0_hdrqfull);
146 dd->ipath_p0_hdrqfull = pd->port_hdrqfull;
148 if (ipath_stats.sps_etidfull != dd->ipath_last_tidfull) {
149 blen += snprintf(buf + blen, sizeof buf - blen,
153 (ipath_stats.sps_etidfull -
154 dd->ipath_last_tidfull));
155 dd->ipath_last_tidfull = ipath_stats.sps_etidfull;
159 * this is actually the number of hdrq full interrupts, not actual
160 * events, but at the moment that's mostly what I'm interested in.
161 * Actual count, etc. is in the counters, if needed. For production
162 * users this won't ordinarily be printed.
165 if ((ipath_debug & (__IPATH_PKTDBG | __IPATH_DBG)) &&
166 ipath_stats.sps_hdrqfull != last_tot_hdrqfull) {
167 blen += snprintf(buf + blen, sizeof buf - blen,
168 "%shdrqfull %llu (all ports)",
171 (ipath_stats.sps_hdrqfull -
173 last_tot_hdrqfull = ipath_stats.sps_hdrqfull;
176 ipath_dbg("%s\n", buf);
178 hdrqtail = ipath_get_hdrqtail(pd);
179 if (pd->port_head != hdrqtail) {
180 if (dd->ipath_lastport0rcv_cnt ==
181 ipath_stats.sps_port0pkts) {
182 ipath_cdbg(PKT, "missing rcv interrupts? "
183 "port0 hd=%x tl=%x; port0pkts %llx; write"
185 pd->port_head, hdrqtail,
187 ipath_stats.sps_port0pkts);
188 ipath_write_ureg(dd, ur_rcvhdrhead, hdrqtail |
189 dd->ipath_rhdrhead_intr_off, pd->port_port);
191 dd->ipath_lastport0rcv_cnt = ipath_stats.sps_port0pkts;
195 static void ipath_chk_errormask(struct ipath_devdata *dd)
199 unsigned long errormask;
200 unsigned long hwerrs;
202 if (!dd->ipath_errormask || !(dd->ipath_flags & IPATH_INITTED))
205 errormask = ipath_read_kreg64(dd, dd->ipath_kregs->kr_errormask);
207 if (errormask == dd->ipath_errormask)
211 hwerrs = ipath_read_kreg64(dd, dd->ipath_kregs->kr_hwerrstatus);
212 ctrl = ipath_read_kreg32(dd, dd->ipath_kregs->kr_control);
214 ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
215 dd->ipath_errormask);
217 if ((hwerrs & dd->ipath_hwerrmask) ||
218 (ctrl & INFINIPATH_C_FREEZEMODE)) {
219 /* force re-interrupt of pending events, just in case */
220 ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear, 0ULL);
221 ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear, 0ULL);
222 ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, 0ULL);
223 dev_info(&dd->pcidev->dev,
224 "errormask fixed(%u) %lx -> %lx, ctrl %x hwerr %lx\n",
225 fixed, errormask, (unsigned long)dd->ipath_errormask,
228 ipath_dbg("errormask fixed(%u) %lx -> %lx, no freeze\n",
230 (unsigned long)dd->ipath_errormask);
235 * ipath_get_faststats - get word counters from chip before they overflow
236 * @opaque - contains a pointer to the infinipath device ipath_devdata
238 * called from add_timer
240 void ipath_get_faststats(unsigned long opaque)
242 struct ipath_devdata *dd = (struct ipath_devdata *) opaque;
249 * don't access the chip while running diags, or memory diags can
252 if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_INITTED) ||
254 /* but re-arm the timer, for diags case; won't hurt other */
258 * We now try to maintain a "active timer", based on traffic
259 * exceeding a threshold, so we need to check the word-counts
260 * even if they are 64-bit.
262 traffic_wds = ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordsendcnt) +
263 ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordrcvcnt);
264 spin_lock_irqsave(&dd->ipath_eep_st_lock, flags);
265 traffic_wds -= dd->ipath_traffic_wds;
266 dd->ipath_traffic_wds += traffic_wds;
267 if (traffic_wds >= IPATH_TRAFFIC_ACTIVE_THRESHOLD)
268 atomic_add(5, &dd->ipath_active_time); /* S/B #define */
269 spin_unlock_irqrestore(&dd->ipath_eep_st_lock, flags);
271 if (dd->ipath_flags & IPATH_32BITCOUNTERS) {
272 ipath_snap_cntr(dd, dd->ipath_cregs->cr_pktsendcnt);
273 ipath_snap_cntr(dd, dd->ipath_cregs->cr_pktrcvcnt);
279 * deal with repeat error suppression. Doesn't really matter if
280 * last error was almost a full interval ago, or just a few usecs
281 * ago; still won't get more than 2 per interval. We may want
282 * longer intervals for this eventually, could do with mod, counter
283 * or separate timer. Also see code in ipath_handle_errors() and
284 * ipath_handle_hwerrors().
287 if (dd->ipath_lasterror)
288 dd->ipath_lasterror = 0;
289 if (dd->ipath_lasthwerror)
290 dd->ipath_lasthwerror = 0;
291 if (dd->ipath_maskederrs
292 && time_after(jiffies, dd->ipath_unmasktime)) {
295 iserr = ipath_decode_err(dd, ebuf, sizeof ebuf,
296 dd->ipath_maskederrs);
297 if (dd->ipath_maskederrs &
298 ~(INFINIPATH_E_RRCVEGRFULL | INFINIPATH_E_RRCVHDRFULL |
299 INFINIPATH_E_PKTERRS))
300 ipath_dev_err(dd, "Re-enabling masked errors "
304 * rcvegrfull and rcvhdrqfull are "normal", for some
305 * types of processes (mostly benchmarks) that send
306 * huge numbers of messages, while not processing
307 * them. So only complain about these at debug
312 "Re-enabling queue full errors (%s)\n",
315 ipath_cdbg(ERRPKT, "Re-enabling packet"
316 " problem interrupt (%s)\n", ebuf);
319 /* re-enable masked errors */
320 dd->ipath_errormask |= dd->ipath_maskederrs;
321 ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
322 dd->ipath_errormask);
323 dd->ipath_maskederrs = 0;
326 /* limit qfull messages to ~one per minute per port */
327 if ((++cnt & 0x10)) {
328 for (i = (int) dd->ipath_cfgports; --i >= 0; ) {
329 struct ipath_portdata *pd = dd->ipath_pd[i];
331 if (pd && pd->port_lastrcvhdrqtail != -1)
332 pd->port_lastrcvhdrqtail = -1;
336 ipath_chk_errormask(dd);
338 mod_timer(&dd->ipath_stats_timer, jiffies + HZ * 5);