drivers/infiniband/hw/ipath/ipath_driver.c

   1 /*
   2  * Copyright (c) 2006, 2007, 2008 QLogic Corporation. All rights reserved.
   3  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
   4  *
   5  * This software is available to you under a choice of one of two
   6  * licenses.  You may choose to be licensed under the terms of the GNU
   7  * General Public License (GPL) Version 2, available from the file
   8  * COPYING in the main directory of this source tree, or the
   9  * OpenIB.org BSD license below:
  10  *
  11  *     Redistribution and use in source and binary forms, with or
  12  *     without modification, are permitted provided that the following
  13  *     conditions are met:
  14  *
  15  *      - Redistributions of source code must retain the above
  16  *        copyright notice, this list of conditions and the following
  17  *        disclaimer.
  18  *
  19  *      - Redistributions in binary form must reproduce the above
  20  *        copyright notice, this list of conditions and the following
  21  *        disclaimer in the documentation and/or other materials
  22  *        provided with the distribution.
  23  *
  24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31  * SOFTWARE.
  32  */
  33
  34 #include <linux/sched.h>
  35 #include <linux/spinlock.h>
  36 #include <linux/idr.h>
  37 #include <linux/pci.h>
  38 #include <linux/io.h>
  39 #include <linux/delay.h>
  40 #include <linux/netdevice.h>
  41 #include <linux/vmalloc.h>
  42 #include <linux/bitmap.h>
  43 #include <linux/slab.h>
  44 #include <linux/module.h>
  45
  46 #include "ipath_kernel.h"
  47 #include "ipath_verbs.h"
  48
  49 static void ipath_update_pio_bufs(struct ipath_devdata *);
  50
  51 const char *ipath_get_unit_name(int unit)
  52 {
  53         static char iname[16];
  54         snprintf(iname, sizeof iname, "infinipath%u", unit);
  55         return iname;
  56 }
  57
  58 #define DRIVER_LOAD_MSG "QLogic " IPATH_DRV_NAME " loaded: "
  59 #define PFX IPATH_DRV_NAME ": "
  60
  61 /*
  62  * The size has to be longer than this string, so we can append
  63  * board/chip information to it in the init code.
  64  */
  65 const char ib_ipath_version[] = IPATH_IDSTR "\n";
  66
  67 static struct idr unit_table;
  68 DEFINE_SPINLOCK(ipath_devs_lock);
  69 LIST_HEAD(ipath_dev_list);
  70
  71 wait_queue_head_t ipath_state_wait;
  72
  73 unsigned ipath_debug = __IPATH_INFO;
  74
  75 module_param_named(debug, ipath_debug, uint, S_IWUSR | S_IRUGO);
  76 MODULE_PARM_DESC(debug, "mask for debug prints");
  77 EXPORT_SYMBOL_GPL(ipath_debug);
  78
  79 unsigned ipath_mtu4096 = 1; /* max 4KB IB mtu by default, if supported */
  80 module_param_named(mtu4096, ipath_mtu4096, uint, S_IRUGO);
  81 MODULE_PARM_DESC(mtu4096, "enable MTU of 4096 bytes, if supported");
  82
  83 static unsigned ipath_hol_timeout_ms = 13000;
  84 module_param_named(hol_timeout_ms, ipath_hol_timeout_ms, uint, S_IRUGO);
  85 MODULE_PARM_DESC(hol_timeout_ms,
  86         "duration of user app suspension after link failure");
  87
  88 unsigned ipath_linkrecovery = 1;
  89 module_param_named(linkrecovery, ipath_linkrecovery, uint, S_IWUSR | S_IRUGO);
  90 MODULE_PARM_DESC(linkrecovery, "enable workaround for link recovery issue");
  91
  92 MODULE_LICENSE("GPL");
  93 MODULE_AUTHOR("QLogic <support@qlogic.com>");
  94 MODULE_DESCRIPTION("QLogic InfiniPath driver");
  95
  96 /*
  97  * Table to translate the LINKTRAININGSTATE portion of
  98  * IBCStatus to a human-readable form.
  99  */
 100 const char *ipath_ibcstatus_str[] = {
 101         "Disabled",
 102         "LinkUp",
 103         "PollActive",
 104         "PollQuiet",
 105         "SleepDelay",
 106         "SleepQuiet",
 107         "LState6",              /* unused */
 108         "LState7",              /* unused */
 109         "CfgDebounce",
 110         "CfgRcvfCfg",
 111         "CfgWaitRmt",
 112         "CfgIdle",
 113         "RecovRetrain",
 114         "CfgTxRevLane",         /* unused before IBA7220 */
 115         "RecovWaitRmt",
 116         "RecovIdle",
 117         /* below were added for IBA7220 */
 118         "CfgEnhanced",
 119         "CfgTest",
 120         "CfgWaitRmtTest",
 121         "CfgWaitCfgEnhanced",
 122         "SendTS_T",
 123         "SendTstIdles",
 124         "RcvTS_T",
 125         "SendTst_TS1s",
 126         "LTState18", "LTState19", "LTState1A", "LTState1B",
 127         "LTState1C", "LTState1D", "LTState1E", "LTState1F"
 128 };
 129
 130 static void ipath_remove_one(struct pci_dev *);
 131 static int ipath_init_one(struct pci_dev *, const struct pci_device_id *);
 132
 133 /* Only needed for registration, nothing else needs this info */
 134 #define PCI_VENDOR_ID_PATHSCALE 0x1fc1
 135 #define PCI_DEVICE_ID_INFINIPATH_HT 0xd
 136
 137 /* Number of seconds before our card status check...  */
 138 #define STATUS_TIMEOUT 60
 139
 140 static const struct pci_device_id ipath_pci_tbl[] = {
 141         { PCI_DEVICE(PCI_VENDOR_ID_PATHSCALE, PCI_DEVICE_ID_INFINIPATH_HT) },
 142         { 0, }
 143 };
 144
 145 MODULE_DEVICE_TABLE(pci, ipath_pci_tbl);
 146
 147 static struct pci_driver ipath_driver = {
 148         .name = IPATH_DRV_NAME,
 149         .probe = ipath_init_one,
 150         .remove = ipath_remove_one,
 151         .id_table = ipath_pci_tbl,
 152         .driver = {
 153                 .groups = ipath_driver_attr_groups,
 154         },
 155 };
 156
 157 static inline void read_bars(struct ipath_devdata *dd, struct pci_dev *dev,
 158                              u32 *bar0, u32 *bar1)
 159 {
 160         int ret;
 161
 162         ret = pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
 163         if (ret)
 164                 ipath_dev_err(dd, "failed to read bar0 before enable: "
 165                               "error %d\n", -ret);
 166
 167         ret = pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, bar1);
 168         if (ret)
 169                 ipath_dev_err(dd, "failed to read bar1 before enable: "
 170                               "error %d\n", -ret);
 171
 172         ipath_dbg("Read bar0 %x bar1 %x\n", *bar0, *bar1);
 173 }
 174
 175 static void ipath_free_devdata(struct pci_dev *pdev,
 176                                struct ipath_devdata *dd)
 177 {
 178         unsigned long flags;
 179
 180         pci_set_drvdata(pdev, NULL);
 181
 182         if (dd->ipath_unit != -1) {
 183                 spin_lock_irqsave(&ipath_devs_lock, flags);
 184                 idr_remove(&unit_table, dd->ipath_unit);
 185                 list_del(&dd->ipath_list);
 186                 spin_unlock_irqrestore(&ipath_devs_lock, flags);
 187         }
 188         vfree(dd);
 189 }
 190
 191 static struct ipath_devdata *ipath_alloc_devdata(struct pci_dev *pdev)
 192 {
 193         unsigned long flags;
 194         struct ipath_devdata *dd;
 195         int ret;
 196
 197         if (!idr_pre_get(&unit_table, GFP_KERNEL)) {
 198                 dd = ERR_PTR(-ENOMEM);
 199                 goto bail;
 200         }
 201
 202         dd = vzalloc(sizeof(*dd));
 203         if (!dd) {
 204                 dd = ERR_PTR(-ENOMEM);
 205                 goto bail;
 206         }
 207         dd->ipath_unit = -1;
 208
 209         spin_lock_irqsave(&ipath_devs_lock, flags);
 210
 211         ret = idr_get_new(&unit_table, dd, &dd->ipath_unit);
 212         if (ret < 0) {
 213                 printk(KERN_ERR IPATH_DRV_NAME
 214                        ": Could not allocate unit ID: error %d\n", -ret);
 215                 ipath_free_devdata(pdev, dd);
 216                 dd = ERR_PTR(ret);
 217                 goto bail_unlock;
 218         }
 219
 220         dd->pcidev = pdev;
 221         pci_set_drvdata(pdev, dd);
 222
 223         list_add(&dd->ipath_list, &ipath_dev_list);
 224
 225 bail_unlock:
 226         spin_unlock_irqrestore(&ipath_devs_lock, flags);
 227
 228 bail:
 229         return dd;
 230 }
 231
 232 static inline struct ipath_devdata *__ipath_lookup(int unit)
 233 {
 234         return idr_find(&unit_table, unit);
 235 }
 236
 237 struct ipath_devdata *ipath_lookup(int unit)
 238 {
 239         struct ipath_devdata *dd;
 240         unsigned long flags;
 241
 242         spin_lock_irqsave(&ipath_devs_lock, flags);
 243         dd = __ipath_lookup(unit);
 244         spin_unlock_irqrestore(&ipath_devs_lock, flags);
 245
 246         return dd;
 247 }
 248
 249 int ipath_count_units(int *npresentp, int *nupp, int *maxportsp)
 250 {
 251         int nunits, npresent, nup;
 252         struct ipath_devdata *dd;
 253         unsigned long flags;
 254         int maxports;
 255
 256         nunits = npresent = nup = maxports = 0;
 257
 258         spin_lock_irqsave(&ipath_devs_lock, flags);
 259
 260         list_for_each_entry(dd, &ipath_dev_list, ipath_list) {
 261                 nunits++;
 262                 if ((dd->ipath_flags & IPATH_PRESENT) && dd->ipath_kregbase)
 263                         npresent++;
 264                 if (dd->ipath_lid &&
 265                     !(dd->ipath_flags & (IPATH_DISABLED | IPATH_LINKDOWN
 266                                          | IPATH_LINKUNK)))
 267                         nup++;
 268                 if (dd->ipath_cfgports > maxports)
 269                         maxports = dd->ipath_cfgports;
 270         }
 271
 272         spin_unlock_irqrestore(&ipath_devs_lock, flags);
 273
 274         if (npresentp)
 275                 *npresentp = npresent;
 276         if (nupp)
 277                 *nupp = nup;
 278         if (maxportsp)
 279                 *maxportsp = maxports;
 280
 281         return nunits;
 282 }
 283
 284 /*
 285  * These next two routines are placeholders in case we don't have per-arch
 286  * code for controlling write combining.  If explicit control of write
 287  * combining is not available, performance will probably be awful.
 288  */
 289
 290 int __attribute__((weak)) ipath_enable_wc(struct ipath_devdata *dd)
 291 {
 292         return -EOPNOTSUPP;
 293 }
 294
 295 void __attribute__((weak)) ipath_disable_wc(struct ipath_devdata *dd)
 296 {
 297 }
 298
 299 /*
 300  * Perform a PIO buffer bandwidth write test, to verify proper system
 301  * configuration.  Even when all the setup calls work, occasionally
 302  * BIOS or other issues can prevent write combining from working, or
 303  * can cause other bandwidth problems to the chip.
 304  *
 305  * This test simply writes the same buffer over and over again, and
 306  * measures close to the peak bandwidth to the chip (not testing
 307  * data bandwidth to the wire).   On chips that use an address-based
 308  * trigger to send packets to the wire, this is easy.  On chips that
 309  * use a count to trigger, we want to make sure that the packet doesn't
 310  * go out on the wire, or trigger flow control checks.
 311  */
 312 static void ipath_verify_pioperf(struct ipath_devdata *dd)
 313 {
 314         u32 pbnum, cnt, lcnt;
 315         u32 __iomem *piobuf;
 316         u32 *addr;
 317         u64 msecs, emsecs;
 318
 319         piobuf = ipath_getpiobuf(dd, 0, &pbnum);
 320         if (!piobuf) {
 321                 dev_info(&dd->pcidev->dev,
 322                         "No PIObufs for checking perf, skipping\n");
 323                 return;
 324         }
 325
 326         /*
 327          * Enough to give us a reasonable test, less than piobuf size, and
 328          * likely multiple of store buffer length.
 329          */
 330         cnt = 1024;
 331
 332         addr = vmalloc(cnt);
 333         if (!addr) {
 334                 dev_info(&dd->pcidev->dev,
 335                         "Couldn't get memory for checking PIO perf,"
 336                         " skipping\n");
 337                 goto done;
 338         }
 339
 340         preempt_disable();  /* we want reasonably accurate elapsed time */
 341         msecs = 1 + jiffies_to_msecs(jiffies);
 342         for (lcnt = 0; lcnt < 10000U; lcnt++) {
 343                 /* wait until we cross msec boundary */
 344                 if (jiffies_to_msecs(jiffies) >= msecs)
 345                         break;
 346                 udelay(1);
 347         }
 348
 349         ipath_disable_armlaunch(dd);
 350
 351         /*
 352          * length 0, no dwords actually sent, and mark as VL15
 353          * on chips where that may matter (due to IB flowcontrol)
 354          */
 355         if ((dd->ipath_flags & IPATH_HAS_PBC_CNT))
 356                 writeq(1UL << 63, piobuf);
 357         else
 358                 writeq(0, piobuf);
 359         ipath_flush_wc();
 360
 361         /*
 362          * this is only roughly accurate, since even with preempt we
 363          * still take interrupts that could take a while.   Running for
 364          * >= 5 msec seems to get us "close enough" to accurate values
 365          */
 366         msecs = jiffies_to_msecs(jiffies);
 367         for (emsecs = lcnt = 0; emsecs <= 5UL; lcnt++) {
 368                 __iowrite32_copy(piobuf + 64, addr, cnt >> 2);
 369                 emsecs = jiffies_to_msecs(jiffies) - msecs;
 370         }
 371
 372         /* 1 GiB/sec, slightly over IB SDR line rate */
 373         if (lcnt < (emsecs * 1024U))
 374                 ipath_dev_err(dd,
 375                         "Performance problem: bandwidth to PIO buffers is "
 376                         "only %u MiB/sec\n",
 377                         lcnt / (u32) emsecs);
 378         else
 379                 ipath_dbg("PIO buffer bandwidth %u MiB/sec is OK\n",
 380                         lcnt / (u32) emsecs);
 381
 382         preempt_enable();
 383
 384         vfree(addr);
 385
 386 done:
 387         /* disarm piobuf, so it's available again */
 388         ipath_disarm_piobufs(dd, pbnum, 1);
 389         ipath_enable_armlaunch(dd);
 390 }
 391
 392 static void cleanup_device(struct ipath_devdata *dd);
 393
 394 static int ipath_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
 395 {
 396         int ret, len, j;
 397         struct ipath_devdata *dd;
 398         unsigned long long addr;
 399         u32 bar0 = 0, bar1 = 0;
 400
 401         dd = ipath_alloc_devdata(pdev);
 402         if (IS_ERR(dd)) {
 403                 ret = PTR_ERR(dd);
 404                 printk(KERN_ERR IPATH_DRV_NAME
 405                        ": Could not allocate devdata: error %d\n", -ret);
 406                 goto bail;
 407         }
 408
 409         ipath_cdbg(VERBOSE, "initializing unit #%u\n", dd->ipath_unit);
 410
 411         ret = pci_enable_device(pdev);
 412         if (ret) {
 413                 /* This can happen iff:
 414                  *
 415                  * We did a chip reset, and then failed to reprogram the
 416                  * BAR, or the chip reset due to an internal error.  We then
 417                  * unloaded the driver and reloaded it.
 418                  *
 419                  * Both reset cases set the BAR back to initial state.  For
 420                  * the latter case, the AER sticky error bit at offset 0x718
 421                  * should be set, but the Linux kernel doesn't yet know
 422                  * about that, it appears.  If the original BAR was retained
 423                  * in the kernel data structures, this may be OK.
 424                  */
 425                 ipath_dev_err(dd, "enable unit %d failed: error %d\n",
 426                               dd->ipath_unit, -ret);
 427                 goto bail_devdata;
 428         }
 429         addr = pci_resource_start(pdev, 0);
 430         len = pci_resource_len(pdev, 0);
 431         ipath_cdbg(VERBOSE, "regbase (0) %llx len %d irq %d, vend %x/%x "
 432                    "driver_data %lx\n", addr, len, pdev->irq, ent->vendor,
 433                    ent->device, ent->driver_data);
 434
 435         read_bars(dd, pdev, &bar0, &bar1);
 436
 437         if (!bar1 && !(bar0 & ~0xf)) {
 438                 if (addr) {
 439                         dev_info(&pdev->dev, "BAR is 0 (probable RESET), "
 440                                  "rewriting as %llx\n", addr);
 441                         ret = pci_write_config_dword(
 442                                 pdev, PCI_BASE_ADDRESS_0, addr);
 443                         if (ret) {
 444                                 ipath_dev_err(dd, "rewrite of BAR0 "
 445                                               "failed: err %d\n", -ret);
 446                                 goto bail_disable;
 447                         }
 448                         ret = pci_write_config_dword(
 449                                 pdev, PCI_BASE_ADDRESS_1, addr >> 32);
 450                         if (ret) {
 451                                 ipath_dev_err(dd, "rewrite of BAR1 "
 452                                               "failed: err %d\n", -ret);
 453                                 goto bail_disable;
 454                         }
 455                 } else {
 456                         ipath_dev_err(dd, "BAR is 0 (probable RESET), "
 457                                       "not usable until reboot\n");
 458                         ret = -ENODEV;
 459                         goto bail_disable;
 460                 }
 461         }
 462
 463         ret = pci_request_regions(pdev, IPATH_DRV_NAME);
 464         if (ret) {
 465                 dev_info(&pdev->dev, "pci_request_regions unit %u fails: "
 466                          "err %d\n", dd->ipath_unit, -ret);
 467                 goto bail_disable;
 468         }
 469
 470         ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
 471         if (ret) {
 472                 /*
 473                  * if the 64 bit setup fails, try 32 bit.  Some systems
 474                  * do not setup 64 bit maps on systems with 2GB or less
 475                  * memory installed.
 476                  */
 477                 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
 478                 if (ret) {
 479                         dev_info(&pdev->dev,
 480                                 "Unable to set DMA mask for unit %u: %d\n",
 481                                 dd->ipath_unit, ret);
 482                         goto bail_regions;
 483                 }
 484                 else {
 485                         ipath_dbg("No 64bit DMA mask, used 32 bit mask\n");
 486                         ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
 487                         if (ret)
 488                                 dev_info(&pdev->dev,
 489                                         "Unable to set DMA consistent mask "
 490                                         "for unit %u: %d\n",
 491                                         dd->ipath_unit, ret);
 492
 493                 }
 494         }
 495         else {
 496                 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
 497                 if (ret)
 498                         dev_info(&pdev->dev,
 499                                 "Unable to set DMA consistent mask "
 500                                 "for unit %u: %d\n",
 501                                 dd->ipath_unit, ret);
 502         }
 503
 504         pci_set_master(pdev);
 505
 506         /*
 507          * Save BARs to rewrite after device reset.  Save all 64 bits of
 508          * BAR, just in case.
 509          */
 510         dd->ipath_pcibar0 = addr;
 511         dd->ipath_pcibar1 = addr >> 32;
 512         dd->ipath_deviceid = ent->device;       /* save for later use */
 513         dd->ipath_vendorid = ent->vendor;
 514
 515         /* setup the chip-specific functions, as early as possible. */
 516         switch (ent->device) {
 517         case PCI_DEVICE_ID_INFINIPATH_HT:
 518                 ipath_init_iba6110_funcs(dd);
 519                 break;
 520
 521         default:
 522                 ipath_dev_err(dd, "Found unknown QLogic deviceid 0x%x, "
 523                               "failing\n", ent->device);
 524                 return -ENODEV;
 525         }
 526
 527         for (j = 0; j < 6; j++) {
 528                 if (!pdev->resource[j].start)
 529                         continue;
 530                 ipath_cdbg(VERBOSE, "BAR %d %pR, len %llx\n",
 531                            j, &pdev->resource[j],
 532                            (unsigned long long)pci_resource_len(pdev, j));
 533         }
 534
 535         if (!addr) {
 536                 ipath_dev_err(dd, "No valid address in BAR 0!\n");
 537                 ret = -ENODEV;
 538                 goto bail_regions;
 539         }
 540
 541         dd->ipath_pcirev = pdev->revision;
 542
 543 #if defined(__powerpc__)
 544         /* There isn't a generic way to specify writethrough mappings */
 545         dd->ipath_kregbase = __ioremap(addr, len,
 546                 (_PAGE_NO_CACHE|_PAGE_WRITETHRU));
 547 #else
 548         dd->ipath_kregbase = ioremap_nocache(addr, len);
 549 #endif
 550
 551         if (!dd->ipath_kregbase) {
 552                 ipath_dbg("Unable to map io addr %llx to kvirt, failing\n",
 553                           addr);
 554                 ret = -ENOMEM;
 555                 goto bail_iounmap;
 556         }
 557         dd->ipath_kregend = (u64 __iomem *)
 558                 ((void __iomem *)dd->ipath_kregbase + len);
 559         dd->ipath_physaddr = addr;      /* used for io_remap, etc. */
 560         /* for user mmap */
 561         ipath_cdbg(VERBOSE, "mapped io addr %llx to kregbase %p\n",
 562                    addr, dd->ipath_kregbase);
 563
 564         if (dd->ipath_f_bus(dd, pdev))
 565                 ipath_dev_err(dd, "Failed to setup config space; "
 566                               "continuing anyway\n");
 567
 568         /*
 569          * set up our interrupt handler; IRQF_SHARED probably not needed,
 570          * since MSI interrupts shouldn't be shared but won't  hurt for now.
 571          * check 0 irq after we return from chip-specific bus setup, since
 572          * that can affect this due to setup
 573          */
 574         if (!dd->ipath_irq)
 575                 ipath_dev_err(dd, "irq is 0, BIOS error?  Interrupts won't "
 576                               "work\n");
 577         else {
 578                 ret = request_irq(dd->ipath_irq, ipath_intr, IRQF_SHARED,
 579                                   IPATH_DRV_NAME, dd);
 580                 if (ret) {
 581                         ipath_dev_err(dd, "Couldn't setup irq handler, "
 582                                       "irq=%d: %d\n", dd->ipath_irq, ret);
 583                         goto bail_iounmap;
 584                 }
 585         }
 586
 587         ret = ipath_init_chip(dd, 0);   /* do the chip-specific init */
 588         if (ret)
 589                 goto bail_irqsetup;
 590
 591         ret = ipath_enable_wc(dd);
 592
 593         if (ret) {
 594                 ipath_dev_err(dd, "Write combining not enabled "
 595                               "(err %d): performance may be poor\n",
 596                               -ret);
 597                 ret = 0;
 598         }
 599
 600         ipath_verify_pioperf(dd);
 601
 602         ipath_device_create_group(&pdev->dev, dd);
 603         ipathfs_add_device(dd);
 604         ipath_user_add(dd);
 605         ipath_diag_add(dd);
 606         ipath_register_ib_device(dd);
 607
 608         goto bail;
 609
 610 bail_irqsetup:
 611         cleanup_device(dd);
 612
 613         if (dd->ipath_irq)
 614                 dd->ipath_f_free_irq(dd);
 615
 616         if (dd->ipath_f_cleanup)
 617                 dd->ipath_f_cleanup(dd);
 618
 619 bail_iounmap:
 620         iounmap((volatile void __iomem *) dd->ipath_kregbase);
 621
 622 bail_regions:
 623         pci_release_regions(pdev);
 624
 625 bail_disable:
 626         pci_disable_device(pdev);
 627
 628 bail_devdata:
 629         ipath_free_devdata(pdev, dd);
 630
 631 bail:
 632         return ret;
 633 }
 634
 635 static void cleanup_device(struct ipath_devdata *dd)
 636 {
 637         int port;
 638         struct ipath_portdata **tmp;
 639         unsigned long flags;
 640
 641         if (*dd->ipath_statusp & IPATH_STATUS_CHIP_PRESENT) {
 642                 /* can't do anything more with chip; needs re-init */
 643                 *dd->ipath_statusp &= ~IPATH_STATUS_CHIP_PRESENT;
 644                 if (dd->ipath_kregbase) {
 645                         /*
 646                          * if we haven't already cleaned up before these are
 647                          * to ensure any register reads/writes "fail" until
 648                          * re-init
 649                          */
 650                         dd->ipath_kregbase = NULL;
 651                         dd->ipath_uregbase = 0;
 652                         dd->ipath_sregbase = 0;
 653                         dd->ipath_cregbase = 0;
 654                         dd->ipath_kregsize = 0;
 655                 }
 656                 ipath_disable_wc(dd);
 657         }
 658
 659         if (dd->ipath_spectriggerhit)
 660                 dev_info(&dd->pcidev->dev, "%lu special trigger hits\n",
 661                          dd->ipath_spectriggerhit);
 662
 663         if (dd->ipath_pioavailregs_dma) {
 664                 dma_free_coherent(&dd->pcidev->dev, PAGE_SIZE,
 665                                   (void *) dd->ipath_pioavailregs_dma,
 666                                   dd->ipath_pioavailregs_phys);
 667                 dd->ipath_pioavailregs_dma = NULL;
 668         }
 669         if (dd->ipath_dummy_hdrq) {
 670                 dma_free_coherent(&dd->pcidev->dev,
 671                         dd->ipath_pd[0]->port_rcvhdrq_size,
 672                         dd->ipath_dummy_hdrq, dd->ipath_dummy_hdrq_phys);
 673                 dd->ipath_dummy_hdrq = NULL;
 674         }
 675
 676         if (dd->ipath_pageshadow) {
 677                 struct page **tmpp = dd->ipath_pageshadow;
 678                 dma_addr_t *tmpd = dd->ipath_physshadow;
 679                 int i, cnt = 0;
 680
 681                 ipath_cdbg(VERBOSE, "Unlocking any expTID pages still "
 682                            "locked\n");
 683                 for (port = 0; port < dd->ipath_cfgports; port++) {
 684                         int port_tidbase = port * dd->ipath_rcvtidcnt;
 685                         int maxtid = port_tidbase + dd->ipath_rcvtidcnt;
 686                         for (i = port_tidbase; i < maxtid; i++) {
 687                                 if (!tmpp[i])
 688                                         continue;
 689                                 pci_unmap_page(dd->pcidev, tmpd[i],
 690                                         PAGE_SIZE, PCI_DMA_FROMDEVICE);
 691                                 ipath_release_user_pages(&tmpp[i], 1);
 692                                 tmpp[i] = NULL;
 693                                 cnt++;
 694                         }
 695                 }
 696                 if (cnt) {
 697                         ipath_stats.sps_pageunlocks += cnt;
 698                         ipath_cdbg(VERBOSE, "There were still %u expTID "
 699                                    "entries locked\n", cnt);
 700                 }
 701                 if (ipath_stats.sps_pagelocks ||
 702                     ipath_stats.sps_pageunlocks)
 703                         ipath_cdbg(VERBOSE, "%llu pages locked, %llu "
 704                                    "unlocked via ipath_m{un}lock\n",
 705                                    (unsigned long long)
 706                                    ipath_stats.sps_pagelocks,
 707                                    (unsigned long long)
 708                                    ipath_stats.sps_pageunlocks);
 709
 710                 ipath_cdbg(VERBOSE, "Free shadow page tid array at %p\n",
 711                            dd->ipath_pageshadow);
 712                 tmpp = dd->ipath_pageshadow;
 713                 dd->ipath_pageshadow = NULL;
 714                 vfree(tmpp);
 715
 716                 dd->ipath_egrtidbase = NULL;
 717         }
 718
 719         /*
 720          * free any resources still in use (usually just kernel ports)
 721          * at unload; we do for portcnt, because that's what we allocate.
 722          * We acquire lock to be really paranoid that ipath_pd isn't being
 723          * accessed from some interrupt-related code (that should not happen,
 724          * but best to be sure).
 725          */
 726         spin_lock_irqsave(&dd->ipath_uctxt_lock, flags);
 727         tmp = dd->ipath_pd;
 728         dd->ipath_pd = NULL;
 729         spin_unlock_irqrestore(&dd->ipath_uctxt_lock, flags);
 730         for (port = 0; port < dd->ipath_portcnt; port++) {
 731                 struct ipath_portdata *pd = tmp[port];
 732                 tmp[port] = NULL; /* debugging paranoia */
 733                 ipath_free_pddata(dd, pd);
 734         }
 735         kfree(tmp);
 736 }
 737
 738 static void ipath_remove_one(struct pci_dev *pdev)
 739 {
 740         struct ipath_devdata *dd = pci_get_drvdata(pdev);
 741
 742         ipath_cdbg(VERBOSE, "removing, pdev=%p, dd=%p\n", pdev, dd);
 743
 744         /*
 745          * disable the IB link early, to be sure no new packets arrive, which
 746          * complicates the shutdown process
 747          */
 748         ipath_shutdown_device(dd);
 749
 750         flush_workqueue(ib_wq);
 751
 752         if (dd->verbs_dev)
 753                 ipath_unregister_ib_device(dd->verbs_dev);
 754
 755         ipath_diag_remove(dd);
 756         ipath_user_remove(dd);
 757         ipathfs_remove_device(dd);
 758         ipath_device_remove_group(&pdev->dev, dd);
 759
 760         ipath_cdbg(VERBOSE, "Releasing pci memory regions, dd %p, "
 761                    "unit %u\n", dd, (u32) dd->ipath_unit);
 762
 763         cleanup_device(dd);
 764
 765         /*
 766          * turn off rcv, send, and interrupts for all ports, all drivers
 767          * should also hard reset the chip here?
 768          * free up port 0 (kernel) rcvhdr, egr bufs, and eventually tid bufs
 769          * for all versions of the driver, if they were allocated
 770          */
 771         if (dd->ipath_irq) {
 772                 ipath_cdbg(VERBOSE, "unit %u free irq %d\n",
 773                            dd->ipath_unit, dd->ipath_irq);
 774                 dd->ipath_f_free_irq(dd);
 775         } else
 776                 ipath_dbg("irq is 0, not doing free_irq "
 777                           "for unit %u\n", dd->ipath_unit);
 778         /*
 779          * we check for NULL here, because it's outside
 780          * the kregbase check, and we need to call it
 781          * after the free_irq.  Thus it's possible that
 782          * the function pointers were never initialized.
 783          */
 784         if (dd->ipath_f_cleanup)
 785                 /* clean up chip-specific stuff */
 786                 dd->ipath_f_cleanup(dd);
 787
 788         ipath_cdbg(VERBOSE, "Unmapping kregbase %p\n", dd->ipath_kregbase);
 789         iounmap((volatile void __iomem *) dd->ipath_kregbase);
 790         pci_release_regions(pdev);
 791         ipath_cdbg(VERBOSE, "calling pci_disable_device\n");
 792         pci_disable_device(pdev);
 793
 794         ipath_free_devdata(pdev, dd);
 795 }
 796
 797 /* general driver use */
 798 DEFINE_MUTEX(ipath_mutex);
 799
 800 static DEFINE_SPINLOCK(ipath_pioavail_lock);
 801
 802 /**
 803  * ipath_disarm_piobufs - cancel a range of PIO buffers
 804  * @dd: the infinipath device
 805  * @first: the first PIO buffer to cancel
 806  * @cnt: the number of PIO buffers to cancel
 807  *
 808  * cancel a range of PIO buffers, used when they might be armed, but
 809  * not triggered.  Used at init to ensure buffer state, and also user
 810  * process close, in case it died while writing to a PIO buffer
 811  * Also after errors.
 812  */
 813 void ipath_disarm_piobufs(struct ipath_devdata *dd, unsigned first,
 814                           unsigned cnt)
 815 {
 816         unsigned i, last = first + cnt;
 817         unsigned long flags;
 818
 819         ipath_cdbg(PKT, "disarm %u PIObufs first=%u\n", cnt, first);
 820         for (i = first; i < last; i++) {
 821                 spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
 822                 /*
 823                  * The disarm-related bits are write-only, so it
 824                  * is ok to OR them in with our copy of sendctrl
 825                  * while we hold the lock.
 826                  */
 827                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
 828                         dd->ipath_sendctrl | INFINIPATH_S_DISARM |
 829                         (i << INFINIPATH_S_DISARMPIOBUF_SHIFT));
 830                 /* can't disarm bufs back-to-back per iba7220 spec */
 831                 ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
 832                 spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
 833         }
 834         /* on some older chips, update may not happen after cancel */
 835         ipath_force_pio_avail_update(dd);
 836 }
 837
 838 /**
 839  * ipath_wait_linkstate - wait for an IB link state change to occur
 840  * @dd: the infinipath device
 841  * @state: the state to wait for
 842  * @msecs: the number of milliseconds to wait
 843  *
 844  * wait up to msecs milliseconds for IB link state change to occur for
 845  * now, take the easy polling route.  Currently used only by
 846  * ipath_set_linkstate.  Returns 0 if state reached, otherwise
 847  * -ETIMEDOUT state can have multiple states set, for any of several
 848  * transitions.
 849  */
 850 int ipath_wait_linkstate(struct ipath_devdata *dd, u32 state, int msecs)
 851 {
 852         dd->ipath_state_wanted = state;
 853         wait_event_interruptible_timeout(ipath_state_wait,
 854                                          (dd->ipath_flags & state),
 855                                          msecs_to_jiffies(msecs));
 856         dd->ipath_state_wanted = 0;
 857
 858         if (!(dd->ipath_flags & state)) {
 859                 u64 val;
 860                 ipath_cdbg(VERBOSE, "Didn't reach linkstate %s within %u"
 861                            " ms\n",
 862                            /* test INIT ahead of DOWN, both can be set */
 863                            (state & IPATH_LINKINIT) ? "INIT" :
 864                            ((state & IPATH_LINKDOWN) ? "DOWN" :
 865                             ((state & IPATH_LINKARMED) ? "ARM" : "ACTIVE")),
 866                            msecs);
 867                 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_ibcstatus);
 868                 ipath_cdbg(VERBOSE, "ibcc=%llx ibcstatus=%llx (%s)\n",
 869                            (unsigned long long) ipath_read_kreg64(
 870                                    dd, dd->ipath_kregs->kr_ibcctrl),
 871                            (unsigned long long) val,
 872                            ipath_ibcstatus_str[val & dd->ibcs_lts_mask]);
 873         }
 874         return (dd->ipath_flags & state) ? 0 : -ETIMEDOUT;
 875 }
 876
 877 static void decode_sdma_errs(struct ipath_devdata *dd, ipath_err_t err,
 878         char *buf, size_t blen)
 879 {
 880         static const struct {
 881                 ipath_err_t err;
 882                 const char *msg;
 883         } errs[] = {
 884                 { INFINIPATH_E_SDMAGENMISMATCH, "SDmaGenMismatch" },
 885                 { INFINIPATH_E_SDMAOUTOFBOUND, "SDmaOutOfBound" },
 886                 { INFINIPATH_E_SDMATAILOUTOFBOUND, "SDmaTailOutOfBound" },
 887                 { INFINIPATH_E_SDMABASE, "SDmaBase" },
 888                 { INFINIPATH_E_SDMA1STDESC, "SDma1stDesc" },
 889                 { INFINIPATH_E_SDMARPYTAG, "SDmaRpyTag" },
 890                 { INFINIPATH_E_SDMADWEN, "SDmaDwEn" },
 891                 { INFINIPATH_E_SDMAMISSINGDW, "SDmaMissingDw" },
 892                 { INFINIPATH_E_SDMAUNEXPDATA, "SDmaUnexpData" },
 893                 { INFINIPATH_E_SDMADESCADDRMISALIGN, "SDmaDescAddrMisalign" },
 894                 { INFINIPATH_E_SENDBUFMISUSE, "SendBufMisuse" },
 895                 { INFINIPATH_E_SDMADISABLED, "SDmaDisabled" },
 896         };
 897         int i;
 898         int expected;
 899         size_t bidx = 0;
 900
 901         for (i = 0; i < ARRAY_SIZE(errs); i++) {
 902                 expected = (errs[i].err != INFINIPATH_E_SDMADISABLED) ? 0 :
 903                         test_bit(IPATH_SDMA_ABORTING, &dd->ipath_sdma_status);
 904                 if ((err & errs[i].err) && !expected)
 905                         bidx += snprintf(buf + bidx, blen - bidx,
 906                                          "%s ", errs[i].msg);
 907         }
 908 }
 909
 910 /*
 911  * Decode the error status into strings, deciding whether to always
 912  * print * it or not depending on "normal packet errors" vs everything
 913  * else.   Return 1 if "real" errors, otherwise 0 if only packet
 914  * errors, so caller can decide what to print with the string.
 915  */
 916 int ipath_decode_err(struct ipath_devdata *dd, char *buf, size_t blen,
 917         ipath_err_t err)
 918 {
 919         int iserr = 1;
 920         *buf = '\0';
 921         if (err & INFINIPATH_E_PKTERRS) {
 922                 if (!(err & ~INFINIPATH_E_PKTERRS))
 923                         iserr = 0; // if only packet errors.
 924                 if (ipath_debug & __IPATH_ERRPKTDBG) {
 925                         if (err & INFINIPATH_E_REBP)
 926                                 strlcat(buf, "EBP ", blen);
 927                         if (err & INFINIPATH_E_RVCRC)
 928                                 strlcat(buf, "VCRC ", blen);
 929                         if (err & INFINIPATH_E_RICRC) {
 930                                 strlcat(buf, "CRC ", blen);
 931                                 // clear for check below, so only once
 932                                 err &= INFINIPATH_E_RICRC;
 933                         }
 934                         if (err & INFINIPATH_E_RSHORTPKTLEN)
 935                                 strlcat(buf, "rshortpktlen ", blen);
 936                         if (err & INFINIPATH_E_SDROPPEDDATAPKT)
 937                                 strlcat(buf, "sdroppeddatapkt ", blen);
 938                         if (err & INFINIPATH_E_SPKTLEN)
 939                                 strlcat(buf, "spktlen ", blen);
 940                 }
 941                 if ((err & INFINIPATH_E_RICRC) &&
 942                         !(err&(INFINIPATH_E_RVCRC|INFINIPATH_E_REBP)))
 943                         strlcat(buf, "CRC ", blen);
 944                 if (!iserr)
 945                         goto done;
 946         }
 947         if (err & INFINIPATH_E_RHDRLEN)
 948                 strlcat(buf, "rhdrlen ", blen);
 949         if (err & INFINIPATH_E_RBADTID)
 950                 strlcat(buf, "rbadtid ", blen);
 951         if (err & INFINIPATH_E_RBADVERSION)
 952                 strlcat(buf, "rbadversion ", blen);
 953         if (err & INFINIPATH_E_RHDR)
 954                 strlcat(buf, "rhdr ", blen);
 955         if (err & INFINIPATH_E_SENDSPECIALTRIGGER)
 956                 strlcat(buf, "sendspecialtrigger ", blen);
 957         if (err & INFINIPATH_E_RLONGPKTLEN)
 958                 strlcat(buf, "rlongpktlen ", blen);
 959         if (err & INFINIPATH_E_RMAXPKTLEN)
 960                 strlcat(buf, "rmaxpktlen ", blen);
 961         if (err & INFINIPATH_E_RMINPKTLEN)
 962                 strlcat(buf, "rminpktlen ", blen);
 963         if (err & INFINIPATH_E_SMINPKTLEN)
 964                 strlcat(buf, "sminpktlen ", blen);
 965         if (err & INFINIPATH_E_RFORMATERR)
 966                 strlcat(buf, "rformaterr ", blen);
 967         if (err & INFINIPATH_E_RUNSUPVL)
 968                 strlcat(buf, "runsupvl ", blen);
 969         if (err & INFINIPATH_E_RUNEXPCHAR)
 970                 strlcat(buf, "runexpchar ", blen);
 971         if (err & INFINIPATH_E_RIBFLOW)
 972                 strlcat(buf, "ribflow ", blen);
 973         if (err & INFINIPATH_E_SUNDERRUN)
 974                 strlcat(buf, "sunderrun ", blen);
 975         if (err & INFINIPATH_E_SPIOARMLAUNCH)
 976                 strlcat(buf, "spioarmlaunch ", blen);
 977         if (err & INFINIPATH_E_SUNEXPERRPKTNUM)
 978                 strlcat(buf, "sunexperrpktnum ", blen);
 979         if (err & INFINIPATH_E_SDROPPEDSMPPKT)
 980                 strlcat(buf, "sdroppedsmppkt ", blen);
 981         if (err & INFINIPATH_E_SMAXPKTLEN)
 982                 strlcat(buf, "smaxpktlen ", blen);
 983         if (err & INFINIPATH_E_SUNSUPVL)
 984                 strlcat(buf, "sunsupVL ", blen);
 985         if (err & INFINIPATH_E_INVALIDADDR)
 986                 strlcat(buf, "invalidaddr ", blen);
 987         if (err & INFINIPATH_E_RRCVEGRFULL)
 988                 strlcat(buf, "rcvegrfull ", blen);
 989         if (err & INFINIPATH_E_RRCVHDRFULL)
 990                 strlcat(buf, "rcvhdrfull ", blen);
 991         if (err & INFINIPATH_E_IBSTATUSCHANGED)
 992                 strlcat(buf, "ibcstatuschg ", blen);
 993         if (err & INFINIPATH_E_RIBLOSTLINK)
 994                 strlcat(buf, "riblostlink ", blen);
 995         if (err & INFINIPATH_E_HARDWARE)
 996                 strlcat(buf, "hardware ", blen);
 997         if (err & INFINIPATH_E_RESET)
 998                 strlcat(buf, "reset ", blen);
 999         if (err & INFINIPATH_E_SDMAERRS)
1000                 decode_sdma_errs(dd, err, buf, blen);
1001         if (err & INFINIPATH_E_INVALIDEEPCMD)
1002                 strlcat(buf, "invalideepromcmd ", blen);
1003 done:
1004         return iserr;
1005 }
1006
1007 /**
1008  * get_rhf_errstring - decode RHF errors
1009  * @err: the err number
1010  * @msg: the output buffer
1011  * @len: the length of the output buffer
1012  *
1013  * only used one place now, may want more later
1014  */
1015 static void get_rhf_errstring(u32 err, char *msg, size_t len)
1016 {
1017         /* if no errors, and so don't need to check what's first */
1018         *msg = '\0';
1019
1020         if (err & INFINIPATH_RHF_H_ICRCERR)
1021                 strlcat(msg, "icrcerr ", len);
1022         if (err & INFINIPATH_RHF_H_VCRCERR)
1023                 strlcat(msg, "vcrcerr ", len);
1024         if (err & INFINIPATH_RHF_H_PARITYERR)
1025                 strlcat(msg, "parityerr ", len);
1026         if (err & INFINIPATH_RHF_H_LENERR)
1027                 strlcat(msg, "lenerr ", len);
1028         if (err & INFINIPATH_RHF_H_MTUERR)
1029                 strlcat(msg, "mtuerr ", len);
1030         if (err & INFINIPATH_RHF_H_IHDRERR)
1031                 /* infinipath hdr checksum error */
1032                 strlcat(msg, "ipathhdrerr ", len);
1033         if (err & INFINIPATH_RHF_H_TIDERR)
1034                 strlcat(msg, "tiderr ", len);
1035         if (err & INFINIPATH_RHF_H_MKERR)
1036                 /* bad port, offset, etc. */
1037                 strlcat(msg, "invalid ipathhdr ", len);
1038         if (err & INFINIPATH_RHF_H_IBERR)
1039                 strlcat(msg, "iberr ", len);
1040         if (err & INFINIPATH_RHF_L_SWA)
1041                 strlcat(msg, "swA ", len);
1042         if (err & INFINIPATH_RHF_L_SWB)
1043                 strlcat(msg, "swB ", len);
1044 }
1045
1046 /**
1047  * ipath_get_egrbuf - get an eager buffer
1048  * @dd: the infinipath device
1049  * @bufnum: the eager buffer to get
1050  *
1051  * must only be called if ipath_pd[port] is known to be allocated
1052  */
1053 static inline void *ipath_get_egrbuf(struct ipath_devdata *dd, u32 bufnum)
1054 {
1055         return dd->ipath_port0_skbinfo ?
1056                 (void *) dd->ipath_port0_skbinfo[bufnum].skb->data : NULL;
1057 }
1058
1059 /**
1060  * ipath_alloc_skb - allocate an skb and buffer with possible constraints
1061  * @dd: the infinipath device
1062  * @gfp_mask: the sk_buff SFP mask
1063  */
1064 struct sk_buff *ipath_alloc_skb(struct ipath_devdata *dd,
1065                                 gfp_t gfp_mask)
1066 {
1067         struct sk_buff *skb;
1068         u32 len;
1069
1070         /*
1071          * Only fully supported way to handle this is to allocate lots
1072          * extra, align as needed, and then do skb_reserve().  That wastes
1073          * a lot of memory...  I'll have to hack this into infinipath_copy
1074          * also.
1075          */
1076
1077         /*
1078          * We need 2 extra bytes for ipath_ether data sent in the
1079          * key header.  In order to keep everything dword aligned,
1080          * we'll reserve 4 bytes.
1081          */
1082         len = dd->ipath_ibmaxlen + 4;
1083
1084         if (dd->ipath_flags & IPATH_4BYTE_TID) {
1085                 /* We need a 2KB multiple alignment, and there is no way
1086                  * to do it except to allocate extra and then skb_reserve
1087                  * enough to bring it up to the right alignment.
1088                  */
1089                 len += 2047;
1090         }
1091
1092         skb = __dev_alloc_skb(len, gfp_mask);
1093         if (!skb) {
1094                 ipath_dev_err(dd, "Failed to allocate skbuff, length %u\n",
1095                               len);
1096                 goto bail;
1097         }
1098
1099         skb_reserve(skb, 4);
1100
1101         if (dd->ipath_flags & IPATH_4BYTE_TID) {
1102                 u32 una = (unsigned long)skb->data & 2047;
1103                 if (una)
1104                         skb_reserve(skb, 2048 - una);
1105         }
1106
1107 bail:
1108         return skb;
1109 }
1110
1111 static void ipath_rcv_hdrerr(struct ipath_devdata *dd,
1112                              u32 eflags,
1113                              u32 l,
1114                              u32 etail,
1115                              __le32 *rhf_addr,
1116                              struct ipath_message_header *hdr)
1117 {
1118         char emsg[128];
1119
1120         get_rhf_errstring(eflags, emsg, sizeof emsg);
1121         ipath_cdbg(PKT, "RHFerrs %x hdrqtail=%x typ=%u "
1122                    "tlen=%x opcode=%x egridx=%x: %s\n",
1123                    eflags, l,
1124                    ipath_hdrget_rcv_type(rhf_addr),
1125                    ipath_hdrget_length_in_bytes(rhf_addr),
1126                    be32_to_cpu(hdr->bth[0]) >> 24,
1127                    etail, emsg);
1128
1129         /* Count local link integrity errors. */
1130         if (eflags & (INFINIPATH_RHF_H_ICRCERR | INFINIPATH_RHF_H_VCRCERR)) {
1131                 u8 n = (dd->ipath_ibcctrl >>
1132                         INFINIPATH_IBCC_PHYERRTHRESHOLD_SHIFT) &
1133                         INFINIPATH_IBCC_PHYERRTHRESHOLD_MASK;
1134
1135                 if (++dd->ipath_lli_counter > n) {
1136                         dd->ipath_lli_counter = 0;
1137                         dd->ipath_lli_errors++;
1138                 }
1139         }
1140 }
1141
1142 /*
1143  * ipath_kreceive - receive a packet
1144  * @pd: the infinipath port
1145  *
1146  * called from interrupt handler for errors or receive interrupt
1147  */
1148 void ipath_kreceive(struct ipath_portdata *pd)
1149 {
1150         struct ipath_devdata *dd = pd->port_dd;
1151         __le32 *rhf_addr;
1152         void *ebuf;
1153         const u32 rsize = dd->ipath_rcvhdrentsize;      /* words */
1154         const u32 maxcnt = dd->ipath_rcvhdrcnt * rsize; /* words */
1155         u32 etail = -1, l, hdrqtail;
1156         struct ipath_message_header *hdr;
1157         u32 eflags, i, etype, tlen, pkttot = 0, updegr = 0, reloop = 0;
1158         static u64 totcalls;    /* stats, may eventually remove */
1159         int last;
1160
1161         l = pd->port_head;
1162         rhf_addr = (__le32 *) pd->port_rcvhdrq + l + dd->ipath_rhf_offset;
1163         if (dd->ipath_flags & IPATH_NODMA_RTAIL) {
1164                 u32 seq = ipath_hdrget_seq(rhf_addr);
1165
1166                 if (seq != pd->port_seq_cnt)
1167                         goto bail;
1168                 hdrqtail = 0;
1169         } else {
1170                 hdrqtail = ipath_get_rcvhdrtail(pd);
1171                 if (l == hdrqtail)
1172                         goto bail;
1173                 smp_rmb();
1174         }
1175
1176 reloop:
1177         for (last = 0, i = 1; !last; i += !last) {
1178                 hdr = dd->ipath_f_get_msgheader(dd, rhf_addr);
1179                 eflags = ipath_hdrget_err_flags(rhf_addr);
1180                 etype = ipath_hdrget_rcv_type(rhf_addr);
1181                 /* total length */
1182                 tlen = ipath_hdrget_length_in_bytes(rhf_addr);
1183                 ebuf = NULL;
1184                 if ((dd->ipath_flags & IPATH_NODMA_RTAIL) ?
1185                     ipath_hdrget_use_egr_buf(rhf_addr) :
1186                     (etype != RCVHQ_RCV_TYPE_EXPECTED)) {
1187                         /*
1188                          * It turns out that the chip uses an eager buffer
1189                          * for all non-expected packets, whether it "needs"
1190                          * one or not.  So always get the index, but don't
1191                          * set ebuf (so we try to copy data) unless the
1192                          * length requires it.
1193                          */
1194                         etail = ipath_hdrget_index(rhf_addr);
1195                         updegr = 1;
1196                         if (tlen > sizeof(*hdr) ||
1197                             etype == RCVHQ_RCV_TYPE_NON_KD)
1198                                 ebuf = ipath_get_egrbuf(dd, etail);
1199                 }
1200
1201                 /*
1202                  * both tiderr and ipathhdrerr are set for all plain IB
1203                  * packets; only ipathhdrerr should be set.
1204                  */
1205
1206                 if (etype != RCVHQ_RCV_TYPE_NON_KD &&
1207                     etype != RCVHQ_RCV_TYPE_ERROR &&
1208                     ipath_hdrget_ipath_ver(hdr->iph.ver_port_tid_offset) !=
1209                     IPS_PROTO_VERSION)
1210                         ipath_cdbg(PKT, "Bad InfiniPath protocol version "
1211                                    "%x\n", etype);
1212
1213                 if (unlikely(eflags))
1214                         ipath_rcv_hdrerr(dd, eflags, l, etail, rhf_addr, hdr);
1215                 else if (etype == RCVHQ_RCV_TYPE_NON_KD) {
1216                         ipath_ib_rcv(dd->verbs_dev, (u32 *)hdr, ebuf, tlen);
1217                         if (dd->ipath_lli_counter)
1218                                 dd->ipath_lli_counter--;
1219                 } else if (etype == RCVHQ_RCV_TYPE_EAGER) {
1220                         u8 opcode = be32_to_cpu(hdr->bth[0]) >> 24;
1221                         u32 qp = be32_to_cpu(hdr->bth[1]) & 0xffffff;
1222                         ipath_cdbg(PKT, "typ %x, opcode %x (eager, "
1223                                    "qp=%x), len %x; ignored\n",
1224                                    etype, opcode, qp, tlen);
1225                 }
1226                 else if (etype == RCVHQ_RCV_TYPE_EXPECTED)
1227                         ipath_dbg("Bug: Expected TID, opcode %x; ignored\n",
1228                                   be32_to_cpu(hdr->bth[0]) >> 24);
1229                 else {
1230                         /*
1231                          * error packet, type of error unknown.
1232                          * Probably type 3, but we don't know, so don't
1233                          * even try to print the opcode, etc.
1234                          * Usually caused by a "bad packet", that has no
1235                          * BTH, when the LRH says it should.
1236                          */
1237                         ipath_cdbg(ERRPKT, "Error Pkt, but no eflags! egrbuf"
1238                                   " %x, len %x hdrq+%x rhf: %Lx\n",
1239                                   etail, tlen, l, (unsigned long long)
1240                                   le64_to_cpu(*(__le64 *) rhf_addr));
1241                         if (ipath_debug & __IPATH_ERRPKTDBG) {
1242                                 u32 j, *d, dw = rsize-2;
1243                                 if (rsize > (tlen>>2))
1244                                         dw = tlen>>2;
1245                                 d = (u32 *)hdr;
1246                                 printk(KERN_DEBUG "EPkt rcvhdr(%x dw):\n",
1247                                         dw);
1248                                 for (j = 0; j < dw; j++)
1249                                         printk(KERN_DEBUG "%8x%s", d[j],
1250                                                 (j%8) == 7 ? "\n" : " ");
1251                                 printk(KERN_DEBUG ".\n");
1252                         }
1253                 }
1254                 l += rsize;
1255                 if (l >= maxcnt)
1256                         l = 0;
1257                 rhf_addr = (__le32 *) pd->port_rcvhdrq +
1258                         l + dd->ipath_rhf_offset;
1259                 if (dd->ipath_flags & IPATH_NODMA_RTAIL) {
1260                         u32 seq = ipath_hdrget_seq(rhf_addr);
1261
1262                         if (++pd->port_seq_cnt > 13)
1263                                 pd->port_seq_cnt = 1;
1264                         if (seq != pd->port_seq_cnt)
1265                                 last = 1;
1266                 } else if (l == hdrqtail)
1267                         last = 1;
1268                 /*
1269                  * update head regs on last packet, and every 16 packets.
1270                  * Reduce bus traffic, while still trying to prevent
1271                  * rcvhdrq overflows, for when the queue is nearly full
1272                  */
1273                 if (last || !(i & 0xf)) {
1274                         u64 lval = l;
1275
1276                         /* request IBA6120 and 7220 interrupt only on last */
1277                         if (last)
1278                                 lval |= dd->ipath_rhdrhead_intr_off;
1279                         ipath_write_ureg(dd, ur_rcvhdrhead, lval,
1280                                 pd->port_port);
1281                         if (updegr) {
1282                                 ipath_write_ureg(dd, ur_rcvegrindexhead,
1283                                                  etail, pd->port_port);
1284                                 updegr = 0;
1285                         }
1286                 }
1287         }
1288
1289         if (!dd->ipath_rhdrhead_intr_off && !reloop &&
1290             !(dd->ipath_flags & IPATH_NODMA_RTAIL)) {
1291                 /* IBA6110 workaround; we can have a race clearing chip
1292                  * interrupt with another interrupt about to be delivered,
1293                  * and can clear it before it is delivered on the GPIO
1294                  * workaround.  By doing the extra check here for the
1295                  * in-memory tail register updating while we were doing
1296                  * earlier packets, we "almost" guarantee we have covered
1297                  * that case.
1298                  */
1299                 u32 hqtail = ipath_get_rcvhdrtail(pd);
1300                 if (hqtail != hdrqtail) {
1301                         hdrqtail = hqtail;
1302                         reloop = 1; /* loop 1 extra time at most */
1303                         goto reloop;
1304                 }
1305         }
1306
1307         pkttot += i;
1308
1309         pd->port_head = l;
1310
1311         if (pkttot > ipath_stats.sps_maxpkts_call)
1312                 ipath_stats.sps_maxpkts_call = pkttot;
1313         ipath_stats.sps_port0pkts += pkttot;
1314         ipath_stats.sps_avgpkts_call =
1315                 ipath_stats.sps_port0pkts / ++totcalls;
1316
1317 bail:;
1318 }
1319
1320 /**
1321  * ipath_update_pio_bufs - update shadow copy of the PIO availability map
1322  * @dd: the infinipath device
1323  *
1324  * called whenever our local copy indicates we have run out of send buffers
1325  * NOTE: This can be called from interrupt context by some code
1326  * and from non-interrupt context by ipath_getpiobuf().
1327  */
1328
1329 static void ipath_update_pio_bufs(struct ipath_devdata *dd)
1330 {
1331         unsigned long flags;
1332         int i;
1333         const unsigned piobregs = (unsigned)dd->ipath_pioavregs;
1334
1335         /* If the generation (check) bits have changed, then we update the
1336          * busy bit for the corresponding PIO buffer.  This algorithm will
1337          * modify positions to the value they already have in some cases
1338          * (i.e., no change), but it's faster than changing only the bits
1339          * that have changed.
1340          *
1341          * We would like to do this atomicly, to avoid spinlocks in the
1342          * critical send path, but that's not really possible, given the
1343          * type of changes, and that this routine could be called on
1344          * multiple cpu's simultaneously, so we lock in this routine only,
1345          * to avoid conflicting updates; all we change is the shadow, and
1346          * it's a single 64 bit memory location, so by definition the update
1347          * is atomic in terms of what other cpu's can see in testing the
1348          * bits.  The spin_lock overhead isn't too bad, since it only
1349          * happens when all buffers are in use, so only cpu overhead, not
1350          * latency or bandwidth is affected.
1351          */
1352         if (!dd->ipath_pioavailregs_dma) {
1353                 ipath_dbg("Update shadow pioavail, but regs_dma NULL!\n");
1354                 return;
1355         }
1356         if (ipath_debug & __IPATH_VERBDBG) {
1357                 /* only if packet debug and verbose */
1358                 volatile __le64 *dma = dd->ipath_pioavailregs_dma;
1359                 unsigned long *shadow = dd->ipath_pioavailshadow;
1360
1361                 ipath_cdbg(PKT, "Refill avail, dma0=%llx shad0=%lx, "
1362                            "d1=%llx s1=%lx, d2=%llx s2=%lx, d3=%llx "
1363                            "s3=%lx\n",
1364                            (unsigned long long) le64_to_cpu(dma[0]),
1365                            shadow[0],
1366                            (unsigned long long) le64_to_cpu(dma[1]),
1367                            shadow[1],
1368                            (unsigned long long) le64_to_cpu(dma[2]),
1369                            shadow[2],
1370                            (unsigned long long) le64_to_cpu(dma[3]),
1371                            shadow[3]);
1372                 if (piobregs > 4)
1373                         ipath_cdbg(
1374                                 PKT, "2nd group, dma4=%llx shad4=%lx, "
1375                                 "d5=%llx s5=%lx, d6=%llx s6=%lx, "
1376                                 "d7=%llx s7=%lx\n",
1377                                 (unsigned long long) le64_to_cpu(dma[4]),
1378                                 shadow[4],
1379                                 (unsigned long long) le64_to_cpu(dma[5]),
1380                                 shadow[5],
1381                                 (unsigned long long) le64_to_cpu(dma[6]),
1382                                 shadow[6],
1383                                 (unsigned long long) le64_to_cpu(dma[7]),
1384                                 shadow[7]);
1385         }
1386         spin_lock_irqsave(&ipath_pioavail_lock, flags);
1387         for (i = 0; i < piobregs; i++) {
1388                 u64 pchbusy, pchg, piov, pnew;
1389                 /*
1390                  * Chip Errata: bug 6641; even and odd qwords>3 are swapped
1391                  */
1392                 if (i > 3 && (dd->ipath_flags & IPATH_SWAP_PIOBUFS))
1393                         piov = le64_to_cpu(dd->ipath_pioavailregs_dma[i ^ 1]);
1394                 else
1395                         piov = le64_to_cpu(dd->ipath_pioavailregs_dma[i]);
1396                 pchg = dd->ipath_pioavailkernel[i] &
1397                         ~(dd->ipath_pioavailshadow[i] ^ piov);
1398                 pchbusy = pchg << INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT;
1399                 if (pchg && (pchbusy & dd->ipath_pioavailshadow[i])) {
1400                         pnew = dd->ipath_pioavailshadow[i] & ~pchbusy;
1401                         pnew |= piov & pchbusy;
1402                         dd->ipath_pioavailshadow[i] = pnew;
1403                 }
1404         }
1405         spin_unlock_irqrestore(&ipath_pioavail_lock, flags);
1406 }
1407
1408 /*
1409  * used to force update of pioavailshadow if we can't get a pio buffer.
1410  * Needed primarily due to exitting freeze mode after recovering
1411  * from errors.  Done lazily, because it's safer (known to not
1412  * be writing pio buffers).
1413  */
1414 static void ipath_reset_availshadow(struct ipath_devdata *dd)
1415 {
1416         int i, im;
1417         unsigned long flags;
1418
1419         spin_lock_irqsave(&ipath_pioavail_lock, flags);
1420         for (i = 0; i < dd->ipath_pioavregs; i++) {
1421                 u64 val, oldval;
1422                 /* deal with 6110 chip bug on high register #s */
1423                 im = (i > 3 && (dd->ipath_flags & IPATH_SWAP_PIOBUFS)) ?
1424                         i ^ 1 : i;
1425                 val = le64_to_cpu(dd->ipath_pioavailregs_dma[im]);
1426                 /*
1427                  * busy out the buffers not in the kernel avail list,
1428                  * without changing the generation bits.
1429                  */
1430                 oldval = dd->ipath_pioavailshadow[i];
1431                 dd->ipath_pioavailshadow[i] = val |
1432                         ((~dd->ipath_pioavailkernel[i] <<
1433                         INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT) &
1434                         0xaaaaaaaaaaaaaaaaULL); /* All BUSY bits in qword */
1435                 if (oldval != dd->ipath_pioavailshadow[i])
1436                         ipath_dbg("shadow[%d] was %Lx, now %lx\n",
1437                                 i, (unsigned long long) oldval,
1438                                 dd->ipath_pioavailshadow[i]);
1439         }
1440         spin_unlock_irqrestore(&ipath_pioavail_lock, flags);
1441 }
1442
1443 /**
1444  * ipath_setrcvhdrsize - set the receive header size
1445  * @dd: the infinipath device
1446  * @rhdrsize: the receive header size
1447  *
1448  * called from user init code, and also layered driver init
1449  */
1450 int ipath_setrcvhdrsize(struct ipath_devdata *dd, unsigned rhdrsize)
1451 {
1452         int ret = 0;
1453
1454         if (dd->ipath_flags & IPATH_RCVHDRSZ_SET) {
1455                 if (dd->ipath_rcvhdrsize != rhdrsize) {
1456                         dev_info(&dd->pcidev->dev,
1457                                  "Error: can't set protocol header "
1458                                  "size %u, already %u\n",
1459                                  rhdrsize, dd->ipath_rcvhdrsize);
1460                         ret = -EAGAIN;
1461                 } else
1462                         ipath_cdbg(VERBOSE, "Reuse same protocol header "
1463                                    "size %u\n", dd->ipath_rcvhdrsize);
1464         } else if (rhdrsize > (dd->ipath_rcvhdrentsize -
1465                                (sizeof(u64) / sizeof(u32)))) {
1466                 ipath_dbg("Error: can't set protocol header size %u "
1467                           "(> max %u)\n", rhdrsize,
1468                           dd->ipath_rcvhdrentsize -
1469                           (u32) (sizeof(u64) / sizeof(u32)));
1470                 ret = -EOVERFLOW;
1471         } else {
1472                 dd->ipath_flags |= IPATH_RCVHDRSZ_SET;
1473                 dd->ipath_rcvhdrsize = rhdrsize;
1474                 ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvhdrsize,
1475                                  dd->ipath_rcvhdrsize);
1476                 ipath_cdbg(VERBOSE, "Set protocol header size to %u\n",
1477                            dd->ipath_rcvhdrsize);
1478         }
1479         return ret;
1480 }
1481
1482 /*
1483  * debugging code and stats updates if no pio buffers available.
1484  */
1485 static noinline void no_pio_bufs(struct ipath_devdata *dd)
1486 {
1487         unsigned long *shadow = dd->ipath_pioavailshadow;
1488         __le64 *dma = (__le64 *)dd->ipath_pioavailregs_dma;
1489
1490         dd->ipath_upd_pio_shadow = 1;
1491
1492         /*
1493          * not atomic, but if we lose a stat count in a while, that's OK
1494          */
1495         ipath_stats.sps_nopiobufs++;
1496         if (!(++dd->ipath_consec_nopiobuf % 100000)) {
1497                 ipath_force_pio_avail_update(dd); /* at start */
1498                 ipath_dbg("%u tries no piobufavail ts%lx; dmacopy: "
1499                         "%llx %llx %llx %llx\n"
1500                         "ipath  shadow:  %lx %lx %lx %lx\n",
1501                         dd->ipath_consec_nopiobuf,
1502                         (unsigned long)get_cycles(),
1503                         (unsigned long long) le64_to_cpu(dma[0]),
1504                         (unsigned long long) le64_to_cpu(dma[1]),
1505                         (unsigned long long) le64_to_cpu(dma[2]),
1506                         (unsigned long long) le64_to_cpu(dma[3]),
1507                         shadow[0], shadow[1], shadow[2], shadow[3]);
1508                 /*
1509                  * 4 buffers per byte, 4 registers above, cover rest
1510                  * below
1511                  */
1512                 if ((dd->ipath_piobcnt2k + dd->ipath_piobcnt4k) >
1513                     (sizeof(shadow[0]) * 4 * 4))
1514                         ipath_dbg("2nd group: dmacopy: "
1515                                   "%llx %llx %llx %llx\n"
1516                                   "ipath  shadow:  %lx %lx %lx %lx\n",
1517                                   (unsigned long long)le64_to_cpu(dma[4]),
1518                                   (unsigned long long)le64_to_cpu(dma[5]),
1519                                   (unsigned long long)le64_to_cpu(dma[6]),
1520                                   (unsigned long long)le64_to_cpu(dma[7]),
1521                                   shadow[4], shadow[5], shadow[6], shadow[7]);
1522
1523                 /* at end, so update likely happened */
1524                 ipath_reset_availshadow(dd);
1525         }
1526 }
1527
1528 /*
1529  * common code for normal driver pio buffer allocation, and reserved
1530  * allocation.
1531  *
1532  * do appropriate marking as busy, etc.
1533  * returns buffer number if one found (>=0), negative number is error.
1534  */
1535 static u32 __iomem *ipath_getpiobuf_range(struct ipath_devdata *dd,
1536         u32 *pbufnum, u32 first, u32 last, u32 firsti)
1537 {
1538         int i, j, updated = 0;
1539         unsigned piobcnt;
1540         unsigned long flags;
1541         unsigned long *shadow = dd->ipath_pioavailshadow;
1542         u32 __iomem *buf;
1543
1544         piobcnt = last - first;
1545         if (dd->ipath_upd_pio_shadow) {
1546                 /*
1547                  * Minor optimization.  If we had no buffers on last call,
1548                  * start out by doing the update; continue and do scan even
1549                  * if no buffers were updated, to be paranoid
1550                  */
1551                 ipath_update_pio_bufs(dd);
1552                 updated++;
1553                 i = first;
1554         } else
1555                 i = firsti;
1556 rescan:
1557         /*
1558          * while test_and_set_bit() is atomic, we do that and then the
1559          * change_bit(), and the pair is not.  See if this is the cause
1560          * of the remaining armlaunch errors.
1561          */
1562         spin_lock_irqsave(&ipath_pioavail_lock, flags);
1563         for (j = 0; j < piobcnt; j++, i++) {
1564                 if (i >= last)
1565                         i = first;
1566                 if (__test_and_set_bit((2 * i) + 1, shadow))
1567                         continue;
1568                 /* flip generation bit */
1569                 __change_bit(2 * i, shadow);
1570                 break;
1571         }
1572         spin_unlock_irqrestore(&ipath_pioavail_lock, flags);
1573
1574         if (j == piobcnt) {
1575                 if (!updated) {
1576                         /*
1577                          * first time through; shadow exhausted, but may be
1578                          * buffers available, try an update and then rescan.
1579                          */
1580                         ipath_update_pio_bufs(dd);
1581                         updated++;
1582                         i = first;
1583                         goto rescan;
1584                 } else if (updated == 1 && piobcnt <=
1585                         ((dd->ipath_sendctrl
1586                         >> INFINIPATH_S_UPDTHRESH_SHIFT) &
1587                         INFINIPATH_S_UPDTHRESH_MASK)) {
1588                         /*
1589                          * for chips supporting and using the update
1590                          * threshold we need to force an update of the
1591                          * in-memory copy if the count is less than the
1592                          * thershold, then check one more time.
1593                          */
1594                         ipath_force_pio_avail_update(dd);
1595                         ipath_update_pio_bufs(dd);
1596                         updated++;
1597                         i = first;
1598                         goto rescan;
1599                 }
1600
1601                 no_pio_bufs(dd);
1602                 buf = NULL;
1603         } else {
1604                 if (i < dd->ipath_piobcnt2k)
1605                         buf = (u32 __iomem *) (dd->ipath_pio2kbase +
1606                                                i * dd->ipath_palign);
1607                 else
1608                         buf = (u32 __iomem *)
1609                                 (dd->ipath_pio4kbase +
1610                                  (i - dd->ipath_piobcnt2k) * dd->ipath_4kalign);
1611                 if (pbufnum)
1612                         *pbufnum = i;
1613         }
1614
1615         return buf;
1616 }
1617
1618 /**
1619  * ipath_getpiobuf - find an available pio buffer
1620  * @dd: the infinipath device
1621  * @plen: the size of the PIO buffer needed in 32-bit words
1622  * @pbufnum: the buffer number is placed here
1623  */
1624 u32 __iomem *ipath_getpiobuf(struct ipath_devdata *dd, u32 plen, u32 *pbufnum)
1625 {
1626         u32 __iomem *buf;
1627         u32 pnum, nbufs;
1628         u32 first, lasti;
1629
1630         if (plen + 1 >= IPATH_SMALLBUF_DWORDS) {
1631                 first = dd->ipath_piobcnt2k;
1632                 lasti = dd->ipath_lastpioindexl;
1633         } else {
1634                 first = 0;
1635                 lasti = dd->ipath_lastpioindex;
1636         }
1637         nbufs = dd->ipath_piobcnt2k + dd->ipath_piobcnt4k;
1638         buf = ipath_getpiobuf_range(dd, &pnum, first, nbufs, lasti);
1639
1640         if (buf) {
1641                 /*
1642                  * Set next starting place.  It's just an optimization,
1643                  * it doesn't matter who wins on this, so no locking
1644                  */
1645                 if (plen + 1 >= IPATH_SMALLBUF_DWORDS)
1646                         dd->ipath_lastpioindexl = pnum + 1;
1647                 else
1648                         dd->ipath_lastpioindex = pnum + 1;
1649                 if (dd->ipath_upd_pio_shadow)
1650                         dd->ipath_upd_pio_shadow = 0;
1651                 if (dd->ipath_consec_nopiobuf)
1652                         dd->ipath_consec_nopiobuf = 0;
1653                 ipath_cdbg(VERBOSE, "Return piobuf%u %uk @ %p\n",
1654                            pnum, (pnum < dd->ipath_piobcnt2k) ? 2 : 4, buf);
1655                 if (pbufnum)
1656                         *pbufnum = pnum;
1657
1658         }
1659         return buf;
1660 }
1661
1662 /**
1663  * ipath_chg_pioavailkernel - change which send buffers are available for kernel
1664  * @dd: the infinipath device
1665  * @start: the starting send buffer number
1666  * @len: the number of send buffers
1667  * @avail: true if the buffers are available for kernel use, false otherwise
1668  */
1669 void ipath_chg_pioavailkernel(struct ipath_devdata *dd, unsigned start,
1670                               unsigned len, int avail)
1671 {
1672         unsigned long flags;
1673         unsigned end, cnt = 0;
1674
1675         /* There are two bits per send buffer (busy and generation) */
1676         start *= 2;
1677         end = start + len * 2;
1678
1679         spin_lock_irqsave(&ipath_pioavail_lock, flags);
1680         /* Set or clear the busy bit in the shadow. */
1681         while (start < end) {
1682                 if (avail) {
1683                         unsigned long dma;
1684                         int i, im;
1685                         /*
1686                          * the BUSY bit will never be set, because we disarm
1687                          * the user buffers before we hand them back to the
1688                          * kernel.  We do have to make sure the generation
1689                          * bit is set correctly in shadow, since it could
1690                          * have changed many times while allocated to user.
1691                          * We can't use the bitmap functions on the full
1692                          * dma array because it is always little-endian, so
1693                          * we have to flip to host-order first.
1694                          * BITS_PER_LONG is slightly wrong, since it's
1695                          * always 64 bits per register in chip...
1696                          * We only work on 64 bit kernels, so that's OK.
1697                          */
1698                         /* deal with 6110 chip bug on high register #s */
1699                         i = start / BITS_PER_LONG;
1700                         im = (i > 3 && (dd->ipath_flags & IPATH_SWAP_PIOBUFS)) ?
1701                                 i ^ 1 : i;
1702                         __clear_bit(INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT
1703                                 + start, dd->ipath_pioavailshadow);
1704                         dma = (unsigned long) le64_to_cpu(
1705                                 dd->ipath_pioavailregs_dma[im]);
1706                         if (test_bit((INFINIPATH_SENDPIOAVAIL_CHECK_SHIFT
1707                                 + start) % BITS_PER_LONG, &dma))
1708                                 __set_bit(INFINIPATH_SENDPIOAVAIL_CHECK_SHIFT
1709                                         + start, dd->ipath_pioavailshadow);
1710                         else
1711                                 __clear_bit(INFINIPATH_SENDPIOAVAIL_CHECK_SHIFT
1712                                         + start, dd->ipath_pioavailshadow);
1713                         __set_bit(start, dd->ipath_pioavailkernel);
1714                 } else {
1715                         __set_bit(start + INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT,
1716                                 dd->ipath_pioavailshadow);
1717                         __clear_bit(start, dd->ipath_pioavailkernel);
1718                 }
1719                 start += 2;
1720         }
1721
1722         if (dd->ipath_pioupd_thresh) {
1723                 end = 2 * (dd->ipath_piobcnt2k + dd->ipath_piobcnt4k);
1724                 cnt = bitmap_weight(dd->ipath_pioavailkernel, end);
1725         }
1726         spin_unlock_irqrestore(&ipath_pioavail_lock, flags);
1727
1728         /*
1729          * When moving buffers from kernel to user, if number assigned to
1730          * the user is less than the pio update threshold, and threshold
1731          * is supported (cnt was computed > 0), drop the update threshold
1732          * so we update at least once per allocated number of buffers.
1733          * In any case, if the kernel buffers are less than the threshold,
1734          * drop the threshold.  We don't bother increasing it, having once
1735          * decreased it, since it would typically just cycle back and forth.
1736          * If we don't decrease below buffers in use, we can wait a long
1737          * time for an update, until some other context uses PIO buffers.
1738          */
1739         if (!avail && len < cnt)
1740                 cnt = len;
1741         if (cnt < dd->ipath_pioupd_thresh) {
1742                 dd->ipath_pioupd_thresh = cnt;
1743                 ipath_dbg("Decreased pio update threshold to %u\n",
1744                         dd->ipath_pioupd_thresh);
1745                 spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
1746                 dd->ipath_sendctrl &= ~(INFINIPATH_S_UPDTHRESH_MASK
1747                         << INFINIPATH_S_UPDTHRESH_SHIFT);
1748                 dd->ipath_sendctrl |= dd->ipath_pioupd_thresh
1749                         << INFINIPATH_S_UPDTHRESH_SHIFT;
1750                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1751                         dd->ipath_sendctrl);
1752                 spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
1753         }
1754 }
1755
1756 /**
1757  * ipath_create_rcvhdrq - create a receive header queue
1758  * @dd: the infinipath device
1759  * @pd: the port data
1760  *
1761  * this must be contiguous memory (from an i/o perspective), and must be
1762  * DMA'able (which means for some systems, it will go through an IOMMU,
1763  * or be forced into a low address range).
1764  */
1765 int ipath_create_rcvhdrq(struct ipath_devdata *dd,
1766                          struct ipath_portdata *pd)
1767 {
1768         int ret = 0;
1769
1770         if (!pd->port_rcvhdrq) {
1771                 dma_addr_t phys_hdrqtail;
1772                 gfp_t gfp_flags = GFP_USER | __GFP_COMP;
1773                 int amt = ALIGN(dd->ipath_rcvhdrcnt * dd->ipath_rcvhdrentsize *
1774                                 sizeof(u32), PAGE_SIZE);
1775
1776                 pd->port_rcvhdrq = dma_alloc_coherent(
1777                         &dd->pcidev->dev, amt, &pd->port_rcvhdrq_phys,
1778                         gfp_flags);
1779
1780                 if (!pd->port_rcvhdrq) {
1781                         ipath_dev_err(dd, "attempt to allocate %d bytes "
1782                                       "for port %u rcvhdrq failed\n",
1783                                       amt, pd->port_port);
1784                         ret = -ENOMEM;
1785                         goto bail;
1786                 }
1787
1788                 if (!(dd->ipath_flags & IPATH_NODMA_RTAIL)) {
1789                         pd->port_rcvhdrtail_kvaddr = dma_alloc_coherent(
1790                                 &dd->pcidev->dev, PAGE_SIZE, &phys_hdrqtail,
1791                                 GFP_KERNEL);
1792                         if (!pd->port_rcvhdrtail_kvaddr) {
1793                                 ipath_dev_err(dd, "attempt to allocate 1 page "
1794                                         "for port %u rcvhdrqtailaddr "
1795                                         "failed\n", pd->port_port);
1796                                 ret = -ENOMEM;
1797                                 dma_free_coherent(&dd->pcidev->dev, amt,
1798                                         pd->port_rcvhdrq,
1799                                         pd->port_rcvhdrq_phys);
1800                                 pd->port_rcvhdrq = NULL;
1801                                 goto bail;
1802                         }
1803                         pd->port_rcvhdrqtailaddr_phys = phys_hdrqtail;
1804                         ipath_cdbg(VERBOSE, "port %d hdrtailaddr, %llx "
1805                                    "physical\n", pd->port_port,
1806                                    (unsigned long long) phys_hdrqtail);
1807                 }
1808
1809                 pd->port_rcvhdrq_size = amt;
1810
1811                 ipath_cdbg(VERBOSE, "%d pages at %p (phys %lx) size=%lu "
1812                            "for port %u rcvhdr Q\n",
1813                            amt >> PAGE_SHIFT, pd->port_rcvhdrq,
1814                            (unsigned long) pd->port_rcvhdrq_phys,
1815                            (unsigned long) pd->port_rcvhdrq_size,
1816                            pd->port_port);
1817         }
1818         else
1819                 ipath_cdbg(VERBOSE, "reuse port %d rcvhdrq @%p %llx phys; "
1820                            "hdrtailaddr@%p %llx physical\n",
1821                            pd->port_port, pd->port_rcvhdrq,
1822                            (unsigned long long) pd->port_rcvhdrq_phys,
1823                            pd->port_rcvhdrtail_kvaddr, (unsigned long long)
1824                            pd->port_rcvhdrqtailaddr_phys);
1825
1826         /* clear for security and sanity on each use */
1827         memset(pd->port_rcvhdrq, 0, pd->port_rcvhdrq_size);
1828         if (pd->port_rcvhdrtail_kvaddr)
1829                 memset(pd->port_rcvhdrtail_kvaddr, 0, PAGE_SIZE);
1830
1831         /*
1832          * tell chip each time we init it, even if we are re-using previous
1833          * memory (we zero the register at process close)
1834          */
1835         ipath_write_kreg_port(dd, dd->ipath_kregs->kr_rcvhdrtailaddr,
1836                               pd->port_port, pd->port_rcvhdrqtailaddr_phys);
1837         ipath_write_kreg_port(dd, dd->ipath_kregs->kr_rcvhdraddr,
1838                               pd->port_port, pd->port_rcvhdrq_phys);
1839
1840 bail:
1841         return ret;
1842 }
1843
1844
1845 /*
1846  * Flush all sends that might be in the ready to send state, as well as any
1847  * that are in the process of being sent.   Used whenever we need to be
1848  * sure the send side is idle.  Cleans up all buffer state by canceling
1849  * all pio buffers, and issuing an abort, which cleans up anything in the
1850  * launch fifo.  The cancel is superfluous on some chip versions, but
1851  * it's safer to always do it.
1852  * PIOAvail bits are updated by the chip as if normal send had happened.
1853  */
1854 void ipath_cancel_sends(struct ipath_devdata *dd, int restore_sendctrl)
1855 {
1856         unsigned long flags;
1857
1858         if (dd->ipath_flags & IPATH_IB_AUTONEG_INPROG) {
1859                 ipath_cdbg(VERBOSE, "Ignore while in autonegotiation\n");
1860                 goto bail;
1861         }
1862         /*
1863          * If we have SDMA, and it's not disabled, we have to kick off the
1864          * abort state machine, provided we aren't already aborting.
1865          * If we are in the process of aborting SDMA (!DISABLED, but ABORTING),
1866          * we skip the rest of this routine. It is already "in progress"
1867          */
1868         if (dd->ipath_flags & IPATH_HAS_SEND_DMA) {
1869                 int skip_cancel;
1870                 unsigned long *statp = &dd->ipath_sdma_status;
1871
1872                 spin_lock_irqsave(&dd->ipath_sdma_lock, flags);
1873                 skip_cancel =
1874                         test_and_set_bit(IPATH_SDMA_ABORTING, statp)
1875                         && !test_bit(IPATH_SDMA_DISABLED, statp);
1876                 spin_unlock_irqrestore(&dd->ipath_sdma_lock, flags);
1877                 if (skip_cancel)
1878                         goto bail;
1879         }
1880
1881         ipath_dbg("Cancelling all in-progress send buffers\n");
1882
1883         /* skip armlaunch errs for a while */
1884         dd->ipath_lastcancel = jiffies + HZ / 2;
1885
1886         /*
1887          * The abort bit is auto-clearing.  We also don't want pioavail
1888          * update happening during this, and we don't want any other
1889          * sends going out, so turn those off for the duration.  We read
1890          * the scratch register to be sure that cancels and the abort
1891          * have taken effect in the chip.  Otherwise two parts are same
1892          * as ipath_force_pio_avail_update()
1893          */
1894         spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
1895         dd->ipath_sendctrl &= ~(INFINIPATH_S_PIOBUFAVAILUPD
1896                 | INFINIPATH_S_PIOENABLE);
1897         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1898                 dd->ipath_sendctrl | INFINIPATH_S_ABORT);
1899         ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
1900         spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
1901
1902         /* disarm all send buffers */
1903         ipath_disarm_piobufs(dd, 0,
1904                 dd->ipath_piobcnt2k + dd->ipath_piobcnt4k);
1905
1906         if (dd->ipath_flags & IPATH_HAS_SEND_DMA)
1907                 set_bit(IPATH_SDMA_DISARMED, &dd->ipath_sdma_status);
1908
1909         if (restore_sendctrl) {
1910                 /* else done by caller later if needed */
1911                 spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
1912                 dd->ipath_sendctrl |= INFINIPATH_S_PIOBUFAVAILUPD |
1913                         INFINIPATH_S_PIOENABLE;
1914                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1915                         dd->ipath_sendctrl);
1916                 /* and again, be sure all have hit the chip */
1917                 ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
1918                 spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
1919         }
1920
1921         if ((dd->ipath_flags & IPATH_HAS_SEND_DMA) &&
1922             !test_bit(IPATH_SDMA_DISABLED, &dd->ipath_sdma_status) &&
1923             test_bit(IPATH_SDMA_RUNNING, &dd->ipath_sdma_status)) {
1924                 spin_lock_irqsave(&dd->ipath_sdma_lock, flags);
1925                 /* only wait so long for intr */
1926                 dd->ipath_sdma_abort_intr_timeout = jiffies + HZ;
1927                 dd->ipath_sdma_reset_wait = 200;
1928                 if (!test_bit(IPATH_SDMA_SHUTDOWN, &dd->ipath_sdma_status))
1929                         tasklet_hi_schedule(&dd->ipath_sdma_abort_task);
1930                 spin_unlock_irqrestore(&dd->ipath_sdma_lock, flags);
1931         }
1932 bail:;
1933 }
1934
1935 /*
1936  * Force an update of in-memory copy of the pioavail registers, when
1937  * needed for any of a variety of reasons.  We read the scratch register
1938  * to make it highly likely that the update will have happened by the
1939  * time we return.  If already off (as in cancel_sends above), this
1940  * routine is a nop, on the assumption that the caller will "do the
1941  * right thing".
1942  */
1943 void ipath_force_pio_avail_update(struct ipath_devdata *dd)
1944 {
1945         unsigned long flags;
1946
1947         spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
1948         if (dd->ipath_sendctrl & INFINIPATH_S_PIOBUFAVAILUPD) {
1949                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1950                         dd->ipath_sendctrl & ~INFINIPATH_S_PIOBUFAVAILUPD);
1951                 ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
1952                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1953                         dd->ipath_sendctrl);
1954                 ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
1955         }
1956         spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
1957 }
1958
1959 static void ipath_set_ib_lstate(struct ipath_devdata *dd, int linkcmd,
1960                                 int linitcmd)
1961 {
1962         u64 mod_wd;
1963         static const char *what[4] = {
1964                 [0] = "NOP",
1965                 [INFINIPATH_IBCC_LINKCMD_DOWN] = "DOWN",
1966                 [INFINIPATH_IBCC_LINKCMD_ARMED] = "ARMED",
1967                 [INFINIPATH_IBCC_LINKCMD_ACTIVE] = "ACTIVE"
1968         };
1969
1970         if (linitcmd == INFINIPATH_IBCC_LINKINITCMD_DISABLE) {
1971                 /*
1972                  * If we are told to disable, note that so link-recovery
1973                  * code does not attempt to bring us back up.
1974                  */
1975                 preempt_disable();
1976                 dd->ipath_flags |= IPATH_IB_LINK_DISABLED;
1977                 preempt_enable();
1978         } else if (linitcmd) {
1979                 /*
1980                  * Any other linkinitcmd will lead to LINKDOWN and then
1981                  * to INIT (if all is well), so clear flag to let
1982                  * link-recovery code attempt to bring us back up.
1983                  */
1984                 preempt_disable();
1985                 dd->ipath_flags &= ~IPATH_IB_LINK_DISABLED;
1986                 preempt_enable();
1987         }
1988
1989         mod_wd = (linkcmd << dd->ibcc_lc_shift) |
1990                 (linitcmd << INFINIPATH_IBCC_LINKINITCMD_SHIFT);
1991         ipath_cdbg(VERBOSE,
1992                 "Moving unit %u to %s (initcmd=0x%x), current ltstate is %s\n",
1993                 dd->ipath_unit, what[linkcmd], linitcmd,
1994                 ipath_ibcstatus_str[ipath_ib_linktrstate(dd,
1995                         ipath_read_kreg64(dd, dd->ipath_kregs->kr_ibcstatus))]);
1996
1997         ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl,
1998                          dd->ipath_ibcctrl | mod_wd);
1999         /* read from chip so write is flushed */
2000         (void) ipath_read_kreg64(dd, dd->ipath_kregs->kr_ibcstatus);
2001 }
2002
2003 int ipath_set_linkstate(struct ipath_devdata *dd, u8 newstate)
2004 {
2005         u32 lstate;
2006         int ret;
2007
2008         switch (newstate) {
2009         case IPATH_IB_LINKDOWN_ONLY:
2010                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKCMD_DOWN, 0);
2011                 /* don't wait */
2012                 ret = 0;
2013                 goto bail;
2014
2015         case IPATH_IB_LINKDOWN:
2016                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKCMD_DOWN,
2017                                         INFINIPATH_IBCC_LINKINITCMD_POLL);
2018                 /* don't wait */
2019                 ret = 0;
2020                 goto bail;
2021
2022         case IPATH_IB_LINKDOWN_SLEEP:
2023                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKCMD_DOWN,
2024                                         INFINIPATH_IBCC_LINKINITCMD_SLEEP);
2025                 /* don't wait */
2026                 ret = 0;
2027                 goto bail;
2028
2029         case IPATH_IB_LINKDOWN_DISABLE:
2030                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKCMD_DOWN,
2031                                         INFINIPATH_IBCC_LINKINITCMD_DISABLE);
2032                 /* don't wait */
2033                 ret = 0;
2034                 goto bail;
2035
2036         case IPATH_IB_LINKARM:
2037                 if (dd->ipath_flags & IPATH_LINKARMED) {
2038                         ret = 0;
2039                         goto bail;
2040                 }
2041                 if (!(dd->ipath_flags &
2042                       (IPATH_LINKINIT | IPATH_LINKACTIVE))) {
2043                         ret = -EINVAL;
2044                         goto bail;
2045                 }
2046                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKCMD_ARMED, 0);
2047
2048                 /*
2049                  * Since the port can transition to ACTIVE by receiving
2050                  * a non VL 15 packet, wait for either state.
2051                  */
2052                 lstate = IPATH_LINKARMED | IPATH_LINKACTIVE;
2053                 break;
2054
2055         case IPATH_IB_LINKACTIVE:
2056                 if (dd->ipath_flags & IPATH_LINKACTIVE) {
2057                         ret = 0;
2058                         goto bail;
2059                 }
2060                 if (!(dd->ipath_flags & IPATH_LINKARMED)) {
2061                         ret = -EINVAL;
2062                         goto bail;
2063                 }
2064                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKCMD_ACTIVE, 0);
2065                 lstate = IPATH_LINKACTIVE;
2066                 break;
2067
2068         case IPATH_IB_LINK_LOOPBACK:
2069                 dev_info(&dd->pcidev->dev, "Enabling IB local loopback\n");
2070                 dd->ipath_ibcctrl |= INFINIPATH_IBCC_LOOPBACK;
2071                 ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl,
2072                                  dd->ipath_ibcctrl);
2073
2074                 /* turn heartbeat off, as it causes loopback to fail */
2075                 dd->ipath_f_set_ib_cfg(dd, IPATH_IB_CFG_HRTBT,
2076                                        IPATH_IB_HRTBT_OFF);
2077                 /* don't wait */
2078                 ret = 0;
2079                 goto bail;
2080
2081         case IPATH_IB_LINK_EXTERNAL:
2082                 dev_info(&dd->pcidev->dev,
2083                         "Disabling IB local loopback (normal)\n");
2084                 dd->ipath_f_set_ib_cfg(dd, IPATH_IB_CFG_HRTBT,
2085                                        IPATH_IB_HRTBT_ON);
2086                 dd->ipath_ibcctrl &= ~INFINIPATH_IBCC_LOOPBACK;
2087                 ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl,
2088                                  dd->ipath_ibcctrl);
2089                 /* don't wait */
2090                 ret = 0;
2091                 goto bail;
2092
2093         /*
2094          * Heartbeat can be explicitly enabled by the user via
2095          * "hrtbt_enable" "file", and if disabled, trying to enable here
2096          * will have no effect.  Implicit changes (heartbeat off when
2097          * loopback on, and vice versa) are included to ease testing.
2098          */
2099         case IPATH_IB_LINK_HRTBT:
2100                 ret = dd->ipath_f_set_ib_cfg(dd, IPATH_IB_CFG_HRTBT,
2101                         IPATH_IB_HRTBT_ON);
2102                 goto bail;
2103
2104         case IPATH_IB_LINK_NO_HRTBT:
2105                 ret = dd->ipath_f_set_ib_cfg(dd, IPATH_IB_CFG_HRTBT,
2106                         IPATH_IB_HRTBT_OFF);
2107                 goto bail;
2108
2109         default:
2110                 ipath_dbg("Invalid linkstate 0x%x requested\n", newstate);
2111                 ret = -EINVAL;
2112                 goto bail;
2113         }
2114         ret = ipath_wait_linkstate(dd, lstate, 2000);
2115
2116 bail:
2117         return ret;
2118 }
2119
2120 /**
2121  * ipath_set_mtu - set the MTU
2122  * @dd: the infinipath device
2123  * @arg: the new MTU
2124  *
2125  * we can handle "any" incoming size, the issue here is whether we
2126  * need to restrict our outgoing size.   For now, we don't do any
2127  * sanity checking on this, and we don't deal with what happens to
2128  * programs that are already running when the size changes.
2129  * NOTE: changing the MTU will usually cause the IBC to go back to
2130  * link INIT state...
2131  */
2132 int ipath_set_mtu(struct ipath_devdata *dd, u16 arg)
2133 {
2134         u32 piosize;
2135         int changed = 0;
2136         int ret;
2137
2138         /*
2139          * mtu is IB data payload max.  It's the largest power of 2 less
2140          * than piosize (or even larger, since it only really controls the
2141          * largest we can receive; we can send the max of the mtu and
2142          * piosize).  We check that it's one of the valid IB sizes.
2143          */
2144         if (arg != 256 && arg != 512 && arg != 1024 && arg != 2048 &&
2145             (arg != 4096 || !ipath_mtu4096)) {
2146                 ipath_dbg("Trying to set invalid mtu %u, failing\n", arg);
2147                 ret = -EINVAL;
2148                 goto bail;
2149         }
2150         if (dd->ipath_ibmtu == arg) {
2151                 ret = 0;        /* same as current */
2152                 goto bail;
2153         }
2154
2155         piosize = dd->ipath_ibmaxlen;
2156         dd->ipath_ibmtu = arg;
2157
2158         if (arg >= (piosize - IPATH_PIO_MAXIBHDR)) {
2159                 /* Only if it's not the initial value (or reset to it) */
2160                 if (piosize != dd->ipath_init_ibmaxlen) {
2161                         if (arg > piosize && arg <= dd->ipath_init_ibmaxlen)
2162                                 piosize = dd->ipath_init_ibmaxlen;
2163                         dd->ipath_ibmaxlen = piosize;
2164                         changed = 1;
2165                 }
2166         } else if ((arg + IPATH_PIO_MAXIBHDR) != dd->ipath_ibmaxlen) {
2167                 piosize = arg + IPATH_PIO_MAXIBHDR;
2168                 ipath_cdbg(VERBOSE, "ibmaxlen was 0x%x, setting to 0x%x "
2169                            "(mtu 0x%x)\n", dd->ipath_ibmaxlen, piosize,
2170                            arg);
2171                 dd->ipath_ibmaxlen = piosize;
2172                 changed = 1;
2173         }
2174
2175         if (changed) {
2176                 u64 ibc = dd->ipath_ibcctrl, ibdw;
2177                 /*
2178                  * update our housekeeping variables, and set IBC max
2179                  * size, same as init code; max IBC is max we allow in
2180                  * buffer, less the qword pbc, plus 1 for ICRC, in dwords
2181                  */
2182                 dd->ipath_ibmaxlen = piosize - 2 * sizeof(u32);
2183                 ibdw = (dd->ipath_ibmaxlen >> 2) + 1;
2184                 ibc &= ~(INFINIPATH_IBCC_MAXPKTLEN_MASK <<
2185                          dd->ibcc_mpl_shift);
2186                 ibc |= ibdw << dd->ibcc_mpl_shift;
2187                 dd->ipath_ibcctrl = ibc;
2188                 ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl,
2189                                  dd->ipath_ibcctrl);
2190                 dd->ipath_f_tidtemplate(dd);
2191         }
2192
2193         ret = 0;
2194
2195 bail:
2196         return ret;
2197 }
2198
2199 int ipath_set_lid(struct ipath_devdata *dd, u32 lid, u8 lmc)
2200 {
2201         dd->ipath_lid = lid;
2202         dd->ipath_lmc = lmc;
2203
2204         dd->ipath_f_set_ib_cfg(dd, IPATH_IB_CFG_LIDLMC, lid |
2205                 (~((1U << lmc) - 1)) << 16);
2206
2207         dev_info(&dd->pcidev->dev, "We got a lid: 0x%x\n", lid);
2208
2209         return 0;
2210 }
2211
2212
2213 /**
2214  * ipath_write_kreg_port - write a device's per-port 64-bit kernel register
2215  * @dd: the infinipath device
2216  * @regno: the register number to write
2217  * @port: the port containing the register
2218  * @value: the value to write
2219  *
2220  * Registers that vary with the chip implementation constants (port)
2221  * use this routine.
2222  */
2223 void ipath_write_kreg_port(const struct ipath_devdata *dd, ipath_kreg regno,
2224                           unsigned port, u64 value)
2225 {
2226         u16 where;
2227
2228         if (port < dd->ipath_portcnt &&
2229             (regno == dd->ipath_kregs->kr_rcvhdraddr ||
2230              regno == dd->ipath_kregs->kr_rcvhdrtailaddr))
2231                 where = regno + port;
2232         else
2233                 where = -1;
2234
2235         ipath_write_kreg(dd, where, value);
2236 }
2237
2238 /*
2239  * Following deal with the "obviously simple" task of overriding the state
2240  * of the LEDS, which normally indicate link physical and logical status.
2241  * The complications arise in dealing with different hardware mappings
2242  * and the board-dependent routine being called from interrupts.
2243  * and then there's the requirement to _flash_ them.
2244  */
2245 #define LED_OVER_FREQ_SHIFT 8
2246 #define LED_OVER_FREQ_MASK (0xFF<<LED_OVER_FREQ_SHIFT)
2247 /* Below is "non-zero" to force override, but both actual LEDs are off */
2248 #define LED_OVER_BOTH_OFF (8)
2249
2250 static void ipath_run_led_override(unsigned long opaque)
2251 {
2252         struct ipath_devdata *dd = (struct ipath_devdata *)opaque;
2253         int timeoff;
2254         int pidx;
2255         u64 lstate, ltstate, val;
2256
2257         if (!(dd->ipath_flags & IPATH_INITTED))
2258                 return;
2259
2260         pidx = dd->ipath_led_override_phase++ & 1;
2261         dd->ipath_led_override = dd->ipath_led_override_vals[pidx];
2262         timeoff = dd->ipath_led_override_timeoff;
2263
2264         /*
2265          * below potentially restores the LED values per current status,
2266          * should also possibly setup the traffic-blink register,
2267          * but leave that to per-chip functions.
2268          */
2269         val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_ibcstatus);
2270         ltstate = ipath_ib_linktrstate(dd, val);
2271         lstate = ipath_ib_linkstate(dd, val);
2272
2273         dd->ipath_f_setextled(dd, lstate, ltstate);
2274         mod_timer(&dd->ipath_led_override_timer, jiffies + timeoff);
2275 }
2276
2277 void ipath_set_led_override(struct ipath_devdata *dd, unsigned int val)
2278 {
2279         int timeoff, freq;
2280
2281         if (!(dd->ipath_flags & IPATH_INITTED))
2282                 return;
2283
2284         /* First check if we are blinking. If not, use 1HZ polling */
2285         timeoff = HZ;
2286         freq = (val & LED_OVER_FREQ_MASK) >> LED_OVER_FREQ_SHIFT;
2287
2288         if (freq) {
2289                 /* For blink, set each phase from one nybble of val */
2290                 dd->ipath_led_override_vals[0] = val & 0xF;
2291                 dd->ipath_led_override_vals[1] = (val >> 4) & 0xF;
2292                 timeoff = (HZ << 4)/freq;
2293         } else {
2294                 /* Non-blink set both phases the same. */
2295                 dd->ipath_led_override_vals[0] = val & 0xF;
2296                 dd->ipath_led_override_vals[1] = val & 0xF;
2297         }
2298         dd->ipath_led_override_timeoff = timeoff;
2299
2300         /*
2301          * If the timer has not already been started, do so. Use a "quick"
2302          * timeout so the function will be called soon, to look at our request.
2303          */
2304         if (atomic_inc_return(&dd->ipath_led_override_timer_active) == 1) {
2305                 /* Need to start timer */
2306                 init_timer(&dd->ipath_led_override_timer);
2307                 dd->ipath_led_override_timer.function =
2308                                                  ipath_run_led_override;
2309                 dd->ipath_led_override_timer.data = (unsigned long) dd;
2310                 dd->ipath_led_override_timer.expires = jiffies + 1;
2311                 add_timer(&dd->ipath_led_override_timer);
2312         } else
2313                 atomic_dec(&dd->ipath_led_override_timer_active);
2314 }
2315
2316 /**
2317  * ipath_shutdown_device - shut down a device
2318  * @dd: the infinipath device
2319  *
2320  * This is called to make the device quiet when we are about to
2321  * unload the driver, and also when the device is administratively
2322  * disabled.   It does not free any data structures.
2323  * Everything it does has to be setup again by ipath_init_chip(dd,1)
2324  */
2325 void ipath_shutdown_device(struct ipath_devdata *dd)
2326 {
2327         unsigned long flags;
2328
2329         ipath_dbg("Shutting down the device\n");
2330
2331         ipath_hol_up(dd); /* make sure user processes aren't suspended */
2332
2333         dd->ipath_flags |= IPATH_LINKUNK;
2334         dd->ipath_flags &= ~(IPATH_INITTED | IPATH_LINKDOWN |
2335                              IPATH_LINKINIT | IPATH_LINKARMED |
2336                              IPATH_LINKACTIVE);
2337         *dd->ipath_statusp &= ~(IPATH_STATUS_IB_CONF |
2338                                 IPATH_STATUS_IB_READY);
2339
2340         /* mask interrupts, but not errors */
2341         ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, 0ULL);
2342
2343         dd->ipath_rcvctrl = 0;
2344         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl,
2345                          dd->ipath_rcvctrl);
2346
2347         if (dd->ipath_flags & IPATH_HAS_SEND_DMA)
2348                 teardown_sdma(dd);
2349
2350         /*
2351          * gracefully stop all sends allowing any in progress to trickle out
2352          * first.
2353          */
2354         spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
2355         dd->ipath_sendctrl = 0;
2356         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl, dd->ipath_sendctrl);
2357         /* flush it */
2358         ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
2359         spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
2360
2361         /*
2362          * enough for anything that's going to trickle out to have actually
2363          * done so.
2364          */
2365         udelay(5);
2366
2367         dd->ipath_f_setextled(dd, 0, 0); /* make sure LEDs are off */
2368
2369         ipath_set_ib_lstate(dd, 0, INFINIPATH_IBCC_LINKINITCMD_DISABLE);
2370         ipath_cancel_sends(dd, 0);
2371
2372         /*
2373          * we are shutting down, so tell components that care.  We don't do
2374          * this on just a link state change, much like ethernet, a cable
2375          * unplug, etc. doesn't change driver state
2376          */
2377         signal_ib_event(dd, IB_EVENT_PORT_ERR);
2378
2379         /* disable IBC */
2380         dd->ipath_control &= ~INFINIPATH_C_LINKENABLE;
2381         ipath_write_kreg(dd, dd->ipath_kregs->kr_control,
2382                          dd->ipath_control | INFINIPATH_C_FREEZEMODE);
2383
2384         /*
2385          * clear SerdesEnable and turn the leds off; do this here because
2386          * we are unloading, so don't count on interrupts to move along
2387          * Turn the LEDs off explicitly for the same reason.
2388          */
2389         dd->ipath_f_quiet_serdes(dd);
2390
2391         /* stop all the timers that might still be running */
2392         del_timer_sync(&dd->ipath_hol_timer);
2393         if (dd->ipath_stats_timer_active) {
2394                 del_timer_sync(&dd->ipath_stats_timer);
2395                 dd->ipath_stats_timer_active = 0;
2396         }
2397         if (dd->ipath_intrchk_timer.data) {
2398                 del_timer_sync(&dd->ipath_intrchk_timer);
2399                 dd->ipath_intrchk_timer.data = 0;
2400         }
2401         if (atomic_read(&dd->ipath_led_override_timer_active)) {
2402                 del_timer_sync(&dd->ipath_led_override_timer);
2403                 atomic_set(&dd->ipath_led_override_timer_active, 0);
2404         }
2405
2406         /*
2407          * clear all interrupts and errors, so that the next time the driver
2408          * is loaded or device is enabled, we know that whatever is set
2409          * happened while we were unloaded
2410          */
2411         ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear,
2412                          ~0ULL & ~INFINIPATH_HWE_MEMBISTFAILED);
2413         ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear, -1LL);
2414         ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, -1LL);
2415
2416         ipath_cdbg(VERBOSE, "Flush time and errors to EEPROM\n");
2417         ipath_update_eeprom_log(dd);
2418 }
2419
2420 /**
2421  * ipath_free_pddata - free a port's allocated data
2422  * @dd: the infinipath device
2423  * @pd: the portdata structure
2424  *
2425  * free up any allocated data for a port
2426  * This should not touch anything that would affect a simultaneous
2427  * re-allocation of port data, because it is called after ipath_mutex
2428  * is released (and can be called from reinit as well).
2429  * It should never change any chip state, or global driver state.
2430  * (The only exception to global state is freeing the port0 port0_skbs.)
2431  */
2432 void ipath_free_pddata(struct ipath_devdata *dd, struct ipath_portdata *pd)
2433 {
2434         if (!pd)
2435                 return;
2436
2437         if (pd->port_rcvhdrq) {
2438                 ipath_cdbg(VERBOSE, "free closed port %d rcvhdrq @ %p "
2439                            "(size=%lu)\n", pd->port_port, pd->port_rcvhdrq,
2440                            (unsigned long) pd->port_rcvhdrq_size);
2441                 dma_free_coherent(&dd->pcidev->dev, pd->port_rcvhdrq_size,
2442                                   pd->port_rcvhdrq, pd->port_rcvhdrq_phys);
2443                 pd->port_rcvhdrq = NULL;
2444                 if (pd->port_rcvhdrtail_kvaddr) {
2445                         dma_free_coherent(&dd->pcidev->dev, PAGE_SIZE,
2446                                          pd->port_rcvhdrtail_kvaddr,
2447                                          pd->port_rcvhdrqtailaddr_phys);
2448                         pd->port_rcvhdrtail_kvaddr = NULL;
2449                 }
2450         }
2451         if (pd->port_port && pd->port_rcvegrbuf) {
2452                 unsigned e;
2453
2454                 for (e = 0; e < pd->port_rcvegrbuf_chunks; e++) {
2455                         void *base = pd->port_rcvegrbuf[e];
2456                         size_t size = pd->port_rcvegrbuf_size;
2457
2458                         ipath_cdbg(VERBOSE, "egrbuf free(%p, %lu), "
2459                                    "chunk %u/%u\n", base,
2460                                    (unsigned long) size,
2461                                    e, pd->port_rcvegrbuf_chunks);
2462                         dma_free_coherent(&dd->pcidev->dev, size,
2463                                 base, pd->port_rcvegrbuf_phys[e]);
2464                 }
2465                 kfree(pd->port_rcvegrbuf);
2466                 pd->port_rcvegrbuf = NULL;
2467                 kfree(pd->port_rcvegrbuf_phys);
2468                 pd->port_rcvegrbuf_phys = NULL;
2469                 pd->port_rcvegrbuf_chunks = 0;
2470         } else if (pd->port_port == 0 && dd->ipath_port0_skbinfo) {
2471                 unsigned e;
2472                 struct ipath_skbinfo *skbinfo = dd->ipath_port0_skbinfo;
2473
2474                 dd->ipath_port0_skbinfo = NULL;
2475                 ipath_cdbg(VERBOSE, "free closed port %d "
2476                            "ipath_port0_skbinfo @ %p\n", pd->port_port,
2477                            skbinfo);
2478                 for (e = 0; e < dd->ipath_p0_rcvegrcnt; e++)
2479                         if (skbinfo[e].skb) {
2480                                 pci_unmap_single(dd->pcidev, skbinfo[e].phys,
2481                                                  dd->ipath_ibmaxlen,
2482                                                  PCI_DMA_FROMDEVICE);
2483                                 dev_kfree_skb(skbinfo[e].skb);
2484                         }
2485                 vfree(skbinfo);
2486         }
2487         kfree(pd->port_tid_pg_list);
2488         vfree(pd->subport_uregbase);
2489         vfree(pd->subport_rcvegrbuf);
2490         vfree(pd->subport_rcvhdr_base);
2491         kfree(pd);
2492 }
2493
2494 static int __init infinipath_init(void)
2495 {
2496         int ret;
2497
2498         if (ipath_debug & __IPATH_DBG)
2499                 printk(KERN_INFO DRIVER_LOAD_MSG "%s", ib_ipath_version);
2500
2501         /*
2502          * These must be called before the driver is registered with
2503          * the PCI subsystem.
2504          */
2505         idr_init(&unit_table);
2506         if (!idr_pre_get(&unit_table, GFP_KERNEL)) {
2507                 printk(KERN_ERR IPATH_DRV_NAME ": idr_pre_get() failed\n");
2508                 ret = -ENOMEM;
2509                 goto bail;
2510         }
2511
2512         ret = pci_register_driver(&ipath_driver);
2513         if (ret < 0) {
2514                 printk(KERN_ERR IPATH_DRV_NAME
2515                        ": Unable to register driver: error %d\n", -ret);
2516                 goto bail_unit;
2517         }
2518
2519         ret = ipath_init_ipathfs();
2520         if (ret < 0) {
2521                 printk(KERN_ERR IPATH_DRV_NAME ": Unable to create "
2522                        "ipathfs: error %d\n", -ret);
2523                 goto bail_pci;
2524         }
2525
2526         goto bail;
2527
2528 bail_pci:
2529         pci_unregister_driver(&ipath_driver);
2530
2531 bail_unit:
2532         idr_destroy(&unit_table);
2533
2534 bail:
2535         return ret;
2536 }
2537
2538 static void __exit infinipath_cleanup(void)
2539 {
2540         ipath_exit_ipathfs();
2541
2542         ipath_cdbg(VERBOSE, "Unregistering pci driver\n");
2543         pci_unregister_driver(&ipath_driver);
2544
2545         idr_destroy(&unit_table);
2546 }
2547
2548 /**
2549  * ipath_reset_device - reset the chip if possible
2550  * @unit: the device to reset
2551  *
2552  * Whether or not reset is successful, we attempt to re-initialize the chip
2553  * (that is, much like a driver unload/reload).  We clear the INITTED flag
2554  * so that the various entry points will fail until we reinitialize.  For
2555  * now, we only allow this if no user ports are open that use chip resources
2556  */
2557 int ipath_reset_device(int unit)
2558 {
2559         int ret, i;
2560         struct ipath_devdata *dd = ipath_lookup(unit);
2561         unsigned long flags;
2562
2563         if (!dd) {
2564                 ret = -ENODEV;
2565                 goto bail;
2566         }
2567
2568         if (atomic_read(&dd->ipath_led_override_timer_active)) {
2569                 /* Need to stop LED timer, _then_ shut off LEDs */
2570                 del_timer_sync(&dd->ipath_led_override_timer);
2571                 atomic_set(&dd->ipath_led_override_timer_active, 0);
2572         }
2573
2574         /* Shut off LEDs after we are sure timer is not running */
2575         dd->ipath_led_override = LED_OVER_BOTH_OFF;
2576         dd->ipath_f_setextled(dd, 0, 0);
2577
2578         dev_info(&dd->pcidev->dev, "Reset on unit %u requested\n", unit);
2579
2580         if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT)) {
2581                 dev_info(&dd->pcidev->dev, "Invalid unit number %u or "
2582                          "not initialized or not present\n", unit);
2583                 ret = -ENXIO;
2584                 goto bail;
2585         }
2586
2587         spin_lock_irqsave(&dd->ipath_uctxt_lock, flags);
2588         if (dd->ipath_pd)
2589                 for (i = 1; i < dd->ipath_cfgports; i++) {
2590                         if (!dd->ipath_pd[i] || !dd->ipath_pd[i]->port_cnt)
2591                                 continue;
2592                         spin_unlock_irqrestore(&dd->ipath_uctxt_lock, flags);
2593                         ipath_dbg("unit %u port %d is in use "
2594                                   "(PID %u cmd %s), can't reset\n",
2595                                   unit, i,
2596                                   pid_nr(dd->ipath_pd[i]->port_pid),
2597                                   dd->ipath_pd[i]->port_comm);
2598                         ret = -EBUSY;
2599                         goto bail;
2600                 }
2601         spin_unlock_irqrestore(&dd->ipath_uctxt_lock, flags);
2602
2603         if (dd->ipath_flags & IPATH_HAS_SEND_DMA)
2604                 teardown_sdma(dd);
2605
2606         dd->ipath_flags &= ~IPATH_INITTED;
2607         ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, 0ULL);
2608         ret = dd->ipath_f_reset(dd);
2609         if (ret == 1) {
2610                 ipath_dbg("Reinitializing unit %u after reset attempt\n",
2611                           unit);
2612                 ret = ipath_init_chip(dd, 1);
2613         } else
2614                 ret = -EAGAIN;
2615         if (ret)
2616                 ipath_dev_err(dd, "Reinitialize unit %u after "
2617                               "reset failed with %d\n", unit, ret);
2618         else
2619                 dev_info(&dd->pcidev->dev, "Reinitialized unit %u after "
2620                          "resetting\n", unit);
2621
2622 bail:
2623         return ret;
2624 }
2625
2626 /*
2627  * send a signal to all the processes that have the driver open
2628  * through the normal interfaces (i.e., everything other than diags
2629  * interface).  Returns number of signalled processes.
2630  */
2631 static int ipath_signal_procs(struct ipath_devdata *dd, int sig)
2632 {
2633         int i, sub, any = 0;
2634         struct pid *pid;
2635         unsigned long flags;
2636
2637         if (!dd->ipath_pd)
2638                 return 0;
2639
2640         spin_lock_irqsave(&dd->ipath_uctxt_lock, flags);
2641         for (i = 1; i < dd->ipath_cfgports; i++) {
2642                 if (!dd->ipath_pd[i] || !dd->ipath_pd[i]->port_cnt)
2643                         continue;
2644                 pid = dd->ipath_pd[i]->port_pid;
2645                 if (!pid)
2646                         continue;
2647
2648                 dev_info(&dd->pcidev->dev, "context %d in use "
2649                           "(PID %u), sending signal %d\n",
2650                           i, pid_nr(pid), sig);
2651                 kill_pid(pid, sig, 1);
2652                 any++;
2653                 for (sub = 0; sub < INFINIPATH_MAX_SUBPORT; sub++) {
2654                         pid = dd->ipath_pd[i]->port_subpid[sub];
2655                         if (!pid)
2656                                 continue;
2657                         dev_info(&dd->pcidev->dev, "sub-context "
2658                                 "%d:%d in use (PID %u), sending "
2659                                 "signal %d\n", i, sub, pid_nr(pid), sig);
2660                         kill_pid(pid, sig, 1);
2661                         any++;
2662                 }
2663         }
2664         spin_unlock_irqrestore(&dd->ipath_uctxt_lock, flags);
2665         return any;
2666 }
2667
2668 static void ipath_hol_signal_down(struct ipath_devdata *dd)
2669 {
2670         if (ipath_signal_procs(dd, SIGSTOP))
2671                 ipath_dbg("Stopped some processes\n");
2672         ipath_cancel_sends(dd, 1);
2673 }
2674
2675
2676 static void ipath_hol_signal_up(struct ipath_devdata *dd)
2677 {
2678         if (ipath_signal_procs(dd, SIGCONT))
2679                 ipath_dbg("Continued some processes\n");
2680 }
2681
2682 /*
2683  * link is down, stop any users processes, and flush pending sends
2684  * to prevent HoL blocking, then start the HoL timer that
2685  * periodically continues, then stop procs, so they can detect
2686  * link down if they want, and do something about it.
2687  * Timer may already be running, so use mod_timer, not add_timer.
2688  */
2689 void ipath_hol_down(struct ipath_devdata *dd)
2690 {
2691         dd->ipath_hol_state = IPATH_HOL_DOWN;
2692         ipath_hol_signal_down(dd);
2693         dd->ipath_hol_next = IPATH_HOL_DOWNCONT;
2694         dd->ipath_hol_timer.expires = jiffies +
2695                 msecs_to_jiffies(ipath_hol_timeout_ms);
2696         mod_timer(&dd->ipath_hol_timer, dd->ipath_hol_timer.expires);
2697 }
2698
2699 /*
2700  * link is up, continue any user processes, and ensure timer
2701  * is a nop, if running.  Let timer keep running, if set; it
2702  * will nop when it sees the link is up
2703  */
2704 void ipath_hol_up(struct ipath_devdata *dd)
2705 {
2706         ipath_hol_signal_up(dd);
2707         dd->ipath_hol_state = IPATH_HOL_UP;
2708 }
2709
2710 /*
2711  * toggle the running/not running state of user proceses
2712  * to prevent HoL blocking on chip resources, but still allow
2713  * user processes to do link down special case handling.
2714  * Should only be called via the timer
2715  */
2716 void ipath_hol_event(unsigned long opaque)
2717 {
2718         struct ipath_devdata *dd = (struct ipath_devdata *)opaque;
2719
2720         if (dd->ipath_hol_next == IPATH_HOL_DOWNSTOP
2721                 && dd->ipath_hol_state != IPATH_HOL_UP) {
2722                 dd->ipath_hol_next = IPATH_HOL_DOWNCONT;
2723                 ipath_dbg("Stopping processes\n");
2724                 ipath_hol_signal_down(dd);
2725         } else { /* may do "extra" if also in ipath_hol_up() */
2726                 dd->ipath_hol_next = IPATH_HOL_DOWNSTOP;
2727                 ipath_dbg("Continuing processes\n");
2728                 ipath_hol_signal_up(dd);
2729         }
2730         if (dd->ipath_hol_state == IPATH_HOL_UP)
2731                 ipath_dbg("link's up, don't resched timer\n");
2732         else {
2733                 dd->ipath_hol_timer.expires = jiffies +
2734                         msecs_to_jiffies(ipath_hol_timeout_ms);
2735                 mod_timer(&dd->ipath_hol_timer,
2736                         dd->ipath_hol_timer.expires);
2737         }
2738 }
2739
2740 int ipath_set_rx_pol_inv(struct ipath_devdata *dd, u8 new_pol_inv)
2741 {
2742         u64 val;
2743
2744         if (new_pol_inv > INFINIPATH_XGXS_RX_POL_MASK)
2745                 return -1;
2746         if (dd->ipath_rx_pol_inv != new_pol_inv) {
2747                 dd->ipath_rx_pol_inv = new_pol_inv;
2748                 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_xgxsconfig);
2749                 val &= ~(INFINIPATH_XGXS_RX_POL_MASK <<
2750                          INFINIPATH_XGXS_RX_POL_SHIFT);
2751                 val |= ((u64)dd->ipath_rx_pol_inv) <<
2752                         INFINIPATH_XGXS_RX_POL_SHIFT;
2753                 ipath_write_kreg(dd, dd->ipath_kregs->kr_xgxsconfig, val);
2754         }
2755         return 0;
2756 }
2757
2758 /*
2759  * Disable and enable the armlaunch error.  Used for PIO bandwidth testing on
2760  * the 7220, which is count-based, rather than trigger-based.  Safe for the
2761  * driver check, since it's at init.   Not completely safe when used for
2762  * user-mode checking, since some error checking can be lost, but not
2763  * particularly risky, and only has problematic side-effects in the face of
2764  * very buggy user code.  There is no reference counting, but that's also
2765  * fine, given the intended use.
2766  */
2767 void ipath_enable_armlaunch(struct ipath_devdata *dd)
2768 {
2769         dd->ipath_lasterror &= ~INFINIPATH_E_SPIOARMLAUNCH;
2770         ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear,
2771                 INFINIPATH_E_SPIOARMLAUNCH);
2772         dd->ipath_errormask |= INFINIPATH_E_SPIOARMLAUNCH;
2773         ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
2774                 dd->ipath_errormask);
2775 }
2776
2777 void ipath_disable_armlaunch(struct ipath_devdata *dd)
2778 {
2779         /* so don't re-enable if already set */
2780         dd->ipath_maskederrs &= ~INFINIPATH_E_SPIOARMLAUNCH;
2781         dd->ipath_errormask &= ~INFINIPATH_E_SPIOARMLAUNCH;
2782         ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
2783                 dd->ipath_errormask);
2784 }
2785
2786 module_init(infinipath_init);
2787 module_exit(infinipath_cleanup);