2 * Copyright (c) 2006, 2007 QLogic Corporation. All rights reserved.
3 * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #ifndef _IPATH_COMMON_H
35 #define _IPATH_COMMON_H
38 * This file contains defines, structures, etc. that are used
39 * to communicate between kernel and user code.
43 /* This is the IEEE-assigned OUI for QLogic Inc. InfiniPath */
44 #define IPATH_SRC_OUI_1 0x00
45 #define IPATH_SRC_OUI_2 0x11
46 #define IPATH_SRC_OUI_3 0x75
48 /* version of protocol header (known to chip also). In the long run,
49 * we should be able to generate and accept a range of version numbers;
50 * for now we only accept one, and it's compiled in.
52 #define IPS_PROTO_VERSION 2
55 * These are compile time constants that you may want to enable or disable
56 * if you are trying to debug problems with code or performance.
57 * IPATH_VERBOSE_TRACING define as 1 if you want additional tracing in
59 * IPATH_TRACE_REGWRITES define as 1 if you want register writes to be
60 * traced in faspath code
61 * _IPATH_TRACING define as 0 if you want to remove all tracing in a
63 * _IPATH_DEBUGGING define as 0 if you want to remove debug prints
67 * The value in the BTH QP field that InfiniPath uses to differentiate
68 * an infinipath protocol IB packet vs standard IB transport
70 #define IPATH_KD_QP 0x656b79
73 * valid states passed to ipath_set_linkstate() user call
75 #define IPATH_IB_LINKDOWN 0
76 #define IPATH_IB_LINKARM 1
77 #define IPATH_IB_LINKACTIVE 2
78 #define IPATH_IB_LINKDOWN_ONLY 3
79 #define IPATH_IB_LINKDOWN_SLEEP 4
80 #define IPATH_IB_LINKDOWN_DISABLE 5
81 #define IPATH_IB_LINK_LOOPBACK 6 /* enable local loopback */
82 #define IPATH_IB_LINK_EXTERNAL 7 /* normal, disable local loopback */
83 #define IPATH_IB_LINK_NO_HRTBT 8 /* disable Heartbeat, e.g. for loopback */
84 #define IPATH_IB_LINK_HRTBT 9 /* enable heartbeat, normal, non-loopback */
87 * These 3 values (SDR and DDR may be ORed for auto-speed
88 * negotiation) are used for the 3rd argument to path_f_set_ib_cfg
89 * with cmd IPATH_IB_CFG_SPD_ENB, by direct calls or via sysfs. They
90 * are also the the possible values for ipath_link_speed_enabled and active
91 * The values were chosen to match values used within the IB spec.
93 #define IPATH_IB_SDR 1
94 #define IPATH_IB_DDR 2
97 * stats maintained by the driver. For now, at least, this is global
98 * to all minor devices.
100 struct infinipath_stats {
101 /* number of interrupts taken */
103 /* number of interrupts for errors */
105 /* number of errors from chip (not incl. packet errors or CRC) */
107 /* number of packet errors from chip other than CRC */
109 /* number of packets with CRC errors (ICRC and VCRC) */
111 /* number of hardware errors reported (parity, etc.) */
113 /* number of times IB link changed state unexpectedly */
115 __u64 sps_unused; /* was fastrcvint, no longer implemented */
116 /* number of kernel (port0) packets received */
118 /* number of "ethernet" packets sent by driver */
119 __u64 sps_ether_spkts;
120 /* number of "ethernet" packets received by driver */
121 __u64 sps_ether_rpkts;
122 /* number of SMA packets sent by driver. Obsolete. */
124 /* number of SMA packets received by driver. Obsolete. */
126 /* number of times all ports rcvhdrq was full and packet dropped */
128 /* number of times all ports egrtid was full and packet dropped */
131 * number of times we tried to send from driver, but no pio buffers
135 /* number of ports currently open */
137 /* list of pkeys (other than default) accepted (0 means not set) */
139 __u16 sps_unused16[4]; /* available; maintaining compatible layout */
140 /* number of user ports per chip (not IB ports) */
142 /* not our interrupt, or already handled */
144 /* max number of packets handled per receive call */
145 __u32 sps_maxpkts_call;
146 /* avg number of packets handled per receive call */
147 __u32 sps_avgpkts_call;
148 /* total number of pages locked */
150 /* total number of pages unlocked */
151 __u64 sps_pageunlocks;
153 * Number of packets dropped in kernel other than errors (ether
154 * packets if ipath not configured, etc.)
157 __u64 sps_txeparity; /* PIO buffer parity error, recovered */
158 /* pad for future growth */
163 * These are the status bits readable (in ascii form, 64bit value)
164 * from the "status" sysfs file.
166 #define IPATH_STATUS_INITTED 0x1 /* basic initialization done */
167 #define IPATH_STATUS_DISABLED 0x2 /* hardware disabled */
168 /* Device has been disabled via admin request */
169 #define IPATH_STATUS_ADMIN_DISABLED 0x4
170 /* Chip has been found and initted */
171 #define IPATH_STATUS_CHIP_PRESENT 0x20
172 /* IB link is at ACTIVE, usable for data traffic */
173 #define IPATH_STATUS_IB_READY 0x40
174 /* link is configured, LID, MTU, etc. have been set */
175 #define IPATH_STATUS_IB_CONF 0x80
176 /* no link established, probably no cable */
177 #define IPATH_STATUS_IB_NOCABLE 0x100
178 /* A Fatal hardware error has occurred. */
179 #define IPATH_STATUS_HWERROR 0x200
182 * The list of usermode accessible registers. Also see Reg_* later in file.
184 typedef enum _ipath_ureg {
185 /* (RO) DMA RcvHdr to be used next. */
187 /* (RW) RcvHdr entry to be processed next by host. */
189 /* (RO) Index of next Eager index to use. */
190 ur_rcvegrindextail = 2,
191 /* (RW) Eager TID to be processed next */
192 ur_rcvegrindexhead = 3,
193 /* For internal use only; max register number. */
197 /* bit values for spi_runtime_flags */
198 #define IPATH_RUNTIME_HT 0x1
199 #define IPATH_RUNTIME_PCIE 0x2
200 #define IPATH_RUNTIME_FORCE_WC_ORDER 0x4
201 #define IPATH_RUNTIME_RCVHDR_COPY 0x8
202 #define IPATH_RUNTIME_MASTER 0x10
203 #define IPATH_RUNTIME_NODMA_RTAIL 0x80
204 #define IPATH_RUNTIME_SDMA 0x200
205 #define IPATH_RUNTIME_FORCE_PIOAVAIL 0x400
206 #define IPATH_RUNTIME_PIO_REGSWAPPED 0x800
209 * This structure is returned by ipath_userinit() immediately after
210 * open to get implementation-specific info, and info specific to this
213 * This struct must have explict pad fields where type sizes
214 * may result in different alignments between 32 and 64 bit
215 * programs, since the 64 bit * bit kernel requires the user code
216 * to have matching offsets
218 struct ipath_base_info {
219 /* version of hardware, for feature checking. */
220 __u32 spi_hw_version;
221 /* version of software, for feature checking. */
222 __u32 spi_sw_version;
223 /* InfiniPath port assigned, goes into sent packets */
227 * IB MTU, packets IB data must be less than this.
228 * The MTU is in bytes, and will be a multiple of 4 bytes.
232 * Size of a PIO buffer. Any given packet's total size must be less
233 * than this (in words). Included is the starting control word, so
234 * if 513 is returned, then total pkt size is 512 words or less.
237 /* size of the TID cache in infinipath, in entries */
239 /* size of the TID Eager list in infinipath, in entries */
241 /* size of a single receive header queue entry in words. */
242 __u32 spi_rcvhdrent_size;
244 * Count of receive header queue entries allocated.
245 * This may be less than the spu_rcvhdrcnt passed in!.
247 __u32 spi_rcvhdr_cnt;
249 /* per-chip and other runtime features bitmap (IPATH_RUNTIME_*) */
250 __u32 spi_runtime_flags;
252 /* address where receive buffer queue is mapped into */
253 __u64 spi_rcvhdr_base;
257 /* base address of eager TID receive buffers. */
258 __u64 spi_rcv_egrbufs;
260 /* Allocated by initialization code, not by protocol. */
263 * Size of each TID buffer in host memory, starting at
264 * spi_rcv_egrbufs. The buffers are virtually contiguous.
266 __u32 spi_rcv_egrbufsize;
268 * The special QP (queue pair) value that identifies an infinipath
269 * protocol packet from standard IB packets. More, probably much
275 * User register base for init code, not to be used directly by
276 * protocol or applications.
278 __u64 __spi_uregbase;
280 * Maximum buffer size in bytes that can be used in a single TID
281 * entry (assuming the buffer is aligned to this boundary). This is
282 * the minimum of what the hardware and software support Guaranteed
283 * to be a power of 2.
285 __u32 spi_tid_maxsize;
287 * alignment of each pio send buffer (byte count
288 * to add to spi_piobufbase to get to second buffer)
292 * The index of the first pio buffer available to this process;
293 * needed to do lookup in spi_pioavailaddr; not added to
297 /* number of buffers mapped for this process */
301 * Base address of writeonly pio buffers for this process.
302 * Each buffer has spi_piosize words, and is aligned on spi_pioalign
303 * boundaries. spi_piocnt buffers are mapped from this address
305 __u64 spi_piobufbase;
308 * Base address of readonly memory copy of the pioavail registers.
309 * There are 2 bits for each buffer.
311 __u64 spi_pioavailaddr;
314 * Address where driver updates a copy of the interface and driver
315 * status (IPATH_STATUS_*) as a 64 bit value. It's followed by a
316 * string indicating hardware error, if there was one.
320 /* number of chip ports available to user processes */
322 /* unit number of chip we are using */
324 /* num bufs in each contiguous set */
325 __u32 spi_rcv_egrperchunk;
326 /* size in bytes of each contiguous set */
327 __u32 spi_rcv_egrchunksize;
328 /* total size of mmap to cover full rcvegrbuffers */
329 __u32 spi_rcv_egrbuftotlen;
330 __u32 spi_filler_for_align;
331 /* address of readonly memory copy of the rcvhdrq tail register. */
332 __u64 spi_rcvhdr_tailaddr;
334 /* shared memory pages for subports if port is shared */
335 __u64 spi_subport_uregbase;
336 __u64 spi_subport_rcvegrbuf;
337 __u64 spi_subport_rcvhdr_base;
339 /* shared memory page for hardware port if it is shared */
340 __u64 spi_port_uregbase;
341 __u64 spi_port_rcvegrbuf;
342 __u64 spi_port_rcvhdr_base;
343 __u64 spi_port_rcvhdr_tailaddr;
345 } __attribute__ ((aligned(8)));
349 * This version number is given to the driver by the user code during
350 * initialization in the spu_userversion field of ipath_user_info, so
351 * the driver can check for compatibility with user code.
353 * The major version changes when data structures
354 * change in an incompatible way. The driver must be the same or higher
355 * for initialization to succeed. In some cases, a higher version
356 * driver will not interoperate with older software, and initialization
357 * will return an error.
359 #define IPATH_USER_SWMAJOR 1
362 * Minor version differences are always compatible
363 * a within a major version, however if user software is larger
364 * than driver software, some new features and/or structure fields
365 * may not be implemented; the user code must deal with this if it
366 * cares, or it must abort after initialization reports the difference.
368 #define IPATH_USER_SWMINOR 6
370 #define IPATH_USER_SWVERSION ((IPATH_USER_SWMAJOR<<16) | IPATH_USER_SWMINOR)
372 #define IPATH_KERN_TYPE 0
375 * Similarly, this is the kernel version going back to the user. It's
376 * slightly different, in that we want to tell if the driver was built as
377 * part of a QLogic release, or from the driver from openfabrics.org,
378 * kernel.org, or a standard distribution, for support reasons.
379 * The high bit is 0 for non-QLogic and 1 for QLogic-built/supplied.
381 * It's returned by the driver to the user code during initialization in the
382 * spi_sw_version field of ipath_base_info, so the user code can in turn
383 * check for compatibility with the kernel.
385 #define IPATH_KERN_SWVERSION ((IPATH_KERN_TYPE<<31) | IPATH_USER_SWVERSION)
388 * This structure is passed to ipath_userinit() to tell the driver where
389 * user code buffers are, sizes, etc. The offsets and sizes of the
390 * fields must remain unchanged, for binary compatibility. It can
391 * be extended, if userversion is changed so user code can tell, if needed
393 struct ipath_user_info {
395 * version of user software, to detect compatibility issues.
396 * Should be set to IPATH_USER_SWVERSION.
398 __u32 spu_userversion;
400 /* desired number of receive header queue entries */
403 /* size of struct base_info to write to */
404 __u32 spu_base_info_size;
407 * number of words in KD protocol header
408 * This tells InfiniPath how many words to copy to rcvhdrq. If 0,
409 * kernel uses a default. Once set, attempts to set any other value
410 * are an error (EAGAIN) until driver is reloaded.
412 __u32 spu_rcvhdrsize;
415 * If two or more processes wish to share a port, each process
416 * must set the spu_subport_cnt and spu_subport_id to the same
417 * values. The only restriction on the spu_subport_id is that
418 * it be unique for a given node.
420 __u16 spu_subport_cnt;
421 __u16 spu_subport_id;
423 __u32 spu_unused; /* kept for compatible layout */
426 * address of struct base_info to write to
430 } __attribute__ ((aligned(8)));
434 #define IPATH_CMD_MIN 16
436 #define __IPATH_CMD_USER_INIT 16 /* old set up userspace (for old user code) */
437 #define IPATH_CMD_PORT_INFO 17 /* find out what resources we got */
438 #define IPATH_CMD_RECV_CTRL 18 /* control receipt of packets */
439 #define IPATH_CMD_TID_UPDATE 19 /* update expected TID entries */
440 #define IPATH_CMD_TID_FREE 20 /* free expected TID entries */
441 #define IPATH_CMD_SET_PART_KEY 21 /* add partition key */
442 #define __IPATH_CMD_SLAVE_INFO 22 /* return info on slave processes (for old user code) */
443 #define IPATH_CMD_ASSIGN_PORT 23 /* allocate HCA and port */
444 #define IPATH_CMD_USER_INIT 24 /* set up userspace */
445 #define IPATH_CMD_UNUSED_1 25
446 #define IPATH_CMD_UNUSED_2 26
447 #define IPATH_CMD_PIOAVAILUPD 27 /* force an update of PIOAvail reg */
448 #define IPATH_CMD_POLL_TYPE 28 /* set the kind of polling we want */
449 #define IPATH_CMD_ARMLAUNCH_CTRL 29 /* armlaunch detection control */
451 #define IPATH_CMD_MAX 29
456 #define IPATH_POLL_TYPE_URGENT 0x01
457 #define IPATH_POLL_TYPE_OVERFLOW 0x02
459 struct ipath_port_info {
460 __u32 num_active; /* number of active units */
461 __u32 unit; /* unit (chip) assigned to caller */
462 __u16 port; /* port on unit assigned to caller */
463 __u16 subport; /* subport on unit assigned to caller */
464 __u16 num_ports; /* number of ports available on unit */
465 __u16 num_subports; /* number of subports opened on port */
468 struct ipath_tid_info {
470 /* make structure same size in 32 and 64 bit */
472 /* virtual address of first page in transfer */
474 /* pointer (same size 32/64 bit) to __u16 tid array */
478 * pointer (same size 32/64 bit) to bitmap of TIDs used
479 * for this call; checked for being large enough at open
485 __u32 type; /* command type */
487 struct ipath_tid_info tid_info;
488 struct ipath_user_info user_info;
489 /* address in userspace of struct ipath_port_info to
492 /* enable/disable receipt of packets */
494 /* enable/disable armlaunch errors (non-zero to enable) */
495 __u32 armlaunch_ctrl;
496 /* partition key to set */
498 /* user address of __u32 bitmask of active slaves */
499 __u64 slave_mask_addr;
500 /* type of polling we want */
506 /* Pointer to data, but same size 32 and 64 bit */
510 * Length of data; don't need 64 bits, but want
511 * ipath_sendpkt to remain same size as before 32 bit changes, so...
517 * Describes a single packet for send. Each packet can have one or more
518 * buffers, but the total length (exclusive of IB headers) must be less
519 * than the MTU, and if using the PIO method, entire packet length,
520 * including IB headers, must be less than the ipath_piosize value (words).
521 * Use of this necessitates including sys/uio.h
523 struct __ipath_sendpkt {
524 __u32 sps_flags; /* flags for packet (TBD) */
525 __u32 sps_cnt; /* number of entries to use in sps_iov */
526 /* array of iov's describing packet. TEMPORARY */
527 struct ipath_iovec sps_iov[4];
531 * diagnostics can send a packet by "writing" one of the following
532 * two structs to diag data special file
533 * The first is the legacy version for backward compatibility
535 struct ipath_diag_pkt {
541 /* The second diag_pkt struct is the expanded version that allows
542 * more control over the packet, specifically, by allowing a custom
543 * pbc (+ static rate) qword, so that special modes and deliberate
544 * changes to CRCs can be used. The elements were also re-ordered
545 * for better alignment and to avoid padding issues.
547 struct ipath_diag_xpkt {
555 * Data layout in I2C flash (for GUID, etc.)
556 * All fields are little-endian binary unless otherwise stated
558 #define IPATH_FLASH_VERSION 2
560 /* flash layout version (IPATH_FLASH_VERSION) */
562 /* checksum protecting if_length bytes */
565 * valid length (in use, protected by if_csum), including
566 * if_fversion and if_csum themselves)
569 /* the GUID, in network order */
571 /* number of GUIDs to use, starting from if_guid */
573 /* the (last 10 characters of) board serial number, in ASCII */
575 /* board mfg date (YYYYMMDD ASCII) */
577 /* last board rework/test date (YYYYMMDD ASCII) */
579 /* logging of error counts, TBD */
581 /* powered on hours, updated at driver unload */
582 __u8 if_powerhour[2];
583 /* ASCII free-form comment field */
585 /* Backwards compatible prefix for longer QLogic Serial Numbers */
587 /* 82 bytes used, min flash size is 128 bytes */
592 * These are the counters implemented in the chip, and are listed in order.
593 * The InterCaps naming is taken straight from the chip spec.
595 struct infinipath_counters {
597 __u64 LBFlowStallCnt;
598 __u64 TxSDmaDescCnt; /* was Reserved1 */
599 __u64 TxUnsupVLErrCnt;
604 __u64 TxMaxMinLenErrCnt;
606 __u64 TxFlowStallCnt;
607 __u64 TxDroppedPktCnt;
608 __u64 RxDroppedPktCnt;
613 __u64 RxMaxMinLenErrCnt;
616 __u64 RxFlowCtrlErrCnt;
617 __u64 RxBadFormatCnt;
618 __u64 RxLinkProblemCnt;
622 __u64 RxTIDFullErrCnt;
623 __u64 RxTIDValidErrCnt;
624 __u64 RxPKeyMismatchCnt;
625 __u64 RxP0HdrEgrOvflCnt;
626 __u64 RxP1HdrEgrOvflCnt;
627 __u64 RxP2HdrEgrOvflCnt;
628 __u64 RxP3HdrEgrOvflCnt;
629 __u64 RxP4HdrEgrOvflCnt;
630 __u64 RxP5HdrEgrOvflCnt;
631 __u64 RxP6HdrEgrOvflCnt;
632 __u64 RxP7HdrEgrOvflCnt;
633 __u64 RxP8HdrEgrOvflCnt;
634 __u64 RxP9HdrEgrOvflCnt; /* was Reserved6 */
635 __u64 RxP10HdrEgrOvflCnt; /* was Reserved7 */
636 __u64 RxP11HdrEgrOvflCnt; /* new for IBA7220 */
637 __u64 RxP12HdrEgrOvflCnt; /* new for IBA7220 */
638 __u64 RxP13HdrEgrOvflCnt; /* new for IBA7220 */
639 __u64 RxP14HdrEgrOvflCnt; /* new for IBA7220 */
640 __u64 RxP15HdrEgrOvflCnt; /* new for IBA7220 */
641 __u64 RxP16HdrEgrOvflCnt; /* new for IBA7220 */
642 __u64 IBStatusChangeCnt;
643 __u64 IBLinkErrRecoveryCnt;
644 __u64 IBLinkDownedCnt;
645 __u64 IBSymbolErrCnt;
646 /* The following are new for IBA7220 */
647 __u64 RxVL15DroppedPktCnt;
648 __u64 RxOtherLocalPhyErrCnt;
649 __u64 PcieRetryBufDiagQwordCnt;
650 __u64 ExcessBufferOvflCnt;
651 __u64 LocalLinkIntegrityErrCnt;
657 * The next set of defines are for packet headers, and chip register
658 * and memory bits that are visible to and/or used by user-mode software
659 * The other bits that are used only by the driver or diags are in
663 /* RcvHdrFlags bits */
664 #define INFINIPATH_RHF_LENGTH_MASK 0x7FF
665 #define INFINIPATH_RHF_LENGTH_SHIFT 0
666 #define INFINIPATH_RHF_RCVTYPE_MASK 0x7
667 #define INFINIPATH_RHF_RCVTYPE_SHIFT 11
668 #define INFINIPATH_RHF_EGRINDEX_MASK 0xFFF
669 #define INFINIPATH_RHF_EGRINDEX_SHIFT 16
670 #define INFINIPATH_RHF_SEQ_MASK 0xF
671 #define INFINIPATH_RHF_SEQ_SHIFT 0
672 #define INFINIPATH_RHF_HDRQ_OFFSET_MASK 0x7FF
673 #define INFINIPATH_RHF_HDRQ_OFFSET_SHIFT 4
674 #define INFINIPATH_RHF_H_ICRCERR 0x80000000
675 #define INFINIPATH_RHF_H_VCRCERR 0x40000000
676 #define INFINIPATH_RHF_H_PARITYERR 0x20000000
677 #define INFINIPATH_RHF_H_LENERR 0x10000000
678 #define INFINIPATH_RHF_H_MTUERR 0x08000000
679 #define INFINIPATH_RHF_H_IHDRERR 0x04000000
680 #define INFINIPATH_RHF_H_TIDERR 0x02000000
681 #define INFINIPATH_RHF_H_MKERR 0x01000000
682 #define INFINIPATH_RHF_H_IBERR 0x00800000
683 #define INFINIPATH_RHF_H_ERR_MASK 0xFF800000
684 #define INFINIPATH_RHF_L_USE_EGR 0x80000000
685 #define INFINIPATH_RHF_L_SWA 0x00008000
686 #define INFINIPATH_RHF_L_SWB 0x00004000
688 /* infinipath header fields */
689 #define INFINIPATH_I_VERS_MASK 0xF
690 #define INFINIPATH_I_VERS_SHIFT 28
691 #define INFINIPATH_I_PORT_MASK 0xF
692 #define INFINIPATH_I_PORT_SHIFT 24
693 #define INFINIPATH_I_TID_MASK 0x7FF
694 #define INFINIPATH_I_TID_SHIFT 13
695 #define INFINIPATH_I_OFFSET_MASK 0x1FFF
696 #define INFINIPATH_I_OFFSET_SHIFT 0
698 /* K_PktFlags bits */
699 #define INFINIPATH_KPF_INTR 0x1
700 #define INFINIPATH_KPF_SUBPORT_MASK 0x3
701 #define INFINIPATH_KPF_SUBPORT_SHIFT 1
703 #define INFINIPATH_MAX_SUBPORT 4
705 /* SendPIO per-buffer control */
706 #define INFINIPATH_SP_TEST 0x40
707 #define INFINIPATH_SP_TESTEBP 0x20
708 #define INFINIPATH_SP_TRIGGER_SHIFT 15
710 /* SendPIOAvail bits */
711 #define INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT 1
712 #define INFINIPATH_SENDPIOAVAIL_CHECK_SHIFT 0
714 /* infinipath header format */
715 struct ipath_header {
717 * Version - 4 bits, Port - 4 bits, TID - 10 bits and Offset -
718 * 14 bits before ECO change ~28 Dec 03. After that, Vers 4,
719 * Port 4, TID 11, offset 13.
721 __le32 ver_port_tid_offset;
726 /* infinipath user message header format.
727 * This structure contains the first 4 fields common to all protocols
728 * that employ infinipath.
730 struct ipath_message_header {
733 /* fields below this point are in host byte order */
734 struct ipath_header iph;
738 /* infinipath ethernet header format */
739 struct ether_header {
742 struct ipath_header iph;
750 /* MUST be of word size due to PIO write requirements */
755 __u8 unused[2]; /* currently unused */
759 /* IB - LRH header consts */
760 #define IPATH_LRH_GRH 0x0003 /* 1. word of IB LRH - next header: GRH */
761 #define IPATH_LRH_BTH 0x0002 /* 1. word of IB LRH - next header: BTH */
764 #define SIZE_OF_CRC 1
766 #define IPATH_DEFAULT_P_KEY 0xFFFF
767 #define IPATH_PERMISSIVE_LID 0xFFFF
768 #define IPATH_AETH_CREDIT_SHIFT 24
769 #define IPATH_AETH_CREDIT_MASK 0x1F
770 #define IPATH_AETH_CREDIT_INVAL 0x1F
771 #define IPATH_PSN_MASK 0xFFFFFF
772 #define IPATH_MSN_MASK 0xFFFFFF
773 #define IPATH_QPN_MASK 0xFFFFFF
774 #define IPATH_MULTICAST_LID_BASE 0xC000
775 #define IPATH_EAGER_TID_ID INFINIPATH_I_TID_MASK
776 #define IPATH_MULTICAST_QPN 0xFFFFFF
778 /* Receive Header Queue: receive type (from infinipath) */
779 #define RCVHQ_RCV_TYPE_EXPECTED 0
780 #define RCVHQ_RCV_TYPE_EAGER 1
781 #define RCVHQ_RCV_TYPE_NON_KD 2
782 #define RCVHQ_RCV_TYPE_ERROR 3
785 /* sub OpCodes - ith4x */
786 #define IPATH_ITH4X_OPCODE_ENCAP 0x81
787 #define IPATH_ITH4X_OPCODE_LID_ARP 0x82
789 #define IPATH_HEADER_QUEUE_WORDS 9
791 /* functions for extracting fields from rcvhdrq entries for the driver.
793 static inline __u32 ipath_hdrget_err_flags(const __le32 * rbuf)
795 return __le32_to_cpu(rbuf[1]) & INFINIPATH_RHF_H_ERR_MASK;
798 static inline __u32 ipath_hdrget_rcv_type(const __le32 * rbuf)
800 return (__le32_to_cpu(rbuf[0]) >> INFINIPATH_RHF_RCVTYPE_SHIFT)
801 & INFINIPATH_RHF_RCVTYPE_MASK;
804 static inline __u32 ipath_hdrget_length_in_bytes(const __le32 * rbuf)
806 return ((__le32_to_cpu(rbuf[0]) >> INFINIPATH_RHF_LENGTH_SHIFT)
807 & INFINIPATH_RHF_LENGTH_MASK) << 2;
810 static inline __u32 ipath_hdrget_index(const __le32 * rbuf)
812 return (__le32_to_cpu(rbuf[0]) >> INFINIPATH_RHF_EGRINDEX_SHIFT)
813 & INFINIPATH_RHF_EGRINDEX_MASK;
816 static inline __u32 ipath_hdrget_seq(const __le32 *rbuf)
818 return (__le32_to_cpu(rbuf[1]) >> INFINIPATH_RHF_SEQ_SHIFT)
819 & INFINIPATH_RHF_SEQ_MASK;
822 static inline __u32 ipath_hdrget_offset(const __le32 *rbuf)
824 return (__le32_to_cpu(rbuf[1]) >> INFINIPATH_RHF_HDRQ_OFFSET_SHIFT)
825 & INFINIPATH_RHF_HDRQ_OFFSET_MASK;
828 static inline __u32 ipath_hdrget_use_egr_buf(const __le32 *rbuf)
830 return __le32_to_cpu(rbuf[0]) & INFINIPATH_RHF_L_USE_EGR;
833 static inline __u32 ipath_hdrget_ipath_ver(__le32 hdrword)
835 return (__le32_to_cpu(hdrword) >> INFINIPATH_I_VERS_SHIFT)
836 & INFINIPATH_I_VERS_MASK;
839 #endif /* _IPATH_COMMON_H */