drivers/infiniband/hw/ehca/ehca_qp.c

   1 /*
   2  *  IBM eServer eHCA Infiniband device driver for Linux on POWER
   3  *
   4  *  QP functions
   5  *
   6  *  Authors: Joachim Fenkes <fenkes@de.ibm.com>
   7  *           Stefan Roscher <stefan.roscher@de.ibm.com>
   8  *           Waleri Fomin <fomin@de.ibm.com>
   9  *           Hoang-Nam Nguyen <hnguyen@de.ibm.com>
  10  *           Reinhard Ernst <rernst@de.ibm.com>
  11  *           Heiko J Schick <schickhj@de.ibm.com>
  12  *
  13  *  Copyright (c) 2005 IBM Corporation
  14  *
  15  *  All rights reserved.
  16  *
  17  *  This source code is distributed under a dual license of GPL v2.0 and OpenIB
  18  *  BSD.
  19  *
  20  * OpenIB BSD License
  21  *
  22  * Redistribution and use in source and binary forms, with or without
  23  * modification, are permitted provided that the following conditions are met:
  24  *
  25  * Redistributions of source code must retain the above copyright notice, this
  26  * list of conditions and the following disclaimer.
  27  *
  28  * Redistributions in binary form must reproduce the above copyright notice,
  29  * this list of conditions and the following disclaimer in the documentation
  30  * and/or other materials
  31  * provided with the distribution.
  32  *
  33  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  34  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  35  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  36  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  37  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  38  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  39  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  40  * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
  41  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  42  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  43  * POSSIBILITY OF SUCH DAMAGE.
  44  */
  45
  46
  47 #include <asm/current.h>
  48
  49 #include "ehca_classes.h"
  50 #include "ehca_tools.h"
  51 #include "ehca_qes.h"
  52 #include "ehca_iverbs.h"
  53 #include "hcp_if.h"
  54 #include "hipz_fns.h"
  55
  56 static struct kmem_cache *qp_cache;
  57
  58 /*
  59  * attributes not supported by query qp
  60  */
  61 #define QP_ATTR_QUERY_NOT_SUPPORTED (IB_QP_MAX_DEST_RD_ATOMIC | \
  62                                      IB_QP_MAX_QP_RD_ATOMIC   | \
  63                                      IB_QP_ACCESS_FLAGS       | \
  64                                      IB_QP_EN_SQD_ASYNC_NOTIFY)
  65
  66 /*
  67  * ehca (internal) qp state values
  68  */
  69 enum ehca_qp_state {
  70         EHCA_QPS_RESET = 1,
  71         EHCA_QPS_INIT = 2,
  72         EHCA_QPS_RTR = 3,
  73         EHCA_QPS_RTS = 5,
  74         EHCA_QPS_SQD = 6,
  75         EHCA_QPS_SQE = 8,
  76         EHCA_QPS_ERR = 128
  77 };
  78
  79 /*
  80  * qp state transitions as defined by IB Arch Rel 1.1 page 431
  81  */
  82 enum ib_qp_statetrans {
  83         IB_QPST_ANY2RESET,
  84         IB_QPST_ANY2ERR,
  85         IB_QPST_RESET2INIT,
  86         IB_QPST_INIT2RTR,
  87         IB_QPST_INIT2INIT,
  88         IB_QPST_RTR2RTS,
  89         IB_QPST_RTS2SQD,
  90         IB_QPST_RTS2RTS,
  91         IB_QPST_SQD2RTS,
  92         IB_QPST_SQE2RTS,
  93         IB_QPST_SQD2SQD,
  94         IB_QPST_MAX     /* nr of transitions, this must be last!!! */
  95 };
  96
  97 /*
  98  * ib2ehca_qp_state maps IB to ehca qp_state
  99  * returns ehca qp state corresponding to given ib qp state
 100  */
 101 static inline enum ehca_qp_state ib2ehca_qp_state(enum ib_qp_state ib_qp_state)
 102 {
 103         switch (ib_qp_state) {
 104         case IB_QPS_RESET:
 105                 return EHCA_QPS_RESET;
 106         case IB_QPS_INIT:
 107                 return EHCA_QPS_INIT;
 108         case IB_QPS_RTR:
 109                 return EHCA_QPS_RTR;
 110         case IB_QPS_RTS:
 111                 return EHCA_QPS_RTS;
 112         case IB_QPS_SQD:
 113                 return EHCA_QPS_SQD;
 114         case IB_QPS_SQE:
 115                 return EHCA_QPS_SQE;
 116         case IB_QPS_ERR:
 117                 return EHCA_QPS_ERR;
 118         default:
 119                 ehca_gen_err("invalid ib_qp_state=%x", ib_qp_state);
 120                 return -EINVAL;
 121         }
 122 }
 123
 124 /*
 125  * ehca2ib_qp_state maps ehca to IB qp_state
 126  * returns ib qp state corresponding to given ehca qp state
 127  */
 128 static inline enum ib_qp_state ehca2ib_qp_state(enum ehca_qp_state
 129                                                 ehca_qp_state)
 130 {
 131         switch (ehca_qp_state) {
 132         case EHCA_QPS_RESET:
 133                 return IB_QPS_RESET;
 134         case EHCA_QPS_INIT:
 135                 return IB_QPS_INIT;
 136         case EHCA_QPS_RTR:
 137                 return IB_QPS_RTR;
 138         case EHCA_QPS_RTS:
 139                 return IB_QPS_RTS;
 140         case EHCA_QPS_SQD:
 141                 return IB_QPS_SQD;
 142         case EHCA_QPS_SQE:
 143                 return IB_QPS_SQE;
 144         case EHCA_QPS_ERR:
 145                 return IB_QPS_ERR;
 146         default:
 147                 ehca_gen_err("invalid ehca_qp_state=%x", ehca_qp_state);
 148                 return -EINVAL;
 149         }
 150 }
 151
 152 /*
 153  * ehca_qp_type used as index for req_attr and opt_attr of
 154  * struct ehca_modqp_statetrans
 155  */
 156 enum ehca_qp_type {
 157         QPT_RC = 0,
 158         QPT_UC = 1,
 159         QPT_UD = 2,
 160         QPT_SQP = 3,
 161         QPT_MAX
 162 };
 163
 164 /*
 165  * ib2ehcaqptype maps Ib to ehca qp_type
 166  * returns ehca qp type corresponding to ib qp type
 167  */
 168 static inline enum ehca_qp_type ib2ehcaqptype(enum ib_qp_type ibqptype)
 169 {
 170         switch (ibqptype) {
 171         case IB_QPT_SMI:
 172         case IB_QPT_GSI:
 173                 return QPT_SQP;
 174         case IB_QPT_RC:
 175                 return QPT_RC;
 176         case IB_QPT_UC:
 177                 return QPT_UC;
 178         case IB_QPT_UD:
 179                 return QPT_UD;
 180         default:
 181                 ehca_gen_err("Invalid ibqptype=%x", ibqptype);
 182                 return -EINVAL;
 183         }
 184 }
 185
 186 static inline enum ib_qp_statetrans get_modqp_statetrans(int ib_fromstate,
 187                                                          int ib_tostate)
 188 {
 189         int index = -EINVAL;
 190         switch (ib_tostate) {
 191         case IB_QPS_RESET:
 192                 index = IB_QPST_ANY2RESET;
 193                 break;
 194         case IB_QPS_INIT:
 195                 switch (ib_fromstate) {
 196                 case IB_QPS_RESET:
 197                         index = IB_QPST_RESET2INIT;
 198                         break;
 199                 case IB_QPS_INIT:
 200                         index = IB_QPST_INIT2INIT;
 201                         break;
 202                 }
 203                 break;
 204         case IB_QPS_RTR:
 205                 if (ib_fromstate == IB_QPS_INIT)
 206                         index = IB_QPST_INIT2RTR;
 207                 break;
 208         case IB_QPS_RTS:
 209                 switch (ib_fromstate) {
 210                 case IB_QPS_RTR:
 211                         index = IB_QPST_RTR2RTS;
 212                         break;
 213                 case IB_QPS_RTS:
 214                         index = IB_QPST_RTS2RTS;
 215                         break;
 216                 case IB_QPS_SQD:
 217                         index = IB_QPST_SQD2RTS;
 218                         break;
 219                 case IB_QPS_SQE:
 220                         index = IB_QPST_SQE2RTS;
 221                         break;
 222                 }
 223                 break;
 224         case IB_QPS_SQD:
 225                 if (ib_fromstate == IB_QPS_RTS)
 226                         index = IB_QPST_RTS2SQD;
 227                 break;
 228         case IB_QPS_SQE:
 229                 break;
 230         case IB_QPS_ERR:
 231                 index = IB_QPST_ANY2ERR;
 232                 break;
 233         default:
 234                 break;
 235         }
 236         return index;
 237 }
 238
 239 /*
 240  * ibqptype2servicetype returns hcp service type corresponding to given
 241  * ib qp type used by create_qp()
 242  */
 243 static inline int ibqptype2servicetype(enum ib_qp_type ibqptype)
 244 {
 245         switch (ibqptype) {
 246         case IB_QPT_SMI:
 247         case IB_QPT_GSI:
 248                 return ST_UD;
 249         case IB_QPT_RC:
 250                 return ST_RC;
 251         case IB_QPT_UC:
 252                 return ST_UC;
 253         case IB_QPT_UD:
 254                 return ST_UD;
 255         case IB_QPT_RAW_IPV6:
 256                 return -EINVAL;
 257         case IB_QPT_RAW_ETY:
 258                 return -EINVAL;
 259         default:
 260                 ehca_gen_err("Invalid ibqptype=%x", ibqptype);
 261                 return -EINVAL;
 262         }
 263 }
 264
 265 /*
 266  * init userspace queue info from ipz_queue data
 267  */
 268 static inline void queue2resp(struct ipzu_queue_resp *resp,
 269                               struct ipz_queue *queue)
 270 {
 271         resp->qe_size = queue->qe_size;
 272         resp->act_nr_of_sg = queue->act_nr_of_sg;
 273         resp->queue_length = queue->queue_length;
 274         resp->pagesize = queue->pagesize;
 275         resp->toggle_state = queue->toggle_state;
 276 }
 277
 278 static inline int ll_qp_msg_size(int nr_sge)
 279 {
 280         return 128 << nr_sge;
 281 }
 282
 283 /*
 284  * init_qp_queue initializes/constructs r/squeue and registers queue pages.
 285  */
 286 static inline int init_qp_queue(struct ehca_shca *shca,
 287                                 struct ehca_qp *my_qp,
 288                                 struct ipz_queue *queue,
 289                                 int q_type,
 290                                 u64 expected_hret,
 291                                 int nr_q_pages,
 292                                 int wqe_size,
 293                                 int nr_sges)
 294 {
 295         int ret, cnt, ipz_rc;
 296         void *vpage;
 297         u64 rpage, h_ret;
 298         struct ib_device *ib_dev = &shca->ib_device;
 299         struct ipz_adapter_handle ipz_hca_handle = shca->ipz_hca_handle;
 300
 301         if (!nr_q_pages)
 302                 return 0;
 303
 304         ipz_rc = ipz_queue_ctor(queue, nr_q_pages, EHCA_PAGESIZE,
 305                                 wqe_size, nr_sges);
 306         if (!ipz_rc) {
 307                 ehca_err(ib_dev, "Cannot allocate page for queue. ipz_rc=%x",
 308                          ipz_rc);
 309                 return -EBUSY;
 310         }
 311
 312         /* register queue pages */
 313         for (cnt = 0; cnt < nr_q_pages; cnt++) {
 314                 vpage = ipz_qpageit_get_inc(queue);
 315                 if (!vpage) {
 316                         ehca_err(ib_dev, "ipz_qpageit_get_inc() "
 317                                  "failed p_vpage= %p", vpage);
 318                         ret = -EINVAL;
 319                         goto init_qp_queue1;
 320                 }
 321                 rpage = virt_to_abs(vpage);
 322
 323                 h_ret = hipz_h_register_rpage_qp(ipz_hca_handle,
 324                                                  my_qp->ipz_qp_handle,
 325                                                  NULL, 0, q_type,
 326                                                  rpage, 1,
 327                                                  my_qp->galpas.kernel);
 328                 if (cnt == (nr_q_pages - 1)) {  /* last page! */
 329                         if (h_ret != expected_hret) {
 330                                 ehca_err(ib_dev, "hipz_qp_register_rpage() "
 331                                          "h_ret= %lx ", h_ret);
 332                                 ret = ehca2ib_return_code(h_ret);
 333                                 goto init_qp_queue1;
 334                         }
 335                         vpage = ipz_qpageit_get_inc(&my_qp->ipz_rqueue);
 336                         if (vpage) {
 337                                 ehca_err(ib_dev, "ipz_qpageit_get_inc() "
 338                                          "should not succeed vpage=%p", vpage);
 339                                 ret = -EINVAL;
 340                                 goto init_qp_queue1;
 341                         }
 342                 } else {
 343                         if (h_ret != H_PAGE_REGISTERED) {
 344                                 ehca_err(ib_dev, "hipz_qp_register_rpage() "
 345                                          "h_ret= %lx ", h_ret);
 346                                 ret = ehca2ib_return_code(h_ret);
 347                                 goto init_qp_queue1;
 348                         }
 349                 }
 350         }
 351
 352         ipz_qeit_reset(queue);
 353
 354         return 0;
 355
 356 init_qp_queue1:
 357         ipz_queue_dtor(queue);
 358         return ret;
 359 }
 360
 361 /*
 362  * Create an ib_qp struct that is either a QP or an SRQ, depending on
 363  * the value of the is_srq parameter. If init_attr and srq_init_attr share
 364  * fields, the field out of init_attr is used.
 365  */
 366 struct ehca_qp *internal_create_qp(struct ib_pd *pd,
 367                                    struct ib_qp_init_attr *init_attr,
 368                                    struct ib_srq_init_attr *srq_init_attr,
 369                                    struct ib_udata *udata, int is_srq)
 370 {
 371         struct ehca_qp *my_qp;
 372         struct ehca_pd *my_pd = container_of(pd, struct ehca_pd, ib_pd);
 373         struct ehca_shca *shca = container_of(pd->device, struct ehca_shca,
 374                                               ib_device);
 375         struct ib_ucontext *context = NULL;
 376         u64 h_ret;
 377         int is_llqp = 0, has_srq = 0;
 378         int qp_type, max_send_sge, max_recv_sge, ret;
 379
 380         /* h_call's out parameters */
 381         struct ehca_alloc_qp_parms parms;
 382         u32 swqe_size = 0, rwqe_size = 0, ib_qp_num;
 383         unsigned long flags;
 384
 385         memset(&parms, 0, sizeof(parms));
 386         qp_type = init_attr->qp_type;
 387
 388         if (init_attr->sq_sig_type != IB_SIGNAL_REQ_WR &&
 389                 init_attr->sq_sig_type != IB_SIGNAL_ALL_WR) {
 390                 ehca_err(pd->device, "init_attr->sg_sig_type=%x not allowed",
 391                          init_attr->sq_sig_type);
 392                 return ERR_PTR(-EINVAL);
 393         }
 394
 395         /* save LLQP info */
 396         if (qp_type & 0x80) {
 397                 is_llqp = 1;
 398                 parms.ext_type = EQPT_LLQP;
 399                 parms.ll_comp_flags = qp_type & LLQP_COMP_MASK;
 400         }
 401         qp_type &= 0x1F;
 402         init_attr->qp_type &= 0x1F;
 403
 404         /* handle SRQ base QPs */
 405         if (init_attr->srq) {
 406                 struct ehca_qp *my_srq =
 407                         container_of(init_attr->srq, struct ehca_qp, ib_srq);
 408
 409                 has_srq = 1;
 410                 parms.ext_type = EQPT_SRQBASE;
 411                 parms.srq_qpn = my_srq->real_qp_num;
 412                 parms.srq_token = my_srq->token;
 413         }
 414
 415         if (is_llqp && has_srq) {
 416                 ehca_err(pd->device, "LLQPs can't have an SRQ");
 417                 return ERR_PTR(-EINVAL);
 418         }
 419
 420         /* handle SRQs */
 421         if (is_srq) {
 422                 parms.ext_type = EQPT_SRQ;
 423                 parms.srq_limit = srq_init_attr->attr.srq_limit;
 424                 if (init_attr->cap.max_recv_sge > 3) {
 425                         ehca_err(pd->device, "no more than three SGEs "
 426                                  "supported for SRQ  pd=%p  max_sge=%x",
 427                                  pd, init_attr->cap.max_recv_sge);
 428                         return ERR_PTR(-EINVAL);
 429                 }
 430         }
 431
 432         /* check QP type */
 433         if (qp_type != IB_QPT_UD &&
 434             qp_type != IB_QPT_UC &&
 435             qp_type != IB_QPT_RC &&
 436             qp_type != IB_QPT_SMI &&
 437             qp_type != IB_QPT_GSI) {
 438                 ehca_err(pd->device, "wrong QP Type=%x", qp_type);
 439                 return ERR_PTR(-EINVAL);
 440         }
 441
 442         if (is_llqp) {
 443                 switch (qp_type) {
 444                 case IB_QPT_RC:
 445                         if ((init_attr->cap.max_send_wr > 255) ||
 446                             (init_attr->cap.max_recv_wr > 255)) {
 447                                 ehca_err(pd->device,
 448                                          "Invalid Number of max_sq_wr=%x "
 449                                          "or max_rq_wr=%x for RC LLQP",
 450                                          init_attr->cap.max_send_wr,
 451                                          init_attr->cap.max_recv_wr);
 452                                 return ERR_PTR(-EINVAL);
 453                         }
 454                         break;
 455                 case IB_QPT_UD:
 456                         if (!EHCA_BMASK_GET(HCA_CAP_UD_LL_QP, shca->hca_cap)) {
 457                                 ehca_err(pd->device, "UD LLQP not supported "
 458                                          "by this adapter");
 459                                 return ERR_PTR(-ENOSYS);
 460                         }
 461                         if (!(init_attr->cap.max_send_sge <= 5
 462                             && init_attr->cap.max_send_sge >= 1
 463                             && init_attr->cap.max_recv_sge <= 5
 464                             && init_attr->cap.max_recv_sge >= 1)) {
 465                                 ehca_err(pd->device,
 466                                          "Invalid Number of max_send_sge=%x "
 467                                          "or max_recv_sge=%x for UD LLQP",
 468                                          init_attr->cap.max_send_sge,
 469                                          init_attr->cap.max_recv_sge);
 470                                 return ERR_PTR(-EINVAL);
 471                         } else if (init_attr->cap.max_send_wr > 255) {
 472                                 ehca_err(pd->device,
 473                                          "Invalid Number of "
 474                                          "ax_send_wr=%x for UD QP_TYPE=%x",
 475                                          init_attr->cap.max_send_wr, qp_type);
 476                                 return ERR_PTR(-EINVAL);
 477                         }
 478                         break;
 479                 default:
 480                         ehca_err(pd->device, "unsupported LL QP Type=%x",
 481                                  qp_type);
 482                         return ERR_PTR(-EINVAL);
 483                         break;
 484                 }
 485         }
 486
 487         if (pd->uobject && udata)
 488                 context = pd->uobject->context;
 489
 490         my_qp = kmem_cache_zalloc(qp_cache, GFP_KERNEL);
 491         if (!my_qp) {
 492                 ehca_err(pd->device, "pd=%p not enough memory to alloc qp", pd);
 493                 return ERR_PTR(-ENOMEM);
 494         }
 495
 496         spin_lock_init(&my_qp->spinlock_s);
 497         spin_lock_init(&my_qp->spinlock_r);
 498         my_qp->qp_type = qp_type;
 499         my_qp->ext_type = parms.ext_type;
 500
 501         if (init_attr->recv_cq)
 502                 my_qp->recv_cq =
 503                         container_of(init_attr->recv_cq, struct ehca_cq, ib_cq);
 504         if (init_attr->send_cq)
 505                 my_qp->send_cq =
 506                         container_of(init_attr->send_cq, struct ehca_cq, ib_cq);
 507
 508         do {
 509                 if (!idr_pre_get(&ehca_qp_idr, GFP_KERNEL)) {
 510                         ret = -ENOMEM;
 511                         ehca_err(pd->device, "Can't reserve idr resources.");
 512                         goto create_qp_exit0;
 513                 }
 514
 515                 spin_lock_irqsave(&ehca_qp_idr_lock, flags);
 516                 ret = idr_get_new(&ehca_qp_idr, my_qp, &my_qp->token);
 517                 spin_unlock_irqrestore(&ehca_qp_idr_lock, flags);
 518
 519         } while (ret == -EAGAIN);
 520
 521         if (ret) {
 522                 ret = -ENOMEM;
 523                 ehca_err(pd->device, "Can't allocate new idr entry.");
 524                 goto create_qp_exit0;
 525         }
 526
 527         parms.servicetype = ibqptype2servicetype(qp_type);
 528         if (parms.servicetype < 0) {
 529                 ret = -EINVAL;
 530                 ehca_err(pd->device, "Invalid qp_type=%x", qp_type);
 531                 goto create_qp_exit0;
 532         }
 533
 534         if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR)
 535                 parms.sigtype = HCALL_SIGT_EVERY;
 536         else
 537                 parms.sigtype = HCALL_SIGT_BY_WQE;
 538
 539         /* UD_AV CIRCUMVENTION */
 540         max_send_sge = init_attr->cap.max_send_sge;
 541         max_recv_sge = init_attr->cap.max_recv_sge;
 542         if (parms.servicetype == ST_UD && !is_llqp) {
 543                 max_send_sge += 2;
 544                 max_recv_sge += 2;
 545         }
 546
 547         parms.token = my_qp->token;
 548         parms.eq_handle = shca->eq.ipz_eq_handle;
 549         parms.pd = my_pd->fw_pd;
 550         if (my_qp->send_cq)
 551                 parms.send_cq_handle = my_qp->send_cq->ipz_cq_handle;
 552         if (my_qp->recv_cq)
 553                 parms.recv_cq_handle = my_qp->recv_cq->ipz_cq_handle;
 554
 555         parms.max_send_wr = init_attr->cap.max_send_wr;
 556         parms.max_recv_wr = init_attr->cap.max_recv_wr;
 557         parms.max_send_sge = max_send_sge;
 558         parms.max_recv_sge = max_recv_sge;
 559
 560         h_ret = hipz_h_alloc_resource_qp(shca->ipz_hca_handle, &parms);
 561         if (h_ret != H_SUCCESS) {
 562                 ehca_err(pd->device, "h_alloc_resource_qp() failed h_ret=%lx",
 563                          h_ret);
 564                 ret = ehca2ib_return_code(h_ret);
 565                 goto create_qp_exit1;
 566         }
 567
 568         ib_qp_num = my_qp->real_qp_num = parms.real_qp_num;
 569         my_qp->ipz_qp_handle = parms.qp_handle;
 570         my_qp->galpas = parms.galpas;
 571
 572         switch (qp_type) {
 573         case IB_QPT_RC:
 574                 if (!is_llqp) {
 575                         swqe_size = offsetof(struct ehca_wqe, u.nud.sg_list[
 576                                              (parms.act_nr_send_sges)]);
 577                         rwqe_size = offsetof(struct ehca_wqe, u.nud.sg_list[
 578                                              (parms.act_nr_recv_sges)]);
 579                 } else { /* for LLQP we need to use msg size, not wqe size */
 580                         swqe_size = ll_qp_msg_size(max_send_sge);
 581                         rwqe_size = ll_qp_msg_size(max_recv_sge);
 582                         parms.act_nr_send_sges = 1;
 583                         parms.act_nr_recv_sges = 1;
 584                 }
 585                 break;
 586         case IB_QPT_UC:
 587                 swqe_size = offsetof(struct ehca_wqe,
 588                                      u.nud.sg_list[parms.act_nr_send_sges]);
 589                 rwqe_size = offsetof(struct ehca_wqe,
 590                                      u.nud.sg_list[parms.act_nr_recv_sges]);
 591                 break;
 592
 593         case IB_QPT_UD:
 594         case IB_QPT_GSI:
 595         case IB_QPT_SMI:
 596                 if (is_llqp) {
 597                         swqe_size = ll_qp_msg_size(parms.act_nr_send_sges);
 598                         rwqe_size = ll_qp_msg_size(parms.act_nr_recv_sges);
 599                         parms.act_nr_send_sges = 1;
 600                         parms.act_nr_recv_sges = 1;
 601                 } else {
 602                         /* UD circumvention */
 603                         parms.act_nr_send_sges -= 2;
 604                         parms.act_nr_recv_sges -= 2;
 605                         swqe_size = offsetof(struct ehca_wqe,
 606                                              u.ud_av.sg_list[parms.act_nr_send_sges]);
 607                         rwqe_size = offsetof(struct ehca_wqe,
 608                                              u.ud_av.sg_list[parms.act_nr_recv_sges]);
 609                 }
 610
 611                 if (IB_QPT_GSI == qp_type || IB_QPT_SMI == qp_type) {
 612                         parms.act_nr_send_wqes = init_attr->cap.max_send_wr;
 613                         parms.act_nr_recv_wqes = init_attr->cap.max_recv_wr;
 614                         parms.act_nr_send_sges = init_attr->cap.max_send_sge;
 615                         parms.act_nr_recv_sges = init_attr->cap.max_recv_sge;
 616                         ib_qp_num = (qp_type == IB_QPT_SMI) ? 0 : 1;
 617                 }
 618
 619                 break;
 620
 621         default:
 622                 break;
 623         }
 624
 625         /* initialize r/squeue and register queue pages */
 626         if (HAS_SQ(my_qp)) {
 627                 ret = init_qp_queue(
 628                         shca, my_qp, &my_qp->ipz_squeue, 0,
 629                         HAS_RQ(my_qp) ? H_PAGE_REGISTERED : H_SUCCESS,
 630                         parms.nr_sq_pages, swqe_size,
 631                         parms.act_nr_send_sges);
 632                 if (ret) {
 633                         ehca_err(pd->device, "Couldn't initialize squeue "
 634                                  "and pages  ret=%x", ret);
 635                         goto create_qp_exit2;
 636                 }
 637         }
 638
 639         if (HAS_RQ(my_qp)) {
 640                 ret = init_qp_queue(
 641                         shca, my_qp, &my_qp->ipz_rqueue, 1,
 642                         H_SUCCESS, parms.nr_rq_pages, rwqe_size,
 643                         parms.act_nr_recv_sges);
 644                 if (ret) {
 645                         ehca_err(pd->device, "Couldn't initialize rqueue "
 646                                  "and pages ret=%x", ret);
 647                         goto create_qp_exit3;
 648                 }
 649         }
 650
 651         if (is_srq) {
 652                 my_qp->ib_srq.pd = &my_pd->ib_pd;
 653                 my_qp->ib_srq.device = my_pd->ib_pd.device;
 654
 655                 my_qp->ib_srq.srq_context = init_attr->qp_context;
 656                 my_qp->ib_srq.event_handler = init_attr->event_handler;
 657         } else {
 658                 my_qp->ib_qp.qp_num = ib_qp_num;
 659                 my_qp->ib_qp.pd = &my_pd->ib_pd;
 660                 my_qp->ib_qp.device = my_pd->ib_pd.device;
 661
 662                 my_qp->ib_qp.recv_cq = init_attr->recv_cq;
 663                 my_qp->ib_qp.send_cq = init_attr->send_cq;
 664
 665                 my_qp->ib_qp.qp_type = qp_type;
 666                 my_qp->ib_qp.srq = init_attr->srq;
 667
 668                 my_qp->ib_qp.qp_context = init_attr->qp_context;
 669                 my_qp->ib_qp.event_handler = init_attr->event_handler;
 670         }
 671
 672         init_attr->cap.max_inline_data = 0; /* not supported yet */
 673         init_attr->cap.max_recv_sge = parms.act_nr_recv_sges;
 674         init_attr->cap.max_recv_wr = parms.act_nr_recv_wqes;
 675         init_attr->cap.max_send_sge = parms.act_nr_send_sges;
 676         init_attr->cap.max_send_wr = parms.act_nr_send_wqes;
 677         my_qp->init_attr = *init_attr;
 678
 679         /* NOTE: define_apq0() not supported yet */
 680         if (qp_type == IB_QPT_GSI) {
 681                 h_ret = ehca_define_sqp(shca, my_qp, init_attr);
 682                 if (h_ret != H_SUCCESS) {
 683                         ehca_err(pd->device, "ehca_define_sqp() failed rc=%lx",
 684                                  h_ret);
 685                         ret = ehca2ib_return_code(h_ret);
 686                         goto create_qp_exit4;
 687                 }
 688         }
 689
 690         if (my_qp->send_cq) {
 691                 ret = ehca_cq_assign_qp(my_qp->send_cq, my_qp);
 692                 if (ret) {
 693                         ehca_err(pd->device, "Couldn't assign qp to send_cq ret=%x",
 694                                  ret);
 695                         goto create_qp_exit4;
 696                 }
 697         }
 698
 699         /* copy queues, galpa data to user space */
 700         if (context && udata) {
 701                 struct ehca_create_qp_resp resp;
 702                 memset(&resp, 0, sizeof(resp));
 703
 704                 resp.qp_num = my_qp->real_qp_num;
 705                 resp.token = my_qp->token;
 706                 resp.qp_type = my_qp->qp_type;
 707                 resp.ext_type = my_qp->ext_type;
 708                 resp.qkey = my_qp->qkey;
 709                 resp.real_qp_num = my_qp->real_qp_num;
 710                 if (HAS_SQ(my_qp))
 711                         queue2resp(&resp.ipz_squeue, &my_qp->ipz_squeue);
 712                 if (HAS_RQ(my_qp))
 713                         queue2resp(&resp.ipz_rqueue, &my_qp->ipz_rqueue);
 714
 715                 if (ib_copy_to_udata(udata, &resp, sizeof resp)) {
 716                         ehca_err(pd->device, "Copy to udata failed");
 717                         ret = -EINVAL;
 718                         goto create_qp_exit4;
 719                 }
 720         }
 721
 722         return my_qp;
 723
 724 create_qp_exit4:
 725         if (HAS_RQ(my_qp))
 726                 ipz_queue_dtor(&my_qp->ipz_rqueue);
 727
 728 create_qp_exit3:
 729         if (HAS_SQ(my_qp))
 730                 ipz_queue_dtor(&my_qp->ipz_squeue);
 731
 732 create_qp_exit2:
 733         hipz_h_destroy_qp(shca->ipz_hca_handle, my_qp);
 734
 735 create_qp_exit1:
 736         spin_lock_irqsave(&ehca_qp_idr_lock, flags);
 737         idr_remove(&ehca_qp_idr, my_qp->token);
 738         spin_unlock_irqrestore(&ehca_qp_idr_lock, flags);
 739
 740 create_qp_exit0:
 741         kmem_cache_free(qp_cache, my_qp);
 742         return ERR_PTR(ret);
 743 }
 744
 745 struct ib_qp *ehca_create_qp(struct ib_pd *pd,
 746                              struct ib_qp_init_attr *qp_init_attr,
 747                              struct ib_udata *udata)
 748 {
 749         struct ehca_qp *ret;
 750
 751         ret = internal_create_qp(pd, qp_init_attr, NULL, udata, 0);
 752         return IS_ERR(ret) ? (struct ib_qp *) ret : &ret->ib_qp;
 753 }
 754
 755 int internal_destroy_qp(struct ib_device *dev, struct ehca_qp *my_qp,
 756                         struct ib_uobject *uobject);
 757
 758 struct ib_srq *ehca_create_srq(struct ib_pd *pd,
 759                                struct ib_srq_init_attr *srq_init_attr,
 760                                struct ib_udata *udata)
 761 {
 762         struct ib_qp_init_attr qp_init_attr;
 763         struct ehca_qp *my_qp;
 764         struct ib_srq *ret;
 765         struct ehca_shca *shca = container_of(pd->device, struct ehca_shca,
 766                                               ib_device);
 767         struct hcp_modify_qp_control_block *mqpcb;
 768         u64 hret, update_mask;
 769
 770         /* For common attributes, internal_create_qp() takes its info
 771          * out of qp_init_attr, so copy all common attrs there.
 772          */
 773         memset(&qp_init_attr, 0, sizeof(qp_init_attr));
 774         qp_init_attr.event_handler = srq_init_attr->event_handler;
 775         qp_init_attr.qp_context = srq_init_attr->srq_context;
 776         qp_init_attr.sq_sig_type = IB_SIGNAL_ALL_WR;
 777         qp_init_attr.qp_type = IB_QPT_RC;
 778         qp_init_attr.cap.max_recv_wr = srq_init_attr->attr.max_wr;
 779         qp_init_attr.cap.max_recv_sge = srq_init_attr->attr.max_sge;
 780
 781         my_qp = internal_create_qp(pd, &qp_init_attr, srq_init_attr, udata, 1);
 782         if (IS_ERR(my_qp))
 783                 return (struct ib_srq *) my_qp;
 784
 785         /* copy back return values */
 786         srq_init_attr->attr.max_wr = qp_init_attr.cap.max_recv_wr;
 787         srq_init_attr->attr.max_sge = qp_init_attr.cap.max_recv_sge;
 788
 789         /* drive SRQ into RTR state */
 790         mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
 791         if (!mqpcb) {
 792                 ehca_err(pd->device, "Could not get zeroed page for mqpcb "
 793                          "ehca_qp=%p qp_num=%x ", my_qp, my_qp->real_qp_num);
 794                 ret = ERR_PTR(-ENOMEM);
 795                 goto create_srq1;
 796         }
 797
 798         mqpcb->qp_state = EHCA_QPS_INIT;
 799         mqpcb->prim_phys_port = 1;
 800         update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
 801         hret = hipz_h_modify_qp(shca->ipz_hca_handle,
 802                                 my_qp->ipz_qp_handle,
 803                                 &my_qp->pf,
 804                                 update_mask,
 805                                 mqpcb, my_qp->galpas.kernel);
 806         if (hret != H_SUCCESS) {
 807                 ehca_err(pd->device, "Could not modify SRQ to INIT"
 808                          "ehca_qp=%p qp_num=%x hret=%lx",
 809                          my_qp, my_qp->real_qp_num, hret);
 810                 goto create_srq2;
 811         }
 812
 813         mqpcb->qp_enable = 1;
 814         update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_ENABLE, 1);
 815         hret = hipz_h_modify_qp(shca->ipz_hca_handle,
 816                                 my_qp->ipz_qp_handle,
 817                                 &my_qp->pf,
 818                                 update_mask,
 819                                 mqpcb, my_qp->galpas.kernel);
 820         if (hret != H_SUCCESS) {
 821                 ehca_err(pd->device, "Could not enable SRQ"
 822                          "ehca_qp=%p qp_num=%x hret=%lx",
 823                          my_qp, my_qp->real_qp_num, hret);
 824                 goto create_srq2;
 825         }
 826
 827         mqpcb->qp_state  = EHCA_QPS_RTR;
 828         update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
 829         hret = hipz_h_modify_qp(shca->ipz_hca_handle,
 830                                 my_qp->ipz_qp_handle,
 831                                 &my_qp->pf,
 832                                 update_mask,
 833                                 mqpcb, my_qp->galpas.kernel);
 834         if (hret != H_SUCCESS) {
 835                 ehca_err(pd->device, "Could not modify SRQ to RTR"
 836                          "ehca_qp=%p qp_num=%x hret=%lx",
 837                          my_qp, my_qp->real_qp_num, hret);
 838                 goto create_srq2;
 839         }
 840
 841         return &my_qp->ib_srq;
 842
 843 create_srq2:
 844         ret = ERR_PTR(ehca2ib_return_code(hret));
 845         ehca_free_fw_ctrlblock(mqpcb);
 846
 847 create_srq1:
 848         internal_destroy_qp(pd->device, my_qp, my_qp->ib_srq.uobject);
 849
 850         return ret;
 851 }
 852
 853 /*
 854  * prepare_sqe_rts called by internal_modify_qp() at trans sqe -> rts
 855  * set purge bit of bad wqe and subsequent wqes to avoid reentering sqe
 856  * returns total number of bad wqes in bad_wqe_cnt
 857  */
 858 static int prepare_sqe_rts(struct ehca_qp *my_qp, struct ehca_shca *shca,
 859                            int *bad_wqe_cnt)
 860 {
 861         u64 h_ret;
 862         struct ipz_queue *squeue;
 863         void *bad_send_wqe_p, *bad_send_wqe_v;
 864         u64 q_ofs;
 865         struct ehca_wqe *wqe;
 866         int qp_num = my_qp->ib_qp.qp_num;
 867
 868         /* get send wqe pointer */
 869         h_ret = hipz_h_disable_and_get_wqe(shca->ipz_hca_handle,
 870                                            my_qp->ipz_qp_handle, &my_qp->pf,
 871                                            &bad_send_wqe_p, NULL, 2);
 872         if (h_ret != H_SUCCESS) {
 873                 ehca_err(&shca->ib_device, "hipz_h_disable_and_get_wqe() failed"
 874                          " ehca_qp=%p qp_num=%x h_ret=%lx",
 875                          my_qp, qp_num, h_ret);
 876                 return ehca2ib_return_code(h_ret);
 877         }
 878         bad_send_wqe_p = (void*)((u64)bad_send_wqe_p & (~(1L<<63)));
 879         ehca_dbg(&shca->ib_device, "qp_num=%x bad_send_wqe_p=%p",
 880                  qp_num, bad_send_wqe_p);
 881         /* convert wqe pointer to vadr */
 882         bad_send_wqe_v = abs_to_virt((u64)bad_send_wqe_p);
 883         if (ehca_debug_level)
 884                 ehca_dmp(bad_send_wqe_v, 32, "qp_num=%x bad_wqe", qp_num);
 885         squeue = &my_qp->ipz_squeue;
 886         if (ipz_queue_abs_to_offset(squeue, (u64)bad_send_wqe_p, &q_ofs)) {
 887                 ehca_err(&shca->ib_device, "failed to get wqe offset qp_num=%x"
 888                          " bad_send_wqe_p=%p", qp_num, bad_send_wqe_p);
 889                 return -EFAULT;
 890         }
 891
 892         /* loop sets wqe's purge bit */
 893         wqe = (struct ehca_wqe*)ipz_qeit_calc(squeue, q_ofs);
 894         *bad_wqe_cnt = 0;
 895         while (wqe->optype != 0xff && wqe->wqef != 0xff) {
 896                 if (ehca_debug_level)
 897                         ehca_dmp(wqe, 32, "qp_num=%x wqe", qp_num);
 898                 wqe->nr_of_data_seg = 0; /* suppress data access */
 899                 wqe->wqef = WQEF_PURGE; /* WQE to be purged */
 900                 q_ofs = ipz_queue_advance_offset(squeue, q_ofs);
 901                 wqe = (struct ehca_wqe*)ipz_qeit_calc(squeue, q_ofs);
 902                 *bad_wqe_cnt = (*bad_wqe_cnt)+1;
 903         }
 904         /*
 905          * bad wqe will be reprocessed and ignored when pol_cq() is called,
 906          *  i.e. nr of wqes with flush error status is one less
 907          */
 908         ehca_dbg(&shca->ib_device, "qp_num=%x flusherr_wqe_cnt=%x",
 909                  qp_num, (*bad_wqe_cnt)-1);
 910         wqe->wqef = 0;
 911
 912         return 0;
 913 }
 914
 915 /*
 916  * internal_modify_qp with circumvention to handle aqp0 properly
 917  * smi_reset2init indicates if this is an internal reset-to-init-call for
 918  * smi. This flag must always be zero if called from ehca_modify_qp()!
 919  * This internal func was intorduced to avoid recursion of ehca_modify_qp()!
 920  */
 921 static int internal_modify_qp(struct ib_qp *ibqp,
 922                               struct ib_qp_attr *attr,
 923                               int attr_mask, int smi_reset2init)
 924 {
 925         enum ib_qp_state qp_cur_state, qp_new_state;
 926         int cnt, qp_attr_idx, ret = 0;
 927         enum ib_qp_statetrans statetrans;
 928         struct hcp_modify_qp_control_block *mqpcb;
 929         struct ehca_qp *my_qp = container_of(ibqp, struct ehca_qp, ib_qp);
 930         struct ehca_shca *shca =
 931                 container_of(ibqp->pd->device, struct ehca_shca, ib_device);
 932         u64 update_mask;
 933         u64 h_ret;
 934         int bad_wqe_cnt = 0;
 935         int squeue_locked = 0;
 936         unsigned long spl_flags = 0;
 937
 938         /* do query_qp to obtain current attr values */
 939         mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
 940         if (!mqpcb) {
 941                 ehca_err(ibqp->device, "Could not get zeroed page for mqpcb "
 942                          "ehca_qp=%p qp_num=%x ", my_qp, ibqp->qp_num);
 943                 return -ENOMEM;
 944         }
 945
 946         h_ret = hipz_h_query_qp(shca->ipz_hca_handle,
 947                                 my_qp->ipz_qp_handle,
 948                                 &my_qp->pf,
 949                                 mqpcb, my_qp->galpas.kernel);
 950         if (h_ret != H_SUCCESS) {
 951                 ehca_err(ibqp->device, "hipz_h_query_qp() failed "
 952                          "ehca_qp=%p qp_num=%x h_ret=%lx",
 953                          my_qp, ibqp->qp_num, h_ret);
 954                 ret = ehca2ib_return_code(h_ret);
 955                 goto modify_qp_exit1;
 956         }
 957
 958         qp_cur_state = ehca2ib_qp_state(mqpcb->qp_state);
 959
 960         if (qp_cur_state == -EINVAL) {  /* invalid qp state */
 961                 ret = -EINVAL;
 962                 ehca_err(ibqp->device, "Invalid current ehca_qp_state=%x "
 963                          "ehca_qp=%p qp_num=%x",
 964                          mqpcb->qp_state, my_qp, ibqp->qp_num);
 965                 goto modify_qp_exit1;
 966         }
 967         /*
 968          * circumvention to set aqp0 initial state to init
 969          * as expected by IB spec
 970          */
 971         if (smi_reset2init == 0 &&
 972             ibqp->qp_type == IB_QPT_SMI &&
 973             qp_cur_state == IB_QPS_RESET &&
 974             (attr_mask & IB_QP_STATE) &&
 975             attr->qp_state == IB_QPS_INIT) { /* RESET -> INIT */
 976                 struct ib_qp_attr smiqp_attr = {
 977                         .qp_state = IB_QPS_INIT,
 978                         .port_num = my_qp->init_attr.port_num,
 979                         .pkey_index = 0,
 980                         .qkey = 0
 981                 };
 982                 int smiqp_attr_mask = IB_QP_STATE | IB_QP_PORT |
 983                         IB_QP_PKEY_INDEX | IB_QP_QKEY;
 984                 int smirc = internal_modify_qp(
 985                         ibqp, &smiqp_attr, smiqp_attr_mask, 1);
 986                 if (smirc) {
 987                         ehca_err(ibqp->device, "SMI RESET -> INIT failed. "
 988                                  "ehca_modify_qp() rc=%x", smirc);
 989                         ret = H_PARAMETER;
 990                         goto modify_qp_exit1;
 991                 }
 992                 qp_cur_state = IB_QPS_INIT;
 993                 ehca_dbg(ibqp->device, "SMI RESET -> INIT succeeded");
 994         }
 995         /* is transmitted current state  equal to "real" current state */
 996         if ((attr_mask & IB_QP_CUR_STATE) &&
 997             qp_cur_state != attr->cur_qp_state) {
 998                 ret = -EINVAL;
 999                 ehca_err(ibqp->device,
1000                          "Invalid IB_QP_CUR_STATE attr->curr_qp_state=%x <>"
1001                          " actual cur_qp_state=%x. ehca_qp=%p qp_num=%x",
1002                          attr->cur_qp_state, qp_cur_state, my_qp, ibqp->qp_num);
1003                 goto modify_qp_exit1;
1004         }
1005
1006         ehca_dbg(ibqp->device,"ehca_qp=%p qp_num=%x current qp_state=%x "
1007                  "new qp_state=%x attribute_mask=%x",
1008                  my_qp, ibqp->qp_num, qp_cur_state, attr->qp_state, attr_mask);
1009
1010         qp_new_state = attr_mask & IB_QP_STATE ? attr->qp_state : qp_cur_state;
1011         if (!smi_reset2init &&
1012             !ib_modify_qp_is_ok(qp_cur_state, qp_new_state, ibqp->qp_type,
1013                                 attr_mask)) {
1014                 ret = -EINVAL;
1015                 ehca_err(ibqp->device,
1016                          "Invalid qp transition new_state=%x cur_state=%x "
1017                          "ehca_qp=%p qp_num=%x attr_mask=%x", qp_new_state,
1018                          qp_cur_state, my_qp, ibqp->qp_num, attr_mask);
1019                 goto modify_qp_exit1;
1020         }
1021
1022         if ((mqpcb->qp_state = ib2ehca_qp_state(qp_new_state)))
1023                 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
1024         else {
1025                 ret = -EINVAL;
1026                 ehca_err(ibqp->device, "Invalid new qp state=%x "
1027                          "ehca_qp=%p qp_num=%x",
1028                          qp_new_state, my_qp, ibqp->qp_num);
1029                 goto modify_qp_exit1;
1030         }
1031
1032         /* retrieve state transition struct to get req and opt attrs */
1033         statetrans = get_modqp_statetrans(qp_cur_state, qp_new_state);
1034         if (statetrans < 0) {
1035                 ret = -EINVAL;
1036                 ehca_err(ibqp->device, "<INVALID STATE CHANGE> qp_cur_state=%x "
1037                          "new_qp_state=%x State_xsition=%x ehca_qp=%p "
1038                          "qp_num=%x", qp_cur_state, qp_new_state,
1039                          statetrans, my_qp, ibqp->qp_num);
1040                 goto modify_qp_exit1;
1041         }
1042
1043         qp_attr_idx = ib2ehcaqptype(ibqp->qp_type);
1044
1045         if (qp_attr_idx < 0) {
1046                 ret = qp_attr_idx;
1047                 ehca_err(ibqp->device,
1048                          "Invalid QP type=%x ehca_qp=%p qp_num=%x",
1049                          ibqp->qp_type, my_qp, ibqp->qp_num);
1050                 goto modify_qp_exit1;
1051         }
1052
1053         ehca_dbg(ibqp->device,
1054                  "ehca_qp=%p qp_num=%x <VALID STATE CHANGE> qp_state_xsit=%x",
1055                  my_qp, ibqp->qp_num, statetrans);
1056
1057         /* sqe -> rts: set purge bit of bad wqe before actual trans */
1058         if ((my_qp->qp_type == IB_QPT_UD ||
1059              my_qp->qp_type == IB_QPT_GSI ||
1060              my_qp->qp_type == IB_QPT_SMI) &&
1061             statetrans == IB_QPST_SQE2RTS) {
1062                 /* mark next free wqe if kernel */
1063                 if (!ibqp->uobject) {
1064                         struct ehca_wqe *wqe;
1065                         /* lock send queue */
1066                         spin_lock_irqsave(&my_qp->spinlock_s, spl_flags);
1067                         squeue_locked = 1;
1068                         /* mark next free wqe */
1069                         wqe = (struct ehca_wqe*)
1070                                 ipz_qeit_get(&my_qp->ipz_squeue);
1071                         wqe->optype = wqe->wqef = 0xff;
1072                         ehca_dbg(ibqp->device, "qp_num=%x next_free_wqe=%p",
1073                                  ibqp->qp_num, wqe);
1074                 }
1075                 ret = prepare_sqe_rts(my_qp, shca, &bad_wqe_cnt);
1076                 if (ret) {
1077                         ehca_err(ibqp->device, "prepare_sqe_rts() failed "
1078                                  "ehca_qp=%p qp_num=%x ret=%x",
1079                                  my_qp, ibqp->qp_num, ret);
1080                         goto modify_qp_exit2;
1081                 }
1082         }
1083
1084         /*
1085          * enable RDMA_Atomic_Control if reset->init und reliable con
1086          * this is necessary since gen2 does not provide that flag,
1087          * but pHyp requires it
1088          */
1089         if (statetrans == IB_QPST_RESET2INIT &&
1090             (ibqp->qp_type == IB_QPT_RC || ibqp->qp_type == IB_QPT_UC)) {
1091                 mqpcb->rdma_atomic_ctrl = 3;
1092                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RDMA_ATOMIC_CTRL, 1);
1093         }
1094         /* circ. pHyp requires #RDMA/Atomic Resp Res for UC INIT -> RTR */
1095         if (statetrans == IB_QPST_INIT2RTR &&
1096             (ibqp->qp_type == IB_QPT_UC) &&
1097             !(attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)) {
1098                 mqpcb->rdma_nr_atomic_resp_res = 1; /* default to 1 */
1099                 update_mask |=
1100                         EHCA_BMASK_SET(MQPCB_MASK_RDMA_NR_ATOMIC_RESP_RES, 1);
1101         }
1102
1103         if (attr_mask & IB_QP_PKEY_INDEX) {
1104                 mqpcb->prim_p_key_idx = attr->pkey_index;
1105                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PRIM_P_KEY_IDX, 1);
1106         }
1107         if (attr_mask & IB_QP_PORT) {
1108                 if (attr->port_num < 1 || attr->port_num > shca->num_ports) {
1109                         ret = -EINVAL;
1110                         ehca_err(ibqp->device, "Invalid port=%x. "
1111                                  "ehca_qp=%p qp_num=%x num_ports=%x",
1112                                  attr->port_num, my_qp, ibqp->qp_num,
1113                                  shca->num_ports);
1114                         goto modify_qp_exit2;
1115                 }
1116                 mqpcb->prim_phys_port = attr->port_num;
1117                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PRIM_PHYS_PORT, 1);
1118         }
1119         if (attr_mask & IB_QP_QKEY) {
1120                 mqpcb->qkey = attr->qkey;
1121                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_QKEY, 1);
1122         }
1123         if (attr_mask & IB_QP_AV) {
1124                 int ah_mult = ib_rate_to_mult(attr->ah_attr.static_rate);
1125                 int ehca_mult = ib_rate_to_mult(shca->sport[my_qp->
1126                                                 init_attr.port_num].rate);
1127
1128                 mqpcb->dlid = attr->ah_attr.dlid;
1129                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DLID, 1);
1130                 mqpcb->source_path_bits = attr->ah_attr.src_path_bits;
1131                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SOURCE_PATH_BITS, 1);
1132                 mqpcb->service_level = attr->ah_attr.sl;
1133                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SERVICE_LEVEL, 1);
1134
1135                 if (ah_mult < ehca_mult)
1136                         mqpcb->max_static_rate = (ah_mult > 0) ?
1137                         ((ehca_mult - 1) / ah_mult) : 0;
1138                 else
1139                         mqpcb->max_static_rate = 0;
1140                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_MAX_STATIC_RATE, 1);
1141
1142                 /*
1143                  * Always supply the GRH flag, even if it's zero, to give the
1144                  * hypervisor a clear "yes" or "no" instead of a "perhaps"
1145                  */
1146                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG, 1);
1147
1148                 /*
1149                  * only if GRH is TRUE we might consider SOURCE_GID_IDX
1150                  * and DEST_GID otherwise phype will return H_ATTR_PARM!!!
1151                  */
1152                 if (attr->ah_attr.ah_flags == IB_AH_GRH) {
1153                         mqpcb->send_grh_flag = 1;
1154
1155                         mqpcb->source_gid_idx = attr->ah_attr.grh.sgid_index;
1156                         update_mask |=
1157                                 EHCA_BMASK_SET(MQPCB_MASK_SOURCE_GID_IDX, 1);
1158
1159                         for (cnt = 0; cnt < 16; cnt++)
1160                                 mqpcb->dest_gid.byte[cnt] =
1161                                         attr->ah_attr.grh.dgid.raw[cnt];
1162
1163                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DEST_GID, 1);
1164                         mqpcb->flow_label = attr->ah_attr.grh.flow_label;
1165                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_FLOW_LABEL, 1);
1166                         mqpcb->hop_limit = attr->ah_attr.grh.hop_limit;
1167                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_HOP_LIMIT, 1);
1168                         mqpcb->traffic_class = attr->ah_attr.grh.traffic_class;
1169                         update_mask |=
1170                                 EHCA_BMASK_SET(MQPCB_MASK_TRAFFIC_CLASS, 1);
1171                 }
1172         }
1173
1174         if (attr_mask & IB_QP_PATH_MTU) {
1175                 mqpcb->path_mtu = attr->path_mtu;
1176                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PATH_MTU, 1);
1177         }
1178         if (attr_mask & IB_QP_TIMEOUT) {
1179                 mqpcb->timeout = attr->timeout;
1180                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_TIMEOUT, 1);
1181         }
1182         if (attr_mask & IB_QP_RETRY_CNT) {
1183                 mqpcb->retry_count = attr->retry_cnt;
1184                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RETRY_COUNT, 1);
1185         }
1186         if (attr_mask & IB_QP_RNR_RETRY) {
1187                 mqpcb->rnr_retry_count = attr->rnr_retry;
1188                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RNR_RETRY_COUNT, 1);
1189         }
1190         if (attr_mask & IB_QP_RQ_PSN) {
1191                 mqpcb->receive_psn = attr->rq_psn;
1192                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RECEIVE_PSN, 1);
1193         }
1194         if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) {
1195                 mqpcb->rdma_nr_atomic_resp_res = attr->max_dest_rd_atomic < 3 ?
1196                         attr->max_dest_rd_atomic : 2;
1197                 update_mask |=
1198                         EHCA_BMASK_SET(MQPCB_MASK_RDMA_NR_ATOMIC_RESP_RES, 1);
1199         }
1200         if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) {
1201                 mqpcb->rdma_atomic_outst_dest_qp = attr->max_rd_atomic < 3 ?
1202                         attr->max_rd_atomic : 2;
1203                 update_mask |=
1204                         EHCA_BMASK_SET
1205                         (MQPCB_MASK_RDMA_ATOMIC_OUTST_DEST_QP, 1);
1206         }
1207         if (attr_mask & IB_QP_ALT_PATH) {
1208                 int ah_mult = ib_rate_to_mult(attr->alt_ah_attr.static_rate);
1209                 int ehca_mult = ib_rate_to_mult(
1210                         shca->sport[my_qp->init_attr.port_num].rate);
1211
1212                 mqpcb->dlid_al = attr->alt_ah_attr.dlid;
1213                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DLID_AL, 1);
1214                 mqpcb->source_path_bits_al = attr->alt_ah_attr.src_path_bits;
1215                 update_mask |=
1216                         EHCA_BMASK_SET(MQPCB_MASK_SOURCE_PATH_BITS_AL, 1);
1217                 mqpcb->service_level_al = attr->alt_ah_attr.sl;
1218                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SERVICE_LEVEL_AL, 1);
1219
1220                 if (ah_mult < ehca_mult)
1221                         mqpcb->max_static_rate = (ah_mult > 0) ?
1222                         ((ehca_mult - 1) / ah_mult) : 0;
1223                 else
1224                         mqpcb->max_static_rate_al = 0;
1225
1226                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_MAX_STATIC_RATE_AL, 1);
1227
1228                 /*
1229                  * only if GRH is TRUE we might consider SOURCE_GID_IDX
1230                  * and DEST_GID otherwise phype will return H_ATTR_PARM!!!
1231                  */
1232                 if (attr->alt_ah_attr.ah_flags == IB_AH_GRH) {
1233                         mqpcb->send_grh_flag_al = 1 << 31;
1234                         update_mask |=
1235                                 EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG_AL, 1);
1236                         mqpcb->source_gid_idx_al =
1237                                 attr->alt_ah_attr.grh.sgid_index;
1238                         update_mask |=
1239                                 EHCA_BMASK_SET(MQPCB_MASK_SOURCE_GID_IDX_AL, 1);
1240
1241                         for (cnt = 0; cnt < 16; cnt++)
1242                                 mqpcb->dest_gid_al.byte[cnt] =
1243                                         attr->alt_ah_attr.grh.dgid.raw[cnt];
1244
1245                         update_mask |=
1246                                 EHCA_BMASK_SET(MQPCB_MASK_DEST_GID_AL, 1);
1247                         mqpcb->flow_label_al = attr->alt_ah_attr.grh.flow_label;
1248                         update_mask |=
1249                                 EHCA_BMASK_SET(MQPCB_MASK_FLOW_LABEL_AL, 1);
1250                         mqpcb->hop_limit_al = attr->alt_ah_attr.grh.hop_limit;
1251                         update_mask |=
1252                                 EHCA_BMASK_SET(MQPCB_MASK_HOP_LIMIT_AL, 1);
1253                         mqpcb->traffic_class_al =
1254                                 attr->alt_ah_attr.grh.traffic_class;
1255                         update_mask |=
1256                                 EHCA_BMASK_SET(MQPCB_MASK_TRAFFIC_CLASS_AL, 1);
1257                 }
1258         }
1259
1260         if (attr_mask & IB_QP_MIN_RNR_TIMER) {
1261                 mqpcb->min_rnr_nak_timer_field = attr->min_rnr_timer;
1262                 update_mask |=
1263                         EHCA_BMASK_SET(MQPCB_MASK_MIN_RNR_NAK_TIMER_FIELD, 1);
1264         }
1265
1266         if (attr_mask & IB_QP_SQ_PSN) {
1267                 mqpcb->send_psn = attr->sq_psn;
1268                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_PSN, 1);
1269         }
1270
1271         if (attr_mask & IB_QP_DEST_QPN) {
1272                 mqpcb->dest_qp_nr = attr->dest_qp_num;
1273                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DEST_QP_NR, 1);
1274         }
1275
1276         if (attr_mask & IB_QP_PATH_MIG_STATE) {
1277                 mqpcb->path_migration_state = attr->path_mig_state;
1278                 update_mask |=
1279                         EHCA_BMASK_SET(MQPCB_MASK_PATH_MIGRATION_STATE, 1);
1280         }
1281
1282         if (attr_mask & IB_QP_CAP) {
1283                 mqpcb->max_nr_outst_send_wr = attr->cap.max_send_wr+1;
1284                 update_mask |=
1285                         EHCA_BMASK_SET(MQPCB_MASK_MAX_NR_OUTST_SEND_WR, 1);
1286                 mqpcb->max_nr_outst_recv_wr = attr->cap.max_recv_wr+1;
1287                 update_mask |=
1288                         EHCA_BMASK_SET(MQPCB_MASK_MAX_NR_OUTST_RECV_WR, 1);
1289                 /* no support for max_send/recv_sge yet */
1290         }
1291
1292         if (ehca_debug_level)
1293                 ehca_dmp(mqpcb, 4*70, "qp_num=%x", ibqp->qp_num);
1294
1295         h_ret = hipz_h_modify_qp(shca->ipz_hca_handle,
1296                                  my_qp->ipz_qp_handle,
1297                                  &my_qp->pf,
1298                                  update_mask,
1299                                  mqpcb, my_qp->galpas.kernel);
1300
1301         if (h_ret != H_SUCCESS) {
1302                 ret = ehca2ib_return_code(h_ret);
1303                 ehca_err(ibqp->device, "hipz_h_modify_qp() failed rc=%lx "
1304                          "ehca_qp=%p qp_num=%x",h_ret, my_qp, ibqp->qp_num);
1305                 goto modify_qp_exit2;
1306         }
1307
1308         if ((my_qp->qp_type == IB_QPT_UD ||
1309              my_qp->qp_type == IB_QPT_GSI ||
1310              my_qp->qp_type == IB_QPT_SMI) &&
1311             statetrans == IB_QPST_SQE2RTS) {
1312                 /* doorbell to reprocessing wqes */
1313                 iosync(); /* serialize GAL register access */
1314                 hipz_update_sqa(my_qp, bad_wqe_cnt-1);
1315                 ehca_gen_dbg("doorbell for %x wqes", bad_wqe_cnt);
1316         }
1317
1318         if (statetrans == IB_QPST_RESET2INIT ||
1319             statetrans == IB_QPST_INIT2INIT) {
1320                 mqpcb->qp_enable = 1;
1321                 mqpcb->qp_state = EHCA_QPS_INIT;
1322                 update_mask = 0;
1323                 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_ENABLE, 1);
1324
1325                 h_ret = hipz_h_modify_qp(shca->ipz_hca_handle,
1326                                          my_qp->ipz_qp_handle,
1327                                          &my_qp->pf,
1328                                          update_mask,
1329                                          mqpcb,
1330                                          my_qp->galpas.kernel);
1331
1332                 if (h_ret != H_SUCCESS) {
1333                         ret = ehca2ib_return_code(h_ret);
1334                         ehca_err(ibqp->device, "ENABLE in context of "
1335                                  "RESET_2_INIT failed! Maybe you didn't get "
1336                                  "a LID h_ret=%lx ehca_qp=%p qp_num=%x",
1337                                  h_ret, my_qp, ibqp->qp_num);
1338                         goto modify_qp_exit2;
1339                 }
1340         }
1341
1342         if (statetrans == IB_QPST_ANY2RESET) {
1343                 ipz_qeit_reset(&my_qp->ipz_rqueue);
1344                 ipz_qeit_reset(&my_qp->ipz_squeue);
1345         }
1346
1347         if (attr_mask & IB_QP_QKEY)
1348                 my_qp->qkey = attr->qkey;
1349
1350 modify_qp_exit2:
1351         if (squeue_locked) { /* this means: sqe -> rts */
1352                 spin_unlock_irqrestore(&my_qp->spinlock_s, spl_flags);
1353                 my_qp->sqerr_purgeflag = 1;
1354         }
1355
1356 modify_qp_exit1:
1357         ehca_free_fw_ctrlblock(mqpcb);
1358
1359         return ret;
1360 }
1361
1362 int ehca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
1363                    struct ib_udata *udata)
1364 {
1365         struct ehca_qp *my_qp = container_of(ibqp, struct ehca_qp, ib_qp);
1366         struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1367                                              ib_pd);
1368         u32 cur_pid = current->tgid;
1369
1370         if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context &&
1371             my_pd->ownpid != cur_pid) {
1372                 ehca_err(ibqp->pd->device, "Invalid caller pid=%x ownpid=%x",
1373                          cur_pid, my_pd->ownpid);
1374                 return -EINVAL;
1375         }
1376
1377         return internal_modify_qp(ibqp, attr, attr_mask, 0);
1378 }
1379
1380 int ehca_query_qp(struct ib_qp *qp,
1381                   struct ib_qp_attr *qp_attr,
1382                   int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr)
1383 {
1384         struct ehca_qp *my_qp = container_of(qp, struct ehca_qp, ib_qp);
1385         struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1386                                              ib_pd);
1387         struct ehca_shca *shca = container_of(qp->device, struct ehca_shca,
1388                                               ib_device);
1389         struct ipz_adapter_handle adapter_handle = shca->ipz_hca_handle;
1390         struct hcp_modify_qp_control_block *qpcb;
1391         u32 cur_pid = current->tgid;
1392         int cnt, ret = 0;
1393         u64 h_ret;
1394
1395         if (my_pd->ib_pd.uobject  && my_pd->ib_pd.uobject->context  &&
1396             my_pd->ownpid != cur_pid) {
1397                 ehca_err(qp->device, "Invalid caller pid=%x ownpid=%x",
1398                          cur_pid, my_pd->ownpid);
1399                 return -EINVAL;
1400         }
1401
1402         if (qp_attr_mask & QP_ATTR_QUERY_NOT_SUPPORTED) {
1403                 ehca_err(qp->device,"Invalid attribute mask "
1404                          "ehca_qp=%p qp_num=%x qp_attr_mask=%x ",
1405                          my_qp, qp->qp_num, qp_attr_mask);
1406                 return -EINVAL;
1407         }
1408
1409         qpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1410         if (!qpcb) {
1411                 ehca_err(qp->device,"Out of memory for qpcb "
1412                          "ehca_qp=%p qp_num=%x", my_qp, qp->qp_num);
1413                 return -ENOMEM;
1414         }
1415
1416         h_ret = hipz_h_query_qp(adapter_handle,
1417                                 my_qp->ipz_qp_handle,
1418                                 &my_qp->pf,
1419                                 qpcb, my_qp->galpas.kernel);
1420
1421         if (h_ret != H_SUCCESS) {
1422                 ret = ehca2ib_return_code(h_ret);
1423                 ehca_err(qp->device,"hipz_h_query_qp() failed "
1424                          "ehca_qp=%p qp_num=%x h_ret=%lx",
1425                          my_qp, qp->qp_num, h_ret);
1426                 goto query_qp_exit1;
1427         }
1428
1429         qp_attr->cur_qp_state = ehca2ib_qp_state(qpcb->qp_state);
1430         qp_attr->qp_state = qp_attr->cur_qp_state;
1431
1432         if (qp_attr->cur_qp_state == -EINVAL) {
1433                 ret = -EINVAL;
1434                 ehca_err(qp->device,"Got invalid ehca_qp_state=%x "
1435                          "ehca_qp=%p qp_num=%x",
1436                          qpcb->qp_state, my_qp, qp->qp_num);
1437                 goto query_qp_exit1;
1438         }
1439
1440         if (qp_attr->qp_state == IB_QPS_SQD)
1441                 qp_attr->sq_draining = 1;
1442
1443         qp_attr->qkey = qpcb->qkey;
1444         qp_attr->path_mtu = qpcb->path_mtu;
1445         qp_attr->path_mig_state = qpcb->path_migration_state;
1446         qp_attr->rq_psn = qpcb->receive_psn;
1447         qp_attr->sq_psn = qpcb->send_psn;
1448         qp_attr->min_rnr_timer = qpcb->min_rnr_nak_timer_field;
1449         qp_attr->cap.max_send_wr = qpcb->max_nr_outst_send_wr-1;
1450         qp_attr->cap.max_recv_wr = qpcb->max_nr_outst_recv_wr-1;
1451         /* UD_AV CIRCUMVENTION */
1452         if (my_qp->qp_type == IB_QPT_UD) {
1453                 qp_attr->cap.max_send_sge =
1454                         qpcb->actual_nr_sges_in_sq_wqe - 2;
1455                 qp_attr->cap.max_recv_sge =
1456                         qpcb->actual_nr_sges_in_rq_wqe - 2;
1457         } else {
1458                 qp_attr->cap.max_send_sge =
1459                         qpcb->actual_nr_sges_in_sq_wqe;
1460                 qp_attr->cap.max_recv_sge =
1461                         qpcb->actual_nr_sges_in_rq_wqe;
1462         }
1463
1464         qp_attr->cap.max_inline_data = my_qp->sq_max_inline_data_size;
1465         qp_attr->dest_qp_num = qpcb->dest_qp_nr;
1466
1467         qp_attr->pkey_index =
1468                 EHCA_BMASK_GET(MQPCB_PRIM_P_KEY_IDX, qpcb->prim_p_key_idx);
1469
1470         qp_attr->port_num =
1471                 EHCA_BMASK_GET(MQPCB_PRIM_PHYS_PORT, qpcb->prim_phys_port);
1472
1473         qp_attr->timeout = qpcb->timeout;
1474         qp_attr->retry_cnt = qpcb->retry_count;
1475         qp_attr->rnr_retry = qpcb->rnr_retry_count;
1476
1477         qp_attr->alt_pkey_index =
1478                 EHCA_BMASK_GET(MQPCB_PRIM_P_KEY_IDX, qpcb->alt_p_key_idx);
1479
1480         qp_attr->alt_port_num = qpcb->alt_phys_port;
1481         qp_attr->alt_timeout = qpcb->timeout_al;
1482
1483         /* primary av */
1484         qp_attr->ah_attr.sl = qpcb->service_level;
1485
1486         if (qpcb->send_grh_flag) {
1487                 qp_attr->ah_attr.ah_flags = IB_AH_GRH;
1488         }
1489
1490         qp_attr->ah_attr.static_rate = qpcb->max_static_rate;
1491         qp_attr->ah_attr.dlid = qpcb->dlid;
1492         qp_attr->ah_attr.src_path_bits = qpcb->source_path_bits;
1493         qp_attr->ah_attr.port_num = qp_attr->port_num;
1494
1495         /* primary GRH */
1496         qp_attr->ah_attr.grh.traffic_class = qpcb->traffic_class;
1497         qp_attr->ah_attr.grh.hop_limit = qpcb->hop_limit;
1498         qp_attr->ah_attr.grh.sgid_index = qpcb->source_gid_idx;
1499         qp_attr->ah_attr.grh.flow_label = qpcb->flow_label;
1500
1501         for (cnt = 0; cnt < 16; cnt++)
1502                 qp_attr->ah_attr.grh.dgid.raw[cnt] =
1503                         qpcb->dest_gid.byte[cnt];
1504
1505         /* alternate AV */
1506         qp_attr->alt_ah_attr.sl = qpcb->service_level_al;
1507         if (qpcb->send_grh_flag_al) {
1508                 qp_attr->alt_ah_attr.ah_flags = IB_AH_GRH;
1509         }
1510
1511         qp_attr->alt_ah_attr.static_rate = qpcb->max_static_rate_al;
1512         qp_attr->alt_ah_attr.dlid = qpcb->dlid_al;
1513         qp_attr->alt_ah_attr.src_path_bits = qpcb->source_path_bits_al;
1514
1515         /* alternate GRH */
1516         qp_attr->alt_ah_attr.grh.traffic_class = qpcb->traffic_class_al;
1517         qp_attr->alt_ah_attr.grh.hop_limit = qpcb->hop_limit_al;
1518         qp_attr->alt_ah_attr.grh.sgid_index = qpcb->source_gid_idx_al;
1519         qp_attr->alt_ah_attr.grh.flow_label = qpcb->flow_label_al;
1520
1521         for (cnt = 0; cnt < 16; cnt++)
1522                 qp_attr->alt_ah_attr.grh.dgid.raw[cnt] =
1523                         qpcb->dest_gid_al.byte[cnt];
1524
1525         /* return init attributes given in ehca_create_qp */
1526         if (qp_init_attr)
1527                 *qp_init_attr = my_qp->init_attr;
1528
1529         if (ehca_debug_level)
1530                 ehca_dmp(qpcb, 4*70, "qp_num=%x", qp->qp_num);
1531
1532 query_qp_exit1:
1533         ehca_free_fw_ctrlblock(qpcb);
1534
1535         return ret;
1536 }
1537
1538 int ehca_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
1539                     enum ib_srq_attr_mask attr_mask, struct ib_udata *udata)
1540 {
1541         struct ehca_qp *my_qp =
1542                 container_of(ibsrq, struct ehca_qp, ib_srq);
1543         struct ehca_pd *my_pd =
1544                 container_of(ibsrq->pd, struct ehca_pd, ib_pd);
1545         struct ehca_shca *shca =
1546                 container_of(ibsrq->pd->device, struct ehca_shca, ib_device);
1547         struct hcp_modify_qp_control_block *mqpcb;
1548         u64 update_mask;
1549         u64 h_ret;
1550         int ret = 0;
1551
1552         u32 cur_pid = current->tgid;
1553         if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context &&
1554             my_pd->ownpid != cur_pid) {
1555                 ehca_err(ibsrq->pd->device, "Invalid caller pid=%x ownpid=%x",
1556                          cur_pid, my_pd->ownpid);
1557                 return -EINVAL;
1558         }
1559
1560         mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1561         if (!mqpcb) {
1562                 ehca_err(ibsrq->device, "Could not get zeroed page for mqpcb "
1563                          "ehca_qp=%p qp_num=%x ", my_qp, my_qp->real_qp_num);
1564                 return -ENOMEM;
1565         }
1566
1567         update_mask = 0;
1568         if (attr_mask & IB_SRQ_LIMIT) {
1569                 attr_mask &= ~IB_SRQ_LIMIT;
1570                 update_mask |=
1571                         EHCA_BMASK_SET(MQPCB_MASK_CURR_SRQ_LIMIT, 1)
1572                         | EHCA_BMASK_SET(MQPCB_MASK_QP_AFF_ASYN_EV_LOG_REG, 1);
1573                 mqpcb->curr_srq_limit =
1574                         EHCA_BMASK_SET(MQPCB_CURR_SRQ_LIMIT, attr->srq_limit);
1575                 mqpcb->qp_aff_asyn_ev_log_reg =
1576                         EHCA_BMASK_SET(QPX_AAELOG_RESET_SRQ_LIMIT, 1);
1577         }
1578
1579         /* by now, all bits in attr_mask should have been cleared */
1580         if (attr_mask) {
1581                 ehca_err(ibsrq->device, "invalid attribute mask bits set  "
1582                          "attr_mask=%x", attr_mask);
1583                 ret = -EINVAL;
1584                 goto modify_srq_exit0;
1585         }
1586
1587         if (ehca_debug_level)
1588                 ehca_dmp(mqpcb, 4*70, "qp_num=%x", my_qp->real_qp_num);
1589
1590         h_ret = hipz_h_modify_qp(shca->ipz_hca_handle, my_qp->ipz_qp_handle,
1591                                  NULL, update_mask, mqpcb,
1592                                  my_qp->galpas.kernel);
1593
1594         if (h_ret != H_SUCCESS) {
1595                 ret = ehca2ib_return_code(h_ret);
1596                 ehca_err(ibsrq->device, "hipz_h_modify_qp() failed rc=%lx "
1597                          "ehca_qp=%p qp_num=%x",
1598                          h_ret, my_qp, my_qp->real_qp_num);
1599         }
1600
1601 modify_srq_exit0:
1602         ehca_free_fw_ctrlblock(mqpcb);
1603
1604         return ret;
1605 }
1606
1607 int ehca_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr)
1608 {
1609         struct ehca_qp *my_qp = container_of(srq, struct ehca_qp, ib_srq);
1610         struct ehca_pd *my_pd = container_of(srq->pd, struct ehca_pd, ib_pd);
1611         struct ehca_shca *shca = container_of(srq->device, struct ehca_shca,
1612                                               ib_device);
1613         struct ipz_adapter_handle adapter_handle = shca->ipz_hca_handle;
1614         struct hcp_modify_qp_control_block *qpcb;
1615         u32 cur_pid = current->tgid;
1616         int ret = 0;
1617         u64 h_ret;
1618
1619         if (my_pd->ib_pd.uobject  && my_pd->ib_pd.uobject->context  &&
1620             my_pd->ownpid != cur_pid) {
1621                 ehca_err(srq->device, "Invalid caller pid=%x ownpid=%x",
1622                          cur_pid, my_pd->ownpid);
1623                 return -EINVAL;
1624         }
1625
1626         qpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1627         if (!qpcb) {
1628                 ehca_err(srq->device, "Out of memory for qpcb "
1629                          "ehca_qp=%p qp_num=%x", my_qp, my_qp->real_qp_num);
1630                 return -ENOMEM;
1631         }
1632
1633         h_ret = hipz_h_query_qp(adapter_handle, my_qp->ipz_qp_handle,
1634                                 NULL, qpcb, my_qp->galpas.kernel);
1635
1636         if (h_ret != H_SUCCESS) {
1637                 ret = ehca2ib_return_code(h_ret);
1638                 ehca_err(srq->device, "hipz_h_query_qp() failed "
1639                          "ehca_qp=%p qp_num=%x h_ret=%lx",
1640                          my_qp, my_qp->real_qp_num, h_ret);
1641                 goto query_srq_exit1;
1642         }
1643
1644         srq_attr->max_wr = qpcb->max_nr_outst_recv_wr - 1;
1645         srq_attr->srq_limit = EHCA_BMASK_GET(
1646                 MQPCB_CURR_SRQ_LIMIT, qpcb->curr_srq_limit);
1647
1648         if (ehca_debug_level)
1649                 ehca_dmp(qpcb, 4*70, "qp_num=%x", my_qp->real_qp_num);
1650
1651 query_srq_exit1:
1652         ehca_free_fw_ctrlblock(qpcb);
1653
1654         return ret;
1655 }
1656
1657 int internal_destroy_qp(struct ib_device *dev, struct ehca_qp *my_qp,
1658                         struct ib_uobject *uobject)
1659 {
1660         struct ehca_shca *shca = container_of(dev, struct ehca_shca, ib_device);
1661         struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1662                                              ib_pd);
1663         u32 cur_pid = current->tgid;
1664         u32 qp_num = my_qp->real_qp_num;
1665         int ret;
1666         u64 h_ret;
1667         u8 port_num;
1668         enum ib_qp_type qp_type;
1669         unsigned long flags;
1670
1671         if (uobject) {
1672                 if (my_qp->mm_count_galpa ||
1673                     my_qp->mm_count_rqueue || my_qp->mm_count_squeue) {
1674                         ehca_err(dev, "Resources still referenced in "
1675                                  "user space qp_num=%x", qp_num);
1676                         return -EINVAL;
1677                 }
1678                 if (my_pd->ownpid != cur_pid) {
1679                         ehca_err(dev, "Invalid caller pid=%x ownpid=%x",
1680                                  cur_pid, my_pd->ownpid);
1681                         return -EINVAL;
1682                 }
1683         }
1684
1685         if (my_qp->send_cq) {
1686                 ret = ehca_cq_unassign_qp(my_qp->send_cq, qp_num);
1687                 if (ret) {
1688                         ehca_err(dev, "Couldn't unassign qp from "
1689                                  "send_cq ret=%x qp_num=%x cq_num=%x", ret,
1690                                  qp_num, my_qp->send_cq->cq_number);
1691                         return ret;
1692                 }
1693         }
1694
1695         spin_lock_irqsave(&ehca_qp_idr_lock, flags);
1696         idr_remove(&ehca_qp_idr, my_qp->token);
1697         spin_unlock_irqrestore(&ehca_qp_idr_lock, flags);
1698
1699         h_ret = hipz_h_destroy_qp(shca->ipz_hca_handle, my_qp);
1700         if (h_ret != H_SUCCESS) {
1701                 ehca_err(dev, "hipz_h_destroy_qp() failed rc=%lx "
1702                          "ehca_qp=%p qp_num=%x", h_ret, my_qp, qp_num);
1703                 return ehca2ib_return_code(h_ret);
1704         }
1705
1706         port_num = my_qp->init_attr.port_num;
1707         qp_type  = my_qp->init_attr.qp_type;
1708
1709         /* no support for IB_QPT_SMI yet */
1710         if (qp_type == IB_QPT_GSI) {
1711                 struct ib_event event;
1712                 ehca_info(dev, "device %s: port %x is inactive.",
1713                           shca->ib_device.name, port_num);
1714                 event.device = &shca->ib_device;
1715                 event.event = IB_EVENT_PORT_ERR;
1716                 event.element.port_num = port_num;
1717                 shca->sport[port_num - 1].port_state = IB_PORT_DOWN;
1718                 ib_dispatch_event(&event);
1719         }
1720
1721         if (HAS_RQ(my_qp))
1722                 ipz_queue_dtor(&my_qp->ipz_rqueue);
1723         if (HAS_SQ(my_qp))
1724                 ipz_queue_dtor(&my_qp->ipz_squeue);
1725         kmem_cache_free(qp_cache, my_qp);
1726         return 0;
1727 }
1728
1729 int ehca_destroy_qp(struct ib_qp *qp)
1730 {
1731         return internal_destroy_qp(qp->device,
1732                                    container_of(qp, struct ehca_qp, ib_qp),
1733                                    qp->uobject);
1734 }
1735
1736 int ehca_destroy_srq(struct ib_srq *srq)
1737 {
1738         return internal_destroy_qp(srq->device,
1739                                    container_of(srq, struct ehca_qp, ib_srq),
1740                                    srq->uobject);
1741 }
1742
1743 int ehca_init_qp_cache(void)
1744 {
1745         qp_cache = kmem_cache_create("ehca_cache_qp",
1746                                      sizeof(struct ehca_qp), 0,
1747                                      SLAB_HWCACHE_ALIGN,
1748                                      NULL, NULL);
1749         if (!qp_cache)
1750                 return -ENOMEM;
1751         return 0;
1752 }
1753
1754 void ehca_cleanup_qp_cache(void)
1755 {
1756         if (qp_cache)
1757                 kmem_cache_destroy(qp_cache);
1758 }