2 * Copyright (c) 2009-2010 Chelsio, Inc. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
17 * - Redistributions in binary form must reproduce the above
18 * copyright notice, this list of conditions and the following
19 * disclaimer in the documentation and/or other materials
20 * provided with the distribution.
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
23 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
24 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
25 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
26 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
27 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
28 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 #ifndef __IW_CXGB4_H__
32 #define __IW_CXGB4_H__
34 #include <linux/mutex.h>
35 #include <linux/list.h>
36 #include <linux/spinlock.h>
37 #include <linux/idr.h>
38 #include <linux/workqueue.h>
39 #include <linux/netdevice.h>
40 #include <linux/sched.h>
41 #include <linux/pci.h>
42 #include <linux/dma-mapping.h>
43 #include <linux/inet.h>
44 #include <linux/wait.h>
45 #include <linux/kref.h>
46 #include <linux/timer.h>
48 #include <linux/kfifo.h>
50 #include <asm/byteorder.h>
52 #include <net/net_namespace.h>
54 #include <rdma/ib_verbs.h>
55 #include <rdma/iw_cm.h>
58 #include "cxgb4_uld.h"
62 #define DRV_NAME "iw_cxgb4"
63 #define MOD DRV_NAME ":"
65 extern int c4iw_debug;
66 #define PDBG(fmt, args...) \
69 printk(MOD fmt, ## args); \
74 #define PBL_OFF(rdev_p, a) ((a) - (rdev_p)->lldi.vr->pbl.start)
75 #define RQT_OFF(rdev_p, a) ((a) - (rdev_p)->lldi.vr->rq.start)
77 static inline void *cplhdr(struct sk_buff *skb)
82 #define C4IW_WR_TO (10*HZ)
85 wait_queue_head_t wait;
90 static inline void c4iw_init_wr_wait(struct c4iw_wr_wait *wr_waitp)
94 init_waitqueue_head(&wr_waitp->wait);
97 struct c4iw_resource {
98 struct kfifo tpt_fifo;
99 spinlock_t tpt_fifo_lock;
100 struct kfifo qid_fifo;
101 spinlock_t qid_fifo_lock;
102 struct kfifo pdid_fifo;
103 spinlock_t pdid_fifo_lock;
106 struct c4iw_qid_list {
107 struct list_head entry;
111 struct c4iw_dev_ucontext {
112 struct list_head qpids;
113 struct list_head cqids;
117 enum c4iw_rdev_flags {
118 T4_FATAL_ERROR = (1<<0),
122 struct c4iw_resource resource;
123 unsigned long qpshift;
125 unsigned long cqshift;
127 struct c4iw_dev_ucontext uctx;
128 struct gen_pool *pbl_pool;
129 struct gen_pool *rqt_pool;
131 struct cxgb4_lld_info lldi;
134 static inline int c4iw_fatal_error(struct c4iw_rdev *rdev)
136 return rdev->flags & T4_FATAL_ERROR;
139 static inline int c4iw_num_stags(struct c4iw_rdev *rdev)
141 return min((int)T4_MAX_NUM_STAG, (int)(rdev->lldi.vr->stag.size >> 5));
145 struct ib_device ibdev;
146 struct c4iw_rdev rdev;
147 u32 device_cap_flags;
152 struct list_head entry;
153 struct delayed_work db_drop_task;
154 struct dentry *debugfs_root;
157 static inline struct c4iw_dev *to_c4iw_dev(struct ib_device *ibdev)
159 return container_of(ibdev, struct c4iw_dev, ibdev);
162 static inline struct c4iw_dev *rdev_to_c4iw_dev(struct c4iw_rdev *rdev)
164 return container_of(rdev, struct c4iw_dev, rdev);
167 static inline struct c4iw_cq *get_chp(struct c4iw_dev *rhp, u32 cqid)
169 return idr_find(&rhp->cqidr, cqid);
172 static inline struct c4iw_qp *get_qhp(struct c4iw_dev *rhp, u32 qpid)
174 return idr_find(&rhp->qpidr, qpid);
177 static inline struct c4iw_mr *get_mhp(struct c4iw_dev *rhp, u32 mmid)
179 return idr_find(&rhp->mmidr, mmid);
182 static inline int insert_handle(struct c4iw_dev *rhp, struct idr *idr,
183 void *handle, u32 id)
189 if (!idr_pre_get(idr, GFP_KERNEL))
191 spin_lock_irq(&rhp->lock);
192 ret = idr_get_new_above(idr, handle, id, &newid);
194 spin_unlock_irq(&rhp->lock);
195 } while (ret == -EAGAIN);
200 static inline void remove_handle(struct c4iw_dev *rhp, struct idr *idr, u32 id)
202 spin_lock_irq(&rhp->lock);
204 spin_unlock_irq(&rhp->lock);
210 struct c4iw_dev *rhp;
213 static inline struct c4iw_pd *to_c4iw_pd(struct ib_pd *ibpd)
215 return container_of(ibpd, struct c4iw_pd, ibpd);
218 struct tpt_attributes {
221 enum fw_ri_mem_perms perms;
230 u32 remote_invaliate_disable:1;
232 u32 mw_bind_enable:1;
238 struct ib_umem *umem;
239 struct c4iw_dev *rhp;
241 struct tpt_attributes attr;
244 static inline struct c4iw_mr *to_c4iw_mr(struct ib_mr *ibmr)
246 return container_of(ibmr, struct c4iw_mr, ibmr);
251 struct c4iw_dev *rhp;
253 struct tpt_attributes attr;
256 static inline struct c4iw_mw *to_c4iw_mw(struct ib_mw *ibmw)
258 return container_of(ibmw, struct c4iw_mw, ibmw);
261 struct c4iw_fr_page_list {
262 struct ib_fast_reg_page_list ibpl;
263 DECLARE_PCI_UNMAP_ADDR(mapping);
265 struct c4iw_dev *dev;
269 static inline struct c4iw_fr_page_list *to_c4iw_fr_page_list(
270 struct ib_fast_reg_page_list *ibpl)
272 return container_of(ibpl, struct c4iw_fr_page_list, ibpl);
277 struct c4iw_dev *rhp;
281 wait_queue_head_t wait;
284 static inline struct c4iw_cq *to_c4iw_cq(struct ib_cq *ibcq)
286 return container_of(ibcq, struct c4iw_cq, ibcq);
289 struct c4iw_mpa_attributes {
291 u8 recv_marker_enabled;
292 u8 xmit_marker_enabled;
298 struct c4iw_qp_attributes {
304 u32 sq_max_sges_rdma_write;
308 u8 enable_rdma_write;
310 u8 enable_mmid0_fastreg;
315 char terminate_buffer[52];
316 u32 terminate_msg_len;
317 u8 is_terminate_local;
318 struct c4iw_mpa_attributes mpa_attr;
319 struct c4iw_ep *llp_stream_handle;
324 struct c4iw_dev *rhp;
326 struct c4iw_qp_attributes attr;
330 wait_queue_head_t wait;
331 struct timer_list timer;
334 static inline struct c4iw_qp *to_c4iw_qp(struct ib_qp *ibqp)
336 return container_of(ibqp, struct c4iw_qp, ibqp);
339 struct c4iw_ucontext {
340 struct ib_ucontext ibucontext;
341 struct c4iw_dev_ucontext uctx;
343 spinlock_t mmap_lock;
344 struct list_head mmaps;
347 static inline struct c4iw_ucontext *to_c4iw_ucontext(struct ib_ucontext *c)
349 return container_of(c, struct c4iw_ucontext, ibucontext);
352 struct c4iw_mm_entry {
353 struct list_head entry;
359 static inline struct c4iw_mm_entry *remove_mmap(struct c4iw_ucontext *ucontext,
360 u32 key, unsigned len)
362 struct list_head *pos, *nxt;
363 struct c4iw_mm_entry *mm;
365 spin_lock(&ucontext->mmap_lock);
366 list_for_each_safe(pos, nxt, &ucontext->mmaps) {
368 mm = list_entry(pos, struct c4iw_mm_entry, entry);
369 if (mm->key == key && mm->len == len) {
370 list_del_init(&mm->entry);
371 spin_unlock(&ucontext->mmap_lock);
372 PDBG("%s key 0x%x addr 0x%llx len %d\n", __func__,
373 key, (unsigned long long) mm->addr, mm->len);
377 spin_unlock(&ucontext->mmap_lock);
381 static inline void insert_mmap(struct c4iw_ucontext *ucontext,
382 struct c4iw_mm_entry *mm)
384 spin_lock(&ucontext->mmap_lock);
385 PDBG("%s key 0x%x addr 0x%llx len %d\n", __func__,
386 mm->key, (unsigned long long) mm->addr, mm->len);
387 list_add_tail(&mm->entry, &ucontext->mmaps);
388 spin_unlock(&ucontext->mmap_lock);
391 enum c4iw_qp_attr_mask {
392 C4IW_QP_ATTR_NEXT_STATE = 1 << 0,
393 C4IW_QP_ATTR_ENABLE_RDMA_READ = 1 << 7,
394 C4IW_QP_ATTR_ENABLE_RDMA_WRITE = 1 << 8,
395 C4IW_QP_ATTR_ENABLE_RDMA_BIND = 1 << 9,
396 C4IW_QP_ATTR_MAX_ORD = 1 << 11,
397 C4IW_QP_ATTR_MAX_IRD = 1 << 12,
398 C4IW_QP_ATTR_LLP_STREAM_HANDLE = 1 << 22,
399 C4IW_QP_ATTR_STREAM_MSG_BUFFER = 1 << 23,
400 C4IW_QP_ATTR_MPA_ATTR = 1 << 24,
401 C4IW_QP_ATTR_QP_CONTEXT_ACTIVATE = 1 << 25,
402 C4IW_QP_ATTR_VALID_MODIFY = (C4IW_QP_ATTR_ENABLE_RDMA_READ |
403 C4IW_QP_ATTR_ENABLE_RDMA_WRITE |
404 C4IW_QP_ATTR_MAX_ORD |
405 C4IW_QP_ATTR_MAX_IRD |
406 C4IW_QP_ATTR_LLP_STREAM_HANDLE |
407 C4IW_QP_ATTR_STREAM_MSG_BUFFER |
408 C4IW_QP_ATTR_MPA_ATTR |
409 C4IW_QP_ATTR_QP_CONTEXT_ACTIVATE)
412 int c4iw_modify_qp(struct c4iw_dev *rhp,
414 enum c4iw_qp_attr_mask mask,
415 struct c4iw_qp_attributes *attrs,
422 C4IW_QP_STATE_TERMINATE,
423 C4IW_QP_STATE_CLOSING,
427 static inline int c4iw_convert_state(enum ib_qp_state ib_state)
432 return C4IW_QP_STATE_IDLE;
434 return C4IW_QP_STATE_RTS;
436 return C4IW_QP_STATE_CLOSING;
438 return C4IW_QP_STATE_TERMINATE;
440 return C4IW_QP_STATE_ERROR;
446 static inline u32 c4iw_ib_to_tpt_access(int a)
448 return (a & IB_ACCESS_REMOTE_WRITE ? FW_RI_MEM_ACCESS_REM_WRITE : 0) |
449 (a & IB_ACCESS_REMOTE_READ ? FW_RI_MEM_ACCESS_REM_READ : 0) |
450 (a & IB_ACCESS_LOCAL_WRITE ? FW_RI_MEM_ACCESS_LOCAL_WRITE : 0) |
451 FW_RI_MEM_ACCESS_LOCAL_READ;
454 static inline u32 c4iw_ib_to_tpt_bind_access(int acc)
456 return (acc & IB_ACCESS_REMOTE_WRITE ? FW_RI_MEM_ACCESS_REM_WRITE : 0) |
457 (acc & IB_ACCESS_REMOTE_READ ? FW_RI_MEM_ACCESS_REM_READ : 0);
460 enum c4iw_mmid_state {
461 C4IW_STAG_STATE_VALID,
462 C4IW_STAG_STATE_INVALID
465 #define C4IW_NODE_DESC "cxgb4 Chelsio Communications"
467 #define MPA_KEY_REQ "MPA ID Req Frame"
468 #define MPA_KEY_REP "MPA ID Rep Frame"
470 #define MPA_MAX_PRIVATE_DATA 256
471 #define MPA_REJECT 0x20
473 #define MPA_MARKERS 0x80
474 #define MPA_FLAGS_MASK 0xE0
476 #define c4iw_put_ep(ep) { \
477 PDBG("put_ep (via %s:%u) ep %p refcnt %d\n", __func__, __LINE__, \
478 ep, atomic_read(&((ep)->kref.refcount))); \
479 WARN_ON(atomic_read(&((ep)->kref.refcount)) < 1); \
480 kref_put(&((ep)->kref), _c4iw_free_ep); \
483 #define c4iw_get_ep(ep) { \
484 PDBG("get_ep (via %s:%u) ep %p, refcnt %d\n", __func__, __LINE__, \
485 ep, atomic_read(&((ep)->kref.refcount))); \
486 kref_get(&((ep)->kref)); \
488 void _c4iw_free_ep(struct kref *kref);
494 __be16 private_data_size;
498 struct terminate_message {
505 #define TERM_MAX_LENGTH (sizeof(struct terminate_message) + 2 + 18 + 28)
507 enum c4iw_layers_types {
511 RDMAP_LOCAL_CATA = 0x00,
512 RDMAP_REMOTE_PROT = 0x01,
513 RDMAP_REMOTE_OP = 0x02,
514 DDP_LOCAL_CATA = 0x00,
515 DDP_TAGGED_ERR = 0x01,
516 DDP_UNTAGGED_ERR = 0x02,
520 enum c4iw_rdma_ecodes {
521 RDMAP_INV_STAG = 0x00,
522 RDMAP_BASE_BOUNDS = 0x01,
523 RDMAP_ACC_VIOL = 0x02,
524 RDMAP_STAG_NOT_ASSOC = 0x03,
525 RDMAP_TO_WRAP = 0x04,
526 RDMAP_INV_VERS = 0x05,
527 RDMAP_INV_OPCODE = 0x06,
528 RDMAP_STREAM_CATA = 0x07,
529 RDMAP_GLOBAL_CATA = 0x08,
530 RDMAP_CANT_INV_STAG = 0x09,
531 RDMAP_UNSPECIFIED = 0xff
534 enum c4iw_ddp_ecodes {
535 DDPT_INV_STAG = 0x00,
536 DDPT_BASE_BOUNDS = 0x01,
537 DDPT_STAG_NOT_ASSOC = 0x02,
539 DDPT_INV_VERS = 0x04,
541 DDPU_INV_MSN_NOBUF = 0x02,
542 DDPU_INV_MSN_RANGE = 0x03,
544 DDPU_MSG_TOOBIG = 0x05,
548 enum c4iw_mpa_ecodes {
550 MPA_MARKER_ERR = 0x03
569 PEER_ABORT_IN_PROGRESS = 0,
570 ABORT_REQ_IN_PROGRESS = 1,
571 RELEASE_RESOURCES = 2,
575 struct c4iw_ep_common {
576 struct iw_cm_id *cm_id;
578 struct c4iw_dev *dev;
579 enum c4iw_ep_state state;
582 struct sockaddr_in local_addr;
583 struct sockaddr_in remote_addr;
584 wait_queue_head_t waitq;
590 struct c4iw_listen_ep {
591 struct c4iw_ep_common com;
597 struct c4iw_ep_common com;
598 struct c4iw_ep *parent_ep;
599 struct timer_list timer;
600 struct list_head entry;
605 struct l2t_entry *l2t;
606 struct dst_entry *dst;
607 struct sk_buff *mpa_skb;
608 struct c4iw_mpa_attributes mpa_attr;
609 u8 mpa_pkt[sizeof(struct mpa_message) + MPA_MAX_PRIVATE_DATA];
610 unsigned int mpa_pkt_len;
624 static inline struct c4iw_ep *to_ep(struct iw_cm_id *cm_id)
626 return cm_id->provider_data;
629 static inline struct c4iw_listen_ep *to_listen_ep(struct iw_cm_id *cm_id)
631 return cm_id->provider_data;
634 static inline int compute_wscale(int win)
638 while (wscale < 14 && (65535<<wscale) < win)
643 typedef int (*c4iw_handler_func)(struct c4iw_dev *dev, struct sk_buff *skb);
645 int c4iw_ep_redirect(void *ctx, struct dst_entry *old, struct dst_entry *new,
646 struct l2t_entry *l2t);
647 void c4iw_put_qpid(struct c4iw_rdev *rdev, u32 qpid,
648 struct c4iw_dev_ucontext *uctx);
649 u32 c4iw_get_resource(struct kfifo *fifo, spinlock_t *lock);
650 void c4iw_put_resource(struct kfifo *fifo, u32 entry, spinlock_t *lock);
651 int c4iw_init_resource(struct c4iw_rdev *rdev, u32 nr_tpt, u32 nr_pdid);
652 int c4iw_init_ctrl_qp(struct c4iw_rdev *rdev);
653 int c4iw_pblpool_create(struct c4iw_rdev *rdev);
654 int c4iw_rqtpool_create(struct c4iw_rdev *rdev);
655 void c4iw_pblpool_destroy(struct c4iw_rdev *rdev);
656 void c4iw_rqtpool_destroy(struct c4iw_rdev *rdev);
657 void c4iw_destroy_resource(struct c4iw_resource *rscp);
658 int c4iw_destroy_ctrl_qp(struct c4iw_rdev *rdev);
659 int c4iw_register_device(struct c4iw_dev *dev);
660 void c4iw_unregister_device(struct c4iw_dev *dev);
661 int __init c4iw_cm_init(void);
662 void __exit c4iw_cm_term(void);
663 void c4iw_release_dev_ucontext(struct c4iw_rdev *rdev,
664 struct c4iw_dev_ucontext *uctx);
665 void c4iw_init_dev_ucontext(struct c4iw_rdev *rdev,
666 struct c4iw_dev_ucontext *uctx);
667 int c4iw_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc);
668 int c4iw_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
669 struct ib_send_wr **bad_wr);
670 int c4iw_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
671 struct ib_recv_wr **bad_wr);
672 int c4iw_bind_mw(struct ib_qp *qp, struct ib_mw *mw,
673 struct ib_mw_bind *mw_bind);
674 int c4iw_connect(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param);
675 int c4iw_create_listen(struct iw_cm_id *cm_id, int backlog);
676 int c4iw_destroy_listen(struct iw_cm_id *cm_id);
677 int c4iw_accept_cr(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param);
678 int c4iw_reject_cr(struct iw_cm_id *cm_id, const void *pdata, u8 pdata_len);
679 void c4iw_qp_add_ref(struct ib_qp *qp);
680 void c4iw_qp_rem_ref(struct ib_qp *qp);
681 void c4iw_free_fastreg_pbl(struct ib_fast_reg_page_list *page_list);
682 struct ib_fast_reg_page_list *c4iw_alloc_fastreg_pbl(
683 struct ib_device *device,
685 struct ib_mr *c4iw_alloc_fast_reg_mr(struct ib_pd *pd, int pbl_depth);
686 int c4iw_dealloc_mw(struct ib_mw *mw);
687 struct ib_mw *c4iw_alloc_mw(struct ib_pd *pd);
688 struct ib_mr *c4iw_reg_user_mr(struct ib_pd *pd, u64 start,
689 u64 length, u64 virt, int acc,
690 struct ib_udata *udata);
691 struct ib_mr *c4iw_get_dma_mr(struct ib_pd *pd, int acc);
692 struct ib_mr *c4iw_register_phys_mem(struct ib_pd *pd,
693 struct ib_phys_buf *buffer_list,
697 int c4iw_reregister_phys_mem(struct ib_mr *mr,
700 struct ib_phys_buf *buffer_list,
702 int acc, u64 *iova_start);
703 int c4iw_dereg_mr(struct ib_mr *ib_mr);
704 int c4iw_destroy_cq(struct ib_cq *ib_cq);
705 struct ib_cq *c4iw_create_cq(struct ib_device *ibdev, int entries,
707 struct ib_ucontext *ib_context,
708 struct ib_udata *udata);
709 int c4iw_resize_cq(struct ib_cq *cq, int cqe, struct ib_udata *udata);
710 int c4iw_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags flags);
711 int c4iw_destroy_qp(struct ib_qp *ib_qp);
712 struct ib_qp *c4iw_create_qp(struct ib_pd *pd,
713 struct ib_qp_init_attr *attrs,
714 struct ib_udata *udata);
715 int c4iw_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
716 int attr_mask, struct ib_udata *udata);
717 struct ib_qp *c4iw_get_qp(struct ib_device *dev, int qpn);
718 u32 c4iw_rqtpool_alloc(struct c4iw_rdev *rdev, int size);
719 void c4iw_rqtpool_free(struct c4iw_rdev *rdev, u32 addr, int size);
720 u32 c4iw_pblpool_alloc(struct c4iw_rdev *rdev, int size);
721 void c4iw_pblpool_free(struct c4iw_rdev *rdev, u32 addr, int size);
722 int c4iw_ofld_send(struct c4iw_rdev *rdev, struct sk_buff *skb);
723 void c4iw_flush_hw_cq(struct t4_cq *cq);
724 void c4iw_count_rcqes(struct t4_cq *cq, struct t4_wq *wq, int *count);
725 void c4iw_count_scqes(struct t4_cq *cq, struct t4_wq *wq, int *count);
726 int c4iw_ep_disconnect(struct c4iw_ep *ep, int abrupt, gfp_t gfp);
727 int c4iw_flush_rq(struct t4_wq *wq, struct t4_cq *cq, int count);
728 int c4iw_flush_sq(struct t4_wq *wq, struct t4_cq *cq, int count);
729 int c4iw_ev_handler(struct c4iw_dev *rnicp, u32 qid);
730 u16 c4iw_rqes_posted(struct c4iw_qp *qhp);
731 int c4iw_post_zb_read(struct c4iw_qp *qhp);
732 int c4iw_post_terminate(struct c4iw_qp *qhp, struct t4_cqe *err_cqe);
733 u32 c4iw_get_cqid(struct c4iw_rdev *rdev, struct c4iw_dev_ucontext *uctx);
734 void c4iw_put_cqid(struct c4iw_rdev *rdev, u32 qid,
735 struct c4iw_dev_ucontext *uctx);
736 u32 c4iw_get_qpid(struct c4iw_rdev *rdev, struct c4iw_dev_ucontext *uctx);
737 void c4iw_put_qpid(struct c4iw_rdev *rdev, u32 qid,
738 struct c4iw_dev_ucontext *uctx);
739 void c4iw_ev_dispatch(struct c4iw_dev *dev, struct t4_cqe *err_cqe);
741 extern struct cxgb4_client t4c_client;
742 extern c4iw_handler_func c4iw_handlers[NUM_CPL_CMDS];
743 extern int c4iw_max_read_depth;