drivers/iio/adc/at91_adc.c

   1 /*
   2  * Driver for the ADC present in the Atmel AT91 evaluation boards.
   3  *
   4  * Copyright 2011 Free Electrons
   5  *
   6  * Licensed under the GPLv2 or later.
   7  */
   8
   9 #include <linux/bitmap.h>
  10 #include <linux/bitops.h>
  11 #include <linux/clk.h>
  12 #include <linux/err.h>
  13 #include <linux/io.h>
  14 #include <linux/input.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/jiffies.h>
  17 #include <linux/kernel.h>
  18 #include <linux/module.h>
  19 #include <linux/of.h>
  20 #include <linux/of_device.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/sched.h>
  23 #include <linux/slab.h>
  24 #include <linux/wait.h>
  25
  26 #include <linux/platform_data/at91_adc.h>
  27
  28 #include <linux/iio/iio.h>
  29 #include <linux/iio/buffer.h>
  30 #include <linux/iio/trigger.h>
  31 #include <linux/iio/trigger_consumer.h>
  32 #include <linux/iio/triggered_buffer.h>
  33
  34 #include <mach/at91_adc.h>
  35
  36 #define AT91_ADC_CHAN(st, ch) \
  37         (st->registers->channel_base + (ch * 4))
  38 #define at91_adc_readl(st, reg) \
  39         (readl_relaxed(st->reg_base + reg))
  40 #define at91_adc_writel(st, reg, val) \
  41         (writel_relaxed(val, st->reg_base + reg))
  42
  43 #define DRIVER_NAME             "at91_adc"
  44 #define MAX_POS_BITS            12
  45
  46 #define TOUCH_SAMPLE_PERIOD_US          2000    /* 2ms */
  47 #define TOUCH_PEN_DETECT_DEBOUNCE_US    200
  48
  49 #define MAX_RLPOS_BITS         10
  50 #define TOUCH_SAMPLE_PERIOD_US_RL      10000   /* 10ms, the SoC can't keep up with 2ms */
  51 #define TOUCH_SHTIM                    0xa
  52
  53 /**
  54  * struct at91_adc_reg_desc - Various informations relative to registers
  55  * @channel_base:       Base offset for the channel data registers
  56  * @drdy_mask:          Mask of the DRDY field in the relevant registers
  57                         (Interruptions registers mostly)
  58  * @status_register:    Offset of the Interrupt Status Register
  59  * @trigger_register:   Offset of the Trigger setup register
  60  * @mr_prescal_mask:    Mask of the PRESCAL field in the adc MR register
  61  * @mr_startup_mask:    Mask of the STARTUP field in the adc MR register
  62  */
  63 struct at91_adc_reg_desc {
  64         u8      channel_base;
  65         u32     drdy_mask;
  66         u8      status_register;
  67         u8      trigger_register;
  68         u32     mr_prescal_mask;
  69         u32     mr_startup_mask;
  70 };
  71
  72 struct at91_adc_caps {
  73         bool    has_ts;         /* Support touch screen */
  74         bool    has_tsmr;       /* only at91sam9x5, sama5d3 have TSMR reg */
  75         /*
  76          * Numbers of sampling data will be averaged. Can be 0~3.
  77          * Hardware can average (2 ^ ts_filter_average) sample data.
  78          */
  79         u8      ts_filter_average;
  80         /* Pen Detection input pull-up resistor, can be 0~3 */
  81         u8      ts_pen_detect_sensitivity;
  82
  83         /* startup time calculate function */
  84         u32 (*calc_startup_ticks)(u8 startup_time, u32 adc_clk_khz);
  85
  86         u8      num_channels;
  87         struct at91_adc_reg_desc registers;
  88 };
  89
  90 struct at91_adc_state {
  91         struct clk              *adc_clk;
  92         u16                     *buffer;
  93         unsigned long           channels_mask;
  94         struct clk              *clk;
  95         bool                    done;
  96         int                     irq;
  97         u16                     last_value;
  98         struct mutex            lock;
  99         u8                      num_channels;
 100         void __iomem            *reg_base;
 101         struct at91_adc_reg_desc *registers;
 102         u8                      startup_time;
 103         u8                      sample_hold_time;
 104         bool                    sleep_mode;
 105         struct iio_trigger      **trig;
 106         struct at91_adc_trigger *trigger_list;
 107         u32                     trigger_number;
 108         bool                    use_external;
 109         u32                     vref_mv;
 110         u32                     res;            /* resolution used for convertions */
 111         bool                    low_res;        /* the resolution corresponds to the lowest one */
 112         wait_queue_head_t       wq_data_avail;
 113         struct at91_adc_caps    *caps;
 114
 115         /*
 116          * Following ADC channels are shared by touchscreen:
 117          *
 118          * CH0 -- Touch screen XP/UL
 119          * CH1 -- Touch screen XM/UR
 120          * CH2 -- Touch screen YP/LL
 121          * CH3 -- Touch screen YM/Sense
 122          * CH4 -- Touch screen LR(5-wire only)
 123          *
 124          * The bitfields below represents the reserved channel in the
 125          * touchscreen mode.
 126          */
 127 #define CHAN_MASK_TOUCHSCREEN_4WIRE     (0xf << 0)
 128 #define CHAN_MASK_TOUCHSCREEN_5WIRE     (0x1f << 0)
 129         enum atmel_adc_ts_type  touchscreen_type;
 130         struct input_dev        *ts_input;
 131
 132         u16                     ts_sample_period_val;
 133         u32                     ts_pressure_threshold;
 134         u16                     ts_pendbc;
 135
 136         bool                    ts_bufferedmeasure;
 137         u32                     ts_prev_absx;
 138         u32                     ts_prev_absy;
 139 };
 140
 141 static irqreturn_t at91_adc_trigger_handler(int irq, void *p)
 142 {
 143         struct iio_poll_func *pf = p;
 144         struct iio_dev *idev = pf->indio_dev;
 145         struct at91_adc_state *st = iio_priv(idev);
 146         int i, j = 0;
 147
 148         for (i = 0; i < idev->masklength; i++) {
 149                 if (!test_bit(i, idev->active_scan_mask))
 150                         continue;
 151                 st->buffer[j] = at91_adc_readl(st, AT91_ADC_CHAN(st, i));
 152                 j++;
 153         }
 154
 155         iio_push_to_buffers_with_timestamp(idev, st->buffer, pf->timestamp);
 156
 157         iio_trigger_notify_done(idev->trig);
 158
 159         /* Needed to ACK the DRDY interruption */
 160         at91_adc_readl(st, AT91_ADC_LCDR);
 161
 162         enable_irq(st->irq);
 163
 164         return IRQ_HANDLED;
 165 }
 166
 167 /* Handler for classic adc channel eoc trigger */
 168 void handle_adc_eoc_trigger(int irq, struct iio_dev *idev)
 169 {
 170         struct at91_adc_state *st = iio_priv(idev);
 171
 172         if (iio_buffer_enabled(idev)) {
 173                 disable_irq_nosync(irq);
 174                 iio_trigger_poll(idev->trig, iio_get_time_ns());
 175         } else {
 176                 st->last_value = at91_adc_readl(st, AT91_ADC_LCDR);
 177                 st->done = true;
 178                 wake_up_interruptible(&st->wq_data_avail);
 179         }
 180 }
 181
 182 static int at91_ts_sample(struct at91_adc_state *st)
 183 {
 184         unsigned int xscale, yscale, reg, z1, z2;
 185         unsigned int x, y, pres, xpos, ypos;
 186         unsigned int rxp = 1;
 187         unsigned int factor = 1000;
 188         struct iio_dev *idev = iio_priv_to_dev(st);
 189
 190         unsigned int xyz_mask_bits = st->res;
 191         unsigned int xyz_mask = (1 << xyz_mask_bits) - 1;
 192
 193         /* calculate position */
 194         /* x position = (x / xscale) * max, max = 2^MAX_POS_BITS - 1 */
 195         reg = at91_adc_readl(st, AT91_ADC_TSXPOSR);
 196         xpos = reg & xyz_mask;
 197         x = (xpos << MAX_POS_BITS) - xpos;
 198         xscale = (reg >> 16) & xyz_mask;
 199         if (xscale == 0) {
 200                 dev_err(&idev->dev, "Error: xscale == 0!\n");
 201                 return -1;
 202         }
 203         x /= xscale;
 204
 205         /* y position = (y / yscale) * max, max = 2^MAX_POS_BITS - 1 */
 206         reg = at91_adc_readl(st, AT91_ADC_TSYPOSR);
 207         ypos = reg & xyz_mask;
 208         y = (ypos << MAX_POS_BITS) - ypos;
 209         yscale = (reg >> 16) & xyz_mask;
 210         if (yscale == 0) {
 211                 dev_err(&idev->dev, "Error: yscale == 0!\n");
 212                 return -1;
 213         }
 214         y /= yscale;
 215
 216         /* calculate the pressure */
 217         reg = at91_adc_readl(st, AT91_ADC_TSPRESSR);
 218         z1 = reg & xyz_mask;
 219         z2 = (reg >> 16) & xyz_mask;
 220
 221         if (z1 != 0)
 222                 pres = rxp * (x * factor / 1024) * (z2 * factor / z1 - factor)
 223                         / factor;
 224         else
 225                 pres = st->ts_pressure_threshold;       /* no pen contacted */
 226
 227         dev_dbg(&idev->dev, "xpos = %d, xscale = %d, ypos = %d, yscale = %d, z1 = %d, z2 = %d, press = %d\n",
 228                                 xpos, xscale, ypos, yscale, z1, z2, pres);
 229
 230         if (pres < st->ts_pressure_threshold) {
 231                 dev_dbg(&idev->dev, "x = %d, y = %d, pressure = %d\n",
 232                                         x, y, pres / factor);
 233                 input_report_abs(st->ts_input, ABS_X, x);
 234                 input_report_abs(st->ts_input, ABS_Y, y);
 235                 input_report_abs(st->ts_input, ABS_PRESSURE, pres);
 236                 input_report_key(st->ts_input, BTN_TOUCH, 1);
 237                 input_sync(st->ts_input);
 238         } else {
 239                 dev_dbg(&idev->dev, "pressure too low: not reporting\n");
 240         }
 241
 242         return 0;
 243 }
 244
 245 static irqreturn_t at91_adc_rl_interrupt(int irq, void *private)
 246 {
 247         struct iio_dev *idev = private;
 248         struct at91_adc_state *st = iio_priv(idev);
 249         u32 status = at91_adc_readl(st, st->registers->status_register);
 250         unsigned int reg;
 251
 252         status &= at91_adc_readl(st, AT91_ADC_IMR);
 253         if (status & st->registers->drdy_mask)
 254                 handle_adc_eoc_trigger(irq, idev);
 255
 256         if (status & AT91RL_ADC_IER_PEN) {
 257                 /* Disabling pen debounce is required to get a NOPEN irq */
 258                 reg = at91_adc_readl(st, AT91_ADC_MR);
 259                 reg &= ~AT91_ADC_PENDBC;
 260                 at91_adc_writel(st, AT91_ADC_MR, reg);
 261
 262                 at91_adc_writel(st, AT91_ADC_IDR, AT91RL_ADC_IER_PEN);
 263                 at91_adc_writel(st, AT91_ADC_IER, AT91RL_ADC_IER_NOPEN
 264                                 | AT91_ADC_EOC(3));
 265                 /* Set up period trigger for sampling */
 266                 at91_adc_writel(st, st->registers->trigger_register,
 267                         AT91_ADC_TRGR_MOD_PERIOD_TRIG |
 268                         AT91_ADC_TRGR_TRGPER_(st->ts_sample_period_val));
 269         } else if (status & AT91RL_ADC_IER_NOPEN) {
 270                 reg = at91_adc_readl(st, AT91_ADC_MR);
 271                 reg |= AT91_ADC_PENDBC_(st->ts_pendbc) & AT91_ADC_PENDBC;
 272                 at91_adc_writel(st, AT91_ADC_MR, reg);
 273                 at91_adc_writel(st, st->registers->trigger_register,
 274                         AT91_ADC_TRGR_NONE);
 275
 276                 at91_adc_writel(st, AT91_ADC_IDR, AT91RL_ADC_IER_NOPEN
 277                                 | AT91_ADC_EOC(3));
 278                 at91_adc_writel(st, AT91_ADC_IER, AT91RL_ADC_IER_PEN);
 279                 st->ts_bufferedmeasure = false;
 280                 input_report_key(st->ts_input, BTN_TOUCH, 0);
 281                 input_sync(st->ts_input);
 282         } else if (status & AT91_ADC_EOC(3)) {
 283                 /* Conversion finished */
 284                 if (st->ts_bufferedmeasure) {
 285                         /*
 286                          * Last measurement is always discarded, since it can
 287                          * be erroneous.
 288                          * Always report previous measurement
 289                          */
 290                         input_report_abs(st->ts_input, ABS_X, st->ts_prev_absx);
 291                         input_report_abs(st->ts_input, ABS_Y, st->ts_prev_absy);
 292                         input_report_key(st->ts_input, BTN_TOUCH, 1);
 293                         input_sync(st->ts_input);
 294                 } else
 295                         st->ts_bufferedmeasure = true;
 296
 297                 /* Now make new measurement */
 298                 st->ts_prev_absx = at91_adc_readl(st, AT91_ADC_CHAN(st, 3))
 299                                    << MAX_RLPOS_BITS;
 300                 st->ts_prev_absx /= at91_adc_readl(st, AT91_ADC_CHAN(st, 2));
 301
 302                 st->ts_prev_absy = at91_adc_readl(st, AT91_ADC_CHAN(st, 1))
 303                                    << MAX_RLPOS_BITS;
 304                 st->ts_prev_absy /= at91_adc_readl(st, AT91_ADC_CHAN(st, 0));
 305         }
 306
 307         return IRQ_HANDLED;
 308 }
 309
 310 static irqreturn_t at91_adc_9x5_interrupt(int irq, void *private)
 311 {
 312         struct iio_dev *idev = private;
 313         struct at91_adc_state *st = iio_priv(idev);
 314         u32 status = at91_adc_readl(st, st->registers->status_register);
 315         const uint32_t ts_data_irq_mask =
 316                 AT91_ADC_IER_XRDY |
 317                 AT91_ADC_IER_YRDY |
 318                 AT91_ADC_IER_PRDY;
 319
 320         if (status & st->registers->drdy_mask)
 321                 handle_adc_eoc_trigger(irq, idev);
 322
 323         if (status & AT91_ADC_IER_PEN) {
 324                 at91_adc_writel(st, AT91_ADC_IDR, AT91_ADC_IER_PEN);
 325                 at91_adc_writel(st, AT91_ADC_IER, AT91_ADC_IER_NOPEN |
 326                         ts_data_irq_mask);
 327                 /* Set up period trigger for sampling */
 328                 at91_adc_writel(st, st->registers->trigger_register,
 329                         AT91_ADC_TRGR_MOD_PERIOD_TRIG |
 330                         AT91_ADC_TRGR_TRGPER_(st->ts_sample_period_val));
 331         } else if (status & AT91_ADC_IER_NOPEN) {
 332                 at91_adc_writel(st, st->registers->trigger_register, 0);
 333                 at91_adc_writel(st, AT91_ADC_IDR, AT91_ADC_IER_NOPEN |
 334                         ts_data_irq_mask);
 335                 at91_adc_writel(st, AT91_ADC_IER, AT91_ADC_IER_PEN);
 336
 337                 input_report_key(st->ts_input, BTN_TOUCH, 0);
 338                 input_sync(st->ts_input);
 339         } else if ((status & ts_data_irq_mask) == ts_data_irq_mask) {
 340                 /* Now all touchscreen data is ready */
 341
 342                 if (status & AT91_ADC_ISR_PENS) {
 343                         /* validate data by pen contact */
 344                         at91_ts_sample(st);
 345                 } else {
 346                         /* triggered by event that is no pen contact, just read
 347                          * them to clean the interrupt and discard all.
 348                          */
 349                         at91_adc_readl(st, AT91_ADC_TSXPOSR);
 350                         at91_adc_readl(st, AT91_ADC_TSYPOSR);
 351                         at91_adc_readl(st, AT91_ADC_TSPRESSR);
 352                 }
 353         }
 354
 355         return IRQ_HANDLED;
 356 }
 357
 358 static int at91_adc_channel_init(struct iio_dev *idev)
 359 {
 360         struct at91_adc_state *st = iio_priv(idev);
 361         struct iio_chan_spec *chan_array, *timestamp;
 362         int bit, idx = 0;
 363         unsigned long rsvd_mask = 0;
 364
 365         /* If touchscreen is enable, then reserve the adc channels */
 366         if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_4WIRE)
 367                 rsvd_mask = CHAN_MASK_TOUCHSCREEN_4WIRE;
 368         else if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_5WIRE)
 369                 rsvd_mask = CHAN_MASK_TOUCHSCREEN_5WIRE;
 370
 371         /* set up the channel mask to reserve touchscreen channels */
 372         st->channels_mask &= ~rsvd_mask;
 373
 374         idev->num_channels = bitmap_weight(&st->channels_mask,
 375                                            st->num_channels) + 1;
 376
 377         chan_array = devm_kzalloc(&idev->dev,
 378                                   ((idev->num_channels + 1) *
 379                                         sizeof(struct iio_chan_spec)),
 380                                   GFP_KERNEL);
 381
 382         if (!chan_array)
 383                 return -ENOMEM;
 384
 385         for_each_set_bit(bit, &st->channels_mask, st->num_channels) {
 386                 struct iio_chan_spec *chan = chan_array + idx;
 387
 388                 chan->type = IIO_VOLTAGE;
 389                 chan->indexed = 1;
 390                 chan->channel = bit;
 391                 chan->scan_index = idx;
 392                 chan->scan_type.sign = 'u';
 393                 chan->scan_type.realbits = st->res;
 394                 chan->scan_type.storagebits = 16;
 395                 chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);
 396                 chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
 397                 idx++;
 398         }
 399         timestamp = chan_array + idx;
 400
 401         timestamp->type = IIO_TIMESTAMP;
 402         timestamp->channel = -1;
 403         timestamp->scan_index = idx;
 404         timestamp->scan_type.sign = 's';
 405         timestamp->scan_type.realbits = 64;
 406         timestamp->scan_type.storagebits = 64;
 407
 408         idev->channels = chan_array;
 409         return idev->num_channels;
 410 }
 411
 412 static u8 at91_adc_get_trigger_value_by_name(struct iio_dev *idev,
 413                                              struct at91_adc_trigger *triggers,
 414                                              const char *trigger_name)
 415 {
 416         struct at91_adc_state *st = iio_priv(idev);
 417         u8 value = 0;
 418         int i;
 419
 420         for (i = 0; i < st->trigger_number; i++) {
 421                 char *name = kasprintf(GFP_KERNEL,
 422                                 "%s-dev%d-%s",
 423                                 idev->name,
 424                                 idev->id,
 425                                 triggers[i].name);
 426                 if (!name)
 427                         return -ENOMEM;
 428
 429                 if (strcmp(trigger_name, name) == 0) {
 430                         value = triggers[i].value;
 431                         kfree(name);
 432                         break;
 433                 }
 434
 435                 kfree(name);
 436         }
 437
 438         return value;
 439 }
 440
 441 static int at91_adc_configure_trigger(struct iio_trigger *trig, bool state)
 442 {
 443         struct iio_dev *idev = iio_trigger_get_drvdata(trig);
 444         struct at91_adc_state *st = iio_priv(idev);
 445         struct iio_buffer *buffer = idev->buffer;
 446         struct at91_adc_reg_desc *reg = st->registers;
 447         u32 status = at91_adc_readl(st, reg->trigger_register);
 448         u8 value;
 449         u8 bit;
 450
 451         value = at91_adc_get_trigger_value_by_name(idev,
 452                                                    st->trigger_list,
 453                                                    idev->trig->name);
 454         if (value == 0)
 455                 return -EINVAL;
 456
 457         if (state) {
 458                 st->buffer = kmalloc(idev->scan_bytes, GFP_KERNEL);
 459                 if (st->buffer == NULL)
 460                         return -ENOMEM;
 461
 462                 at91_adc_writel(st, reg->trigger_register,
 463                                 status | value);
 464
 465                 for_each_set_bit(bit, buffer->scan_mask,
 466                                  st->num_channels) {
 467                         struct iio_chan_spec const *chan = idev->channels + bit;
 468                         at91_adc_writel(st, AT91_ADC_CHER,
 469                                         AT91_ADC_CH(chan->channel));
 470                 }
 471
 472                 at91_adc_writel(st, AT91_ADC_IER, reg->drdy_mask);
 473
 474         } else {
 475                 at91_adc_writel(st, AT91_ADC_IDR, reg->drdy_mask);
 476
 477                 at91_adc_writel(st, reg->trigger_register,
 478                                 status & ~value);
 479
 480                 for_each_set_bit(bit, buffer->scan_mask,
 481                                  st->num_channels) {
 482                         struct iio_chan_spec const *chan = idev->channels + bit;
 483                         at91_adc_writel(st, AT91_ADC_CHDR,
 484                                         AT91_ADC_CH(chan->channel));
 485                 }
 486                 kfree(st->buffer);
 487         }
 488
 489         return 0;
 490 }
 491
 492 static const struct iio_trigger_ops at91_adc_trigger_ops = {
 493         .owner = THIS_MODULE,
 494         .set_trigger_state = &at91_adc_configure_trigger,
 495 };
 496
 497 static struct iio_trigger *at91_adc_allocate_trigger(struct iio_dev *idev,
 498                                                      struct at91_adc_trigger *trigger)
 499 {
 500         struct iio_trigger *trig;
 501         int ret;
 502
 503         trig = iio_trigger_alloc("%s-dev%d-%s", idev->name,
 504                                  idev->id, trigger->name);
 505         if (trig == NULL)
 506                 return NULL;
 507
 508         trig->dev.parent = idev->dev.parent;
 509         iio_trigger_set_drvdata(trig, idev);
 510         trig->ops = &at91_adc_trigger_ops;
 511
 512         ret = iio_trigger_register(trig);
 513         if (ret)
 514                 return NULL;
 515
 516         return trig;
 517 }
 518
 519 static int at91_adc_trigger_init(struct iio_dev *idev)
 520 {
 521         struct at91_adc_state *st = iio_priv(idev);
 522         int i, ret;
 523
 524         st->trig = devm_kzalloc(&idev->dev,
 525                                 st->trigger_number * sizeof(*st->trig),
 526                                 GFP_KERNEL);
 527
 528         if (st->trig == NULL) {
 529                 ret = -ENOMEM;
 530                 goto error_ret;
 531         }
 532
 533         for (i = 0; i < st->trigger_number; i++) {
 534                 if (st->trigger_list[i].is_external && !(st->use_external))
 535                         continue;
 536
 537                 st->trig[i] = at91_adc_allocate_trigger(idev,
 538                                                         st->trigger_list + i);
 539                 if (st->trig[i] == NULL) {
 540                         dev_err(&idev->dev,
 541                                 "Could not allocate trigger %d\n", i);
 542                         ret = -ENOMEM;
 543                         goto error_trigger;
 544                 }
 545         }
 546
 547         return 0;
 548
 549 error_trigger:
 550         for (i--; i >= 0; i--) {
 551                 iio_trigger_unregister(st->trig[i]);
 552                 iio_trigger_free(st->trig[i]);
 553         }
 554 error_ret:
 555         return ret;
 556 }
 557
 558 static void at91_adc_trigger_remove(struct iio_dev *idev)
 559 {
 560         struct at91_adc_state *st = iio_priv(idev);
 561         int i;
 562
 563         for (i = 0; i < st->trigger_number; i++) {
 564                 iio_trigger_unregister(st->trig[i]);
 565                 iio_trigger_free(st->trig[i]);
 566         }
 567 }
 568
 569 static int at91_adc_buffer_init(struct iio_dev *idev)
 570 {
 571         return iio_triggered_buffer_setup(idev, &iio_pollfunc_store_time,
 572                 &at91_adc_trigger_handler, NULL);
 573 }
 574
 575 static void at91_adc_buffer_remove(struct iio_dev *idev)
 576 {
 577         iio_triggered_buffer_cleanup(idev);
 578 }
 579
 580 static int at91_adc_read_raw(struct iio_dev *idev,
 581                              struct iio_chan_spec const *chan,
 582                              int *val, int *val2, long mask)
 583 {
 584         struct at91_adc_state *st = iio_priv(idev);
 585         int ret;
 586
 587         switch (mask) {
 588         case IIO_CHAN_INFO_RAW:
 589                 mutex_lock(&st->lock);
 590
 591                 at91_adc_writel(st, AT91_ADC_CHER,
 592                                 AT91_ADC_CH(chan->channel));
 593                 at91_adc_writel(st, AT91_ADC_IER, st->registers->drdy_mask);
 594                 at91_adc_writel(st, AT91_ADC_CR, AT91_ADC_START);
 595
 596                 ret = wait_event_interruptible_timeout(st->wq_data_avail,
 597                                                        st->done,
 598                                                        msecs_to_jiffies(1000));
 599                 if (ret == 0)
 600                         ret = -ETIMEDOUT;
 601                 if (ret < 0) {
 602                         mutex_unlock(&st->lock);
 603                         return ret;
 604                 }
 605
 606                 *val = st->last_value;
 607
 608                 at91_adc_writel(st, AT91_ADC_CHDR,
 609                                 AT91_ADC_CH(chan->channel));
 610                 at91_adc_writel(st, AT91_ADC_IDR, st->registers->drdy_mask);
 611
 612                 st->last_value = 0;
 613                 st->done = false;
 614                 mutex_unlock(&st->lock);
 615                 return IIO_VAL_INT;
 616
 617         case IIO_CHAN_INFO_SCALE:
 618                 *val = st->vref_mv;
 619                 *val2 = chan->scan_type.realbits;
 620                 return IIO_VAL_FRACTIONAL_LOG2;
 621         default:
 622                 break;
 623         }
 624         return -EINVAL;
 625 }
 626
 627 static int at91_adc_of_get_resolution(struct at91_adc_state *st,
 628                                       struct platform_device *pdev)
 629 {
 630         struct iio_dev *idev = iio_priv_to_dev(st);
 631         struct device_node *np = pdev->dev.of_node;
 632         int count, i, ret = 0;
 633         char *res_name, *s;
 634         u32 *resolutions;
 635
 636         count = of_property_count_strings(np, "atmel,adc-res-names");
 637         if (count < 2) {
 638                 dev_err(&idev->dev, "You must specified at least two resolution names for "
 639                                     "adc-res-names property in the DT\n");
 640                 return count;
 641         }
 642
 643         resolutions = kmalloc(count * sizeof(*resolutions), GFP_KERNEL);
 644         if (!resolutions)
 645                 return -ENOMEM;
 646
 647         if (of_property_read_u32_array(np, "atmel,adc-res", resolutions, count)) {
 648                 dev_err(&idev->dev, "Missing adc-res property in the DT.\n");
 649                 ret = -ENODEV;
 650                 goto ret;
 651         }
 652
 653         if (of_property_read_string(np, "atmel,adc-use-res", (const char **)&res_name))
 654                 res_name = "highres";
 655
 656         for (i = 0; i < count; i++) {
 657                 if (of_property_read_string_index(np, "atmel,adc-res-names", i, (const char **)&s))
 658                         continue;
 659
 660                 if (strcmp(res_name, s))
 661                         continue;
 662
 663                 st->res = resolutions[i];
 664                 if (!strcmp(res_name, "lowres"))
 665                         st->low_res = true;
 666                 else
 667                         st->low_res = false;
 668
 669                 dev_info(&idev->dev, "Resolution used: %u bits\n", st->res);
 670                 goto ret;
 671         }
 672
 673         dev_err(&idev->dev, "There is no resolution for %s\n", res_name);
 674
 675 ret:
 676         kfree(resolutions);
 677         return ret;
 678 }
 679
 680 static u32 calc_startup_ticks_9260(u8 startup_time, u32 adc_clk_khz)
 681 {
 682         /*
 683          * Number of ticks needed to cover the startup time of the ADC
 684          * as defined in the electrical characteristics of the board,
 685          * divided by 8. The formula thus is :
 686          *   Startup Time = (ticks + 1) * 8 / ADC Clock
 687          */
 688         return round_up((startup_time * adc_clk_khz / 1000) - 1, 8) / 8;
 689 }
 690
 691 static u32 calc_startup_ticks_9x5(u8 startup_time, u32 adc_clk_khz)
 692 {
 693         /*
 694          * For sama5d3x and at91sam9x5, the formula changes to:
 695          * Startup Time = <lookup_table_value> / ADC Clock
 696          */
 697         const int startup_lookup[] = {
 698                 0  , 8  , 16 , 24 ,
 699                 64 , 80 , 96 , 112,
 700                 512, 576, 640, 704,
 701                 768, 832, 896, 960
 702                 };
 703         int i, size = ARRAY_SIZE(startup_lookup);
 704         unsigned int ticks;
 705
 706         ticks = startup_time * adc_clk_khz / 1000;
 707         for (i = 0; i < size; i++)
 708                 if (ticks < startup_lookup[i])
 709                         break;
 710
 711         ticks = i;
 712         if (ticks == size)
 713                 /* Reach the end of lookup table */
 714                 ticks = size - 1;
 715
 716         return ticks;
 717 }
 718
 719 static const struct of_device_id at91_adc_dt_ids[];
 720
 721 static int at91_adc_probe_dt_ts(struct device_node *node,
 722         struct at91_adc_state *st, struct device *dev)
 723 {
 724         int ret;
 725         u32 prop;
 726
 727         ret = of_property_read_u32(node, "atmel,adc-ts-wires", &prop);
 728         if (ret) {
 729                 dev_info(dev, "ADC Touch screen is disabled.\n");
 730                 return 0;
 731         }
 732
 733         switch (prop) {
 734         case 4:
 735         case 5:
 736                 st->touchscreen_type = prop;
 737                 break;
 738         default:
 739                 dev_err(dev, "Unsupported number of touchscreen wires (%d). Should be 4 or 5.\n", prop);
 740                 return -EINVAL;
 741         }
 742
 743         if (!st->caps->has_tsmr)
 744                 return 0;
 745         prop = 0;
 746         of_property_read_u32(node, "atmel,adc-ts-pressure-threshold", &prop);
 747         st->ts_pressure_threshold = prop;
 748         if (st->ts_pressure_threshold) {
 749                 return 0;
 750         } else {
 751                 dev_err(dev, "Invalid pressure threshold for the touchscreen\n");
 752                 return -EINVAL;
 753         }
 754 }
 755
 756 static int at91_adc_probe_dt(struct at91_adc_state *st,
 757                              struct platform_device *pdev)
 758 {
 759         struct iio_dev *idev = iio_priv_to_dev(st);
 760         struct device_node *node = pdev->dev.of_node;
 761         struct device_node *trig_node;
 762         int i = 0, ret;
 763         u32 prop;
 764
 765         if (!node)
 766                 return -EINVAL;
 767
 768         st->caps = (struct at91_adc_caps *)
 769                 of_match_device(at91_adc_dt_ids, &pdev->dev)->data;
 770
 771         st->use_external = of_property_read_bool(node, "atmel,adc-use-external-triggers");
 772
 773         if (of_property_read_u32(node, "atmel,adc-channels-used", &prop)) {
 774                 dev_err(&idev->dev, "Missing adc-channels-used property in the DT.\n");
 775                 ret = -EINVAL;
 776                 goto error_ret;
 777         }
 778         st->channels_mask = prop;
 779
 780         st->sleep_mode = of_property_read_bool(node, "atmel,adc-sleep-mode");
 781
 782         if (of_property_read_u32(node, "atmel,adc-startup-time", &prop)) {
 783                 dev_err(&idev->dev, "Missing adc-startup-time property in the DT.\n");
 784                 ret = -EINVAL;
 785                 goto error_ret;
 786         }
 787         st->startup_time = prop;
 788
 789         prop = 0;
 790         of_property_read_u32(node, "atmel,adc-sample-hold-time", &prop);
 791         st->sample_hold_time = prop;
 792
 793         if (of_property_read_u32(node, "atmel,adc-vref", &prop)) {
 794                 dev_err(&idev->dev, "Missing adc-vref property in the DT.\n");
 795                 ret = -EINVAL;
 796                 goto error_ret;
 797         }
 798         st->vref_mv = prop;
 799
 800         ret = at91_adc_of_get_resolution(st, pdev);
 801         if (ret)
 802                 goto error_ret;
 803
 804         st->registers = &st->caps->registers;
 805         st->num_channels = st->caps->num_channels;
 806         st->trigger_number = of_get_child_count(node);
 807         st->trigger_list = devm_kzalloc(&idev->dev, st->trigger_number *
 808                                         sizeof(struct at91_adc_trigger),
 809                                         GFP_KERNEL);
 810         if (!st->trigger_list) {
 811                 dev_err(&idev->dev, "Could not allocate trigger list memory.\n");
 812                 ret = -ENOMEM;
 813                 goto error_ret;
 814         }
 815
 816         for_each_child_of_node(node, trig_node) {
 817                 struct at91_adc_trigger *trig = st->trigger_list + i;
 818                 const char *name;
 819
 820                 if (of_property_read_string(trig_node, "trigger-name", &name)) {
 821                         dev_err(&idev->dev, "Missing trigger-name property in the DT.\n");
 822                         ret = -EINVAL;
 823                         goto error_ret;
 824                 }
 825                 trig->name = name;
 826
 827                 if (of_property_read_u32(trig_node, "trigger-value", &prop)) {
 828                         dev_err(&idev->dev, "Missing trigger-value property in the DT.\n");
 829                         ret = -EINVAL;
 830                         goto error_ret;
 831                 }
 832                 trig->value = prop;
 833                 trig->is_external = of_property_read_bool(trig_node, "trigger-external");
 834                 i++;
 835         }
 836
 837         /* Check if touchscreen is supported. */
 838         if (st->caps->has_ts)
 839                 return at91_adc_probe_dt_ts(node, st, &idev->dev);
 840         else
 841                 dev_info(&idev->dev, "not support touchscreen in the adc compatible string.\n");
 842
 843         return 0;
 844
 845 error_ret:
 846         return ret;
 847 }
 848
 849 static int at91_adc_probe_pdata(struct at91_adc_state *st,
 850                                 struct platform_device *pdev)
 851 {
 852         struct at91_adc_data *pdata = pdev->dev.platform_data;
 853
 854         if (!pdata)
 855                 return -EINVAL;
 856
 857         st->caps = (struct at91_adc_caps *)
 858                         platform_get_device_id(pdev)->driver_data;
 859
 860         st->use_external = pdata->use_external_triggers;
 861         st->vref_mv = pdata->vref;
 862         st->channels_mask = pdata->channels_used;
 863         st->num_channels = st->caps->num_channels;
 864         st->startup_time = pdata->startup_time;
 865         st->trigger_number = pdata->trigger_number;
 866         st->trigger_list = pdata->trigger_list;
 867         st->registers = &st->caps->registers;
 868         st->touchscreen_type = pdata->touchscreen_type;
 869
 870         return 0;
 871 }
 872
 873 static const struct iio_info at91_adc_info = {
 874         .driver_module = THIS_MODULE,
 875         .read_raw = &at91_adc_read_raw,
 876 };
 877
 878 /* Touchscreen related functions */
 879 static int atmel_ts_open(struct input_dev *dev)
 880 {
 881         struct at91_adc_state *st = input_get_drvdata(dev);
 882
 883         if (st->caps->has_tsmr)
 884                 at91_adc_writel(st, AT91_ADC_IER, AT91_ADC_IER_PEN);
 885         else
 886                 at91_adc_writel(st, AT91_ADC_IER, AT91RL_ADC_IER_PEN);
 887         return 0;
 888 }
 889
 890 static void atmel_ts_close(struct input_dev *dev)
 891 {
 892         struct at91_adc_state *st = input_get_drvdata(dev);
 893
 894         if (st->caps->has_tsmr)
 895                 at91_adc_writel(st, AT91_ADC_IDR, AT91_ADC_IER_PEN);
 896         else
 897                 at91_adc_writel(st, AT91_ADC_IDR, AT91RL_ADC_IER_PEN);
 898 }
 899
 900 static int at91_ts_hw_init(struct at91_adc_state *st, u32 adc_clk_khz)
 901 {
 902         u32 reg = 0;
 903         int i = 0;
 904
 905         /* a Pen Detect Debounce Time is necessary for the ADC Touch to avoid
 906          * pen detect noise.
 907          * The formula is : Pen Detect Debounce Time = (2 ^ pendbc) / ADCClock
 908          */
 909         st->ts_pendbc = round_up(TOUCH_PEN_DETECT_DEBOUNCE_US * adc_clk_khz /
 910                                  1000, 1);
 911
 912         while (st->ts_pendbc >> ++i)
 913                 ;       /* Empty! Find the shift offset */
 914         if (abs(st->ts_pendbc - (1 << i)) < abs(st->ts_pendbc - (1 << (i - 1))))
 915                 st->ts_pendbc = i;
 916         else
 917                 st->ts_pendbc = i - 1;
 918
 919         if (!st->caps->has_tsmr) {
 920                 reg = at91_adc_readl(st, AT91_ADC_MR);
 921                 reg |= AT91_ADC_TSAMOD_TS_ONLY_MODE | AT91_ADC_PENDET;
 922
 923                 reg |= AT91_ADC_PENDBC_(st->ts_pendbc) & AT91_ADC_PENDBC;
 924                 at91_adc_writel(st, AT91_ADC_MR, reg);
 925
 926                 reg = AT91_ADC_TSR_SHTIM_(TOUCH_SHTIM) & AT91_ADC_TSR_SHTIM;
 927                 at91_adc_writel(st, AT91_ADC_TSR, reg);
 928
 929                 st->ts_sample_period_val = round_up((TOUCH_SAMPLE_PERIOD_US_RL *
 930                                                     adc_clk_khz / 1000) - 1, 1);
 931
 932                 return 0;
 933         }
 934
 935         if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_4WIRE)
 936                 reg = AT91_ADC_TSMR_TSMODE_4WIRE_PRESS;
 937         else
 938                 reg = AT91_ADC_TSMR_TSMODE_5WIRE;
 939
 940         reg |= AT91_ADC_TSMR_TSAV_(st->caps->ts_filter_average)
 941                & AT91_ADC_TSMR_TSAV;
 942         reg |= AT91_ADC_TSMR_PENDBC_(st->ts_pendbc) & AT91_ADC_TSMR_PENDBC;
 943         reg |= AT91_ADC_TSMR_NOTSDMA;
 944         reg |= AT91_ADC_TSMR_PENDET_ENA;
 945         reg |= 0x03 << 8;       /* TSFREQ, needs to be bigger than TSAV */
 946
 947         at91_adc_writel(st, AT91_ADC_TSMR, reg);
 948
 949         /* Change adc internal resistor value for better pen detection,
 950          * default value is 100 kOhm.
 951          * 0 = 200 kOhm, 1 = 150 kOhm, 2 = 100 kOhm, 3 = 50 kOhm
 952          * option only available on ES2 and higher
 953          */
 954         at91_adc_writel(st, AT91_ADC_ACR, st->caps->ts_pen_detect_sensitivity
 955                         & AT91_ADC_ACR_PENDETSENS);
 956
 957         /* Sample Period Time = (TRGPER + 1) / ADCClock */
 958         st->ts_sample_period_val = round_up((TOUCH_SAMPLE_PERIOD_US *
 959                         adc_clk_khz / 1000) - 1, 1);
 960
 961         return 0;
 962 }
 963
 964 static int at91_ts_register(struct at91_adc_state *st,
 965                 struct platform_device *pdev)
 966 {
 967         struct input_dev *input;
 968         struct iio_dev *idev = iio_priv_to_dev(st);
 969         int ret;
 970
 971         input = input_allocate_device();
 972         if (!input) {
 973                 dev_err(&idev->dev, "Failed to allocate TS device!\n");
 974                 return -ENOMEM;
 975         }
 976
 977         input->name = DRIVER_NAME;
 978         input->id.bustype = BUS_HOST;
 979         input->dev.parent = &pdev->dev;
 980         input->open = atmel_ts_open;
 981         input->close = atmel_ts_close;
 982
 983         __set_bit(EV_ABS, input->evbit);
 984         __set_bit(EV_KEY, input->evbit);
 985         __set_bit(BTN_TOUCH, input->keybit);
 986         if (st->caps->has_tsmr) {
 987                 input_set_abs_params(input, ABS_X, 0, (1 << MAX_POS_BITS) - 1,
 988                                      0, 0);
 989                 input_set_abs_params(input, ABS_Y, 0, (1 << MAX_POS_BITS) - 1,
 990                                      0, 0);
 991                 input_set_abs_params(input, ABS_PRESSURE, 0, 0xffffff, 0, 0);
 992         } else {
 993                 if (st->touchscreen_type != ATMEL_ADC_TOUCHSCREEN_4WIRE) {
 994                         dev_err(&pdev->dev,
 995                                 "This touchscreen controller only support 4 wires\n");
 996                         ret = -EINVAL;
 997                         goto err;
 998                 }
 999
1000                 input_set_abs_params(input, ABS_X, 0, (1 << MAX_RLPOS_BITS) - 1,
1001                                      0, 0);
1002                 input_set_abs_params(input, ABS_Y, 0, (1 << MAX_RLPOS_BITS) - 1,
1003                                      0, 0);
1004         }
1005
1006         st->ts_input = input;
1007         input_set_drvdata(input, st);
1008
1009         ret = input_register_device(input);
1010         if (ret)
1011                 goto err;
1012
1013         return ret;
1014
1015 err:
1016         input_free_device(st->ts_input);
1017         return ret;
1018 }
1019
1020 static void at91_ts_unregister(struct at91_adc_state *st)
1021 {
1022         input_unregister_device(st->ts_input);
1023 }
1024
1025 static int at91_adc_probe(struct platform_device *pdev)
1026 {
1027         unsigned int prsc, mstrclk, ticks, adc_clk, adc_clk_khz, shtim;
1028         int ret;
1029         struct iio_dev *idev;
1030         struct at91_adc_state *st;
1031         struct resource *res;
1032         u32 reg;
1033
1034         idev = devm_iio_device_alloc(&pdev->dev, sizeof(struct at91_adc_state));
1035         if (!idev)
1036                 return -ENOMEM;
1037
1038         st = iio_priv(idev);
1039
1040         if (pdev->dev.of_node)
1041                 ret = at91_adc_probe_dt(st, pdev);
1042         else
1043                 ret = at91_adc_probe_pdata(st, pdev);
1044
1045         if (ret) {
1046                 dev_err(&pdev->dev, "No platform data available.\n");
1047                 return -EINVAL;
1048         }
1049
1050         platform_set_drvdata(pdev, idev);
1051
1052         idev->dev.parent = &pdev->dev;
1053         idev->name = dev_name(&pdev->dev);
1054         idev->modes = INDIO_DIRECT_MODE;
1055         idev->info = &at91_adc_info;
1056
1057         st->irq = platform_get_irq(pdev, 0);
1058         if (st->irq < 0) {
1059                 dev_err(&pdev->dev, "No IRQ ID is designated\n");
1060                 return -ENODEV;
1061         }
1062
1063         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1064
1065         st->reg_base = devm_ioremap_resource(&pdev->dev, res);
1066         if (IS_ERR(st->reg_base)) {
1067                 return PTR_ERR(st->reg_base);
1068         }
1069
1070         /*
1071          * Disable all IRQs before setting up the handler
1072          */
1073         at91_adc_writel(st, AT91_ADC_CR, AT91_ADC_SWRST);
1074         at91_adc_writel(st, AT91_ADC_IDR, 0xFFFFFFFF);
1075
1076         if (st->caps->has_tsmr)
1077                 ret = request_irq(st->irq, at91_adc_9x5_interrupt, 0,
1078                                   pdev->dev.driver->name, idev);
1079         else
1080                 ret = request_irq(st->irq, at91_adc_rl_interrupt, 0,
1081                                   pdev->dev.driver->name, idev);
1082         if (ret) {
1083                 dev_err(&pdev->dev, "Failed to allocate IRQ.\n");
1084                 return ret;
1085         }
1086
1087         st->clk = devm_clk_get(&pdev->dev, "adc_clk");
1088         if (IS_ERR(st->clk)) {
1089                 dev_err(&pdev->dev, "Failed to get the clock.\n");
1090                 ret = PTR_ERR(st->clk);
1091                 goto error_free_irq;
1092         }
1093
1094         ret = clk_prepare_enable(st->clk);
1095         if (ret) {
1096                 dev_err(&pdev->dev,
1097                         "Could not prepare or enable the clock.\n");
1098                 goto error_free_irq;
1099         }
1100
1101         st->adc_clk = devm_clk_get(&pdev->dev, "adc_op_clk");
1102         if (IS_ERR(st->adc_clk)) {
1103                 dev_err(&pdev->dev, "Failed to get the ADC clock.\n");
1104                 ret = PTR_ERR(st->adc_clk);
1105                 goto error_disable_clk;
1106         }
1107
1108         ret = clk_prepare_enable(st->adc_clk);
1109         if (ret) {
1110                 dev_err(&pdev->dev,
1111                         "Could not prepare or enable the ADC clock.\n");
1112                 goto error_disable_clk;
1113         }
1114
1115         /*
1116          * Prescaler rate computation using the formula from the Atmel's
1117          * datasheet : ADC Clock = MCK / ((Prescaler + 1) * 2), ADC Clock being
1118          * specified by the electrical characteristics of the board.
1119          */
1120         mstrclk = clk_get_rate(st->clk);
1121         adc_clk = clk_get_rate(st->adc_clk);
1122         adc_clk_khz = adc_clk / 1000;
1123
1124         dev_dbg(&pdev->dev, "Master clock is set as: %d Hz, adc_clk should set as: %d Hz\n",
1125                 mstrclk, adc_clk);
1126
1127         prsc = (mstrclk / (2 * adc_clk)) - 1;
1128
1129         if (!st->startup_time) {
1130                 dev_err(&pdev->dev, "No startup time available.\n");
1131                 ret = -EINVAL;
1132                 goto error_disable_adc_clk;
1133         }
1134         ticks = (*st->caps->calc_startup_ticks)(st->startup_time, adc_clk_khz);
1135
1136         /*
1137          * a minimal Sample and Hold Time is necessary for the ADC to guarantee
1138          * the best converted final value between two channels selection
1139          * The formula thus is : Sample and Hold Time = (shtim + 1) / ADCClock
1140          */
1141         if (st->sample_hold_time > 0)
1142                 shtim = round_up((st->sample_hold_time * adc_clk_khz / 1000)
1143                                  - 1, 1);
1144         else
1145                 shtim = 0;
1146
1147         reg = AT91_ADC_PRESCAL_(prsc) & st->registers->mr_prescal_mask;
1148         reg |= AT91_ADC_STARTUP_(ticks) & st->registers->mr_startup_mask;
1149         if (st->low_res)
1150                 reg |= AT91_ADC_LOWRES;
1151         if (st->sleep_mode)
1152                 reg |= AT91_ADC_SLEEP;
1153         reg |= AT91_ADC_SHTIM_(shtim) & AT91_ADC_SHTIM;
1154         at91_adc_writel(st, AT91_ADC_MR, reg);
1155
1156         /* Setup the ADC channels available on the board */
1157         ret = at91_adc_channel_init(idev);
1158         if (ret < 0) {
1159                 dev_err(&pdev->dev, "Couldn't initialize the channels.\n");
1160                 goto error_disable_adc_clk;
1161         }
1162
1163         init_waitqueue_head(&st->wq_data_avail);
1164         mutex_init(&st->lock);
1165
1166         /*
1167          * Since touch screen will set trigger register as period trigger. So
1168          * when touch screen is enabled, then we have to disable hardware
1169          * trigger for classic adc.
1170          */
1171         if (!st->touchscreen_type) {
1172                 ret = at91_adc_buffer_init(idev);
1173                 if (ret < 0) {
1174                         dev_err(&pdev->dev, "Couldn't initialize the buffer.\n");
1175                         goto error_disable_adc_clk;
1176                 }
1177
1178                 ret = at91_adc_trigger_init(idev);
1179                 if (ret < 0) {
1180                         dev_err(&pdev->dev, "Couldn't setup the triggers.\n");
1181                         at91_adc_buffer_remove(idev);
1182                         goto error_disable_adc_clk;
1183                 }
1184         } else {
1185                 ret = at91_ts_register(st, pdev);
1186                 if (ret)
1187                         goto error_disable_adc_clk;
1188
1189                 at91_ts_hw_init(st, adc_clk_khz);
1190         }
1191
1192         ret = iio_device_register(idev);
1193         if (ret < 0) {
1194                 dev_err(&pdev->dev, "Couldn't register the device.\n");
1195                 goto error_iio_device_register;
1196         }
1197
1198         return 0;
1199
1200 error_iio_device_register:
1201         if (!st->touchscreen_type) {
1202                 at91_adc_trigger_remove(idev);
1203                 at91_adc_buffer_remove(idev);
1204         } else {
1205                 at91_ts_unregister(st);
1206         }
1207 error_disable_adc_clk:
1208         clk_disable_unprepare(st->adc_clk);
1209 error_disable_clk:
1210         clk_disable_unprepare(st->clk);
1211 error_free_irq:
1212         free_irq(st->irq, idev);
1213         return ret;
1214 }
1215
1216 static int at91_adc_remove(struct platform_device *pdev)
1217 {
1218         struct iio_dev *idev = platform_get_drvdata(pdev);
1219         struct at91_adc_state *st = iio_priv(idev);
1220
1221         iio_device_unregister(idev);
1222         if (!st->touchscreen_type) {
1223                 at91_adc_trigger_remove(idev);
1224                 at91_adc_buffer_remove(idev);
1225         } else {
1226                 at91_ts_unregister(st);
1227         }
1228         clk_disable_unprepare(st->adc_clk);
1229         clk_disable_unprepare(st->clk);
1230         free_irq(st->irq, idev);
1231
1232         return 0;
1233 }
1234
1235 static struct at91_adc_caps at91sam9260_caps = {
1236         .calc_startup_ticks = calc_startup_ticks_9260,
1237         .num_channels = 4,
1238         .registers = {
1239                 .channel_base = AT91_ADC_CHR(0),
1240                 .drdy_mask = AT91_ADC_DRDY,
1241                 .status_register = AT91_ADC_SR,
1242                 .trigger_register = AT91_ADC_TRGR_9260,
1243                 .mr_prescal_mask = AT91_ADC_PRESCAL_9260,
1244                 .mr_startup_mask = AT91_ADC_STARTUP_9260,
1245         },
1246 };
1247
1248 static struct at91_adc_caps at91sam9g45_caps = {
1249         .has_ts = true,
1250         .calc_startup_ticks = calc_startup_ticks_9260,  /* same as 9260 */
1251         .num_channels = 8,
1252         .registers = {
1253                 .channel_base = AT91_ADC_CHR(0),
1254                 .drdy_mask = AT91_ADC_DRDY,
1255                 .status_register = AT91_ADC_SR,
1256                 .trigger_register = AT91_ADC_TRGR_9G45,
1257                 .mr_prescal_mask = AT91_ADC_PRESCAL_9G45,
1258                 .mr_startup_mask = AT91_ADC_STARTUP_9G45,
1259         },
1260 };
1261
1262 static struct at91_adc_caps at91sam9x5_caps = {
1263         .has_ts = true,
1264         .has_tsmr = true,
1265         .ts_filter_average = 3,
1266         .ts_pen_detect_sensitivity = 2,
1267         .calc_startup_ticks = calc_startup_ticks_9x5,
1268         .num_channels = 12,
1269         .registers = {
1270                 .channel_base = AT91_ADC_CDR0_9X5,
1271                 .drdy_mask = AT91_ADC_SR_DRDY_9X5,
1272                 .status_register = AT91_ADC_SR_9X5,
1273                 .trigger_register = AT91_ADC_TRGR_9X5,
1274                 /* prescal mask is same as 9G45 */
1275                 .mr_prescal_mask = AT91_ADC_PRESCAL_9G45,
1276                 .mr_startup_mask = AT91_ADC_STARTUP_9X5,
1277         },
1278 };
1279
1280 static const struct of_device_id at91_adc_dt_ids[] = {
1281         { .compatible = "atmel,at91sam9260-adc", .data = &at91sam9260_caps },
1282         { .compatible = "atmel,at91sam9g45-adc", .data = &at91sam9g45_caps },
1283         { .compatible = "atmel,at91sam9x5-adc", .data = &at91sam9x5_caps },
1284         {},
1285 };
1286 MODULE_DEVICE_TABLE(of, at91_adc_dt_ids);
1287
1288 static const struct platform_device_id at91_adc_ids[] = {
1289         {
1290                 .name = "at91sam9260-adc",
1291                 .driver_data = (unsigned long)&at91sam9260_caps,
1292         }, {
1293                 .name = "at91sam9g45-adc",
1294                 .driver_data = (unsigned long)&at91sam9g45_caps,
1295         }, {
1296                 .name = "at91sam9x5-adc",
1297                 .driver_data = (unsigned long)&at91sam9x5_caps,
1298         }, {
1299                 /* terminator */
1300         }
1301 };
1302 MODULE_DEVICE_TABLE(platform, at91_adc_ids);
1303
1304 static struct platform_driver at91_adc_driver = {
1305         .probe = at91_adc_probe,
1306         .remove = at91_adc_remove,
1307         .id_table = at91_adc_ids,
1308         .driver = {
1309                    .name = DRIVER_NAME,
1310                    .of_match_table = of_match_ptr(at91_adc_dt_ids),
1311         },
1312 };
1313
1314 module_platform_driver(at91_adc_driver);
1315
1316 MODULE_LICENSE("GPL");
1317 MODULE_DESCRIPTION("Atmel AT91 ADC Driver");
1318 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");