Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wirel...
[pandora-kernel.git] / drivers / iio / adc / ad7476.c
1 /*
2  * AD7466/7/8 AD7476/5/7/8 (A) SPI ADC driver
3  *
4  * Copyright 2010 Analog Devices Inc.
5  *
6  * Licensed under the GPL-2 or later.
7  */
8
9 #include <linux/device.h>
10 #include <linux/kernel.h>
11 #include <linux/slab.h>
12 #include <linux/sysfs.h>
13 #include <linux/spi/spi.h>
14 #include <linux/regulator/consumer.h>
15 #include <linux/err.h>
16 #include <linux/module.h>
17
18 #include <linux/iio/iio.h>
19 #include <linux/iio/sysfs.h>
20 #include <linux/iio/buffer.h>
21 #include <linux/iio/trigger_consumer.h>
22 #include <linux/iio/triggered_buffer.h>
23
24 #define RES_MASK(bits)  ((1 << (bits)) - 1)
25
26 struct ad7476_state;
27
28 struct ad7476_chip_info {
29         unsigned int                    int_vref_uv;
30         struct iio_chan_spec            channel[2];
31         void (*reset)(struct ad7476_state *);
32 };
33
34 struct ad7476_state {
35         struct spi_device               *spi;
36         const struct ad7476_chip_info   *chip_info;
37         struct regulator                *reg;
38         struct spi_transfer             xfer;
39         struct spi_message              msg;
40         /*
41          * DMA (thus cache coherency maintenance) requires the
42          * transfer buffers to live in their own cache lines.
43          * Make the buffer large enough for one 16 bit sample and one 64 bit
44          * aligned 64 bit timestamp.
45          */
46         unsigned char data[ALIGN(2, sizeof(s64)) + sizeof(s64)]
47                         ____cacheline_aligned;
48 };
49
50 enum ad7476_supported_device_ids {
51         ID_AD7091R,
52         ID_AD7276,
53         ID_AD7277,
54         ID_AD7278,
55         ID_AD7466,
56         ID_AD7467,
57         ID_AD7468,
58         ID_AD7495,
59         ID_AD7940,
60 };
61
62 static irqreturn_t ad7476_trigger_handler(int irq, void  *p)
63 {
64         struct iio_poll_func *pf = p;
65         struct iio_dev *indio_dev = pf->indio_dev;
66         struct ad7476_state *st = iio_priv(indio_dev);
67         s64 time_ns;
68         int b_sent;
69
70         b_sent = spi_sync(st->spi, &st->msg);
71         if (b_sent < 0)
72                 goto done;
73
74         time_ns = iio_get_time_ns();
75
76         if (indio_dev->scan_timestamp)
77                 ((s64 *)st->data)[1] = time_ns;
78
79         iio_push_to_buffers(indio_dev, st->data);
80 done:
81         iio_trigger_notify_done(indio_dev->trig);
82
83         return IRQ_HANDLED;
84 }
85
86 static void ad7091_reset(struct ad7476_state *st)
87 {
88         /* Any transfers with 8 scl cycles will reset the device */
89         spi_read(st->spi, st->data, 1);
90 }
91
92 static int ad7476_scan_direct(struct ad7476_state *st)
93 {
94         int ret;
95
96         ret = spi_sync(st->spi, &st->msg);
97         if (ret)
98                 return ret;
99
100         return be16_to_cpup((__be16 *)st->data);
101 }
102
103 static int ad7476_read_raw(struct iio_dev *indio_dev,
104                            struct iio_chan_spec const *chan,
105                            int *val,
106                            int *val2,
107                            long m)
108 {
109         int ret;
110         struct ad7476_state *st = iio_priv(indio_dev);
111         int scale_uv;
112
113         switch (m) {
114         case IIO_CHAN_INFO_RAW:
115                 mutex_lock(&indio_dev->mlock);
116                 if (iio_buffer_enabled(indio_dev))
117                         ret = -EBUSY;
118                 else
119                         ret = ad7476_scan_direct(st);
120                 mutex_unlock(&indio_dev->mlock);
121
122                 if (ret < 0)
123                         return ret;
124                 *val = (ret >> st->chip_info->channel[0].scan_type.shift) &
125                         RES_MASK(st->chip_info->channel[0].scan_type.realbits);
126                 return IIO_VAL_INT;
127         case IIO_CHAN_INFO_SCALE:
128                 if (!st->chip_info->int_vref_uv) {
129                         scale_uv = regulator_get_voltage(st->reg);
130                         if (scale_uv < 0)
131                                 return scale_uv;
132                 } else {
133                         scale_uv = st->chip_info->int_vref_uv;
134                 }
135                 scale_uv >>= chan->scan_type.realbits;
136                 *val =  scale_uv / 1000;
137                 *val2 = (scale_uv % 1000) * 1000;
138                 return IIO_VAL_INT_PLUS_MICRO;
139         }
140         return -EINVAL;
141 }
142
143 #define _AD7476_CHAN(bits, _shift, _info_mask)                  \
144         {                                                       \
145         .type = IIO_VOLTAGE,                                    \
146         .indexed = 1,                                           \
147         .info_mask = _info_mask |                               \
148         IIO_CHAN_INFO_SCALE_SHARED_BIT,                         \
149         .scan_type = {                                          \
150                 .sign = 'u',                                    \
151                 .realbits = (bits),                             \
152                 .storagebits = 16,                              \
153                 .shift = (_shift),                              \
154                 .endianness = IIO_BE,                           \
155         },                                                      \
156 }
157
158 #define AD7476_CHAN(bits) _AD7476_CHAN((bits), 13 - (bits), \
159                 IIO_CHAN_INFO_RAW_SEPARATE_BIT)
160 #define AD7940_CHAN(bits) _AD7476_CHAN((bits), 15 - (bits), \
161                 IIO_CHAN_INFO_RAW_SEPARATE_BIT)
162 #define AD7091R_CHAN(bits) _AD7476_CHAN((bits), 16 - (bits), 0)
163
164 static const struct ad7476_chip_info ad7476_chip_info_tbl[] = {
165         [ID_AD7091R] = {
166                 .channel[0] = AD7091R_CHAN(12),
167                 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
168                 .reset = ad7091_reset,
169         },
170         [ID_AD7276] = {
171                 .channel[0] = AD7940_CHAN(12),
172                 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
173         },
174         [ID_AD7277] = {
175                 .channel[0] = AD7940_CHAN(10),
176                 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
177         },
178         [ID_AD7278] = {
179                 .channel[0] = AD7940_CHAN(8),
180                 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
181         },
182         [ID_AD7466] = {
183                 .channel[0] = AD7476_CHAN(12),
184                 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
185         },
186         [ID_AD7467] = {
187                 .channel[0] = AD7476_CHAN(10),
188                 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
189         },
190         [ID_AD7468] = {
191                 .channel[0] = AD7476_CHAN(8),
192                 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
193         },
194         [ID_AD7495] = {
195                 .channel[0] = AD7476_CHAN(12),
196                 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
197                 .int_vref_uv = 2500000,
198         },
199         [ID_AD7940] = {
200                 .channel[0] = AD7940_CHAN(14),
201                 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
202         },
203 };
204
205 static const struct iio_info ad7476_info = {
206         .driver_module = THIS_MODULE,
207         .read_raw = &ad7476_read_raw,
208 };
209
210 static int ad7476_probe(struct spi_device *spi)
211 {
212         struct ad7476_state *st;
213         struct iio_dev *indio_dev;
214         int ret;
215
216         indio_dev = iio_device_alloc(sizeof(*st));
217         if (indio_dev == NULL) {
218                 ret = -ENOMEM;
219                 goto error_ret;
220         }
221         st = iio_priv(indio_dev);
222         st->chip_info =
223                 &ad7476_chip_info_tbl[spi_get_device_id(spi)->driver_data];
224
225         st->reg = regulator_get(&spi->dev, "vcc");
226         if (IS_ERR(st->reg)) {
227                 ret = PTR_ERR(st->reg);
228                 goto error_free_dev;
229         }
230
231         ret = regulator_enable(st->reg);
232         if (ret)
233                 goto error_put_reg;
234
235         spi_set_drvdata(spi, indio_dev);
236
237         st->spi = spi;
238
239         /* Establish that the iio_dev is a child of the spi device */
240         indio_dev->dev.parent = &spi->dev;
241         indio_dev->name = spi_get_device_id(spi)->name;
242         indio_dev->modes = INDIO_DIRECT_MODE;
243         indio_dev->channels = st->chip_info->channel;
244         indio_dev->num_channels = 2;
245         indio_dev->info = &ad7476_info;
246         /* Setup default message */
247
248         st->xfer.rx_buf = &st->data;
249         st->xfer.len = st->chip_info->channel[0].scan_type.storagebits / 8;
250
251         spi_message_init(&st->msg);
252         spi_message_add_tail(&st->xfer, &st->msg);
253
254         ret = iio_triggered_buffer_setup(indio_dev, NULL,
255                         &ad7476_trigger_handler, NULL);
256         if (ret)
257                 goto error_disable_reg;
258
259         if (st->chip_info->reset)
260                 st->chip_info->reset(st);
261
262         ret = iio_device_register(indio_dev);
263         if (ret)
264                 goto error_ring_unregister;
265         return 0;
266
267 error_ring_unregister:
268         iio_triggered_buffer_cleanup(indio_dev);
269 error_disable_reg:
270         regulator_disable(st->reg);
271 error_put_reg:
272         regulator_put(st->reg);
273 error_free_dev:
274         iio_device_free(indio_dev);
275
276 error_ret:
277         return ret;
278 }
279
280 static int ad7476_remove(struct spi_device *spi)
281 {
282         struct iio_dev *indio_dev = spi_get_drvdata(spi);
283         struct ad7476_state *st = iio_priv(indio_dev);
284
285         iio_device_unregister(indio_dev);
286         iio_triggered_buffer_cleanup(indio_dev);
287         regulator_disable(st->reg);
288         regulator_put(st->reg);
289         iio_device_free(indio_dev);
290
291         return 0;
292 }
293
294 static const struct spi_device_id ad7476_id[] = {
295         {"ad7091r", ID_AD7091R},
296         {"ad7273", ID_AD7277},
297         {"ad7274", ID_AD7276},
298         {"ad7276", ID_AD7276},
299         {"ad7277", ID_AD7277},
300         {"ad7278", ID_AD7278},
301         {"ad7466", ID_AD7466},
302         {"ad7467", ID_AD7467},
303         {"ad7468", ID_AD7468},
304         {"ad7475", ID_AD7466},
305         {"ad7476", ID_AD7466},
306         {"ad7476a", ID_AD7466},
307         {"ad7477", ID_AD7467},
308         {"ad7477a", ID_AD7467},
309         {"ad7478", ID_AD7468},
310         {"ad7478a", ID_AD7468},
311         {"ad7495", ID_AD7495},
312         {"ad7910", ID_AD7467},
313         {"ad7920", ID_AD7466},
314         {"ad7940", ID_AD7940},
315         {}
316 };
317 MODULE_DEVICE_TABLE(spi, ad7476_id);
318
319 static struct spi_driver ad7476_driver = {
320         .driver = {
321                 .name   = "ad7476",
322                 .owner  = THIS_MODULE,
323         },
324         .probe          = ad7476_probe,
325         .remove         = ad7476_remove,
326         .id_table       = ad7476_id,
327 };
328 module_spi_driver(ad7476_driver);
329
330 MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
331 MODULE_DESCRIPTION("Analog Devices AD7476 and similar 1-channel ADCs");
332 MODULE_LICENSE("GPL v2");