drivers/ieee1394/dv1394.c

   1 /*
   2  * dv1394.c - DV input/output over IEEE 1394 on OHCI chips
   3  *   Copyright (C)2001 Daniel Maas <dmaas@dcine.com>
   4  *     receive by Dan Dennedy <dan@dennedy.org>
   5  *
   6  * based on:
   7  *  video1394.c - video driver for OHCI 1394 boards
   8  *  Copyright (C)1999,2000 Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au>
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License, or
  13  * (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software Foundation,
  22  * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  23  */
  24
  25 /*
  26   OVERVIEW
  27
  28   I designed dv1394 as a "pipe" that you can use to shoot DV onto a
  29   FireWire bus. In transmission mode, dv1394 does the following:
  30
  31    1. accepts contiguous frames of DV data from user-space, via write()
  32       or mmap() (see dv1394.h for the complete API)
  33    2. wraps IEC 61883 packets around the DV data, inserting
  34       empty synchronization packets as necessary
  35    3. assigns accurate SYT timestamps to the outgoing packets
  36    4. shoots them out using the OHCI card's IT DMA engine
  37
  38    Thanks to Dan Dennedy, we now have a receive mode that does the following:
  39
  40    1. accepts raw IEC 61883 packets from the OHCI card
  41    2. re-assembles the DV data payloads into contiguous frames,
  42       discarding empty packets
  43    3. sends the DV data to user-space via read() or mmap()
  44 */
  45
  46 /*
  47   TODO:
  48
  49   - tunable frame-drop behavior: either loop last frame, or halt transmission
  50
  51   - use a scatter/gather buffer for DMA programs (f->descriptor_pool)
  52     so that we don't rely on allocating 64KB of contiguous kernel memory
  53     via pci_alloc_consistent()
  54
  55   DONE:
  56   - during reception, better handling of dropped frames and continuity errors
  57   - during reception, prevent DMA from bypassing the irq tasklets
  58   - reduce irq rate during reception (1/250 packets).
  59   - add many more internal buffers during reception with scatter/gather dma.
  60   - add dbc (continuity) checking on receive, increment status.dropped_frames
  61     if not continuous.
  62   - restart IT DMA after a bus reset
  63   - safely obtain and release ISO Tx channels in cooperation with OHCI driver
  64   - map received DIF blocks to their proper location in DV frame (ensure
  65     recovery if dropped packet)
  66   - handle bus resets gracefully (OHCI card seems to take care of this itself(!))
  67   - do not allow resizing the user_buf once allocated; eliminate nuke_buffer_mappings
  68   - eliminated #ifdef DV1394_DEBUG_LEVEL by inventing macros debug_printk and irq_printk
  69   - added wmb() and mb() to places where PCI read/write ordering needs to be enforced
  70   - set video->id correctly
  71   - store video_cards in an array indexed by OHCI card ID, rather than a list
  72   - implement DMA context allocation to cooperate with other users of the OHCI
  73   - fix all XXX showstoppers
  74   - disable IR/IT DMA interrupts on shutdown
  75   - flush pci writes to the card by issuing a read
  76   - devfs and character device dispatching (* needs testing with Linux 2.2.x)
  77   - switch over to the new kernel DMA API (pci_map_*()) (* needs testing on platforms with IOMMU!)
  78   - keep all video_cards in a list (for open() via chardev), set file->private_data = video
  79   - dv1394_poll should indicate POLLIN when receiving buffers are available
  80   - add proc fs interface to set cip_n, cip_d, syt_offset, and video signal
  81   - expose xmit and recv as separate devices (not exclusive)
  82   - expose NTSC and PAL as separate devices (can be overridden)
  83
  84 */
  85
  86 #include <linux/config.h>
  87 #include <linux/kernel.h>
  88 #include <linux/list.h>
  89 #include <linux/slab.h>
  90 #include <linux/interrupt.h>
  91 #include <linux/wait.h>
  92 #include <linux/errno.h>
  93 #include <linux/module.h>
  94 #include <linux/init.h>
  95 #include <linux/pci.h>
  96 #include <linux/fs.h>
  97 #include <linux/poll.h>
  98 #include <linux/smp_lock.h>
  99 #include <linux/bitops.h>
 100 #include <asm/byteorder.h>
 101 #include <asm/atomic.h>
 102 #include <asm/io.h>
 103 #include <asm/uaccess.h>
 104 #include <linux/delay.h>
 105 #include <asm/pgtable.h>
 106 #include <asm/page.h>
 107 #include <linux/sched.h>
 108 #include <linux/types.h>
 109 #include <linux/vmalloc.h>
 110 #include <linux/string.h>
 111 #include <linux/ioctl32.h>
 112 #include <linux/compat.h>
 113 #include <linux/cdev.h>
 114
 115 #include "ieee1394.h"
 116 #include "ieee1394_types.h"
 117 #include "nodemgr.h"
 118 #include "hosts.h"
 119 #include "ieee1394_core.h"
 120 #include "highlevel.h"
 121 #include "dv1394.h"
 122 #include "dv1394-private.h"
 123
 124 #include "ohci1394.h"
 125
 126 /* DEBUG LEVELS:
 127    0 - no debugging messages
 128    1 - some debugging messages, but none during DMA frame transmission
 129    2 - lots of messages, including during DMA frame transmission
 130        (will cause undeflows if your machine is too slow!)
 131 */
 132
 133 #define DV1394_DEBUG_LEVEL 0
 134
 135 /* for debugging use ONLY: allow more than one open() of the device */
 136 /* #define DV1394_ALLOW_MORE_THAN_ONE_OPEN 1 */
 137
 138 #if DV1394_DEBUG_LEVEL >= 2
 139 #define irq_printk( args... ) printk( args )
 140 #else
 141 #define irq_printk( args... )
 142 #endif
 143
 144 #if DV1394_DEBUG_LEVEL >= 1
 145 #define debug_printk( args... ) printk( args)
 146 #else
 147 #define debug_printk( args... )
 148 #endif
 149
 150 /* issue a dummy PCI read to force the preceding write
 151    to be posted to the PCI bus immediately */
 152
 153 static inline void flush_pci_write(struct ti_ohci *ohci)
 154 {
 155         mb();
 156         reg_read(ohci, OHCI1394_IsochronousCycleTimer);
 157 }
 158
 159 static void it_tasklet_func(unsigned long data);
 160 static void ir_tasklet_func(unsigned long data);
 161
 162 #ifdef CONFIG_COMPAT
 163 static long dv1394_compat_ioctl(struct file *file, unsigned int cmd,
 164                                unsigned long arg);
 165 #endif
 166
 167 /* GLOBAL DATA */
 168
 169 /* list of all video_cards */
 170 static LIST_HEAD(dv1394_cards);
 171 static DEFINE_SPINLOCK(dv1394_cards_lock);
 172
 173 /* translate from a struct file* to the corresponding struct video_card* */
 174
 175 static inline struct video_card* file_to_video_card(struct file *file)
 176 {
 177         return (struct video_card*) file->private_data;
 178 }
 179
 180 /*** FRAME METHODS *********************************************************/
 181
 182 static void frame_reset(struct frame *f)
 183 {
 184         f->state = FRAME_CLEAR;
 185         f->done = 0;
 186         f->n_packets = 0;
 187         f->frame_begin_timestamp = NULL;
 188         f->assigned_timestamp = 0;
 189         f->cip_syt1 = NULL;
 190         f->cip_syt2 = NULL;
 191         f->mid_frame_timestamp = NULL;
 192         f->frame_end_timestamp = NULL;
 193         f->frame_end_branch = NULL;
 194 }
 195
 196 static struct frame* frame_new(unsigned int frame_num, struct video_card *video)
 197 {
 198         struct frame *f = kmalloc(sizeof(*f), GFP_KERNEL);
 199         if (!f)
 200                 return NULL;
 201
 202         f->video = video;
 203         f->frame_num = frame_num;
 204
 205         f->header_pool = pci_alloc_consistent(f->video->ohci->dev, PAGE_SIZE, &f->header_pool_dma);
 206         if (!f->header_pool) {
 207                 printk(KERN_ERR "dv1394: failed to allocate CIP header pool\n");
 208                 kfree(f);
 209                 return NULL;
 210         }
 211
 212         debug_printk("dv1394: frame_new: allocated CIP header pool at virt 0x%08lx (contig) dma 0x%08lx size %ld\n",
 213                      (unsigned long) f->header_pool, (unsigned long) f->header_pool_dma, PAGE_SIZE);
 214
 215         f->descriptor_pool_size = MAX_PACKETS * sizeof(struct DMA_descriptor_block);
 216         /* make it an even # of pages */
 217         f->descriptor_pool_size += PAGE_SIZE - (f->descriptor_pool_size%PAGE_SIZE);
 218
 219         f->descriptor_pool = pci_alloc_consistent(f->video->ohci->dev,
 220                                                   f->descriptor_pool_size,
 221                                                   &f->descriptor_pool_dma);
 222         if (!f->descriptor_pool) {
 223                 pci_free_consistent(f->video->ohci->dev, PAGE_SIZE, f->header_pool, f->header_pool_dma);
 224                 kfree(f);
 225                 return NULL;
 226         }
 227
 228         debug_printk("dv1394: frame_new: allocated DMA program memory at virt 0x%08lx (contig) dma 0x%08lx size %ld\n",
 229                      (unsigned long) f->descriptor_pool, (unsigned long) f->descriptor_pool_dma, f->descriptor_pool_size);
 230
 231         f->data = 0;
 232         frame_reset(f);
 233
 234         return f;
 235 }
 236
 237 static void frame_delete(struct frame *f)
 238 {
 239         pci_free_consistent(f->video->ohci->dev, PAGE_SIZE, f->header_pool, f->header_pool_dma);
 240         pci_free_consistent(f->video->ohci->dev, f->descriptor_pool_size, f->descriptor_pool, f->descriptor_pool_dma);
 241         kfree(f);
 242 }
 243
 244
 245
 246
 247 /*
 248    frame_prepare() - build the DMA program for transmitting
 249
 250    Frame_prepare() must be called OUTSIDE the video->spinlock.
 251    However, frame_prepare() must still be serialized, so
 252    it should be called WITH the video->sem taken.
 253  */
 254
 255 static void frame_prepare(struct video_card *video, unsigned int this_frame)
 256 {
 257         struct frame *f = video->frames[this_frame];
 258         int last_frame;
 259
 260         struct DMA_descriptor_block *block;
 261         dma_addr_t block_dma;
 262         struct CIP_header *cip;
 263         dma_addr_t cip_dma;
 264
 265         unsigned int n_descriptors, full_packets, packets_per_frame, payload_size;
 266
 267         /* these flags denote packets that need special attention */
 268         int empty_packet, first_packet, last_packet, mid_packet;
 269
 270         u32 *branch_address, *last_branch_address = NULL;
 271         unsigned long data_p;
 272         int first_packet_empty = 0;
 273         u32 cycleTimer, ct_sec, ct_cyc, ct_off;
 274         unsigned long irq_flags;
 275
 276         irq_printk("frame_prepare( %d ) ---------------------\n", this_frame);
 277
 278         full_packets = 0;
 279
 280
 281
 282         if (video->pal_or_ntsc == DV1394_PAL)
 283                 packets_per_frame = DV1394_PAL_PACKETS_PER_FRAME;
 284         else
 285                 packets_per_frame = DV1394_NTSC_PACKETS_PER_FRAME;
 286
 287         while ( full_packets < packets_per_frame ) {
 288                 empty_packet = first_packet = last_packet = mid_packet = 0;
 289
 290                 data_p = f->data + full_packets * 480;
 291
 292                 /************************************************/
 293                 /* allocate a descriptor block and a CIP header */
 294                 /************************************************/
 295
 296                 /* note: these should NOT cross a page boundary (DMA restriction) */
 297
 298                 if (f->n_packets >= MAX_PACKETS) {
 299                         printk(KERN_ERR "dv1394: FATAL ERROR: max packet count exceeded\n");
 300                         return;
 301                 }
 302
 303                 /* the block surely won't cross a page boundary,
 304                    since an even number of descriptor_blocks fit on a page */
 305                 block = &(f->descriptor_pool[f->n_packets]);
 306
 307                 /* DMA address of the block = offset of block relative
 308                     to the kernel base address of the descriptor pool
 309                     + DMA base address of the descriptor pool */
 310                 block_dma = ((unsigned long) block - (unsigned long) f->descriptor_pool) + f->descriptor_pool_dma;
 311
 312
 313                 /* the whole CIP pool fits on one page, so no worries about boundaries */
 314                 if ( ((unsigned long) &(f->header_pool[f->n_packets]) - (unsigned long) f->header_pool)
 315                     > PAGE_SIZE) {
 316                         printk(KERN_ERR "dv1394: FATAL ERROR: no room to allocate CIP header\n");
 317                         return;
 318                 }
 319
 320                 cip = &(f->header_pool[f->n_packets]);
 321
 322                 /* DMA address of the CIP header = offset of cip
 323                    relative to kernel base address of the header pool
 324                    + DMA base address of the header pool */
 325                 cip_dma = (unsigned long) cip % PAGE_SIZE + f->header_pool_dma;
 326
 327                 /* is this an empty packet? */
 328
 329                 if (video->cip_accum > (video->cip_d - video->cip_n)) {
 330                         empty_packet = 1;
 331                         payload_size = 8;
 332                         video->cip_accum -= (video->cip_d - video->cip_n);
 333                 } else {
 334                         payload_size = 488;
 335                         video->cip_accum += video->cip_n;
 336                 }
 337
 338                 /* there are three important packets each frame:
 339
 340                    the first packet in the frame - we ask the card to record the timestamp when
 341                                                    this packet is actually sent, so we can monitor
 342                                                    how accurate our timestamps are. Also, the first
 343                                                    packet serves as a semaphore to let us know that
 344                                                    it's OK to free the *previous* frame's DMA buffer
 345
 346                    the last packet in the frame -  this packet is used to detect buffer underflows.
 347                                                    if this is the last ready frame, the last DMA block
 348                                                    will have a branch back to the beginning of the frame
 349                                                    (so that the card will re-send the frame on underflow).
 350                                                    if this branch gets taken, we know that at least one
 351                                                    frame has been dropped. When the next frame is ready,
 352                                                    the branch is pointed to its first packet, and the
 353                                                    semaphore is disabled.
 354
 355                    a "mid" packet slightly before the end of the frame - this packet should trigger
 356                                    an interrupt so we can go and assign a timestamp to the first packet
 357                                    in the next frame. We don't use the very last packet in the frame
 358                                    for this purpose, because that would leave very little time to set
 359                                    the timestamp before DMA starts on the next frame.
 360                 */
 361
 362                 if (f->n_packets == 0) {
 363                         first_packet = 1;
 364                 } else if ( full_packets == (packets_per_frame-1) ) {
 365                         last_packet = 1;
 366                 } else if (f->n_packets == packets_per_frame) {
 367                         mid_packet = 1;
 368                 }
 369
 370
 371                 /********************/
 372                 /* setup CIP header */
 373                 /********************/
 374
 375                 /* the timestamp will be written later from the
 376                    mid-frame interrupt handler. For now we just
 377                    store the address of the CIP header(s) that
 378                    need a timestamp. */
 379
 380                 /* first packet in the frame needs a timestamp */
 381                 if (first_packet) {
 382                         f->cip_syt1 = cip;
 383                         if (empty_packet)
 384                                 first_packet_empty = 1;
 385
 386                 } else if (first_packet_empty && (f->n_packets == 1) ) {
 387                         /* if the first packet was empty, the second
 388                            packet's CIP header also needs a timestamp */
 389                         f->cip_syt2 = cip;
 390                 }
 391
 392                 fill_cip_header(cip,
 393                                 /* the node ID number of the OHCI card */
 394                                 reg_read(video->ohci, OHCI1394_NodeID) & 0x3F,
 395                                 video->continuity_counter,
 396                                 video->pal_or_ntsc,
 397                                 0xFFFF /* the timestamp is filled in later */);
 398
 399                 /* advance counter, only for full packets */
 400                 if ( ! empty_packet )
 401                         video->continuity_counter++;
 402
 403                 /******************************/
 404                 /* setup DMA descriptor block */
 405                 /******************************/
 406
 407                 /* first descriptor - OUTPUT_MORE_IMMEDIATE, for the controller's IT header */
 408                 fill_output_more_immediate( &(block->u.out.omi), 1, video->channel, 0, payload_size);
 409
 410                 if (empty_packet) {
 411                         /* second descriptor - OUTPUT_LAST for CIP header */
 412                         fill_output_last( &(block->u.out.u.empty.ol),
 413
 414                                           /* want completion status on all interesting packets */
 415                                           (first_packet || mid_packet || last_packet) ? 1 : 0,
 416
 417                                           /* want interrupts on all interesting packets */
 418                                           (first_packet || mid_packet || last_packet) ? 1 : 0,
 419
 420                                           sizeof(struct CIP_header), /* data size */
 421                                           cip_dma);
 422
 423                         if (first_packet)
 424                                 f->frame_begin_timestamp = &(block->u.out.u.empty.ol.q[3]);
 425                         else if (mid_packet)
 426                                 f->mid_frame_timestamp = &(block->u.out.u.empty.ol.q[3]);
 427                         else if (last_packet) {
 428                                 f->frame_end_timestamp = &(block->u.out.u.empty.ol.q[3]);
 429                                 f->frame_end_branch = &(block->u.out.u.empty.ol.q[2]);
 430                         }
 431
 432                         branch_address = &(block->u.out.u.empty.ol.q[2]);
 433                         n_descriptors = 3;
 434                         if (first_packet)
 435                                 f->first_n_descriptors = n_descriptors;
 436
 437                 } else { /* full packet */
 438
 439                         /* second descriptor - OUTPUT_MORE for CIP header */
 440                         fill_output_more( &(block->u.out.u.full.om),
 441                                           sizeof(struct CIP_header), /* data size */
 442                                           cip_dma);
 443
 444
 445                         /* third (and possibly fourth) descriptor - for DV data */
 446                         /* the 480-byte payload can cross a page boundary; if so,
 447                            we need to split it into two DMA descriptors */
 448
 449                         /* does the 480-byte data payload cross a page boundary? */
 450                         if ( (PAGE_SIZE- ((unsigned long)data_p % PAGE_SIZE) ) < 480 ) {
 451
 452                                 /* page boundary crossed */
 453
 454                                 fill_output_more( &(block->u.out.u.full.u.cross.om),
 455                                                   /* data size - how much of data_p fits on the first page */
 456                                                   PAGE_SIZE - (data_p % PAGE_SIZE),
 457
 458                                                   /* DMA address of data_p */
 459                                                   dma_region_offset_to_bus(&video->dv_buf,
 460                                                                            data_p - (unsigned long) video->dv_buf.kvirt));
 461
 462                                 fill_output_last( &(block->u.out.u.full.u.cross.ol),
 463
 464                                                   /* want completion status on all interesting packets */
 465                                                   (first_packet || mid_packet || last_packet) ? 1 : 0,
 466
 467                                                   /* want interrupt on all interesting packets */
 468                                                   (first_packet || mid_packet || last_packet) ? 1 : 0,
 469
 470                                                   /* data size - remaining portion of data_p */
 471                                                   480 - (PAGE_SIZE - (data_p % PAGE_SIZE)),
 472
 473                                                   /* DMA address of data_p + PAGE_SIZE - (data_p % PAGE_SIZE) */
 474                                                   dma_region_offset_to_bus(&video->dv_buf,
 475                                                                            data_p + PAGE_SIZE - (data_p % PAGE_SIZE) - (unsigned long) video->dv_buf.kvirt));
 476
 477                                 if (first_packet)
 478                                         f->frame_begin_timestamp = &(block->u.out.u.full.u.cross.ol.q[3]);
 479                                 else if (mid_packet)
 480                                         f->mid_frame_timestamp = &(block->u.out.u.full.u.cross.ol.q[3]);
 481                                 else if (last_packet) {
 482                                         f->frame_end_timestamp = &(block->u.out.u.full.u.cross.ol.q[3]);
 483                                         f->frame_end_branch = &(block->u.out.u.full.u.cross.ol.q[2]);
 484                                 }
 485
 486                                 branch_address = &(block->u.out.u.full.u.cross.ol.q[2]);
 487
 488                                 n_descriptors = 5;
 489                                 if (first_packet)
 490                                         f->first_n_descriptors = n_descriptors;
 491
 492                                 full_packets++;
 493
 494                         } else {
 495                                 /* fits on one page */
 496
 497                                 fill_output_last( &(block->u.out.u.full.u.nocross.ol),
 498
 499                                                   /* want completion status on all interesting packets */
 500                                                   (first_packet || mid_packet || last_packet) ? 1 : 0,
 501
 502                                                   /* want interrupt on all interesting packets */
 503                                                   (first_packet || mid_packet || last_packet) ? 1 : 0,
 504
 505                                                   480, /* data size (480 bytes of DV data) */
 506
 507
 508                                                   /* DMA address of data_p */
 509                                                   dma_region_offset_to_bus(&video->dv_buf,
 510                                                                            data_p - (unsigned long) video->dv_buf.kvirt));
 511
 512                                 if (first_packet)
 513                                         f->frame_begin_timestamp = &(block->u.out.u.full.u.nocross.ol.q[3]);
 514                                 else if (mid_packet)
 515                                         f->mid_frame_timestamp = &(block->u.out.u.full.u.nocross.ol.q[3]);
 516                                 else if (last_packet) {
 517                                         f->frame_end_timestamp = &(block->u.out.u.full.u.nocross.ol.q[3]);
 518                                         f->frame_end_branch = &(block->u.out.u.full.u.nocross.ol.q[2]);
 519                                 }
 520
 521                                 branch_address = &(block->u.out.u.full.u.nocross.ol.q[2]);
 522
 523                                 n_descriptors = 4;
 524                                 if (first_packet)
 525                                         f->first_n_descriptors = n_descriptors;
 526
 527                                 full_packets++;
 528                         }
 529                 }
 530
 531                 /* link this descriptor block into the DMA program by filling in
 532                    the branch address of the previous block */
 533
 534                 /* note: we are not linked into the active DMA chain yet */
 535
 536                 if (last_branch_address) {
 537                         *(last_branch_address) = cpu_to_le32(block_dma | n_descriptors);
 538                 }
 539
 540                 last_branch_address = branch_address;
 541
 542
 543                 f->n_packets++;
 544
 545         }
 546
 547         /* when we first assemble a new frame, set the final branch
 548            to loop back up to the top */
 549         *(f->frame_end_branch) = cpu_to_le32(f->descriptor_pool_dma | f->first_n_descriptors);
 550
 551         /* make the latest version of this frame visible to the PCI card */
 552         dma_region_sync_for_device(&video->dv_buf, f->data - (unsigned long) video->dv_buf.kvirt, video->frame_size);
 553
 554         /* lock against DMA interrupt */
 555         spin_lock_irqsave(&video->spinlock, irq_flags);
 556
 557         f->state = FRAME_READY;
 558
 559         video->n_clear_frames--;
 560
 561         last_frame = video->first_clear_frame - 1;
 562         if (last_frame == -1)
 563                 last_frame = video->n_frames-1;
 564
 565         video->first_clear_frame = (video->first_clear_frame + 1) % video->n_frames;
 566
 567         irq_printk("   frame %d prepared, active_frame = %d, n_clear_frames = %d, first_clear_frame = %d\n last=%d\n",
 568                    this_frame, video->active_frame, video->n_clear_frames, video->first_clear_frame, last_frame);
 569
 570         irq_printk("   begin_ts %08lx mid_ts %08lx end_ts %08lx end_br %08lx\n",
 571                    (unsigned long) f->frame_begin_timestamp,
 572                    (unsigned long) f->mid_frame_timestamp,
 573                    (unsigned long) f->frame_end_timestamp,
 574                    (unsigned long) f->frame_end_branch);
 575
 576         if (video->active_frame != -1) {
 577
 578                 /* if DMA is already active, we are almost done */
 579                 /* just link us onto the active DMA chain */
 580                 if (video->frames[last_frame]->frame_end_branch) {
 581                         u32 temp;
 582
 583                         /* point the previous frame's tail to this frame's head */
 584                         *(video->frames[last_frame]->frame_end_branch) = cpu_to_le32(f->descriptor_pool_dma | f->first_n_descriptors);
 585
 586                         /* this write MUST precede the next one, or we could silently drop frames */
 587                         wmb();
 588
 589                         /* disable the want_status semaphore on the last packet */
 590                         temp = le32_to_cpu(*(video->frames[last_frame]->frame_end_branch - 2));
 591                         temp &= 0xF7CFFFFF;
 592                         *(video->frames[last_frame]->frame_end_branch - 2) = cpu_to_le32(temp);
 593
 594                         /* flush these writes to memory ASAP */
 595                         flush_pci_write(video->ohci);
 596
 597                         /* NOTE:
 598                            ideally the writes should be "atomic": if
 599                            the OHCI card reads the want_status flag in
 600                            between them, we'll falsely report a
 601                            dropped frame. Hopefully this window is too
 602                            small to really matter, and the consequence
 603                            is rather harmless. */
 604
 605
 606                         irq_printk("     new frame %d linked onto DMA chain\n", this_frame);
 607
 608                 } else {
 609                         printk(KERN_ERR "dv1394: last frame not ready???\n");
 610                 }
 611
 612         } else {
 613
 614                 u32 transmit_sec, transmit_cyc;
 615                 u32 ts_cyc, ts_off;
 616
 617                 /* DMA is stopped, so this is the very first frame */
 618                 video->active_frame = this_frame;
 619
 620                 /* set CommandPtr to address and size of first descriptor block */
 621                 reg_write(video->ohci, video->ohci_IsoXmitCommandPtr,
 622                           video->frames[video->active_frame]->descriptor_pool_dma |
 623                           f->first_n_descriptors);
 624
 625                 /* assign a timestamp based on the current cycle time...
 626                    We'll tell the card to begin DMA 100 cycles from now,
 627                    and assign a timestamp 103 cycles from now */
 628
 629                 cycleTimer = reg_read(video->ohci, OHCI1394_IsochronousCycleTimer);
 630
 631                 ct_sec = cycleTimer >> 25;
 632                 ct_cyc = (cycleTimer >> 12) & 0x1FFF;
 633                 ct_off = cycleTimer & 0xFFF;
 634
 635                 transmit_sec = ct_sec;
 636                 transmit_cyc = ct_cyc + 100;
 637
 638                 transmit_sec += transmit_cyc/8000;
 639                 transmit_cyc %= 8000;
 640
 641                 ts_off = ct_off;
 642                 ts_cyc = transmit_cyc + 3;
 643                 ts_cyc %= 8000;
 644
 645                 f->assigned_timestamp = (ts_cyc&0xF) << 12;
 646
 647                 /* now actually write the timestamp into the appropriate CIP headers */
 648                 if (f->cip_syt1) {
 649                         f->cip_syt1->b[6] = f->assigned_timestamp >> 8;
 650                         f->cip_syt1->b[7] = f->assigned_timestamp & 0xFF;
 651                 }
 652                 if (f->cip_syt2) {
 653                         f->cip_syt2->b[6] = f->assigned_timestamp >> 8;
 654                         f->cip_syt2->b[7] = f->assigned_timestamp & 0xFF;
 655                 }
 656
 657                 /* --- start DMA --- */
 658
 659                 /* clear all bits in ContextControl register */
 660
 661                 reg_write(video->ohci, video->ohci_IsoXmitContextControlClear, 0xFFFFFFFF);
 662                 wmb();
 663
 664                 /* the OHCI card has the ability to start ISO transmission on a
 665                    particular cycle (start-on-cycle). This way we can ensure that
 666                    the first DV frame will have an accurate timestamp.
 667
 668                    However, start-on-cycle only appears to work if the OHCI card
 669                    is cycle master! Since the consequences of messing up the first
 670                    timestamp are minimal*, just disable start-on-cycle for now.
 671
 672                    * my DV deck drops the first few frames before it "locks in;"
 673                      so the first frame having an incorrect timestamp is inconsequential.
 674                 */
 675
 676 #if 0
 677                 reg_write(video->ohci, video->ohci_IsoXmitContextControlSet,
 678                           (1 << 31) /* enable start-on-cycle */
 679                           | ( (transmit_sec & 0x3) << 29)
 680                           | (transmit_cyc << 16));
 681                 wmb();
 682 #endif
 683
 684                 video->dma_running = 1;
 685
 686                 /* set the 'run' bit */
 687                 reg_write(video->ohci, video->ohci_IsoXmitContextControlSet, 0x8000);
 688                 flush_pci_write(video->ohci);
 689
 690                 /* --- DMA should be running now --- */
 691
 692                 debug_printk("    Cycle = %4u ContextControl = %08x CmdPtr = %08x\n",
 693                              (reg_read(video->ohci, OHCI1394_IsochronousCycleTimer) >> 12) & 0x1FFF,
 694                              reg_read(video->ohci, video->ohci_IsoXmitContextControlSet),
 695                              reg_read(video->ohci, video->ohci_IsoXmitCommandPtr));
 696
 697                 debug_printk("    DMA start - current cycle %4u, transmit cycle %4u (%2u), assigning ts cycle %2u\n",
 698                              ct_cyc, transmit_cyc, transmit_cyc & 0xF, ts_cyc & 0xF);
 699
 700 #if DV1394_DEBUG_LEVEL >= 2
 701                 {
 702                         /* check if DMA is really running */
 703                         int i = 0;
 704                         while (i < 20) {
 705                                 mb();
 706                                 mdelay(1);
 707                                 if (reg_read(video->ohci, video->ohci_IsoXmitContextControlSet) & (1 << 10)) {
 708                                         printk("DMA ACTIVE after %d msec\n", i);
 709                                         break;
 710                                 }
 711                                 i++;
 712                         }
 713
 714                         printk("set = %08x, cmdPtr = %08x\n",
 715                                reg_read(video->ohci, video->ohci_IsoXmitContextControlSet),
 716                                reg_read(video->ohci, video->ohci_IsoXmitCommandPtr)
 717                                );
 718
 719                         if ( ! (reg_read(video->ohci, video->ohci_IsoXmitContextControlSet) &  (1 << 10)) ) {
 720                                 printk("DMA did NOT go active after 20ms, event = %x\n",
 721                                        reg_read(video->ohci, video->ohci_IsoXmitContextControlSet) & 0x1F);
 722                         } else
 723                                 printk("DMA is RUNNING!\n");
 724                 }
 725 #endif
 726
 727         }
 728
 729
 730         spin_unlock_irqrestore(&video->spinlock, irq_flags);
 731 }
 732
 733
 734
 735 /*** RECEIVE FUNCTIONS *****************************************************/
 736
 737 /*
 738         frame method put_packet
 739
 740         map and copy the packet data to its location in the frame
 741         based upon DIF section and sequence
 742 */
 743
 744 static void inline
 745 frame_put_packet (struct frame *f, struct packet *p)
 746 {
 747         int section_type = p->data[0] >> 5;           /* section type is in bits 5 - 7 */
 748         int dif_sequence = p->data[1] >> 4;           /* dif sequence number is in bits 4 - 7 */
 749         int dif_block = p->data[2];
 750
 751         /* sanity check */
 752         if (dif_sequence > 11 || dif_block > 149) return;
 753
 754         switch (section_type) {
 755         case 0:           /* 1 Header block */
 756                 memcpy( (void *) f->data + dif_sequence * 150 * 80, p->data, 480);
 757                 break;
 758
 759         case 1:           /* 2 Subcode blocks */
 760                 memcpy( (void *) f->data + dif_sequence * 150 * 80 + (1 + dif_block) * 80, p->data, 480);
 761                 break;
 762
 763         case 2:           /* 3 VAUX blocks */
 764                 memcpy( (void *) f->data + dif_sequence * 150 * 80 + (3 + dif_block) * 80, p->data, 480);
 765                 break;
 766
 767         case 3:           /* 9 Audio blocks interleaved with video */
 768                 memcpy( (void *) f->data + dif_sequence * 150 * 80 + (6 + dif_block * 16) * 80, p->data, 480);
 769                 break;
 770
 771         case 4:           /* 135 Video blocks interleaved with audio */
 772                 memcpy( (void *) f->data + dif_sequence * 150 * 80 + (7 + (dif_block / 15) + dif_block) * 80, p->data, 480);
 773                 break;
 774
 775         default:           /* we can not handle any other data */
 776                 break;
 777         }
 778 }
 779
 780
 781 static void start_dma_receive(struct video_card *video)
 782 {
 783         if (video->first_run == 1) {
 784                 video->first_run = 0;
 785
 786                 /* start DMA once all of the frames are READY */
 787                 video->n_clear_frames = 0;
 788                 video->first_clear_frame = -1;
 789                 video->current_packet = 0;
 790                 video->active_frame = 0;
 791
 792                 /* reset iso recv control register */
 793                 reg_write(video->ohci, video->ohci_IsoRcvContextControlClear, 0xFFFFFFFF);
 794                 wmb();
 795
 796                 /* clear bufferFill, set isochHeader and speed (0=100) */
 797                 reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, 0x40000000);
 798
 799                 /* match on all tags, listen on channel */
 800                 reg_write(video->ohci, video->ohci_IsoRcvContextMatch, 0xf0000000 | video->channel);
 801
 802                 /* address and first descriptor block + Z=1 */
 803                 reg_write(video->ohci, video->ohci_IsoRcvCommandPtr,
 804                           video->frames[0]->descriptor_pool_dma | 1); /* Z=1 */
 805                 wmb();
 806
 807                 video->dma_running = 1;
 808
 809                 /* run */
 810                 reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, 0x8000);
 811                 flush_pci_write(video->ohci);
 812
 813                 debug_printk("dv1394: DMA started\n");
 814
 815 #if DV1394_DEBUG_LEVEL >= 2
 816                 {
 817                         int i;
 818
 819                         for (i = 0; i < 1000; ++i) {
 820                                 mdelay(1);
 821                                 if (reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) & (1 << 10)) {
 822                                         printk("DMA ACTIVE after %d msec\n", i);
 823                                         break;
 824                                 }
 825                         }
 826                         if ( reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) &  (1 << 11) ) {
 827                                 printk("DEAD, event = %x\n",
 828                                            reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) & 0x1F);
 829                         } else
 830                                 printk("RUNNING!\n");
 831                 }
 832 #endif
 833         } else if ( reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) &  (1 << 11) ) {
 834                 debug_printk("DEAD, event = %x\n",
 835                              reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) & 0x1F);
 836
 837                 /* wake */
 838                 reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, (1 << 12));
 839         }
 840 }
 841
 842
 843 /*
 844    receive_packets() - build the DMA program for receiving
 845 */
 846
 847 static void receive_packets(struct video_card *video)
 848 {
 849         struct DMA_descriptor_block *block = NULL;
 850         dma_addr_t block_dma = 0;
 851         struct packet *data = NULL;
 852         dma_addr_t data_dma = 0;
 853         u32 *last_branch_address = NULL;
 854         unsigned long irq_flags;
 855         int want_interrupt = 0;
 856         struct frame *f = NULL;
 857         int i, j;
 858
 859         spin_lock_irqsave(&video->spinlock, irq_flags);
 860
 861         for (j = 0; j < video->n_frames; j++) {
 862
 863                 /* connect frames */
 864                 if (j > 0 && f != NULL && f->frame_end_branch != NULL)
 865                         *(f->frame_end_branch) = cpu_to_le32(video->frames[j]->descriptor_pool_dma | 1); /* set Z=1 */
 866
 867                 f = video->frames[j];
 868
 869                 for (i = 0; i < MAX_PACKETS; i++) {
 870                         /* locate a descriptor block and packet from the buffer */
 871                         block = &(f->descriptor_pool[i]);
 872                         block_dma = ((unsigned long) block - (unsigned long) f->descriptor_pool) + f->descriptor_pool_dma;
 873
 874                         data = ((struct packet*)video->packet_buf.kvirt) + f->frame_num * MAX_PACKETS + i;
 875                         data_dma = dma_region_offset_to_bus( &video->packet_buf,
 876                                                              ((unsigned long) data - (unsigned long) video->packet_buf.kvirt) );
 877
 878                         /* setup DMA descriptor block */
 879                         want_interrupt = ((i % (MAX_PACKETS/2)) == 0 || i == (MAX_PACKETS-1));
 880                         fill_input_last( &(block->u.in.il), want_interrupt, 512, data_dma);
 881
 882                         /* link descriptors */
 883                         last_branch_address = f->frame_end_branch;
 884
 885                         if (last_branch_address != NULL)
 886                                 *(last_branch_address) = cpu_to_le32(block_dma | 1); /* set Z=1 */
 887
 888                         f->frame_end_branch = &(block->u.in.il.q[2]);
 889                 }
 890
 891         } /* next j */
 892
 893         spin_unlock_irqrestore(&video->spinlock, irq_flags);
 894
 895 }
 896
 897
 898
 899 /*** MANAGEMENT FUNCTIONS **************************************************/
 900
 901 static int do_dv1394_init(struct video_card *video, struct dv1394_init *init)
 902 {
 903         unsigned long flags, new_buf_size;
 904         int i;
 905         u64 chan_mask;
 906         int retval = -EINVAL;
 907
 908         debug_printk("dv1394: initialising %d\n", video->id);
 909         if (init->api_version != DV1394_API_VERSION)
 910                 return -EINVAL;
 911
 912         /* first sanitize all the parameters */
 913         if ( (init->n_frames < 2) || (init->n_frames > DV1394_MAX_FRAMES) )
 914                 return -EINVAL;
 915
 916         if ( (init->format != DV1394_NTSC) && (init->format != DV1394_PAL) )
 917                 return -EINVAL;
 918
 919         if ( (init->syt_offset == 0) || (init->syt_offset > 50) )
 920                 /* default SYT offset is 3 cycles */
 921                 init->syt_offset = 3;
 922
 923         if ( (init->channel > 63) || (init->channel < 0) )
 924                 init->channel = 63;
 925
 926         chan_mask = (u64)1 << init->channel;
 927
 928         /* calculate what size DMA buffer is needed */
 929         if (init->format == DV1394_NTSC)
 930                 new_buf_size = DV1394_NTSC_FRAME_SIZE * init->n_frames;
 931         else
 932                 new_buf_size = DV1394_PAL_FRAME_SIZE * init->n_frames;
 933
 934         /* round up to PAGE_SIZE */
 935         if (new_buf_size % PAGE_SIZE) new_buf_size += PAGE_SIZE - (new_buf_size % PAGE_SIZE);
 936
 937         /* don't allow the user to allocate the DMA buffer more than once */
 938         if (video->dv_buf.kvirt && video->dv_buf_size != new_buf_size) {
 939                 printk("dv1394: re-sizing the DMA buffer is not allowed\n");
 940                 return -EINVAL;
 941         }
 942
 943         /* shutdown the card if it's currently active */
 944         /* (the card should not be reset if the parameters are screwy) */
 945
 946         do_dv1394_shutdown(video, 0);
 947
 948         /* try to claim the ISO channel */
 949         spin_lock_irqsave(&video->ohci->IR_channel_lock, flags);
 950         if (video->ohci->ISO_channel_usage & chan_mask) {
 951                 spin_unlock_irqrestore(&video->ohci->IR_channel_lock, flags);
 952                 retval = -EBUSY;
 953                 goto err;
 954         }
 955         video->ohci->ISO_channel_usage |= chan_mask;
 956         spin_unlock_irqrestore(&video->ohci->IR_channel_lock, flags);
 957
 958         video->channel = init->channel;
 959
 960         /* initialize misc. fields of video */
 961         video->n_frames = init->n_frames;
 962         video->pal_or_ntsc = init->format;
 963
 964         video->cip_accum = 0;
 965         video->continuity_counter = 0;
 966
 967         video->active_frame = -1;
 968         video->first_clear_frame = 0;
 969         video->n_clear_frames = video->n_frames;
 970         video->dropped_frames = 0;
 971
 972         video->write_off = 0;
 973
 974         video->first_run = 1;
 975         video->current_packet = -1;
 976         video->first_frame = 0;
 977
 978         if (video->pal_or_ntsc == DV1394_NTSC) {
 979                 video->cip_n = init->cip_n != 0 ? init->cip_n : CIP_N_NTSC;
 980                 video->cip_d = init->cip_d != 0 ? init->cip_d : CIP_D_NTSC;
 981                 video->frame_size = DV1394_NTSC_FRAME_SIZE;
 982         } else {
 983                 video->cip_n = init->cip_n != 0 ? init->cip_n : CIP_N_PAL;
 984                 video->cip_d = init->cip_d != 0 ? init->cip_d : CIP_D_PAL;
 985                 video->frame_size = DV1394_PAL_FRAME_SIZE;
 986         }
 987
 988         video->syt_offset = init->syt_offset;
 989
 990         /* find and claim DMA contexts on the OHCI card */
 991
 992         if (video->ohci_it_ctx == -1) {
 993                 ohci1394_init_iso_tasklet(&video->it_tasklet, OHCI_ISO_TRANSMIT,
 994                                           it_tasklet_func, (unsigned long) video);
 995
 996                 if (ohci1394_register_iso_tasklet(video->ohci, &video->it_tasklet) < 0) {
 997                         printk(KERN_ERR "dv1394: could not find an available IT DMA context\n");
 998                         retval = -EBUSY;
 999                         goto err;
1000                 }
1001
1002                 video->ohci_it_ctx = video->it_tasklet.context;
1003                 debug_printk("dv1394: claimed IT DMA context %d\n", video->ohci_it_ctx);
1004         }
1005
1006         if (video->ohci_ir_ctx == -1) {
1007                 ohci1394_init_iso_tasklet(&video->ir_tasklet, OHCI_ISO_RECEIVE,
1008                                           ir_tasklet_func, (unsigned long) video);
1009
1010                 if (ohci1394_register_iso_tasklet(video->ohci, &video->ir_tasklet) < 0) {
1011                         printk(KERN_ERR "dv1394: could not find an available IR DMA context\n");
1012                         retval = -EBUSY;
1013                         goto err;
1014                 }
1015                 video->ohci_ir_ctx = video->ir_tasklet.context;
1016                 debug_printk("dv1394: claimed IR DMA context %d\n", video->ohci_ir_ctx);
1017         }
1018
1019         /* allocate struct frames */
1020         for (i = 0; i < init->n_frames; i++) {
1021                 video->frames[i] = frame_new(i, video);
1022
1023                 if (!video->frames[i]) {
1024                         printk(KERN_ERR "dv1394: Cannot allocate frame structs\n");
1025                         retval = -ENOMEM;
1026                         goto err;
1027                 }
1028         }
1029
1030         if (!video->dv_buf.kvirt) {
1031                 /* allocate the ringbuffer */
1032                 retval = dma_region_alloc(&video->dv_buf, new_buf_size, video->ohci->dev, PCI_DMA_TODEVICE);
1033                 if (retval)
1034                         goto err;
1035
1036                 video->dv_buf_size = new_buf_size;
1037
1038                 debug_printk("dv1394: Allocated %d frame buffers, total %u pages (%u DMA pages), %lu bytes\n",
1039                              video->n_frames, video->dv_buf.n_pages,
1040                              video->dv_buf.n_dma_pages, video->dv_buf_size);
1041         }
1042
1043         /* set up the frame->data pointers */
1044         for (i = 0; i < video->n_frames; i++)
1045                 video->frames[i]->data = (unsigned long) video->dv_buf.kvirt + i * video->frame_size;
1046
1047         if (!video->packet_buf.kvirt) {
1048                 /* allocate packet buffer */
1049                 video->packet_buf_size = sizeof(struct packet) * video->n_frames * MAX_PACKETS;
1050                 if (video->packet_buf_size % PAGE_SIZE)
1051                         video->packet_buf_size += PAGE_SIZE - (video->packet_buf_size % PAGE_SIZE);
1052
1053                 retval = dma_region_alloc(&video->packet_buf, video->packet_buf_size,
1054                                           video->ohci->dev, PCI_DMA_FROMDEVICE);
1055                 if (retval)
1056                         goto err;
1057
1058                 debug_printk("dv1394: Allocated %d packets in buffer, total %u pages (%u DMA pages), %lu bytes\n",
1059                                  video->n_frames*MAX_PACKETS, video->packet_buf.n_pages,
1060                                  video->packet_buf.n_dma_pages, video->packet_buf_size);
1061         }
1062
1063         /* set up register offsets for IT context */
1064         /* IT DMA context registers are spaced 16 bytes apart */
1065         video->ohci_IsoXmitContextControlSet = OHCI1394_IsoXmitContextControlSet+16*video->ohci_it_ctx;
1066         video->ohci_IsoXmitContextControlClear = OHCI1394_IsoXmitContextControlClear+16*video->ohci_it_ctx;
1067         video->ohci_IsoXmitCommandPtr = OHCI1394_IsoXmitCommandPtr+16*video->ohci_it_ctx;
1068
1069         /* enable interrupts for IT context */
1070         reg_write(video->ohci, OHCI1394_IsoXmitIntMaskSet, (1 << video->ohci_it_ctx));
1071         debug_printk("dv1394: interrupts enabled for IT context %d\n", video->ohci_it_ctx);
1072
1073         /* set up register offsets for IR context */
1074         /* IR DMA context registers are spaced 32 bytes apart */
1075         video->ohci_IsoRcvContextControlSet = OHCI1394_IsoRcvContextControlSet+32*video->ohci_ir_ctx;
1076         video->ohci_IsoRcvContextControlClear = OHCI1394_IsoRcvContextControlClear+32*video->ohci_ir_ctx;
1077         video->ohci_IsoRcvCommandPtr = OHCI1394_IsoRcvCommandPtr+32*video->ohci_ir_ctx;
1078         video->ohci_IsoRcvContextMatch = OHCI1394_IsoRcvContextMatch+32*video->ohci_ir_ctx;
1079
1080         /* enable interrupts for IR context */
1081         reg_write(video->ohci, OHCI1394_IsoRecvIntMaskSet, (1 << video->ohci_ir_ctx) );
1082         debug_printk("dv1394: interrupts enabled for IR context %d\n", video->ohci_ir_ctx);
1083
1084         return 0;
1085
1086 err:
1087         do_dv1394_shutdown(video, 1);
1088         return retval;
1089 }
1090
1091 /* if the user doesn't bother to call ioctl(INIT) before starting
1092    mmap() or read()/write(), just give him some default values */
1093
1094 static int do_dv1394_init_default(struct video_card *video)
1095 {
1096         struct dv1394_init init;
1097
1098         init.api_version = DV1394_API_VERSION;
1099         init.n_frames = DV1394_MAX_FRAMES / 4;
1100         /* the following are now set via devfs */
1101         init.channel = video->channel;
1102         init.format = video->pal_or_ntsc;
1103         init.cip_n = video->cip_n;
1104         init.cip_d = video->cip_d;
1105         init.syt_offset = video->syt_offset;
1106
1107         return do_dv1394_init(video, &init);
1108 }
1109
1110 /* do NOT call from interrupt context */
1111 static void stop_dma(struct video_card *video)
1112 {
1113         unsigned long flags;
1114         int i;
1115
1116         /* no interrupts */
1117         spin_lock_irqsave(&video->spinlock, flags);
1118
1119         video->dma_running = 0;
1120
1121         if ( (video->ohci_it_ctx == -1) && (video->ohci_ir_ctx == -1) )
1122                 goto out;
1123
1124         /* stop DMA if in progress */
1125         if ( (video->active_frame != -1) ||
1126             (reg_read(video->ohci, video->ohci_IsoXmitContextControlClear) & (1 << 10)) ||
1127             (reg_read(video->ohci, video->ohci_IsoRcvContextControlClear) &  (1 << 10)) ) {
1128
1129                 /* clear the .run bits */
1130                 reg_write(video->ohci, video->ohci_IsoXmitContextControlClear, (1 << 15));
1131                 reg_write(video->ohci, video->ohci_IsoRcvContextControlClear, (1 << 15));
1132                 flush_pci_write(video->ohci);
1133
1134                 video->active_frame = -1;
1135                 video->first_run = 1;
1136
1137                 /* wait until DMA really stops */
1138                 i = 0;
1139                 while (i < 1000) {
1140
1141                         /* wait 0.1 millisecond */
1142                         udelay(100);
1143
1144                         if ( (reg_read(video->ohci, video->ohci_IsoXmitContextControlClear) & (1 << 10)) ||
1145                             (reg_read(video->ohci, video->ohci_IsoRcvContextControlClear)  & (1 << 10)) ) {
1146                                 /* still active */
1147                                 debug_printk("dv1394: stop_dma: DMA not stopped yet\n" );
1148                                 mb();
1149                         } else {
1150                                 debug_printk("dv1394: stop_dma: DMA stopped safely after %d ms\n", i/10);
1151                                 break;
1152                         }
1153
1154                         i++;
1155                 }
1156
1157                 if (i == 1000) {
1158                         printk(KERN_ERR "dv1394: stop_dma: DMA still going after %d ms!\n", i/10);
1159                 }
1160         }
1161         else
1162                 debug_printk("dv1394: stop_dma: already stopped.\n");
1163
1164 out:
1165         spin_unlock_irqrestore(&video->spinlock, flags);
1166 }
1167
1168
1169
1170 static void do_dv1394_shutdown(struct video_card *video, int free_dv_buf)
1171 {
1172         int i;
1173
1174         debug_printk("dv1394: shutdown...\n");
1175
1176         /* stop DMA if in progress */
1177         stop_dma(video);
1178
1179         /* release the DMA contexts */
1180         if (video->ohci_it_ctx != -1) {
1181                 video->ohci_IsoXmitContextControlSet = 0;
1182                 video->ohci_IsoXmitContextControlClear = 0;
1183                 video->ohci_IsoXmitCommandPtr = 0;
1184
1185                 /* disable interrupts for IT context */
1186                 reg_write(video->ohci, OHCI1394_IsoXmitIntMaskClear, (1 << video->ohci_it_ctx));
1187
1188                 /* remove tasklet */
1189                 ohci1394_unregister_iso_tasklet(video->ohci, &video->it_tasklet);
1190                 debug_printk("dv1394: IT context %d released\n", video->ohci_it_ctx);
1191                 video->ohci_it_ctx = -1;
1192         }
1193
1194         if (video->ohci_ir_ctx != -1) {
1195                 video->ohci_IsoRcvContextControlSet = 0;
1196                 video->ohci_IsoRcvContextControlClear = 0;
1197                 video->ohci_IsoRcvCommandPtr = 0;
1198                 video->ohci_IsoRcvContextMatch = 0;
1199
1200                 /* disable interrupts for IR context */
1201                 reg_write(video->ohci, OHCI1394_IsoRecvIntMaskClear, (1 << video->ohci_ir_ctx));
1202
1203                 /* remove tasklet */
1204                 ohci1394_unregister_iso_tasklet(video->ohci, &video->ir_tasklet);
1205                 debug_printk("dv1394: IR context %d released\n", video->ohci_ir_ctx);
1206                 video->ohci_ir_ctx = -1;
1207         }
1208
1209         /* release the ISO channel */
1210         if (video->channel != -1) {
1211                 u64 chan_mask;
1212                 unsigned long flags;
1213
1214                 chan_mask = (u64)1 << video->channel;
1215
1216                 spin_lock_irqsave(&video->ohci->IR_channel_lock, flags);
1217                 video->ohci->ISO_channel_usage &= ~(chan_mask);
1218                 spin_unlock_irqrestore(&video->ohci->IR_channel_lock, flags);
1219
1220                 video->channel = -1;
1221         }
1222
1223         /* free the frame structs */
1224         for (i = 0; i < DV1394_MAX_FRAMES; i++) {
1225                 if (video->frames[i])
1226                         frame_delete(video->frames[i]);
1227                 video->frames[i] = NULL;
1228         }
1229
1230         video->n_frames = 0;
1231
1232         /* we can't free the DMA buffer unless it is guaranteed that
1233            no more user-space mappings exist */
1234
1235         if (free_dv_buf) {
1236                 dma_region_free(&video->dv_buf);
1237                 video->dv_buf_size = 0;
1238         }
1239
1240         /* free packet buffer */
1241         dma_region_free(&video->packet_buf);
1242         video->packet_buf_size = 0;
1243
1244         debug_printk("dv1394: shutdown OK\n");
1245 }
1246
1247 /*
1248        **********************************
1249        *** MMAP() THEORY OF OPERATION ***
1250        **********************************
1251
1252         The ringbuffer cannot be re-allocated or freed while
1253         a user program maintains a mapping of it. (note that a mapping
1254         can persist even after the device fd is closed!)
1255
1256         So, only let the user process allocate the DMA buffer once.
1257         To resize or deallocate it, you must close the device file
1258         and open it again.
1259
1260         Previously Dan M. hacked out a scheme that allowed the DMA
1261         buffer to change by forcefully unmapping it from the user's
1262         address space. It was prone to error because it's very hard to
1263         track all the places the buffer could have been mapped (we
1264         would have had to walk the vma list of every process in the
1265         system to be sure we found all the mappings!). Instead, we
1266         force the user to choose one buffer size and stick with
1267         it. This small sacrifice is worth the huge reduction in
1268         error-prone code in dv1394.
1269 */
1270
1271 static int dv1394_mmap(struct file *file, struct vm_area_struct *vma)
1272 {
1273         struct video_card *video = file_to_video_card(file);
1274         int retval = -EINVAL;
1275
1276         /* serialize mmap */
1277         down(&video->sem);
1278
1279         if ( ! video_card_initialized(video) ) {
1280                 retval = do_dv1394_init_default(video);
1281                 if (retval)
1282                         goto out;
1283         }
1284
1285         retval = dma_region_mmap(&video->dv_buf, file, vma);
1286 out:
1287         up(&video->sem);
1288         return retval;
1289 }
1290
1291 /*** DEVICE FILE INTERFACE *************************************************/
1292
1293 /* no need to serialize, multiple threads OK */
1294 static unsigned int dv1394_poll(struct file *file, struct poll_table_struct *wait)
1295 {
1296         struct video_card *video = file_to_video_card(file);
1297         unsigned int mask = 0;
1298         unsigned long flags;
1299
1300         poll_wait(file, &video->waitq, wait);
1301
1302         spin_lock_irqsave(&video->spinlock, flags);
1303         if ( video->n_frames == 0 ) {
1304
1305         } else if ( video->active_frame == -1 ) {
1306                 /* nothing going on */
1307                 mask |= POLLOUT;
1308         } else {
1309                 /* any clear/ready buffers? */
1310                 if (video->n_clear_frames >0)
1311                         mask |= POLLOUT | POLLIN;
1312         }
1313         spin_unlock_irqrestore(&video->spinlock, flags);
1314
1315         return mask;
1316 }
1317
1318 static int dv1394_fasync(int fd, struct file *file, int on)
1319 {
1320         /* I just copied this code verbatim from Alan Cox's mouse driver example
1321            (Documentation/DocBook/) */
1322
1323         struct video_card *video = file_to_video_card(file);
1324
1325         int retval = fasync_helper(fd, file, on, &video->fasync);
1326
1327         if (retval < 0)
1328                 return retval;
1329         return 0;
1330 }
1331
1332 static ssize_t dv1394_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
1333 {
1334         struct video_card *video = file_to_video_card(file);
1335         DECLARE_WAITQUEUE(wait, current);
1336         ssize_t ret;
1337         size_t cnt;
1338         unsigned long flags;
1339         int target_frame;
1340
1341         /* serialize this to prevent multi-threaded mayhem */
1342         if (file->f_flags & O_NONBLOCK) {
1343                 if (down_trylock(&video->sem))
1344                         return -EAGAIN;
1345         } else {
1346                 if (down_interruptible(&video->sem))
1347                         return -ERESTARTSYS;
1348         }
1349
1350         if ( !video_card_initialized(video) ) {
1351                 ret = do_dv1394_init_default(video);
1352                 if (ret) {
1353                         up(&video->sem);
1354                         return ret;
1355                 }
1356         }
1357
1358         ret = 0;
1359         add_wait_queue(&video->waitq, &wait);
1360
1361         while (count > 0) {
1362
1363                 /* must set TASK_INTERRUPTIBLE *before* checking for free
1364                    buffers; otherwise we could miss a wakeup if the interrupt
1365                    fires between the check and the schedule() */
1366
1367                 set_current_state(TASK_INTERRUPTIBLE);
1368
1369                 spin_lock_irqsave(&video->spinlock, flags);
1370
1371                 target_frame = video->first_clear_frame;
1372
1373                 spin_unlock_irqrestore(&video->spinlock, flags);
1374
1375                 if (video->frames[target_frame]->state == FRAME_CLEAR) {
1376
1377                         /* how much room is left in the target frame buffer */
1378                         cnt = video->frame_size - (video->write_off - target_frame * video->frame_size);
1379
1380                 } else {
1381                         /* buffer is already used */
1382                         cnt = 0;
1383                 }
1384
1385                 if (cnt > count)
1386                         cnt = count;
1387
1388                 if (cnt <= 0) {
1389                         /* no room left, gotta wait */
1390                         if (file->f_flags & O_NONBLOCK) {
1391                                 if (!ret)
1392                                         ret = -EAGAIN;
1393                                 break;
1394                         }
1395                         if (signal_pending(current)) {
1396                                 if (!ret)
1397                                         ret = -ERESTARTSYS;
1398                                 break;
1399                         }
1400
1401                         schedule();
1402
1403                         continue; /* start over from 'while(count > 0)...' */
1404                 }
1405
1406                 if (copy_from_user(video->dv_buf.kvirt + video->write_off, buffer, cnt)) {
1407                         if (!ret)
1408                                 ret = -EFAULT;
1409                         break;
1410                 }
1411
1412                 video->write_off = (video->write_off + cnt) % (video->n_frames * video->frame_size);
1413
1414                 count -= cnt;
1415                 buffer += cnt;
1416                 ret += cnt;
1417
1418                 if (video->write_off == video->frame_size * ((target_frame + 1) % video->n_frames))
1419                                 frame_prepare(video, target_frame);
1420         }
1421
1422         remove_wait_queue(&video->waitq, &wait);
1423         set_current_state(TASK_RUNNING);
1424         up(&video->sem);
1425         return ret;
1426 }
1427
1428
1429 static ssize_t dv1394_read(struct file *file,  char __user *buffer, size_t count, loff_t *ppos)
1430 {
1431         struct video_card *video = file_to_video_card(file);
1432         DECLARE_WAITQUEUE(wait, current);
1433         ssize_t ret;
1434         size_t cnt;
1435         unsigned long flags;
1436         int target_frame;
1437
1438         /* serialize this to prevent multi-threaded mayhem */
1439         if (file->f_flags & O_NONBLOCK) {
1440                 if (down_trylock(&video->sem))
1441                         return -EAGAIN;
1442         } else {
1443                 if (down_interruptible(&video->sem))
1444                         return -ERESTARTSYS;
1445         }
1446
1447         if ( !video_card_initialized(video) ) {
1448                 ret = do_dv1394_init_default(video);
1449                 if (ret) {
1450                         up(&video->sem);
1451                         return ret;
1452                 }
1453                 video->continuity_counter = -1;
1454
1455                 receive_packets(video);
1456
1457                 start_dma_receive(video);
1458         }
1459
1460         ret = 0;
1461         add_wait_queue(&video->waitq, &wait);
1462
1463         while (count > 0) {
1464
1465                 /* must set TASK_INTERRUPTIBLE *before* checking for free
1466                    buffers; otherwise we could miss a wakeup if the interrupt
1467                    fires between the check and the schedule() */
1468
1469                 set_current_state(TASK_INTERRUPTIBLE);
1470
1471                 spin_lock_irqsave(&video->spinlock, flags);
1472
1473                 target_frame = video->first_clear_frame;
1474
1475                 spin_unlock_irqrestore(&video->spinlock, flags);
1476
1477                 if (target_frame >= 0 &&
1478                         video->n_clear_frames > 0 &&
1479                         video->frames[target_frame]->state == FRAME_CLEAR) {
1480
1481                         /* how much room is left in the target frame buffer */
1482                         cnt = video->frame_size - (video->write_off - target_frame * video->frame_size);
1483
1484                 } else {
1485                         /* buffer is already used */
1486                         cnt = 0;
1487                 }
1488
1489                 if (cnt > count)
1490                         cnt = count;
1491
1492                 if (cnt <= 0) {
1493                         /* no room left, gotta wait */
1494                         if (file->f_flags & O_NONBLOCK) {
1495                                 if (!ret)
1496                                         ret = -EAGAIN;
1497                                 break;
1498                         }
1499                         if (signal_pending(current)) {
1500                                 if (!ret)
1501                                         ret = -ERESTARTSYS;
1502                                 break;
1503                         }
1504
1505                         schedule();
1506
1507                         continue; /* start over from 'while(count > 0)...' */
1508                 }
1509
1510                 if (copy_to_user(buffer, video->dv_buf.kvirt + video->write_off, cnt)) {
1511                                 if (!ret)
1512                                         ret = -EFAULT;
1513                                 break;
1514                 }
1515
1516                 video->write_off = (video->write_off + cnt) % (video->n_frames * video->frame_size);
1517
1518                 count -= cnt;
1519                 buffer += cnt;
1520                 ret += cnt;
1521
1522                 if (video->write_off == video->frame_size * ((target_frame + 1) % video->n_frames)) {
1523                         spin_lock_irqsave(&video->spinlock, flags);
1524                         video->n_clear_frames--;
1525                         video->first_clear_frame = (video->first_clear_frame + 1) % video->n_frames;
1526                         spin_unlock_irqrestore(&video->spinlock, flags);
1527                 }
1528         }
1529
1530         remove_wait_queue(&video->waitq, &wait);
1531         set_current_state(TASK_RUNNING);
1532         up(&video->sem);
1533         return ret;
1534 }
1535
1536
1537 /*** DEVICE IOCTL INTERFACE ************************************************/
1538
1539 static long dv1394_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1540 {
1541         struct video_card *video;
1542         unsigned long flags;
1543         int ret = -EINVAL;
1544         void __user *argp = (void __user *)arg;
1545
1546         DECLARE_WAITQUEUE(wait, current);
1547
1548         lock_kernel();
1549         video = file_to_video_card(file);
1550
1551         /* serialize this to prevent multi-threaded mayhem */
1552         if (file->f_flags & O_NONBLOCK) {
1553                 if (down_trylock(&video->sem)) {
1554                         unlock_kernel();
1555                         return -EAGAIN;
1556                 }
1557         } else {
1558                 if (down_interruptible(&video->sem)) {
1559                         unlock_kernel();
1560                         return -ERESTARTSYS;
1561                 }
1562         }
1563
1564         switch(cmd)
1565         {
1566         case DV1394_IOC_SUBMIT_FRAMES: {
1567                 unsigned int n_submit;
1568
1569                 if ( !video_card_initialized(video) ) {
1570                         ret = do_dv1394_init_default(video);
1571                         if (ret)
1572                                 goto out;
1573                 }
1574
1575                 n_submit = (unsigned int) arg;
1576
1577                 if (n_submit > video->n_frames) {
1578                         ret = -EINVAL;
1579                         goto out;
1580                 }
1581
1582                 while (n_submit > 0) {
1583
1584                         add_wait_queue(&video->waitq, &wait);
1585                         set_current_state(TASK_INTERRUPTIBLE);
1586
1587                         spin_lock_irqsave(&video->spinlock, flags);
1588
1589                         /* wait until video->first_clear_frame is really CLEAR */
1590                         while (video->frames[video->first_clear_frame]->state != FRAME_CLEAR) {
1591
1592                                 spin_unlock_irqrestore(&video->spinlock, flags);
1593
1594                                 if (signal_pending(current)) {
1595                                         remove_wait_queue(&video->waitq, &wait);
1596                                         set_current_state(TASK_RUNNING);
1597                                         ret = -EINTR;
1598                                         goto out;
1599                                 }
1600
1601                                 schedule();
1602                                 set_current_state(TASK_INTERRUPTIBLE);
1603
1604                                 spin_lock_irqsave(&video->spinlock, flags);
1605                         }
1606                         spin_unlock_irqrestore(&video->spinlock, flags);
1607
1608                         remove_wait_queue(&video->waitq, &wait);
1609                         set_current_state(TASK_RUNNING);
1610
1611                         frame_prepare(video, video->first_clear_frame);
1612
1613                         n_submit--;
1614                 }
1615
1616                 ret = 0;
1617                 break;
1618         }
1619
1620         case DV1394_IOC_WAIT_FRAMES: {
1621                 unsigned int n_wait;
1622
1623                 if ( !video_card_initialized(video) ) {
1624                         ret = -EINVAL;
1625                         goto out;
1626                 }
1627
1628                 n_wait = (unsigned int) arg;
1629
1630                 /* since we re-run the last frame on underflow, we will
1631                    never actually have n_frames clear frames; at most only
1632                    n_frames - 1 */
1633
1634                 if (n_wait > (video->n_frames-1) ) {
1635                         ret = -EINVAL;
1636                         goto out;
1637                 }
1638
1639                 add_wait_queue(&video->waitq, &wait);
1640                 set_current_state(TASK_INTERRUPTIBLE);
1641
1642                 spin_lock_irqsave(&video->spinlock, flags);
1643
1644                 while (video->n_clear_frames < n_wait) {
1645
1646                         spin_unlock_irqrestore(&video->spinlock, flags);
1647
1648                         if (signal_pending(current)) {
1649                                 remove_wait_queue(&video->waitq, &wait);
1650                                 set_current_state(TASK_RUNNING);
1651                                 ret = -EINTR;
1652                                 goto out;
1653                         }
1654
1655                         schedule();
1656                         set_current_state(TASK_INTERRUPTIBLE);
1657
1658                         spin_lock_irqsave(&video->spinlock, flags);
1659                 }
1660
1661                 spin_unlock_irqrestore(&video->spinlock, flags);
1662
1663                 remove_wait_queue(&video->waitq, &wait);
1664                 set_current_state(TASK_RUNNING);
1665                 ret = 0;
1666                 break;
1667         }
1668
1669         case DV1394_IOC_RECEIVE_FRAMES: {
1670                 unsigned int n_recv;
1671
1672                 if ( !video_card_initialized(video) ) {
1673                         ret = -EINVAL;
1674                         goto out;
1675                 }
1676
1677                 n_recv = (unsigned int) arg;
1678
1679                 /* at least one frame must be active */
1680                 if (n_recv > (video->n_frames-1) ) {
1681                         ret = -EINVAL;
1682                         goto out;
1683                 }
1684
1685                 spin_lock_irqsave(&video->spinlock, flags);
1686
1687                 /* release the clear frames */
1688                 video->n_clear_frames -= n_recv;
1689
1690                 /* advance the clear frame cursor */
1691                 video->first_clear_frame = (video->first_clear_frame + n_recv) % video->n_frames;
1692
1693                 /* reset dropped_frames */
1694                 video->dropped_frames = 0;
1695
1696                 spin_unlock_irqrestore(&video->spinlock, flags);
1697
1698                 ret = 0;
1699                 break;
1700         }
1701
1702         case DV1394_IOC_START_RECEIVE: {
1703                 if ( !video_card_initialized(video) ) {
1704                         ret = do_dv1394_init_default(video);
1705                         if (ret)
1706                                 goto out;
1707                 }
1708
1709                 video->continuity_counter = -1;
1710
1711                 receive_packets(video);
1712
1713                 start_dma_receive(video);
1714
1715                 ret = 0;
1716                 break;
1717         }
1718
1719         case DV1394_IOC_INIT: {
1720                 struct dv1394_init init;
1721                 if (!argp) {
1722                         ret = do_dv1394_init_default(video);
1723                 } else {
1724                         if (copy_from_user(&init, argp, sizeof(init))) {
1725                                 ret = -EFAULT;
1726                                 goto out;
1727                         }
1728                         ret = do_dv1394_init(video, &init);
1729                 }
1730                 break;
1731         }
1732
1733         case DV1394_IOC_SHUTDOWN:
1734                 do_dv1394_shutdown(video, 0);
1735                 ret = 0;
1736                 break;
1737
1738
1739         case DV1394_IOC_GET_STATUS: {
1740                 struct dv1394_status status;
1741
1742                 if ( !video_card_initialized(video) ) {
1743                         ret = -EINVAL;
1744                         goto out;
1745                 }
1746
1747                 status.init.api_version = DV1394_API_VERSION;
1748                 status.init.channel = video->channel;
1749                 status.init.n_frames = video->n_frames;
1750                 status.init.format = video->pal_or_ntsc;
1751                 status.init.cip_n = video->cip_n;
1752                 status.init.cip_d = video->cip_d;
1753                 status.init.syt_offset = video->syt_offset;
1754
1755                 status.first_clear_frame = video->first_clear_frame;
1756
1757                 /* the rest of the fields need to be locked against the interrupt */
1758                 spin_lock_irqsave(&video->spinlock, flags);
1759
1760                 status.active_frame = video->active_frame;
1761                 status.n_clear_frames = video->n_clear_frames;
1762
1763                 status.dropped_frames = video->dropped_frames;
1764
1765                 /* reset dropped_frames */
1766                 video->dropped_frames = 0;
1767
1768                 spin_unlock_irqrestore(&video->spinlock, flags);
1769
1770                 if (copy_to_user(argp, &status, sizeof(status))) {
1771                         ret = -EFAULT;
1772                         goto out;
1773                 }
1774
1775                 ret = 0;
1776                 break;
1777         }
1778
1779         default:
1780                 break;
1781         }
1782
1783  out:
1784         up(&video->sem);
1785         unlock_kernel();
1786         return ret;
1787 }
1788
1789 /*** DEVICE FILE INTERFACE CONTINUED ***************************************/
1790
1791 static int dv1394_open(struct inode *inode, struct file *file)
1792 {
1793         struct video_card *video = NULL;
1794
1795         /* if the device was opened through devfs, then file->private_data
1796            has already been set to video by devfs */
1797         if (file->private_data) {
1798                 video = (struct video_card*) file->private_data;
1799
1800         } else {
1801                 /* look up the card by ID */
1802                 unsigned long flags;
1803
1804                 spin_lock_irqsave(&dv1394_cards_lock, flags);
1805                 if (!list_empty(&dv1394_cards)) {
1806                         struct video_card *p;
1807                         list_for_each_entry(p, &dv1394_cards, list) {
1808                                 if ((p->id) == ieee1394_file_to_instance(file)) {
1809                                         video = p;
1810                                         break;
1811                                 }
1812                         }
1813                 }
1814                 spin_unlock_irqrestore(&dv1394_cards_lock, flags);
1815
1816                 if (!video) {
1817                         debug_printk("dv1394: OHCI card %d not found", ieee1394_file_to_instance(file));
1818                         return -ENODEV;
1819                 }
1820
1821                 file->private_data = (void*) video;
1822         }
1823
1824 #ifndef DV1394_ALLOW_MORE_THAN_ONE_OPEN
1825
1826         if ( test_and_set_bit(0, &video->open) ) {
1827                 /* video is already open by someone else */
1828                 return -EBUSY;
1829         }
1830
1831 #endif
1832
1833         return 0;
1834 }
1835
1836
1837 static int dv1394_release(struct inode *inode, struct file *file)
1838 {
1839         struct video_card *video = file_to_video_card(file);
1840
1841         /* OK to free the DMA buffer, no more mappings can exist */
1842         do_dv1394_shutdown(video, 1);
1843
1844         /* clean up async I/O users */
1845         dv1394_fasync(-1, file, 0);
1846
1847         /* give someone else a turn */
1848         clear_bit(0, &video->open);
1849
1850         return 0;
1851 }
1852
1853
1854 /*** DEVICE DRIVER HANDLERS ************************************************/
1855
1856 static void it_tasklet_func(unsigned long data)
1857 {
1858         int wake = 0;
1859         struct video_card *video = (struct video_card*) data;
1860
1861         spin_lock(&video->spinlock);
1862
1863         if (!video->dma_running)
1864                 goto out;
1865
1866         irq_printk("ContextControl = %08x, CommandPtr = %08x\n",
1867                reg_read(video->ohci, video->ohci_IsoXmitContextControlSet),
1868                reg_read(video->ohci, video->ohci_IsoXmitCommandPtr)
1869                );
1870
1871
1872         if ( (video->ohci_it_ctx != -1) &&
1873             (reg_read(video->ohci, video->ohci_IsoXmitContextControlSet) & (1 << 10)) ) {
1874
1875                 struct frame *f;
1876                 unsigned int frame, i;
1877
1878
1879                 if (video->active_frame == -1)
1880                         frame = 0;
1881                 else
1882                         frame = video->active_frame;
1883
1884                 /* check all the DMA-able frames */
1885                 for (i = 0; i < video->n_frames; i++, frame = (frame+1) % video->n_frames) {
1886
1887                         irq_printk("IRQ checking frame %d...", frame);
1888                         f = video->frames[frame];
1889                         if (f->state != FRAME_READY) {
1890                                 irq_printk("clear, skipping\n");
1891                                 /* we don't own this frame */
1892                                 continue;
1893                         }
1894
1895                         irq_printk("DMA\n");
1896
1897                         /* check the frame begin semaphore to see if we can free the previous frame */
1898                         if ( *(f->frame_begin_timestamp) ) {
1899                                 int prev_frame;
1900                                 struct frame *prev_f;
1901
1902
1903
1904                                 /* don't reset, need this later *(f->frame_begin_timestamp) = 0; */
1905                                 irq_printk("  BEGIN\n");
1906
1907                                 prev_frame = frame - 1;
1908                                 if (prev_frame == -1)
1909                                         prev_frame += video->n_frames;
1910                                 prev_f = video->frames[prev_frame];
1911
1912                                 /* make sure we can actually garbage collect
1913                                    this frame */
1914                                 if ( (prev_f->state == FRAME_READY) &&
1915                                     prev_f->done && (!f->done) )
1916                                 {
1917                                         frame_reset(prev_f);
1918                                         video->n_clear_frames++;
1919                                         wake = 1;
1920                                         video->active_frame = frame;
1921
1922                                         irq_printk("  BEGIN - freeing previous frame %d, new active frame is %d\n", prev_frame, frame);
1923                                 } else {
1924                                         irq_printk("  BEGIN - can't free yet\n");
1925                                 }
1926
1927                                 f->done = 1;
1928                         }
1929
1930
1931                         /* see if we need to set the timestamp for the next frame */
1932                         if ( *(f->mid_frame_timestamp) ) {
1933                                 struct frame *next_frame;
1934                                 u32 begin_ts, ts_cyc, ts_off;
1935
1936                                 *(f->mid_frame_timestamp) = 0;
1937
1938                                 begin_ts = le32_to_cpu(*(f->frame_begin_timestamp));
1939
1940                                 irq_printk("  MIDDLE - first packet was sent at cycle %4u (%2u), assigned timestamp was (%2u) %4u\n",
1941                                            begin_ts & 0x1FFF, begin_ts & 0xF,
1942                                            f->assigned_timestamp >> 12, f->assigned_timestamp & 0xFFF);
1943
1944                                 /* prepare next frame and assign timestamp */
1945                                 next_frame = video->frames[ (frame+1) % video->n_frames ];
1946
1947                                 if (next_frame->state == FRAME_READY) {
1948                                         irq_printk("  MIDDLE - next frame is ready, good\n");
1949                                 } else {
1950                                         debug_printk("dv1394: Underflow! At least one frame has been dropped.\n");
1951                                         next_frame = f;
1952                                 }
1953
1954                                 /* set the timestamp to the timestamp of the last frame sent,
1955                                    plus the length of the last frame sent, plus the syt latency */
1956                                 ts_cyc = begin_ts & 0xF;
1957                                 /* advance one frame, plus syt latency (typically 2-3) */
1958                                 ts_cyc += f->n_packets + video->syt_offset ;
1959
1960                                 ts_off = 0;
1961
1962                                 ts_cyc += ts_off/3072;
1963                                 ts_off %= 3072;
1964
1965                                 next_frame->assigned_timestamp = ((ts_cyc&0xF) << 12) + ts_off;
1966                                 if (next_frame->cip_syt1) {
1967                                         next_frame->cip_syt1->b[6] = next_frame->assigned_timestamp >> 8;
1968                                         next_frame->cip_syt1->b[7] = next_frame->assigned_timestamp & 0xFF;
1969                                 }
1970                                 if (next_frame->cip_syt2) {
1971                                         next_frame->cip_syt2->b[6] = next_frame->assigned_timestamp >> 8;
1972                                         next_frame->cip_syt2->b[7] = next_frame->assigned_timestamp & 0xFF;
1973                                 }
1974
1975                         }
1976
1977                         /* see if the frame looped */
1978                         if ( *(f->frame_end_timestamp) ) {
1979
1980                                 *(f->frame_end_timestamp) = 0;
1981
1982                                 debug_printk("  END - the frame looped at least once\n");
1983
1984                                 video->dropped_frames++;
1985                         }
1986
1987                 } /* for (each frame) */
1988         }
1989
1990         if (wake) {
1991                 kill_fasync(&video->fasync, SIGIO, POLL_OUT);
1992
1993                 /* wake readers/writers/ioctl'ers */
1994                 wake_up_interruptible(&video->waitq);
1995         }
1996
1997 out:
1998         spin_unlock(&video->spinlock);
1999 }
2000
2001 static void ir_tasklet_func(unsigned long data)
2002 {
2003         int wake = 0;
2004         struct video_card *video = (struct video_card*) data;
2005
2006         spin_lock(&video->spinlock);
2007
2008         if (!video->dma_running)
2009                 goto out;
2010
2011         if ( (video->ohci_ir_ctx != -1) &&
2012             (reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) & (1 << 10)) ) {
2013
2014                 int sof=0; /* start-of-frame flag */
2015                 struct frame *f;
2016                 u16 packet_length, packet_time;
2017                 int i, dbc=0;
2018                 struct DMA_descriptor_block *block = NULL;
2019                 u16 xferstatus;
2020
2021                 int next_i, prev_i;
2022                 struct DMA_descriptor_block *next = NULL;
2023                 dma_addr_t next_dma = 0;
2024                 struct DMA_descriptor_block *prev = NULL;
2025
2026                 /* loop over all descriptors in all frames */
2027                 for (i = 0; i < video->n_frames*MAX_PACKETS; i++) {
2028                         struct packet *p = dma_region_i(&video->packet_buf, struct packet, video->current_packet);
2029
2030                         /* make sure we are seeing the latest changes to p */
2031                         dma_region_sync_for_cpu(&video->packet_buf,
2032                                                 (unsigned long) p - (unsigned long) video->packet_buf.kvirt,
2033                                                 sizeof(struct packet));
2034
2035                         packet_length = le16_to_cpu(p->data_length);
2036                         packet_time   = le16_to_cpu(p->timestamp);
2037
2038                         irq_printk("received packet %02d, timestamp=%04x, length=%04x, sof=%02x%02x\n", video->current_packet,
2039                                    packet_time, packet_length,
2040                                    p->data[0], p->data[1]);
2041
2042                         /* get the descriptor based on packet_buffer cursor */
2043                         f = video->frames[video->current_packet / MAX_PACKETS];
2044                         block = &(f->descriptor_pool[video->current_packet % MAX_PACKETS]);
2045                         xferstatus = le32_to_cpu(block->u.in.il.q[3]) >> 16;
2046                         xferstatus &= 0x1F;
2047                         irq_printk("ir_tasklet_func: xferStatus/resCount [%d] = 0x%08x\n", i, le32_to_cpu(block->u.in.il.q[3]) );
2048
2049                         /* get the current frame */
2050                         f = video->frames[video->active_frame];
2051
2052                         /* exclude empty packet */
2053                         if (packet_length > 8 && xferstatus == 0x11) {
2054                                 /* check for start of frame */
2055                                 /* DRD> Changed to check section type ([0]>>5==0)
2056                                    and dif sequence ([1]>>4==0) */
2057                                 sof = ( (p->data[0] >> 5) == 0 && (p->data[1] >> 4) == 0);
2058
2059                                 dbc = (int) (p->cip_h1 >> 24);
2060                                 if ( video->continuity_counter != -1 && dbc > ((video->continuity_counter + 1) % 256) )
2061                                 {
2062                                         printk(KERN_WARNING "dv1394: discontinuity detected, dropping all frames\n" );
2063                                         video->dropped_frames += video->n_clear_frames + 1;
2064                                         video->first_frame = 0;
2065                                         video->n_clear_frames = 0;
2066                                         video->first_clear_frame = -1;
2067                                 }
2068                                 video->continuity_counter = dbc;
2069
2070                                 if (!video->first_frame) {
2071                                         if (sof) {
2072                                                 video->first_frame = 1;
2073                                         }
2074
2075                                 } else if (sof) {
2076                                         /* close current frame */
2077                                         frame_reset(f);  /* f->state = STATE_CLEAR */
2078                                         video->n_clear_frames++;
2079                                         if (video->n_clear_frames > video->n_frames) {
2080                                                 video->dropped_frames++;
2081                                                 printk(KERN_WARNING "dv1394: dropped a frame during reception\n" );
2082                                                 video->n_clear_frames = video->n_frames-1;
2083                                                 video->first_clear_frame = (video->first_clear_frame + 1) % video->n_frames;
2084                                         }
2085                                         if (video->first_clear_frame == -1)
2086                                                 video->first_clear_frame = video->active_frame;
2087
2088                                         /* get the next frame */
2089                                         video->active_frame = (video->active_frame + 1) % video->n_frames;
2090                                         f = video->frames[video->active_frame];
2091                                         irq_printk("   frame received, active_frame = %d, n_clear_frames = %d, first_clear_frame = %d\n",
2092                                                    video->active_frame, video->n_clear_frames, video->first_clear_frame);
2093                                 }
2094                                 if (video->first_frame) {
2095                                         if (sof) {
2096                                                 /* open next frame */
2097                                                 f->state = FRAME_READY;
2098                                         }
2099
2100                                         /* copy to buffer */
2101                                         if (f->n_packets > (video->frame_size / 480)) {
2102                                                 printk(KERN_ERR "frame buffer overflow during receive\n");
2103                                         }
2104
2105                                         frame_put_packet(f, p);
2106
2107                                 } /* first_frame */
2108                         }
2109
2110                         /* stop, end of ready packets */
2111                         else if (xferstatus == 0) {
2112                                 break;
2113                         }
2114
2115                         /* reset xferStatus & resCount */
2116                         block->u.in.il.q[3] = cpu_to_le32(512);
2117
2118                         /* terminate dma chain at this (next) packet */
2119                         next_i = video->current_packet;
2120                         f = video->frames[next_i / MAX_PACKETS];
2121                         next = &(f->descriptor_pool[next_i % MAX_PACKETS]);
2122                         next_dma = ((unsigned long) block - (unsigned long) f->descriptor_pool) + f->descriptor_pool_dma;
2123                         next->u.in.il.q[0] |= 3 << 20; /* enable interrupt */
2124                         next->u.in.il.q[2] = 0; /* disable branch */
2125
2126                         /* link previous to next */
2127                         prev_i = (next_i == 0) ? (MAX_PACKETS * video->n_frames - 1) : (next_i - 1);
2128                         f = video->frames[prev_i / MAX_PACKETS];
2129                         prev = &(f->descriptor_pool[prev_i % MAX_PACKETS]);
2130                         if (prev_i % (MAX_PACKETS/2)) {
2131                                 prev->u.in.il.q[0] &= ~(3 << 20); /* no interrupt */
2132                         } else {
2133                                 prev->u.in.il.q[0] |= 3 << 20; /* enable interrupt */
2134                         }
2135                         prev->u.in.il.q[2] = cpu_to_le32(next_dma | 1); /* set Z=1 */
2136                         wmb();
2137
2138                         /* wake up DMA in case it fell asleep */
2139                         reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, (1 << 12));
2140
2141                         /* advance packet_buffer cursor */
2142                         video->current_packet = (video->current_packet + 1) % (MAX_PACKETS * video->n_frames);
2143
2144                 } /* for all packets */
2145
2146                 wake = 1; /* why the hell not? */
2147
2148         } /* receive interrupt */
2149
2150         if (wake) {
2151                 kill_fasync(&video->fasync, SIGIO, POLL_IN);
2152
2153                 /* wake readers/writers/ioctl'ers */
2154                 wake_up_interruptible(&video->waitq);
2155         }
2156
2157 out:
2158         spin_unlock(&video->spinlock);
2159 }
2160
2161 static struct cdev dv1394_cdev;
2162 static struct file_operations dv1394_fops=
2163 {
2164         .owner =        THIS_MODULE,
2165         .poll =         dv1394_poll,
2166         .unlocked_ioctl = dv1394_ioctl,
2167 #ifdef CONFIG_COMPAT
2168         .compat_ioctl = dv1394_compat_ioctl,
2169 #endif
2170         .mmap =         dv1394_mmap,
2171         .open =         dv1394_open,
2172         .write =        dv1394_write,
2173         .read =         dv1394_read,
2174         .release =      dv1394_release,
2175         .fasync =       dv1394_fasync,
2176 };
2177
2178
2179 /*** HOTPLUG STUFF **********************************************************/
2180 /*
2181  * Export information about protocols/devices supported by this driver.
2182  */
2183 static struct ieee1394_device_id dv1394_id_table[] = {
2184         {
2185                 .match_flags    = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
2186                 .specifier_id   = AVC_UNIT_SPEC_ID_ENTRY & 0xffffff,
2187                 .version        = AVC_SW_VERSION_ENTRY & 0xffffff
2188         },
2189         { }
2190 };
2191
2192 MODULE_DEVICE_TABLE(ieee1394, dv1394_id_table);
2193
2194 static struct hpsb_protocol_driver dv1394_driver = {
2195         .name           = "DV/1394 Driver",
2196         .id_table       = dv1394_id_table,
2197         .driver         = {
2198                 .name   = "dv1394",
2199                 .bus    = &ieee1394_bus_type,
2200         },
2201 };
2202
2203
2204 /*** IEEE1394 HPSB CALLBACKS ***********************************************/
2205
2206 static int dv1394_init(struct ti_ohci *ohci, enum pal_or_ntsc format, enum modes mode)
2207 {
2208         struct video_card *video;
2209         unsigned long flags;
2210         int i;
2211
2212         video = kzalloc(sizeof(*video), GFP_KERNEL);
2213         if (!video) {
2214                 printk(KERN_ERR "dv1394: cannot allocate video_card\n");
2215                 goto err;
2216         }
2217
2218         video->ohci = ohci;
2219         /* lower 2 bits of id indicate which of four "plugs"
2220            per host */
2221         video->id = ohci->host->id << 2;
2222         if (format == DV1394_NTSC)
2223                 video->id |= mode;
2224         else
2225                 video->id |= 2 + mode;
2226
2227         video->ohci_it_ctx = -1;
2228         video->ohci_ir_ctx = -1;
2229
2230         video->ohci_IsoXmitContextControlSet = 0;
2231         video->ohci_IsoXmitContextControlClear = 0;
2232         video->ohci_IsoXmitCommandPtr = 0;
2233
2234         video->ohci_IsoRcvContextControlSet = 0;
2235         video->ohci_IsoRcvContextControlClear = 0;
2236         video->ohci_IsoRcvCommandPtr = 0;
2237         video->ohci_IsoRcvContextMatch = 0;
2238
2239         video->n_frames = 0; /* flag that video is not initialized */
2240         video->channel = 63; /* default to broadcast channel */
2241         video->active_frame = -1;
2242
2243         /* initialize the following */
2244         video->pal_or_ntsc = format;
2245         video->cip_n = 0; /* 0 = use builtin default */
2246         video->cip_d = 0;
2247         video->syt_offset = 0;
2248         video->mode = mode;
2249
2250         for (i = 0; i < DV1394_MAX_FRAMES; i++)
2251                 video->frames[i] = NULL;
2252
2253         dma_region_init(&video->dv_buf);
2254         video->dv_buf_size = 0;
2255         dma_region_init(&video->packet_buf);
2256         video->packet_buf_size = 0;
2257
2258         clear_bit(0, &video->open);
2259         spin_lock_init(&video->spinlock);
2260         video->dma_running = 0;
2261         init_MUTEX(&video->sem);
2262         init_waitqueue_head(&video->waitq);
2263         video->fasync = NULL;
2264
2265         spin_lock_irqsave(&dv1394_cards_lock, flags);
2266         INIT_LIST_HEAD(&video->list);
2267         list_add_tail(&video->list, &dv1394_cards);
2268         spin_unlock_irqrestore(&dv1394_cards_lock, flags);
2269
2270         if (devfs_mk_cdev(MKDEV(IEEE1394_MAJOR,
2271                                 IEEE1394_MINOR_BLOCK_DV1394*16 + video->id),
2272                         S_IFCHR|S_IRUGO|S_IWUGO,
2273                          "ieee1394/dv/host%d/%s/%s",
2274                          (video->id>>2),
2275                          (video->pal_or_ntsc == DV1394_NTSC ? "NTSC" : "PAL"),
2276                          (video->mode == MODE_RECEIVE ? "in" : "out")) < 0)
2277                         goto err_free;
2278
2279         debug_printk("dv1394: dv1394_init() OK on ID %d\n", video->id);
2280
2281         return 0;
2282
2283  err_free:
2284         kfree(video);
2285  err:
2286         return -1;
2287 }
2288
2289 static void dv1394_un_init(struct video_card *video)
2290 {
2291         char buf[32];
2292
2293         /* obviously nobody has the driver open at this point */
2294         do_dv1394_shutdown(video, 1);
2295         snprintf(buf, sizeof(buf), "dv/host%d/%s/%s", (video->id >> 2),
2296                 (video->pal_or_ntsc == DV1394_NTSC ? "NTSC" : "PAL"),
2297                 (video->mode == MODE_RECEIVE ? "in" : "out")
2298                 );
2299
2300         devfs_remove("ieee1394/%s", buf);
2301         kfree(video);
2302 }
2303
2304
2305 static void dv1394_remove_host (struct hpsb_host *host)
2306 {
2307         struct video_card *video;
2308         unsigned long flags;
2309         int id = host->id;
2310
2311         /* We only work with the OHCI-1394 driver */
2312         if (strcmp(host->driver->name, OHCI1394_DRIVER_NAME))
2313                 return;
2314
2315         /* find the corresponding video_cards */
2316         do {
2317                 struct video_card *tmp_vid;
2318
2319                 video = NULL;
2320
2321                 spin_lock_irqsave(&dv1394_cards_lock, flags);
2322                 list_for_each_entry(tmp_vid, &dv1394_cards, list) {
2323                         if ((tmp_vid->id >> 2) == id) {
2324                                 list_del(&tmp_vid->list);
2325                                 video = tmp_vid;
2326                                 break;
2327                         }
2328                 }
2329                 spin_unlock_irqrestore(&dv1394_cards_lock, flags);
2330
2331                 if (video)
2332                         dv1394_un_init(video);
2333         } while (video != NULL);
2334
2335         class_device_destroy(hpsb_protocol_class,
2336                 MKDEV(IEEE1394_MAJOR, IEEE1394_MINOR_BLOCK_DV1394 * 16 + (id<<2)));
2337         devfs_remove("ieee1394/dv/host%d/NTSC", id);
2338         devfs_remove("ieee1394/dv/host%d/PAL", id);
2339         devfs_remove("ieee1394/dv/host%d", id);
2340 }
2341
2342 static void dv1394_add_host (struct hpsb_host *host)
2343 {
2344         struct ti_ohci *ohci;
2345         int id = host->id;
2346
2347         /* We only work with the OHCI-1394 driver */
2348         if (strcmp(host->driver->name, OHCI1394_DRIVER_NAME))
2349                 return;
2350
2351         ohci = (struct ti_ohci *)host->hostdata;
2352
2353         class_device_create(hpsb_protocol_class, NULL, MKDEV(
2354                 IEEE1394_MAJOR, IEEE1394_MINOR_BLOCK_DV1394 * 16 + (id<<2)),
2355                 NULL, "dv1394-%d", id);
2356         devfs_mk_dir("ieee1394/dv/host%d", id);
2357         devfs_mk_dir("ieee1394/dv/host%d/NTSC", id);
2358         devfs_mk_dir("ieee1394/dv/host%d/PAL", id);
2359
2360         dv1394_init(ohci, DV1394_NTSC, MODE_RECEIVE);
2361         dv1394_init(ohci, DV1394_NTSC, MODE_TRANSMIT);
2362         dv1394_init(ohci, DV1394_PAL, MODE_RECEIVE);
2363         dv1394_init(ohci, DV1394_PAL, MODE_TRANSMIT);
2364 }
2365
2366
2367 /* Bus reset handler. In the event of a bus reset, we may need to
2368    re-start the DMA contexts - otherwise the user program would
2369    end up waiting forever.
2370 */
2371
2372 static void dv1394_host_reset(struct hpsb_host *host)
2373 {
2374         struct ti_ohci *ohci;
2375         struct video_card *video = NULL, *tmp_vid;
2376         unsigned long flags;
2377
2378         /* We only work with the OHCI-1394 driver */
2379         if (strcmp(host->driver->name, OHCI1394_DRIVER_NAME))
2380                 return;
2381
2382         ohci = (struct ti_ohci *)host->hostdata;
2383
2384
2385         /* find the corresponding video_cards */
2386         spin_lock_irqsave(&dv1394_cards_lock, flags);
2387         list_for_each_entry(tmp_vid, &dv1394_cards, list) {
2388                 if ((tmp_vid->id >> 2) == host->id) {
2389                         video = tmp_vid;
2390                         break;
2391                 }
2392         }
2393         spin_unlock_irqrestore(&dv1394_cards_lock, flags);
2394
2395         if (!video)
2396                 return;
2397
2398
2399         spin_lock_irqsave(&video->spinlock, flags);
2400
2401         if (!video->dma_running)
2402                 goto out;
2403
2404         /* check IT context */
2405         if (video->ohci_it_ctx != -1) {
2406                 u32 ctx;
2407
2408                 ctx = reg_read(video->ohci, video->ohci_IsoXmitContextControlSet);
2409
2410                 /* if (RUN but not ACTIVE) */
2411                 if ( (ctx & (1<<15)) &&
2412                     !(ctx & (1<<10)) ) {
2413
2414                         debug_printk("dv1394: IT context stopped due to bus reset; waking it up\n");
2415
2416                         /* to be safe, assume a frame has been dropped. User-space programs
2417                            should handle this condition like an underflow. */
2418                         video->dropped_frames++;
2419
2420                         /* for some reason you must clear, then re-set the RUN bit to restart DMA */
2421
2422                         /* clear RUN */
2423                         reg_write(video->ohci, video->ohci_IsoXmitContextControlClear, (1 << 15));
2424                         flush_pci_write(video->ohci);
2425
2426                         /* set RUN */
2427                         reg_write(video->ohci, video->ohci_IsoXmitContextControlSet, (1 << 15));
2428                         flush_pci_write(video->ohci);
2429
2430                         /* set the WAKE bit (just in case; this isn't strictly necessary) */
2431                         reg_write(video->ohci, video->ohci_IsoXmitContextControlSet, (1 << 12));
2432                         flush_pci_write(video->ohci);
2433
2434                         irq_printk("dv1394: AFTER IT restart ctx 0x%08x ptr 0x%08x\n",
2435                                    reg_read(video->ohci, video->ohci_IsoXmitContextControlSet),
2436                                    reg_read(video->ohci, video->ohci_IsoXmitCommandPtr));
2437                 }
2438         }
2439
2440         /* check IR context */
2441         if (video->ohci_ir_ctx != -1) {
2442                 u32 ctx;
2443
2444                 ctx = reg_read(video->ohci, video->ohci_IsoRcvContextControlSet);
2445
2446                 /* if (RUN but not ACTIVE) */
2447                 if ( (ctx & (1<<15)) &&
2448                     !(ctx & (1<<10)) ) {
2449
2450                         debug_printk("dv1394: IR context stopped due to bus reset; waking it up\n");
2451
2452                         /* to be safe, assume a frame has been dropped. User-space programs
2453                            should handle this condition like an overflow. */
2454                         video->dropped_frames++;
2455
2456                         /* for some reason you must clear, then re-set the RUN bit to restart DMA */
2457                         /* XXX this doesn't work for me, I can't get IR DMA to restart :[ */
2458
2459                         /* clear RUN */
2460                         reg_write(video->ohci, video->ohci_IsoRcvContextControlClear, (1 << 15));
2461                         flush_pci_write(video->ohci);
2462
2463                         /* set RUN */
2464                         reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, (1 << 15));
2465                         flush_pci_write(video->ohci);
2466
2467                         /* set the WAKE bit (just in case; this isn't strictly necessary) */
2468                         reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, (1 << 12));
2469                         flush_pci_write(video->ohci);
2470
2471                         irq_printk("dv1394: AFTER IR restart ctx 0x%08x ptr 0x%08x\n",
2472                                    reg_read(video->ohci, video->ohci_IsoRcvContextControlSet),
2473                                    reg_read(video->ohci, video->ohci_IsoRcvCommandPtr));
2474                 }
2475         }
2476
2477 out:
2478         spin_unlock_irqrestore(&video->spinlock, flags);
2479
2480         /* wake readers/writers/ioctl'ers */
2481         wake_up_interruptible(&video->waitq);
2482 }
2483
2484 static struct hpsb_highlevel dv1394_highlevel = {
2485         .name =         "dv1394",
2486         .add_host =     dv1394_add_host,
2487         .remove_host =  dv1394_remove_host,
2488         .host_reset =   dv1394_host_reset,
2489 };
2490
2491 #ifdef CONFIG_COMPAT
2492
2493 #define DV1394_IOC32_INIT       _IOW('#', 0x06, struct dv1394_init32)
2494 #define DV1394_IOC32_GET_STATUS _IOR('#', 0x0c, struct dv1394_status32)
2495
2496 struct dv1394_init32 {
2497         u32 api_version;
2498         u32 channel;
2499         u32 n_frames;
2500         u32 format;
2501         u32 cip_n;
2502         u32 cip_d;
2503         u32 syt_offset;
2504 };
2505
2506 struct dv1394_status32 {
2507         struct dv1394_init32 init;
2508         s32 active_frame;
2509         u32 first_clear_frame;
2510         u32 n_clear_frames;
2511         u32 dropped_frames;
2512 };
2513
2514 /* RED-PEN: this should use compat_alloc_userspace instead */
2515
2516 static int handle_dv1394_init(struct file *file, unsigned int cmd, unsigned long arg)
2517 {
2518         struct dv1394_init32 dv32;
2519         struct dv1394_init dv;
2520         mm_segment_t old_fs;
2521         int ret;
2522
2523         if (file->f_op->unlocked_ioctl != dv1394_ioctl)
2524                 return -EFAULT;
2525
2526         if (copy_from_user(&dv32, (void __user *)arg, sizeof(dv32)))
2527                 return -EFAULT;
2528
2529         dv.api_version = dv32.api_version;
2530         dv.channel = dv32.channel;
2531         dv.n_frames = dv32.n_frames;
2532         dv.format = dv32.format;
2533         dv.cip_n = (unsigned long)dv32.cip_n;
2534         dv.cip_d = (unsigned long)dv32.cip_d;
2535         dv.syt_offset = dv32.syt_offset;
2536
2537         old_fs = get_fs();
2538         set_fs(KERNEL_DS);
2539         ret = dv1394_ioctl(file, DV1394_IOC_INIT, (unsigned long)&dv);
2540         set_fs(old_fs);
2541
2542         return ret;
2543 }
2544
2545 static int handle_dv1394_get_status(struct file *file, unsigned int cmd, unsigned long arg)
2546 {
2547         struct dv1394_status32 dv32;
2548         struct dv1394_status dv;
2549         mm_segment_t old_fs;
2550         int ret;
2551
2552         if (file->f_op->unlocked_ioctl != dv1394_ioctl)
2553                 return -EFAULT;
2554
2555         old_fs = get_fs();
2556         set_fs(KERNEL_DS);
2557         ret = dv1394_ioctl(file, DV1394_IOC_GET_STATUS, (unsigned long)&dv);
2558         set_fs(old_fs);
2559
2560         if (!ret) {
2561                 dv32.init.api_version = dv.init.api_version;
2562                 dv32.init.channel = dv.init.channel;
2563                 dv32.init.n_frames = dv.init.n_frames;
2564                 dv32.init.format = dv.init.format;
2565                 dv32.init.cip_n = (u32)dv.init.cip_n;
2566                 dv32.init.cip_d = (u32)dv.init.cip_d;
2567                 dv32.init.syt_offset = dv.init.syt_offset;
2568                 dv32.active_frame = dv.active_frame;
2569                 dv32.first_clear_frame = dv.first_clear_frame;
2570                 dv32.n_clear_frames = dv.n_clear_frames;
2571                 dv32.dropped_frames = dv.dropped_frames;
2572
2573                 if (copy_to_user((struct dv1394_status32 __user *)arg, &dv32, sizeof(dv32)))
2574                         ret = -EFAULT;
2575         }
2576
2577         return ret;
2578 }
2579
2580
2581
2582 static long dv1394_compat_ioctl(struct file *file, unsigned int cmd,
2583                                unsigned long arg)
2584 {
2585         switch (cmd) {
2586         case DV1394_IOC_SHUTDOWN:
2587         case DV1394_IOC_SUBMIT_FRAMES:
2588         case DV1394_IOC_WAIT_FRAMES:
2589         case DV1394_IOC_RECEIVE_FRAMES:
2590         case DV1394_IOC_START_RECEIVE:
2591                 return dv1394_ioctl(file, cmd, arg);
2592
2593         case DV1394_IOC32_INIT:
2594                 return handle_dv1394_init(file, cmd, arg);
2595         case DV1394_IOC32_GET_STATUS:
2596                 return handle_dv1394_get_status(file, cmd, arg);
2597         default:
2598                 return -ENOIOCTLCMD;
2599         }
2600 }
2601
2602 #endif /* CONFIG_COMPAT */
2603
2604
2605 /*** KERNEL MODULE HANDLERS ************************************************/
2606
2607 MODULE_AUTHOR("Dan Maas <dmaas@dcine.com>, Dan Dennedy <dan@dennedy.org>");
2608 MODULE_DESCRIPTION("driver for DV input/output on OHCI board");
2609 MODULE_SUPPORTED_DEVICE("dv1394");
2610 MODULE_LICENSE("GPL");
2611
2612 static void __exit dv1394_exit_module(void)
2613 {
2614         hpsb_unregister_protocol(&dv1394_driver);
2615
2616         hpsb_unregister_highlevel(&dv1394_highlevel);
2617         cdev_del(&dv1394_cdev);
2618         devfs_remove("ieee1394/dv");
2619 }
2620
2621 static int __init dv1394_init_module(void)
2622 {
2623         int ret;
2624
2625         cdev_init(&dv1394_cdev, &dv1394_fops);
2626         dv1394_cdev.owner = THIS_MODULE;
2627         kobject_set_name(&dv1394_cdev.kobj, "dv1394");
2628         ret = cdev_add(&dv1394_cdev, IEEE1394_DV1394_DEV, 16);
2629         if (ret) {
2630                 printk(KERN_ERR "dv1394: unable to register character device\n");
2631                 return ret;
2632         }
2633
2634         devfs_mk_dir("ieee1394/dv");
2635
2636         hpsb_register_highlevel(&dv1394_highlevel);
2637
2638         ret = hpsb_register_protocol(&dv1394_driver);
2639         if (ret) {
2640                 printk(KERN_ERR "dv1394: failed to register protocol\n");
2641                 hpsb_unregister_highlevel(&dv1394_highlevel);
2642                 devfs_remove("ieee1394/dv");
2643                 cdev_del(&dv1394_cdev);
2644                 return ret;
2645         }
2646
2647         return 0;
2648 }
2649
2650 module_init(dv1394_init_module);
2651 module_exit(dv1394_exit_module);