drivers/idle/intel_idle.c

   1 /*
   2  * intel_idle.c - native hardware idle loop for modern Intel processors
   3  *
   4  * Copyright (c) 2010, Intel Corporation.
   5  * Len Brown <len.brown@intel.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms and conditions of the GNU General Public License,
   9  * version 2, as published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14  * more details.
  15  *
  16  * You should have received a copy of the GNU General Public License along with
  17  * this program; if not, write to the Free Software Foundation, Inc.,
  18  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  19  */
  20
  21 /*
  22  * intel_idle is a cpuidle driver that loads on specific Intel processors
  23  * in lieu of the legacy ACPI processor_idle driver.  The intent is to
  24  * make Linux more efficient on these processors, as intel_idle knows
  25  * more than ACPI, as well as make Linux more immune to ACPI BIOS bugs.
  26  */
  27
  28 /*
  29  * Design Assumptions
  30  *
  31  * All CPUs have same idle states as boot CPU
  32  *
  33  * Chipset BM_STS (bus master status) bit is a NOP
  34  *      for preventing entry into deep C-stats
  35  */
  36
  37 /*
  38  * Known limitations
  39  *
  40  * The driver currently initializes for_each_online_cpu() upon modprobe.
  41  * It it unaware of subsequent processors hot-added to the system.
  42  * This means that if you boot with maxcpus=n and later online
  43  * processors above n, those processors will use C1 only.
  44  *
  45  * ACPI has a .suspend hack to turn off deep c-statees during suspend
  46  * to avoid complications with the lapic timer workaround.
  47  * Have not seen issues with suspend, but may need same workaround here.
  48  *
  49  * There is currently no kernel-based automatic probing/loading mechanism
  50  * if the driver is built as a module.
  51  */
  52
  53 /* un-comment DEBUG to enable pr_debug() statements */
  54 #define DEBUG
  55
  56 #include <linux/kernel.h>
  57 #include <linux/cpuidle.h>
  58 #include <linux/clockchips.h>
  59 #include <linux/hrtimer.h>      /* ktime_get_real() */
  60 #include <trace/events/power.h>
  61 #include <linux/sched.h>
  62 #include <linux/notifier.h>
  63 #include <linux/cpu.h>
  64 #include <asm/mwait.h>
  65 #include <asm/msr.h>
  66
  67 #define INTEL_IDLE_VERSION "0.4"
  68 #define PREFIX "intel_idle: "
  69
  70 static struct cpuidle_driver intel_idle_driver = {
  71         .name = "intel_idle",
  72         .owner = THIS_MODULE,
  73 };
  74 /* intel_idle.max_cstate=0 disables driver */
  75 static int max_cstate = MWAIT_MAX_NUM_CSTATES - 1;
  76
  77 static unsigned int mwait_substates;
  78
  79 #define LAPIC_TIMER_ALWAYS_RELIABLE 0xFFFFFFFF
  80 /* Reliable LAPIC Timer States, bit 1 for C1 etc.  */
  81 static unsigned int lapic_timer_reliable_states = (1 << 1);      /* Default to only C1 */
  82
  83 static struct cpuidle_device __percpu *intel_idle_cpuidle_devices;
  84 static int intel_idle(struct cpuidle_device *dev, struct cpuidle_state *state);
  85
  86 static struct cpuidle_state *cpuidle_state_table;
  87
  88 /*
  89  * Hardware C-state auto-demotion may not always be optimal.
  90  * Indicate which enable bits to clear here.
  91  */
  92 static unsigned long long auto_demotion_disable_flags;
  93
  94 /*
  95  * States are indexed by the cstate number,
  96  * which is also the index into the MWAIT hint array.
  97  * Thus C0 is a dummy.
  98  */
  99 static struct cpuidle_state nehalem_cstates[MWAIT_MAX_NUM_CSTATES] = {
 100         { /* MWAIT C0 */ },
 101         { /* MWAIT C1 */
 102                 .name = "NHM-C1",
 103                 .desc = "MWAIT 0x00",
 104                 .driver_data = (void *) 0x00,
 105                 .flags = CPUIDLE_FLAG_TIME_VALID,
 106                 .exit_latency = 3,
 107                 .target_residency = 6,
 108                 .enter = &intel_idle },
 109         { /* MWAIT C2 */
 110                 .name = "NHM-C3",
 111                 .desc = "MWAIT 0x10",
 112                 .driver_data = (void *) 0x10,
 113                 .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
 114                 .exit_latency = 20,
 115                 .target_residency = 80,
 116                 .enter = &intel_idle },
 117         { /* MWAIT C3 */
 118                 .name = "NHM-C6",
 119                 .desc = "MWAIT 0x20",
 120                 .driver_data = (void *) 0x20,
 121                 .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
 122                 .exit_latency = 200,
 123                 .target_residency = 800,
 124                 .enter = &intel_idle },
 125 };
 126
 127 static struct cpuidle_state snb_cstates[MWAIT_MAX_NUM_CSTATES] = {
 128         { /* MWAIT C0 */ },
 129         { /* MWAIT C1 */
 130                 .name = "SNB-C1",
 131                 .desc = "MWAIT 0x00",
 132                 .driver_data = (void *) 0x00,
 133                 .flags = CPUIDLE_FLAG_TIME_VALID,
 134                 .exit_latency = 1,
 135                 .target_residency = 4,
 136                 .enter = &intel_idle },
 137         { /* MWAIT C2 */
 138                 .name = "SNB-C3",
 139                 .desc = "MWAIT 0x10",
 140                 .driver_data = (void *) 0x10,
 141                 .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
 142                 .exit_latency = 80,
 143                 .target_residency = 160,
 144                 .enter = &intel_idle },
 145         { /* MWAIT C3 */
 146                 .name = "SNB-C6",
 147                 .desc = "MWAIT 0x20",
 148                 .driver_data = (void *) 0x20,
 149                 .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
 150                 .exit_latency = 104,
 151                 .target_residency = 208,
 152                 .enter = &intel_idle },
 153         { /* MWAIT C4 */
 154                 .name = "SNB-C7",
 155                 .desc = "MWAIT 0x30",
 156                 .driver_data = (void *) 0x30,
 157                 .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
 158                 .exit_latency = 109,
 159                 .target_residency = 300,
 160                 .enter = &intel_idle },
 161 };
 162
 163 static struct cpuidle_state atom_cstates[MWAIT_MAX_NUM_CSTATES] = {
 164         { /* MWAIT C0 */ },
 165         { /* MWAIT C1 */
 166                 .name = "ATM-C1",
 167                 .desc = "MWAIT 0x00",
 168                 .driver_data = (void *) 0x00,
 169                 .flags = CPUIDLE_FLAG_TIME_VALID,
 170                 .exit_latency = 1,
 171                 .target_residency = 4,
 172                 .enter = &intel_idle },
 173         { /* MWAIT C2 */
 174                 .name = "ATM-C2",
 175                 .desc = "MWAIT 0x10",
 176                 .driver_data = (void *) 0x10,
 177                 .flags = CPUIDLE_FLAG_TIME_VALID,
 178                 .exit_latency = 20,
 179                 .target_residency = 80,
 180                 .enter = &intel_idle },
 181         { /* MWAIT C3 */ },
 182         { /* MWAIT C4 */
 183                 .name = "ATM-C4",
 184                 .desc = "MWAIT 0x30",
 185                 .driver_data = (void *) 0x30,
 186                 .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
 187                 .exit_latency = 100,
 188                 .target_residency = 400,
 189                 .enter = &intel_idle },
 190         { /* MWAIT C5 */ },
 191         { /* MWAIT C6 */
 192                 .name = "ATM-C6",
 193                 .desc = "MWAIT 0x52",
 194                 .driver_data = (void *) 0x52,
 195                 .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
 196                 .exit_latency = 140,
 197                 .target_residency = 560,
 198                 .enter = &intel_idle },
 199 };
 200
 201 /**
 202  * intel_idle
 203  * @dev: cpuidle_device
 204  * @state: cpuidle state
 205  *
 206  */
 207 static int intel_idle(struct cpuidle_device *dev, struct cpuidle_state *state)
 208 {
 209         unsigned long ecx = 1; /* break on interrupt flag */
 210         unsigned long eax = (unsigned long)cpuidle_get_statedata(state);
 211         unsigned int cstate;
 212         ktime_t kt_before, kt_after;
 213         s64 usec_delta;
 214         int cpu = smp_processor_id();
 215
 216         cstate = (((eax) >> MWAIT_SUBSTATE_SIZE) & MWAIT_CSTATE_MASK) + 1;
 217
 218         local_irq_disable();
 219
 220         /*
 221          * leave_mm() to avoid costly and often unnecessary wakeups
 222          * for flushing the user TLB's associated with the active mm.
 223          */
 224         if (state->flags & CPUIDLE_FLAG_TLB_FLUSHED)
 225                 leave_mm(cpu);
 226
 227         if (!(lapic_timer_reliable_states & (1 << (cstate))))
 228                 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu);
 229
 230         kt_before = ktime_get_real();
 231
 232         stop_critical_timings();
 233 #ifndef MODULE
 234         trace_power_start(POWER_CSTATE, (eax >> 4) + 1, cpu);
 235 #endif
 236         if (!need_resched()) {
 237
 238                 __monitor((void *)&current_thread_info()->flags, 0, 0);
 239                 smp_mb();
 240                 if (!need_resched())
 241                         __mwait(eax, ecx);
 242         }
 243
 244         start_critical_timings();
 245
 246         kt_after = ktime_get_real();
 247         usec_delta = ktime_to_us(ktime_sub(kt_after, kt_before));
 248
 249         local_irq_enable();
 250
 251         if (!(lapic_timer_reliable_states & (1 << (cstate))))
 252                 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu);
 253
 254         return usec_delta;
 255 }
 256
 257 static void __setup_broadcast_timer(void *arg)
 258 {
 259         unsigned long reason = (unsigned long)arg;
 260         int cpu = smp_processor_id();
 261
 262         reason = reason ?
 263                 CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
 264
 265         clockevents_notify(reason, &cpu);
 266 }
 267
 268 static int setup_broadcast_cpuhp_notify(struct notifier_block *n,
 269                 unsigned long action, void *hcpu)
 270 {
 271         int hotcpu = (unsigned long)hcpu;
 272
 273         switch (action & 0xf) {
 274         case CPU_ONLINE:
 275                 smp_call_function_single(hotcpu, __setup_broadcast_timer,
 276                         (void *)true, 1);
 277                 break;
 278         }
 279         return NOTIFY_OK;
 280 }
 281
 282 static struct notifier_block setup_broadcast_notifier = {
 283         .notifier_call = setup_broadcast_cpuhp_notify,
 284 };
 285
 286 static void auto_demotion_disable(void *dummy)
 287 {
 288         unsigned long long msr_bits;
 289
 290         rdmsrl(MSR_NHM_SNB_PKG_CST_CFG_CTL, msr_bits);
 291         msr_bits &= ~auto_demotion_disable_flags;
 292         wrmsrl(MSR_NHM_SNB_PKG_CST_CFG_CTL, msr_bits);
 293 }
 294
 295 /*
 296  * intel_idle_probe()
 297  */
 298 static int intel_idle_probe(void)
 299 {
 300         unsigned int eax, ebx, ecx;
 301
 302         if (max_cstate == 0) {
 303                 pr_debug(PREFIX "disabled\n");
 304                 return -EPERM;
 305         }
 306
 307         if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
 308                 return -ENODEV;
 309
 310         if (!boot_cpu_has(X86_FEATURE_MWAIT))
 311                 return -ENODEV;
 312
 313         if (boot_cpu_data.cpuid_level < CPUID_MWAIT_LEAF)
 314                 return -ENODEV;
 315
 316         cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &mwait_substates);
 317
 318         if (!(ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED) ||
 319                 !(ecx & CPUID5_ECX_INTERRUPT_BREAK))
 320                         return -ENODEV;
 321
 322         pr_debug(PREFIX "MWAIT substates: 0x%x\n", mwait_substates);
 323
 324
 325         if (boot_cpu_data.x86 != 6)     /* family 6 */
 326                 return -ENODEV;
 327
 328         switch (boot_cpu_data.x86_model) {
 329
 330         case 0x1A:      /* Core i7, Xeon 5500 series */
 331         case 0x1E:      /* Core i7 and i5 Processor - Lynnfield Jasper Forest */
 332         case 0x1F:      /* Core i7 and i5 Processor - Nehalem */
 333         case 0x2E:      /* Nehalem-EX Xeon */
 334         case 0x2F:      /* Westmere-EX Xeon */
 335         case 0x25:      /* Westmere */
 336         case 0x2C:      /* Westmere */
 337                 cpuidle_state_table = nehalem_cstates;
 338                 auto_demotion_disable_flags =
 339                         (NHM_C1_AUTO_DEMOTE | NHM_C3_AUTO_DEMOTE);
 340                 break;
 341
 342         case 0x1C:      /* 28 - Atom Processor */
 343                 cpuidle_state_table = atom_cstates;
 344                 break;
 345
 346         case 0x26:      /* 38 - Lincroft Atom Processor */
 347                 cpuidle_state_table = atom_cstates;
 348                 auto_demotion_disable_flags = ATM_LNC_C6_AUTO_DEMOTE;
 349                 break;
 350
 351         case 0x2A:      /* SNB */
 352         case 0x2D:      /* SNB Xeon */
 353                 cpuidle_state_table = snb_cstates;
 354                 break;
 355
 356         default:
 357                 pr_debug(PREFIX "does not run on family %d model %d\n",
 358                         boot_cpu_data.x86, boot_cpu_data.x86_model);
 359                 return -ENODEV;
 360         }
 361
 362         if (boot_cpu_has(X86_FEATURE_ARAT))     /* Always Reliable APIC Timer */
 363                 lapic_timer_reliable_states = LAPIC_TIMER_ALWAYS_RELIABLE;
 364         else {
 365                 smp_call_function(__setup_broadcast_timer, (void *)true, 1);
 366                 register_cpu_notifier(&setup_broadcast_notifier);
 367         }
 368
 369         pr_debug(PREFIX "v" INTEL_IDLE_VERSION
 370                 " model 0x%X\n", boot_cpu_data.x86_model);
 371
 372         pr_debug(PREFIX "lapic_timer_reliable_states 0x%x\n",
 373                 lapic_timer_reliable_states);
 374         return 0;
 375 }
 376
 377 /*
 378  * intel_idle_cpuidle_devices_uninit()
 379  * unregister, free cpuidle_devices
 380  */
 381 static void intel_idle_cpuidle_devices_uninit(void)
 382 {
 383         int i;
 384         struct cpuidle_device *dev;
 385
 386         for_each_online_cpu(i) {
 387                 dev = per_cpu_ptr(intel_idle_cpuidle_devices, i);
 388                 cpuidle_unregister_device(dev);
 389         }
 390
 391         free_percpu(intel_idle_cpuidle_devices);
 392         return;
 393 }
 394 /*
 395  * intel_idle_cpuidle_devices_init()
 396  * allocate, initialize, register cpuidle_devices
 397  */
 398 static int intel_idle_cpuidle_devices_init(void)
 399 {
 400         int i, cstate;
 401         struct cpuidle_device *dev;
 402
 403         intel_idle_cpuidle_devices = alloc_percpu(struct cpuidle_device);
 404         if (intel_idle_cpuidle_devices == NULL)
 405                 return -ENOMEM;
 406
 407         for_each_online_cpu(i) {
 408                 dev = per_cpu_ptr(intel_idle_cpuidle_devices, i);
 409
 410                 dev->state_count = 1;
 411
 412                 for (cstate = 1; cstate < MWAIT_MAX_NUM_CSTATES; ++cstate) {
 413                         int num_substates;
 414
 415                         if (cstate > max_cstate) {
 416                                 printk(PREFIX "max_cstate %d reached\n",
 417                                         max_cstate);
 418                                 break;
 419                         }
 420
 421                         /* does the state exist in CPUID.MWAIT? */
 422                         num_substates = (mwait_substates >> ((cstate) * 4))
 423                                                 & MWAIT_SUBSTATE_MASK;
 424                         if (num_substates == 0)
 425                                 continue;
 426                         /* is the state not enabled? */
 427                         if (cpuidle_state_table[cstate].enter == NULL) {
 428                                 /* does the driver not know about the state? */
 429                                 if (*cpuidle_state_table[cstate].name == '\0')
 430                                         pr_debug(PREFIX "unaware of model 0x%x"
 431                                                 " MWAIT %d please"
 432                                                 " contact lenb@kernel.org",
 433                                         boot_cpu_data.x86_model, cstate);
 434                                 continue;
 435                         }
 436
 437                         if ((cstate > 2) &&
 438                                 !boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
 439                                 mark_tsc_unstable("TSC halts in idle"
 440                                         " states deeper than C2");
 441
 442                         dev->states[dev->state_count] = /* structure copy */
 443                                 cpuidle_state_table[cstate];
 444
 445                         dev->state_count += 1;
 446                 }
 447
 448                 dev->cpu = i;
 449                 if (cpuidle_register_device(dev)) {
 450                         pr_debug(PREFIX "cpuidle_register_device %d failed!\n",
 451                                  i);
 452                         intel_idle_cpuidle_devices_uninit();
 453                         return -EIO;
 454                 }
 455         }
 456         if (auto_demotion_disable_flags)
 457                 smp_call_function(auto_demotion_disable, NULL, 1);
 458
 459         return 0;
 460 }
 461
 462
 463 static int __init intel_idle_init(void)
 464 {
 465         int retval;
 466
 467         retval = intel_idle_probe();
 468         if (retval)
 469                 return retval;
 470
 471         retval = cpuidle_register_driver(&intel_idle_driver);
 472         if (retval) {
 473                 printk(KERN_DEBUG PREFIX "intel_idle yielding to %s",
 474                         cpuidle_get_driver()->name);
 475                 return retval;
 476         }
 477
 478         retval = intel_idle_cpuidle_devices_init();
 479         if (retval) {
 480                 cpuidle_unregister_driver(&intel_idle_driver);
 481                 return retval;
 482         }
 483
 484         return 0;
 485 }
 486
 487 static void __exit intel_idle_exit(void)
 488 {
 489         intel_idle_cpuidle_devices_uninit();
 490         cpuidle_unregister_driver(&intel_idle_driver);
 491
 492         if (lapic_timer_reliable_states != LAPIC_TIMER_ALWAYS_RELIABLE) {
 493                 smp_call_function(__setup_broadcast_timer, (void *)false, 1);
 494                 unregister_cpu_notifier(&setup_broadcast_notifier);
 495         }
 496
 497         return;
 498 }
 499
 500 module_init(intel_idle_init);
 501 module_exit(intel_idle_exit);
 502
 503 module_param(max_cstate, int, 0444);
 504
 505 MODULE_AUTHOR("Len Brown <len.brown@intel.com>");
 506 MODULE_DESCRIPTION("Cpuidle driver for Intel Hardware v" INTEL_IDLE_VERSION);
 507 MODULE_LICENSE("GPL");