2 * linux/drivers/ide/setup-pci.c Version 1.10 2002/08/19
4 * Copyright (c) 1998-2000 Andre Hedrick <andre@linux-ide.org>
6 * Copyright (c) 1995-1998 Mark Lord
7 * May be copied or modified under the terms of the GNU General Public License
11 * This module provides support for automatic detection and
12 * configuration of all PCI IDE interfaces present in a system.
15 #include <linux/module.h>
16 #include <linux/types.h>
17 #include <linux/kernel.h>
18 #include <linux/pci.h>
19 #include <linux/init.h>
20 #include <linux/timer.h>
22 #include <linux/interrupt.h>
23 #include <linux/ide.h>
24 #include <linux/dma-mapping.h>
31 * ide_match_hwif - match a PCI IDE against an ide_hwif
32 * @io_base: I/O base of device
33 * @bootable: set if its bootable
34 * @name: name of device
36 * Match a PCI IDE port against an entry in ide_hwifs[],
37 * based on io_base port if possible. Return the matching hwif,
38 * or a new hwif. If we find an error (clashing, out of devices, etc)
41 * FIXME: we need to handle mmio matches here too
44 static ide_hwif_t *ide_match_hwif(unsigned long io_base, u8 bootable, const char *name)
50 * Look for a hwif with matching io_base specified using
51 * parameters to ide_setup().
53 for (h = 0; h < MAX_HWIFS; ++h) {
55 if (hwif->io_ports[IDE_DATA_OFFSET] == io_base) {
56 if (hwif->chipset == ide_forced)
57 return hwif; /* a perfect match */
61 * Look for a hwif with matching io_base default value.
62 * If chipset is "ide_unknown", then claim that hwif slot.
63 * Otherwise, some other chipset has already claimed it.. :(
65 for (h = 0; h < MAX_HWIFS; ++h) {
67 if (hwif->io_ports[IDE_DATA_OFFSET] == io_base) {
68 if (hwif->chipset == ide_unknown)
69 return hwif; /* match */
70 printk(KERN_ERR "%s: port 0x%04lx already claimed by %s\n",
71 name, io_base, hwif->name);
72 return NULL; /* already claimed */
76 * Okay, there is no hwif matching our io_base,
77 * so we'll just claim an unassigned slot.
78 * Give preference to claiming other slots before claiming ide0/ide1,
79 * just in case there's another interface yet-to-be-scanned
80 * which uses ports 1f0/170 (the ide0/ide1 defaults).
82 * Unless there is a bootable card that does not use the standard
83 * ports 1f0/170 (the ide0/ide1 defaults). The (bootable) flag.
86 for (h = 0; h < MAX_HWIFS; ++h) {
88 if (hwif->chipset == ide_unknown)
89 return hwif; /* pick an unused entry */
92 for (h = 2; h < MAX_HWIFS; ++h) {
94 if (hwif->chipset == ide_unknown)
95 return hwif; /* pick an unused entry */
98 for (h = 0; h < 2 && h < MAX_HWIFS; ++h) {
100 if (hwif->chipset == ide_unknown)
101 return hwif; /* pick an unused entry */
103 printk(KERN_ERR "%s: too many IDE interfaces, no room in table\n", name);
108 * ide_setup_pci_baseregs - place a PCI IDE controller native
109 * @dev: PCI device of interface to switch native
110 * @name: Name of interface
112 * We attempt to place the PCI interface into PCI native mode. If
113 * we succeed the BARs are ok and the controller is in PCI mode.
114 * Returns 0 on success or an errno code.
116 * FIXME: if we program the interface and then fail to set the BARS
117 * we don't switch it back to legacy mode. Do we actually care ??
120 static int ide_setup_pci_baseregs (struct pci_dev *dev, const char *name)
125 * Place both IDE interfaces into PCI "native" mode:
127 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
129 if ((progif & 0xa) != 0xa) {
130 printk(KERN_INFO "%s: device not capable of full "
131 "native PCI mode\n", name);
134 printk("%s: placing both ports into native PCI mode\n", name);
135 (void) pci_write_config_byte(dev, PCI_CLASS_PROG, progif|5);
136 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
138 printk(KERN_ERR "%s: rewrite of PROGIF failed, wanted "
139 "0x%04x, got 0x%04x\n",
140 name, progif|5, progif);
147 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
149 * ide_get_or_set_dma_base - setup BMIBA
152 * Fetch the DMA Bus-Master-I/O-Base-Address (BMIBA) from PCI space.
153 * Where a device has a partner that is already in DMA mode we check
154 * and enforce IDE simplex rules.
157 static unsigned long ide_get_or_set_dma_base (ide_hwif_t *hwif)
159 unsigned long dma_base = 0;
160 struct pci_dev *dev = hwif->pci_dev;
163 return hwif->dma_base;
165 if (hwif->mate && hwif->mate->dma_base) {
166 dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8);
168 dma_base = pci_resource_start(dev, 4);
170 printk(KERN_ERR "%s: dma_base is invalid\n",
177 dma_base += hwif->channel ? 8 : 0;
179 switch(dev->device) {
180 case PCI_DEVICE_ID_AL_M5219:
181 case PCI_DEVICE_ID_AL_M5229:
182 case PCI_DEVICE_ID_AMD_VIPER_7409:
183 case PCI_DEVICE_ID_CMD_643:
184 case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE:
185 case PCI_DEVICE_ID_REVOLUTION:
186 simplex_stat = hwif->INB(dma_base + 2);
187 hwif->OUTB((simplex_stat&0x60),(dma_base + 2));
188 simplex_stat = hwif->INB(dma_base + 2);
189 if (simplex_stat & 0x80) {
190 printk(KERN_INFO "%s: simplex device: "
197 * If the device claims "simplex" DMA,
198 * this means only one of the two interfaces
199 * can be trusted with DMA at any point in time.
200 * So we should enable DMA only on one of the
203 simplex_stat = hwif->INB(dma_base + 2);
204 if (simplex_stat & 0x80) {
205 /* simplex device? */
207 * At this point we haven't probed the drives so we can't make the
208 * appropriate decision. Really we should defer this problem
209 * until we tune the drive then try to grab DMA ownership if we want
210 * to be the DMA end. This has to be become dynamic to handle hot
213 if (hwif->mate && hwif->mate->dma_base) {
214 printk(KERN_INFO "%s: simplex device: "
224 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
226 void ide_setup_pci_noise (struct pci_dev *dev, ide_pci_device_t *d)
228 printk(KERN_INFO "%s: IDE controller at PCI slot %s\n",
229 d->name, pci_name(dev));
232 EXPORT_SYMBOL_GPL(ide_setup_pci_noise);
236 * ide_pci_enable - do PCI enables
238 * @d: IDE pci device data
240 * Enable the IDE PCI device. We attempt to enable the device in full
241 * but if that fails then we only need BAR4 so we will enable that.
243 * Returns zero on success or an error code
246 static int ide_pci_enable(struct pci_dev *dev, ide_pci_device_t *d)
250 if (pci_enable_device(dev)) {
251 ret = pci_enable_device_bars(dev, 1 << 4);
253 printk(KERN_WARNING "%s: (ide_setup_pci_device:) "
254 "Could not enable device.\n", d->name);
257 printk(KERN_WARNING "%s: BIOS configuration fixed.\n", d->name);
261 * assume all devices can do 32-bit dma for now. we can add a
262 * dma mask field to the ide_pci_device_t if we need it (or let
263 * lower level driver set the dma mask)
265 ret = pci_set_dma_mask(dev, DMA_32BIT_MASK);
267 printk(KERN_ERR "%s: can't set dma mask\n", d->name);
271 /* FIXME: Temporary - until we put in the hotplug interface logic
272 Check that the bits we want are not in use by someone else. */
273 ret = pci_request_region(dev, 4, "ide_tmp");
277 pci_release_region(dev, 4);
283 * ide_pci_configure - configure an unconfigured device
285 * @d: IDE pci device data
287 * Enable and configure the PCI device we have been passed.
288 * Returns zero on success or an error code.
291 static int ide_pci_configure(struct pci_dev *dev, ide_pci_device_t *d)
295 * PnP BIOS was *supposed* to have setup this device, but we
296 * can do it ourselves, so long as the BIOS has assigned an IRQ
297 * (or possibly the device is using a "legacy header" for IRQs).
298 * Maybe the user deliberately *disabled* the device,
299 * but we'll eventually ignore it again if no drives respond.
301 if (ide_setup_pci_baseregs(dev, d->name) || pci_write_config_word(dev, PCI_COMMAND, pcicmd|PCI_COMMAND_IO))
303 printk(KERN_INFO "%s: device disabled (BIOS)\n", d->name);
306 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd)) {
307 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name);
310 if (!(pcicmd & PCI_COMMAND_IO)) {
311 printk(KERN_ERR "%s: unable to enable IDE controller\n", d->name);
318 * ide_pci_check_iomem - check a register is I/O
323 * Checks if a BAR is configured and points to MMIO space. If so
324 * print an error and return an error code. Otherwise return 0
327 static int ide_pci_check_iomem(struct pci_dev *dev, ide_pci_device_t *d, int bar)
329 ulong flags = pci_resource_flags(dev, bar);
332 if (!flags || pci_resource_len(dev, bar) == 0)
336 if(flags & PCI_BASE_ADDRESS_IO_MASK)
340 printk(KERN_ERR "%s: IO baseregs (BIOS) are reported "
342 "<andre@linux-ide.org>.\n", d->name);
347 * ide_hwif_configure - configure an IDE interface
348 * @dev: PCI device holding interface
350 * @mate: Paired interface if any
352 * Perform the initial set up for the hardware interface structure. This
353 * is done per interface port rather than per PCI device. There may be
354 * more than one port per device.
356 * Returns the new hardware interface structure, or NULL on a failure
359 static ide_hwif_t *ide_hwif_configure(struct pci_dev *dev, ide_pci_device_t *d, ide_hwif_t *mate, int port, int irq)
361 unsigned long ctl = 0, base = 0;
363 u8 bootable = (d->host_flags & IDE_HFLAG_BOOTABLE) ? 1 : 0;
365 if ((d->host_flags & IDE_HFLAG_ISA_PORTS) == 0) {
366 /* Possibly we should fail if these checks report true */
367 ide_pci_check_iomem(dev, d, 2*port);
368 ide_pci_check_iomem(dev, d, 2*port+1);
370 ctl = pci_resource_start(dev, 2*port+1);
371 base = pci_resource_start(dev, 2*port);
372 if ((ctl && !base) || (base && !ctl)) {
373 printk(KERN_ERR "%s: inconsistent baseregs (BIOS) "
374 "for port %d, skipping\n", d->name, port);
380 /* Use default values */
381 ctl = port ? 0x374 : 0x3f4;
382 base = port ? 0x170 : 0x1f0;
384 if ((hwif = ide_match_hwif(base, bootable, d->name)) == NULL)
385 return NULL; /* no room in ide_hwifs[] */
386 if (hwif->io_ports[IDE_DATA_OFFSET] != base ||
387 hwif->io_ports[IDE_CONTROL_OFFSET] != (ctl | 2)) {
388 memset(&hwif->hw, 0, sizeof(hwif->hw));
389 #ifndef IDE_ARCH_OBSOLETE_INIT
390 ide_std_init_ports(&hwif->hw, base, (ctl | 2));
391 hwif->hw.io_ports[IDE_IRQ_OFFSET] = 0;
393 ide_init_hwif_ports(&hwif->hw, base, (ctl | 2), NULL);
395 memcpy(hwif->io_ports, hwif->hw.io_ports, sizeof(hwif->io_ports));
396 hwif->noprobe = !hwif->io_ports[IDE_DATA_OFFSET];
398 hwif->chipset = ide_pci;
400 hwif->cds = (struct ide_pci_device_s *) d;
401 hwif->channel = port;
413 * ide_hwif_setup_dma - configure DMA interface
416 * @hwif: Hardware interface we are configuring
418 * Set up the DMA base for the interface. Enable the master bits as
419 * necessary and attempt to bring the device DMA into a ready to use
423 #ifndef CONFIG_BLK_DEV_IDEDMA_PCI
424 static void ide_hwif_setup_dma(struct pci_dev *dev, ide_pci_device_t *d, ide_hwif_t *hwif)
428 static void ide_hwif_setup_dma(struct pci_dev *dev, ide_pci_device_t *d, ide_hwif_t *hwif)
431 pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
433 if ((d->autodma == AUTODMA) ||
434 ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE &&
435 (dev->class & 0x80))) {
436 unsigned long dma_base = ide_get_or_set_dma_base(hwif);
437 if (dma_base && !(pcicmd & PCI_COMMAND_MASTER)) {
439 * Set up BM-DMA capability
440 * (PnP BIOS should have done this)
443 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd) || !(pcicmd & PCI_COMMAND_MASTER)) {
444 printk(KERN_ERR "%s: %s error updating PCICMD\n",
445 hwif->name, d->name);
451 d->init_dma(hwif, dma_base);
453 ide_setup_dma(hwif, dma_base, 8);
456 printk(KERN_INFO "%s: %s Bus-Master DMA disabled "
457 "(BIOS)\n", hwif->name, d->name);
461 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI*/
464 * ide_setup_pci_controller - set up IDE PCI
467 * @noisy: verbose flag
468 * @config: returned as 1 if we configured the hardware
470 * Set up the PCI and controller side of the IDE interface. This brings
471 * up the PCI side of the device, checks that the device is enabled
472 * and enables it if need be
475 static int ide_setup_pci_controller(struct pci_dev *dev, ide_pci_device_t *d, int noisy, int *config)
482 ide_setup_pci_noise(dev, d);
484 ret = ide_pci_enable(dev, d);
488 ret = pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
490 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name);
493 if (!(pcicmd & PCI_COMMAND_IO)) { /* is device disabled? */
494 ret = ide_pci_configure(dev, d);
498 printk(KERN_INFO "%s: device enabled (Linux)\n", d->name);
501 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
504 printk(KERN_INFO "%s: chipset revision %d\n", d->name, class_rev);
510 * ide_pci_setup_ports - configure ports/devices on PCI IDE
512 * @d: IDE pci device info
514 * @index: ata index to update
516 * Scan the interfaces attached to this device and do any
517 * necessary per port setup. Attach the devices and ask the
518 * generic DMA layer to do its work for us.
520 * Normally called automaticall from do_ide_pci_setup_device,
521 * but is also used directly as a helper function by some controllers
522 * where the chipset setup is not the default PCI IDE one.
525 void ide_pci_setup_ports(struct pci_dev *dev, ide_pci_device_t *d, int pciirq, ata_index_t *index)
527 int channels = (d->host_flags & IDE_HFLAG_SINGLE) ? 1 : 2, port;
528 int at_least_one_hwif_enabled = 0;
529 ide_hwif_t *hwif, *mate = NULL;
535 * Set up the IDE ports
538 for (port = 0; port < channels; ++port) {
539 ide_pci_enablebit_t *e = &(d->enablebits[port]);
541 if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) ||
542 (tmp & e->mask) != e->val))
543 continue; /* port not enabled */
545 if ((hwif = ide_hwif_configure(dev, d, mate, port, pciirq)) == NULL)
548 /* setup proper ancestral information */
549 hwif->gendev.parent = &dev->dev;
552 index->b.high = hwif->index;
554 index->b.low = hwif->index;
561 if (d->autodma == NODMA)
562 goto bypass_legacy_dma;
564 if(d->init_setup_dma)
565 d->init_setup_dma(dev, d, hwif);
567 ide_hwif_setup_dma(dev, d, hwif);
569 hwif->host_flags = d->host_flags;
570 hwif->pio_mask = d->pio_mask;
573 /* Call chipset-specific routine
574 * for each enabled hwif
579 at_least_one_hwif_enabled = 1;
581 if (!at_least_one_hwif_enabled)
582 printk(KERN_INFO "%s: neither IDE port enabled (BIOS)\n", d->name);
585 EXPORT_SYMBOL_GPL(ide_pci_setup_ports);
588 * ide_setup_pci_device() looks at the primary/secondary interfaces
589 * on a PCI IDE device and, if they are enabled, prepares the IDE driver
590 * for use with them. This generic code works for most PCI chipsets.
592 * One thing that is not standardized is the location of the
593 * primary/secondary interface "enable/disable" bits. For chipsets that
594 * we "know" about, this information is in the ide_pci_device_t struct;
595 * for all other chipsets, we just assume both interfaces are enabled.
597 static int do_ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t *d,
598 ata_index_t *index, u8 noisy)
600 static ata_index_t ata_index = { .b = { .low = 0xff, .high = 0xff } };
601 int tried_config = 0;
604 ret = ide_setup_pci_controller(dev, d, noisy, &tried_config);
609 * Can we trust the reported IRQ?
613 /* Is it an "IDE storage" device in non-PCI mode? */
614 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5) {
616 printk(KERN_INFO "%s: not 100%% native mode: "
617 "will probe irqs later\n", d->name);
619 * This allows offboard ide-pci cards the enable a BIOS,
620 * verify interrupt settings of split-mirror pci-config
621 * space, place chipset into init-mode, and/or preserve
622 * an interrupt if the card is not native ide support.
624 ret = d->init_chipset ? d->init_chipset(dev, d->name) : 0;
628 } else if (tried_config) {
630 printk(KERN_INFO "%s: will probe irqs later\n", d->name);
632 } else if (!pciirq) {
634 printk(KERN_WARNING "%s: bad irq (%d): will probe later\n",
638 if (d->init_chipset) {
639 ret = d->init_chipset(dev, d->name);
644 printk(KERN_INFO "%s: 100%% native mode on irq %d\n",
648 /* FIXME: silent failure can happen */
651 ide_pci_setup_ports(dev, d, pciirq, index);
656 int ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t *d)
658 ide_hwif_t *hwif = NULL, *mate = NULL;
659 ata_index_t index_list;
662 ret = do_ide_setup_pci_device(dev, d, &index_list, 1);
666 if ((index_list.b.low & 0xf0) != 0xf0)
667 hwif = &ide_hwifs[index_list.b.low];
668 if ((index_list.b.high & 0xf0) != 0xf0)
669 mate = &ide_hwifs[index_list.b.high];
672 probe_hwif_init_with_fixup(hwif, d->fixup);
674 probe_hwif_init_with_fixup(mate, d->fixup);
677 ide_proc_register_port(hwif);
679 ide_proc_register_port(mate);
684 EXPORT_SYMBOL_GPL(ide_setup_pci_device);
686 int ide_setup_pci_devices(struct pci_dev *dev1, struct pci_dev *dev2,
689 struct pci_dev *pdev[] = { dev1, dev2 };
690 ata_index_t index_list[2];
693 for (i = 0; i < 2; i++) {
694 ret = do_ide_setup_pci_device(pdev[i], d, index_list + i, !i);
696 * FIXME: Mom, mom, they stole me the helper function to undo
697 * do_ide_setup_pci_device() on the first device!
703 for (i = 0; i < 2; i++) {
704 u8 idx[2] = { index_list[i].b.low, index_list[i].b.high };
707 for (j = 0; j < 2; j++) {
708 if ((idx[j] & 0xf0) != 0xf0)
709 probe_hwif_init(ide_hwifs + idx[j]);
713 for (i = 0; i < 2; i++) {
714 u8 idx[2] = { index_list[i].b.low, index_list[i].b.high };
717 for (j = 0; j < 2; j++) {
718 if ((idx[j] & 0xf0) != 0xf0)
719 ide_proc_register_port(ide_hwifs + idx[j]);
726 EXPORT_SYMBOL_GPL(ide_setup_pci_devices);
728 #ifdef CONFIG_IDEPCI_PCIBUS_ORDER
733 static int pre_init = 1; /* Before first ordered IDE scan */
734 static LIST_HEAD(ide_pci_drivers);
737 * __ide_pci_register_driver - attach IDE driver
738 * @driver: pci driver
739 * @module: owner module of the driver
741 * Registers a driver with the IDE layer. The IDE layer arranges that
742 * boot time setup is done in the expected device order and then
743 * hands the controllers off to the core PCI code to do the rest of
746 * The driver_data of the driver table must point to an ide_pci_device_t
747 * describing the interface.
749 * Returns are the same as for pci_register_driver
752 int __ide_pci_register_driver(struct pci_driver *driver, struct module *module,
753 const char *mod_name)
756 return __pci_register_driver(driver, module, mod_name);
757 driver->driver.owner = module;
758 list_add_tail(&driver->node, &ide_pci_drivers);
762 EXPORT_SYMBOL_GPL(__ide_pci_register_driver);
765 * ide_scan_pcidev - find an IDE driver for a device
766 * @dev: PCI device to check
768 * Look for an IDE driver to handle the device we are considering.
769 * This is only used during boot up to get the ordering correct. After
770 * boot up the pci layer takes over the job.
773 static int __init ide_scan_pcidev(struct pci_dev *dev)
776 struct pci_driver *d;
778 list_for_each(l, &ide_pci_drivers) {
779 d = list_entry(l, struct pci_driver, node);
781 const struct pci_device_id *id = pci_match_id(d->id_table,
783 if (id != NULL && d->probe(dev, id) >= 0) {
794 * ide_scan_pcibus - perform the initial IDE driver scan
795 * @scan_direction: set for reverse order scanning
797 * Perform the initial bus rather than driver ordered scan of the
798 * PCI drivers. After this all IDE pci handling becomes standard
799 * module ordering not traditionally ordered.
802 void __init ide_scan_pcibus (int scan_direction)
804 struct pci_dev *dev = NULL;
805 struct pci_driver *d;
806 struct list_head *l, *n;
810 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL)
811 ide_scan_pcidev(dev);
813 while ((dev = pci_get_device_reverse(PCI_ANY_ID, PCI_ANY_ID, dev))
815 ide_scan_pcidev(dev);
818 * Hand the drivers over to the PCI layer now we
822 list_for_each_safe(l, n, &ide_pci_drivers) {
824 d = list_entry(l, struct pci_driver, node);
825 if (__pci_register_driver(d, d->driver.owner, d->driver.mod_name))
826 printk(KERN_ERR "%s: failed to register driver for %s\n",
827 __FUNCTION__, d->driver.mod_name);