2 * Copyright (C) 1996-2001 Linus Torvalds & author (see below)
6 * Version 0.03 Cleaned auto-tune, added probe
7 * Version 0.04 Added second channel tuning
8 * Version 0.05 Enhanced tuning ; added qd6500 support
9 * Version 0.06 Added dos driver's list
10 * Version 0.07 Second channel bug fix
12 * QDI QD6500/QD6580 EIDE controller fast support
14 * To activate controller support, use "ide0=qd65xx"
18 * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
19 * Samuel Thibault <samuel.thibault@ens-lyon.org>
22 #include <linux/module.h>
23 #include <linux/types.h>
24 #include <linux/kernel.h>
25 #include <linux/delay.h>
26 #include <linux/timer.h>
28 #include <linux/ioport.h>
29 #include <linux/blkdev.h>
30 #include <linux/ide.h>
31 #include <linux/init.h>
32 #include <asm/system.h>
35 #define DRV_NAME "qd65xx"
40 * I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580)
41 * or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580)
42 * -- qd6500 is a single IDE interface
43 * -- qd6580 is a dual IDE interface
45 * More research on qd6580 being done by willmore@cig.mot.com (David)
46 * More Information given by Petr Soucek (petr@ryston.cz)
47 * http://www.ryston.cz/petr/vlb
54 * base+0x01: Config (R/O)
56 * bit 0: ide baseport: 1 = 0x1f0 ; 0 = 0x170 (only useful for qd6500)
57 * bit 1: qd65xx baseport: 1 = 0xb0 ; 0 = 0x30
58 * bit 2: ID3: bus speed: 1 = <=33MHz ; 0 = >33MHz
59 * bit 3: qd6500: 1 = disabled, 0 = enabled
63 * qd6580: either 1010 or 0101
66 * base+0x02: Timer2 (qd6580 only)
69 * base+0x03: Control (qd6580 only)
71 * bits 0-3 must always be set 1
72 * bit 4 must be set 1, but is set 0 by dos driver while measuring vlb clock
73 * bit 0 : 1 = Only primary port enabled : channel 0 for hda, channel 1 for hdb
74 * 0 = Primary and Secondary ports enabled : channel 0 for hda & hdb
75 * channel 1 for hdc & hdd
76 * bit 1 : 1 = only disks on primary port
77 * 0 = disks & ATAPI devices on primary port
79 * bit 5 : status, but of what ?
80 * bit 6 : always set 1 by dos driver
81 * bit 7 : set 1 for non-ATAPI devices on primary port
82 * (maybe read-ahead and post-write buffer ?)
85 static int timings[4]={-1,-1,-1,-1}; /* stores current timing for each timer */
90 * This routine is invoked to prepare for access to a given drive.
93 static void qd65xx_dev_select(ide_drive_t *drive)
95 u8 index = (( (QD_TIMREG(drive)) & 0x80 ) >> 7) |
96 (QD_TIMREG(drive) & 0x02);
98 if (timings[index] != QD_TIMING(drive))
99 outb(timings[index] = QD_TIMING(drive), QD_TIMREG(drive));
101 outb(drive->select | ATA_DEVICE_OBS, drive->hwif->io_ports.device_addr);
105 * qd6500_compute_timing
107 * computes the timing value where
108 * lower nibble represents active time, in count of VLB clocks
109 * upper nibble represents recovery time, in count of VLB clocks
112 static u8 qd6500_compute_timing (ide_hwif_t *hwif, int active_time, int recovery_time)
114 int clk = ide_vlb_clk ? ide_vlb_clk : 50;
118 act_cyc = 9 - IDE_IN(active_time * clk / 1000 + 1, 2, 9);
119 rec_cyc = 15 - IDE_IN(recovery_time * clk / 1000 + 1, 0, 15);
121 act_cyc = 8 - IDE_IN(active_time * clk / 1000 + 1, 1, 8);
122 rec_cyc = 18 - IDE_IN(recovery_time * clk / 1000 + 1, 3, 18);
125 return (rec_cyc << 4) | 0x08 | act_cyc;
129 * qd6580_compute_timing
134 static u8 qd6580_compute_timing (int active_time, int recovery_time)
136 int clk = ide_vlb_clk ? ide_vlb_clk : 50;
139 act_cyc = 17 - IDE_IN(active_time * clk / 1000 + 1, 2, 17);
140 rec_cyc = 15 - IDE_IN(recovery_time * clk / 1000 + 1, 2, 15);
142 return (rec_cyc << 4) | act_cyc;
148 * tries to find timing from dos driver's table
151 static int qd_find_disk_type (ide_drive_t *drive,
152 int *active_time, int *recovery_time)
154 struct qd65xx_timing_s *p;
155 char *m = (char *)&drive->id[ATA_ID_PROD];
156 char model[ATA_ID_PROD_LEN];
161 strncpy(model, m, ATA_ID_PROD_LEN);
162 ide_fixstring(model, ATA_ID_PROD_LEN, 1); /* byte-swap */
164 for (p = qd65xx_timing ; p->offset != -1 ; p++) {
165 if (!strncmp(p->model, model+p->offset, 4)) {
166 printk(KERN_DEBUG "%s: listed !\n", drive->name);
167 *active_time = p->active;
168 *recovery_time = p->recovery;
181 static void qd_set_timing (ide_drive_t *drive, u8 timing)
183 unsigned long data = (unsigned long)ide_get_drivedata(drive);
187 ide_set_drivedata(drive, (void *)data);
189 printk(KERN_DEBUG "%s: %#x\n", drive->name, timing);
192 static void qd6500_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
195 int active_time = 175;
196 int recovery_time = 415; /* worst case values from the dos driver */
198 /* FIXME: use drive->pio_mode value */
199 if (!qd_find_disk_type(drive, &active_time, &recovery_time) &&
200 (id[ATA_ID_OLD_PIO_MODES] & 0xff) && (id[ATA_ID_FIELD_VALID] & 2) &&
201 id[ATA_ID_EIDE_PIO] >= 240) {
202 printk(KERN_INFO "%s: PIO mode%d\n", drive->name,
203 id[ATA_ID_OLD_PIO_MODES] & 0xff);
205 recovery_time = drive->id[ATA_ID_EIDE_PIO] - 120;
208 qd_set_timing(drive, qd6500_compute_timing(drive->hwif,
209 active_time, recovery_time));
212 static void qd6580_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
214 const u8 pio = drive->pio_mode - XFER_PIO_0;
215 struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
216 unsigned int cycle_time;
217 int active_time = 175;
218 int recovery_time = 415; /* worst case values from the dos driver */
219 u8 base = (hwif->config_data & 0xff00) >> 8;
221 if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) {
222 cycle_time = ide_pio_cycle_time(drive, pio);
227 if (cycle_time >= 110) {
229 recovery_time = cycle_time - 102;
231 printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
234 if (cycle_time >= 69) {
236 recovery_time = cycle_time - 61;
238 printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
241 if (cycle_time >= 180) {
243 recovery_time = cycle_time - 120;
245 active_time = t->active;
246 recovery_time = cycle_time - active_time;
249 printk(KERN_INFO "%s: PIO mode%d\n", drive->name,pio);
252 if (!hwif->channel && drive->media != ide_disk) {
253 outb(0x5f, QD_CONTROL_PORT);
254 printk(KERN_WARNING "%s: ATAPI: disabled read-ahead FIFO "
255 "and post-write buffer on %s.\n",
256 drive->name, hwif->name);
259 qd_set_timing(drive, qd6580_compute_timing(active_time, recovery_time));
265 * tests if the given port is a register
268 static int __init qd_testreg(int port)
273 local_irq_save(flags);
274 savereg = inb_p(port);
275 outb_p(QD_TESTVAL, port); /* safe value */
276 readreg = inb_p(port);
278 local_irq_restore(flags);
280 if (savereg == QD_TESTVAL) {
281 printk(KERN_ERR "Outch ! the probe for qd65xx isn't reliable !\n");
282 printk(KERN_ERR "Please contact maintainers to tell about your hardware\n");
283 printk(KERN_ERR "Assuming qd65xx is not present.\n");
287 return (readreg != QD_TESTVAL);
290 static void __init qd6500_init_dev(ide_drive_t *drive)
292 ide_hwif_t *hwif = drive->hwif;
293 u8 base = (hwif->config_data & 0xff00) >> 8;
294 u8 config = QD_CONFIG(hwif);
296 ide_set_drivedata(drive, (void *)QD6500_DEF_DATA);
299 static void __init qd6580_init_dev(ide_drive_t *drive)
301 ide_hwif_t *hwif = drive->hwif;
303 u8 base = (hwif->config_data & 0xff00) >> 8;
304 u8 config = QD_CONFIG(hwif);
306 if (hwif->host_flags & IDE_HFLAG_SINGLE) {
307 t1 = QD6580_DEF_DATA;
308 t2 = QD6580_DEF_DATA2;
310 t2 = t1 = hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA;
312 ide_set_drivedata(drive, (void *)((drive->dn & 1) ? t2 : t1));
315 static const struct ide_tp_ops qd65xx_tp_ops = {
316 .exec_command = ide_exec_command,
317 .read_status = ide_read_status,
318 .read_altstatus = ide_read_altstatus,
319 .write_devctl = ide_write_devctl,
321 .dev_select = qd65xx_dev_select,
322 .tf_load = ide_tf_load,
323 .tf_read = ide_tf_read,
325 .input_data = ide_input_data,
326 .output_data = ide_output_data,
329 static const struct ide_port_ops qd6500_port_ops = {
330 .init_dev = qd6500_init_dev,
331 .set_pio_mode = qd6500_set_pio_mode,
334 static const struct ide_port_ops qd6580_port_ops = {
335 .init_dev = qd6580_init_dev,
336 .set_pio_mode = qd6580_set_pio_mode,
339 static const struct ide_port_info qd65xx_port_info __initdata = {
341 .tp_ops = &qd65xx_tp_ops,
342 .chipset = ide_qd65xx,
343 .host_flags = IDE_HFLAG_IO_32BIT |
345 .pio_mask = ATA_PIO4,
351 * looks at the specified baseport, and if qd found, registers & initialises it
352 * return 1 if another qd may be probed
355 static int __init qd_probe(int base)
358 u8 config, unit, control;
359 struct ide_port_info d = qd65xx_port_info;
361 config = inb(QD_CONFIG_PORT);
363 if (! ((config & QD_CONFIG_BASEPORT) >> 1 == (base == 0xb0)) )
366 unit = ! (config & QD_CONFIG_IDE_BASEPORT);
369 d.host_flags |= IDE_HFLAG_QD_2ND_PORT;
371 switch (config & 0xf0) {
372 case QD_CONFIG_QD6500:
373 if (qd_testreg(base))
374 return -ENODEV; /* bad register */
376 if (config & QD_CONFIG_DISABLED) {
377 printk(KERN_WARNING "qd6500 is disabled !\n");
381 printk(KERN_NOTICE "qd6500 at %#x\n", base);
382 printk(KERN_DEBUG "qd6500: config=%#x, ID3=%u\n",
385 d.port_ops = &qd6500_port_ops;
386 d.host_flags |= IDE_HFLAG_SINGLE;
388 case QD_CONFIG_QD6580_A:
389 case QD_CONFIG_QD6580_B:
390 if (qd_testreg(base) || qd_testreg(base + 0x02))
391 return -ENODEV; /* bad registers */
393 control = inb(QD_CONTROL_PORT);
395 printk(KERN_NOTICE "qd6580 at %#x\n", base);
396 printk(KERN_DEBUG "qd6580: config=%#x, control=%#x, ID3=%u\n",
397 config, control, QD_ID3);
399 outb(QD_DEF_CONTR, QD_CONTROL_PORT);
401 d.port_ops = &qd6580_port_ops;
402 if (control & QD_CONTR_SEC_DISABLED)
403 d.host_flags |= IDE_HFLAG_SINGLE;
405 printk(KERN_INFO "qd6580: %s IDE board\n",
406 (control & QD_CONTR_SEC_DISABLED) ? "single" : "dual");
412 rc = ide_legacy_device_add(&d, (base << 8) | config);
414 if (d.host_flags & IDE_HFLAG_SINGLE)
415 return (rc == 0) ? 1 : rc;
420 static int probe_qd65xx;
422 module_param_named(probe, probe_qd65xx, bool, 0);
423 MODULE_PARM_DESC(probe, "probe for QD65xx chipsets");
425 static int __init qd65xx_init(void)
427 int rc1, rc2 = -ENODEV;
429 if (probe_qd65xx == 0)
432 rc1 = qd_probe(0x30);
434 rc2 = qd_probe(0xb0);
436 if (rc1 < 0 && rc2 < 0)
442 module_init(qd65xx_init);
444 MODULE_AUTHOR("Samuel Thibault");
445 MODULE_DESCRIPTION("support of qd65xx vlb ide chipset");
446 MODULE_LICENSE("GPL");