2 * IDE tuning and bus mastering support for the CS5510/CS5520
5 * The CS5510/CS5520 are slightly unusual devices. Unlike the
6 * typical IDE controllers they do bus mastering with the drive in
7 * PIO mode and smarter silicon.
9 * The practical upshot of this is that we must always tune the
10 * drive for the right PIO mode. We must also ignore all the blacklists
11 * and the drive bus mastering DMA information.
13 * *** This driver is strictly experimental ***
15 * (c) Copyright Red Hat Inc 2002
17 * This program is free software; you can redistribute it and/or modify it
18 * under the terms of the GNU General Public License as published by the
19 * Free Software Foundation; either version 2, or (at your option) any
22 * This program is distributed in the hope that it will be useful, but
23 * WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
25 * General Public License for more details.
27 * For the avoidance of doubt the "preferred form" of this code is one which
28 * is in an open non patent encumbered format. Where cryptographic key signing
29 * forms part of the process of creating an executable the information
30 * including keys needed to generate an equivalently functional executable
31 * are deemed to be part of the source code.
35 #include <linux/module.h>
36 #include <linux/types.h>
37 #include <linux/kernel.h>
38 #include <linux/delay.h>
39 #include <linux/timer.h>
41 #include <linux/ioport.h>
42 #include <linux/blkdev.h>
43 #include <linux/hdreg.h>
45 #include <linux/interrupt.h>
46 #include <linux/init.h>
47 #include <linux/pci.h>
48 #include <linux/ide.h>
49 #include <linux/dma-mapping.h>
61 static struct pio_clocks cs5520_pio_clocks[]={
69 static void cs5520_set_pio_mode(ide_drive_t *drive, const u8 pio)
71 ide_hwif_t *hwif = HWIF(drive);
72 struct pci_dev *pdev = hwif->pci_dev;
73 int controller = drive->dn > 1 ? 1 : 0;
75 /* FIXME: if DMA = 1 do we need to set the DMA bit here ? */
77 /* 8bit CAT/CRT - 8bit command timing for channel */
78 pci_write_config_byte(pdev, 0x62 + controller,
79 (cs5520_pio_clocks[pio].recovery << 4) |
80 (cs5520_pio_clocks[pio].assert));
82 /* 0x64 - 16bit Primary, 0x68 - 16bit Secondary */
84 /* FIXME: should these use address ? */
85 /* Data read timing */
86 pci_write_config_byte(pdev, 0x64 + 4*controller + (drive->dn&1),
87 (cs5520_pio_clocks[pio].recovery << 4) |
88 (cs5520_pio_clocks[pio].assert));
89 /* Write command timing */
90 pci_write_config_byte(pdev, 0x66 + 4*controller + (drive->dn&1),
91 (cs5520_pio_clocks[pio].recovery << 4) |
92 (cs5520_pio_clocks[pio].assert));
95 static void cs5520_set_dma_mode(ide_drive_t *drive, const u8 speed)
97 printk(KERN_ERR "cs55x0: bad ide timing.\n");
99 cs5520_set_pio_mode(drive, 0);
103 * We wrap the DMA activate to set the vdma flag. This is needed
104 * so that the IDE DMA layer issues PIO not DMA commands over the
107 * ATAPI is harder so disable it for now using IDE_HFLAG_NO_ATAPI_DMA
110 static void cs5520_dma_host_on(ide_drive_t *drive)
112 if (drive->using_dma)
115 ide_dma_host_on(drive);
118 static void cs5520_dma_host_off(ide_drive_t *drive)
122 ide_dma_host_off(drive);
125 static void __devinit init_hwif_cs5520(ide_hwif_t *hwif)
127 hwif->set_pio_mode = &cs5520_set_pio_mode;
128 hwif->set_dma_mode = &cs5520_set_dma_mode;
130 if (hwif->dma_base == 0)
133 hwif->dma_host_on = &cs5520_dma_host_on;
134 hwif->dma_host_off = &cs5520_dma_host_off;
137 #define DECLARE_CS_DEV(name_str) \
140 .init_hwif = init_hwif_cs5520, \
141 .host_flags = IDE_HFLAG_ISA_PORTS | \
144 IDE_HFLAG_NO_ATAPI_DMA | \
145 IDE_HFLAG_ABUSE_SET_DMA_MODE |\
146 IDE_HFLAG_BOOTABLE, \
147 .pio_mask = ATA_PIO4, \
150 static const struct ide_port_info cyrix_chipsets[] __devinitdata = {
151 /* 0 */ DECLARE_CS_DEV("Cyrix 5510"),
152 /* 1 */ DECLARE_CS_DEV("Cyrix 5520")
156 * The 5510/5520 are a bit weird. They don't quite set up the way
157 * the PCI helper layer expects so we must do much of the set up
161 static int __devinit cs5520_init_one(struct pci_dev *dev, const struct pci_device_id *id)
163 const struct ide_port_info *d = &cyrix_chipsets[id->driver_data];
164 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
166 ide_setup_pci_noise(dev, d);
168 /* We must not grab the entire device, it has 'ISA' space in its
169 BARS too and we will freak out other bits of the kernel */
170 if (pci_enable_device_bars(dev, 1<<2)) {
171 printk(KERN_WARNING "%s: Unable to enable 55x0.\n", d->name);
175 if (pci_set_dma_mask(dev, DMA_32BIT_MASK)) {
176 printk(KERN_WARNING "cs5520: No suitable DMA available.\n");
181 * Now the chipset is configured we can let the core
182 * do all the device setup for us
185 ide_pci_setup_ports(dev, d, 14, &idx[0]);
192 static const struct pci_device_id cs5520_pci_tbl[] = {
193 { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5510), 0 },
194 { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5520), 1 },
197 MODULE_DEVICE_TABLE(pci, cs5520_pci_tbl);
199 static struct pci_driver driver = {
201 .id_table = cs5520_pci_tbl,
202 .probe = cs5520_init_one,
205 static int __init cs5520_ide_init(void)
207 return ide_pci_register_driver(&driver);
210 module_init(cs5520_ide_init);
212 MODULE_AUTHOR("Alan Cox");
213 MODULE_DESCRIPTION("PCI driver module for Cyrix 5510/5520 IDE");
214 MODULE_LICENSE("GPL");