drivers/ide/ide-iops.c

   1 /*
   2  * linux/drivers/ide/ide-iops.c Version 0.37    Mar 05, 2003
   3  *
   4  *  Copyright (C) 2000-2002     Andre Hedrick <andre@linux-ide.org>
   5  *  Copyright (C) 2003          Red Hat <alan@redhat.com>
   6  *
   7  */
   8
   9 #include <linux/module.h>
  10 #include <linux/types.h>
  11 #include <linux/string.h>
  12 #include <linux/kernel.h>
  13 #include <linux/timer.h>
  14 #include <linux/mm.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/major.h>
  17 #include <linux/errno.h>
  18 #include <linux/genhd.h>
  19 #include <linux/blkpg.h>
  20 #include <linux/slab.h>
  21 #include <linux/pci.h>
  22 #include <linux/delay.h>
  23 #include <linux/hdreg.h>
  24 #include <linux/ide.h>
  25 #include <linux/bitops.h>
  26 #include <linux/nmi.h>
  27
  28 #include <asm/byteorder.h>
  29 #include <asm/irq.h>
  30 #include <asm/uaccess.h>
  31 #include <asm/io.h>
  32
  33 /*
  34  *      Conventional PIO operations for ATA devices
  35  */
  36
  37 static u8 ide_inb (unsigned long port)
  38 {
  39         return (u8) inb(port);
  40 }
  41
  42 static u16 ide_inw (unsigned long port)
  43 {
  44         return (u16) inw(port);
  45 }
  46
  47 static void ide_insw (unsigned long port, void *addr, u32 count)
  48 {
  49         insw(port, addr, count);
  50 }
  51
  52 static void ide_insl (unsigned long port, void *addr, u32 count)
  53 {
  54         insl(port, addr, count);
  55 }
  56
  57 static void ide_outb (u8 val, unsigned long port)
  58 {
  59         outb(val, port);
  60 }
  61
  62 static void ide_outbsync (ide_drive_t *drive, u8 addr, unsigned long port)
  63 {
  64         outb(addr, port);
  65 }
  66
  67 static void ide_outw (u16 val, unsigned long port)
  68 {
  69         outw(val, port);
  70 }
  71
  72 static void ide_outsw (unsigned long port, void *addr, u32 count)
  73 {
  74         outsw(port, addr, count);
  75 }
  76
  77 static void ide_outsl (unsigned long port, void *addr, u32 count)
  78 {
  79         outsl(port, addr, count);
  80 }
  81
  82 void default_hwif_iops (ide_hwif_t *hwif)
  83 {
  84         hwif->OUTB      = ide_outb;
  85         hwif->OUTBSYNC  = ide_outbsync;
  86         hwif->OUTW      = ide_outw;
  87         hwif->OUTSW     = ide_outsw;
  88         hwif->OUTSL     = ide_outsl;
  89         hwif->INB       = ide_inb;
  90         hwif->INW       = ide_inw;
  91         hwif->INSW      = ide_insw;
  92         hwif->INSL      = ide_insl;
  93 }
  94
  95 /*
  96  *      MMIO operations, typically used for SATA controllers
  97  */
  98
  99 static u8 ide_mm_inb (unsigned long port)
 100 {
 101         return (u8) readb((void __iomem *) port);
 102 }
 103
 104 static u16 ide_mm_inw (unsigned long port)
 105 {
 106         return (u16) readw((void __iomem *) port);
 107 }
 108
 109 static void ide_mm_insw (unsigned long port, void *addr, u32 count)
 110 {
 111         __ide_mm_insw((void __iomem *) port, addr, count);
 112 }
 113
 114 static void ide_mm_insl (unsigned long port, void *addr, u32 count)
 115 {
 116         __ide_mm_insl((void __iomem *) port, addr, count);
 117 }
 118
 119 static void ide_mm_outb (u8 value, unsigned long port)
 120 {
 121         writeb(value, (void __iomem *) port);
 122 }
 123
 124 static void ide_mm_outbsync (ide_drive_t *drive, u8 value, unsigned long port)
 125 {
 126         writeb(value, (void __iomem *) port);
 127 }
 128
 129 static void ide_mm_outw (u16 value, unsigned long port)
 130 {
 131         writew(value, (void __iomem *) port);
 132 }
 133
 134 static void ide_mm_outsw (unsigned long port, void *addr, u32 count)
 135 {
 136         __ide_mm_outsw((void __iomem *) port, addr, count);
 137 }
 138
 139 static void ide_mm_outsl (unsigned long port, void *addr, u32 count)
 140 {
 141         __ide_mm_outsl((void __iomem *) port, addr, count);
 142 }
 143
 144 void default_hwif_mmiops (ide_hwif_t *hwif)
 145 {
 146         hwif->OUTB      = ide_mm_outb;
 147         /* Most systems will need to override OUTBSYNC, alas however
 148            this one is controller specific! */
 149         hwif->OUTBSYNC  = ide_mm_outbsync;
 150         hwif->OUTW      = ide_mm_outw;
 151         hwif->OUTSW     = ide_mm_outsw;
 152         hwif->OUTSL     = ide_mm_outsl;
 153         hwif->INB       = ide_mm_inb;
 154         hwif->INW       = ide_mm_inw;
 155         hwif->INSW      = ide_mm_insw;
 156         hwif->INSL      = ide_mm_insl;
 157 }
 158
 159 EXPORT_SYMBOL(default_hwif_mmiops);
 160
 161 u32 ide_read_24 (ide_drive_t *drive)
 162 {
 163         u8 hcyl = HWIF(drive)->INB(IDE_HCYL_REG);
 164         u8 lcyl = HWIF(drive)->INB(IDE_LCYL_REG);
 165         u8 sect = HWIF(drive)->INB(IDE_SECTOR_REG);
 166         return (hcyl<<16)|(lcyl<<8)|sect;
 167 }
 168
 169 void SELECT_DRIVE (ide_drive_t *drive)
 170 {
 171         if (HWIF(drive)->selectproc)
 172                 HWIF(drive)->selectproc(drive);
 173         HWIF(drive)->OUTB(drive->select.all, IDE_SELECT_REG);
 174 }
 175
 176 EXPORT_SYMBOL(SELECT_DRIVE);
 177
 178 void SELECT_INTERRUPT (ide_drive_t *drive)
 179 {
 180         if (HWIF(drive)->intrproc)
 181                 HWIF(drive)->intrproc(drive);
 182         else
 183                 HWIF(drive)->OUTB(drive->ctl|2, IDE_CONTROL_REG);
 184 }
 185
 186 void SELECT_MASK (ide_drive_t *drive, int mask)
 187 {
 188         if (HWIF(drive)->maskproc)
 189                 HWIF(drive)->maskproc(drive, mask);
 190 }
 191
 192 void QUIRK_LIST (ide_drive_t *drive)
 193 {
 194         if (HWIF(drive)->quirkproc)
 195                 drive->quirk_list = HWIF(drive)->quirkproc(drive);
 196 }
 197
 198 /*
 199  * Some localbus EIDE interfaces require a special access sequence
 200  * when using 32-bit I/O instructions to transfer data.  We call this
 201  * the "vlb_sync" sequence, which consists of three successive reads
 202  * of the sector count register location, with interrupts disabled
 203  * to ensure that the reads all happen together.
 204  */
 205 static void ata_vlb_sync(ide_drive_t *drive, unsigned long port)
 206 {
 207         (void) HWIF(drive)->INB(port);
 208         (void) HWIF(drive)->INB(port);
 209         (void) HWIF(drive)->INB(port);
 210 }
 211
 212 /*
 213  * This is used for most PIO data transfers *from* the IDE interface
 214  */
 215 static void ata_input_data(ide_drive_t *drive, void *buffer, u32 wcount)
 216 {
 217         ide_hwif_t *hwif        = HWIF(drive);
 218         u8 io_32bit             = drive->io_32bit;
 219
 220         if (io_32bit) {
 221                 if (io_32bit & 2) {
 222                         unsigned long flags;
 223                         local_irq_save(flags);
 224                         ata_vlb_sync(drive, IDE_NSECTOR_REG);
 225                         hwif->INSL(IDE_DATA_REG, buffer, wcount);
 226                         local_irq_restore(flags);
 227                 } else
 228                         hwif->INSL(IDE_DATA_REG, buffer, wcount);
 229         } else {
 230                 hwif->INSW(IDE_DATA_REG, buffer, wcount<<1);
 231         }
 232 }
 233
 234 /*
 235  * This is used for most PIO data transfers *to* the IDE interface
 236  */
 237 static void ata_output_data(ide_drive_t *drive, void *buffer, u32 wcount)
 238 {
 239         ide_hwif_t *hwif        = HWIF(drive);
 240         u8 io_32bit             = drive->io_32bit;
 241
 242         if (io_32bit) {
 243                 if (io_32bit & 2) {
 244                         unsigned long flags;
 245                         local_irq_save(flags);
 246                         ata_vlb_sync(drive, IDE_NSECTOR_REG);
 247                         hwif->OUTSL(IDE_DATA_REG, buffer, wcount);
 248                         local_irq_restore(flags);
 249                 } else
 250                         hwif->OUTSL(IDE_DATA_REG, buffer, wcount);
 251         } else {
 252                 hwif->OUTSW(IDE_DATA_REG, buffer, wcount<<1);
 253         }
 254 }
 255
 256 /*
 257  * The following routines are mainly used by the ATAPI drivers.
 258  *
 259  * These routines will round up any request for an odd number of bytes,
 260  * so if an odd bytecount is specified, be sure that there's at least one
 261  * extra byte allocated for the buffer.
 262  */
 263
 264 static void atapi_input_bytes(ide_drive_t *drive, void *buffer, u32 bytecount)
 265 {
 266         ide_hwif_t *hwif = HWIF(drive);
 267
 268         ++bytecount;
 269 #if defined(CONFIG_ATARI) || defined(CONFIG_Q40)
 270         if (MACH_IS_ATARI || MACH_IS_Q40) {
 271                 /* Atari has a byte-swapped IDE interface */
 272                 insw_swapw(IDE_DATA_REG, buffer, bytecount / 2);
 273                 return;
 274         }
 275 #endif /* CONFIG_ATARI || CONFIG_Q40 */
 276         hwif->ata_input_data(drive, buffer, bytecount / 4);
 277         if ((bytecount & 0x03) >= 2)
 278                 hwif->INSW(IDE_DATA_REG, ((u8 *)buffer)+(bytecount & ~0x03), 1);
 279 }
 280
 281 static void atapi_output_bytes(ide_drive_t *drive, void *buffer, u32 bytecount)
 282 {
 283         ide_hwif_t *hwif = HWIF(drive);
 284
 285         ++bytecount;
 286 #if defined(CONFIG_ATARI) || defined(CONFIG_Q40)
 287         if (MACH_IS_ATARI || MACH_IS_Q40) {
 288                 /* Atari has a byte-swapped IDE interface */
 289                 outsw_swapw(IDE_DATA_REG, buffer, bytecount / 2);
 290                 return;
 291         }
 292 #endif /* CONFIG_ATARI || CONFIG_Q40 */
 293         hwif->ata_output_data(drive, buffer, bytecount / 4);
 294         if ((bytecount & 0x03) >= 2)
 295                 hwif->OUTSW(IDE_DATA_REG, ((u8*)buffer)+(bytecount & ~0x03), 1);
 296 }
 297
 298 void default_hwif_transport(ide_hwif_t *hwif)
 299 {
 300         hwif->ata_input_data            = ata_input_data;
 301         hwif->ata_output_data           = ata_output_data;
 302         hwif->atapi_input_bytes         = atapi_input_bytes;
 303         hwif->atapi_output_bytes        = atapi_output_bytes;
 304 }
 305
 306 void ide_fix_driveid (struct hd_driveid *id)
 307 {
 308 #ifndef __LITTLE_ENDIAN
 309 # ifdef __BIG_ENDIAN
 310         int i;
 311         u16 *stringcast;
 312
 313         id->config         = __le16_to_cpu(id->config);
 314         id->cyls           = __le16_to_cpu(id->cyls);
 315         id->reserved2      = __le16_to_cpu(id->reserved2);
 316         id->heads          = __le16_to_cpu(id->heads);
 317         id->track_bytes    = __le16_to_cpu(id->track_bytes);
 318         id->sector_bytes   = __le16_to_cpu(id->sector_bytes);
 319         id->sectors        = __le16_to_cpu(id->sectors);
 320         id->vendor0        = __le16_to_cpu(id->vendor0);
 321         id->vendor1        = __le16_to_cpu(id->vendor1);
 322         id->vendor2        = __le16_to_cpu(id->vendor2);
 323         stringcast = (u16 *)&id->serial_no[0];
 324         for (i = 0; i < (20/2); i++)
 325                 stringcast[i] = __le16_to_cpu(stringcast[i]);
 326         id->buf_type       = __le16_to_cpu(id->buf_type);
 327         id->buf_size       = __le16_to_cpu(id->buf_size);
 328         id->ecc_bytes      = __le16_to_cpu(id->ecc_bytes);
 329         stringcast = (u16 *)&id->fw_rev[0];
 330         for (i = 0; i < (8/2); i++)
 331                 stringcast[i] = __le16_to_cpu(stringcast[i]);
 332         stringcast = (u16 *)&id->model[0];
 333         for (i = 0; i < (40/2); i++)
 334                 stringcast[i] = __le16_to_cpu(stringcast[i]);
 335         id->dword_io       = __le16_to_cpu(id->dword_io);
 336         id->reserved50     = __le16_to_cpu(id->reserved50);
 337         id->field_valid    = __le16_to_cpu(id->field_valid);
 338         id->cur_cyls       = __le16_to_cpu(id->cur_cyls);
 339         id->cur_heads      = __le16_to_cpu(id->cur_heads);
 340         id->cur_sectors    = __le16_to_cpu(id->cur_sectors);
 341         id->cur_capacity0  = __le16_to_cpu(id->cur_capacity0);
 342         id->cur_capacity1  = __le16_to_cpu(id->cur_capacity1);
 343         id->lba_capacity   = __le32_to_cpu(id->lba_capacity);
 344         id->dma_1word      = __le16_to_cpu(id->dma_1word);
 345         id->dma_mword      = __le16_to_cpu(id->dma_mword);
 346         id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes);
 347         id->eide_dma_min   = __le16_to_cpu(id->eide_dma_min);
 348         id->eide_dma_time  = __le16_to_cpu(id->eide_dma_time);
 349         id->eide_pio       = __le16_to_cpu(id->eide_pio);
 350         id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy);
 351         for (i = 0; i < 2; ++i)
 352                 id->words69_70[i] = __le16_to_cpu(id->words69_70[i]);
 353         for (i = 0; i < 4; ++i)
 354                 id->words71_74[i] = __le16_to_cpu(id->words71_74[i]);
 355         id->queue_depth    = __le16_to_cpu(id->queue_depth);
 356         for (i = 0; i < 4; ++i)
 357                 id->words76_79[i] = __le16_to_cpu(id->words76_79[i]);
 358         id->major_rev_num  = __le16_to_cpu(id->major_rev_num);
 359         id->minor_rev_num  = __le16_to_cpu(id->minor_rev_num);
 360         id->command_set_1  = __le16_to_cpu(id->command_set_1);
 361         id->command_set_2  = __le16_to_cpu(id->command_set_2);
 362         id->cfsse          = __le16_to_cpu(id->cfsse);
 363         id->cfs_enable_1   = __le16_to_cpu(id->cfs_enable_1);
 364         id->cfs_enable_2   = __le16_to_cpu(id->cfs_enable_2);
 365         id->csf_default    = __le16_to_cpu(id->csf_default);
 366         id->dma_ultra      = __le16_to_cpu(id->dma_ultra);
 367         id->trseuc         = __le16_to_cpu(id->trseuc);
 368         id->trsEuc         = __le16_to_cpu(id->trsEuc);
 369         id->CurAPMvalues   = __le16_to_cpu(id->CurAPMvalues);
 370         id->mprc           = __le16_to_cpu(id->mprc);
 371         id->hw_config      = __le16_to_cpu(id->hw_config);
 372         id->acoustic       = __le16_to_cpu(id->acoustic);
 373         id->msrqs          = __le16_to_cpu(id->msrqs);
 374         id->sxfert         = __le16_to_cpu(id->sxfert);
 375         id->sal            = __le16_to_cpu(id->sal);
 376         id->spg            = __le32_to_cpu(id->spg);
 377         id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2);
 378         for (i = 0; i < 22; i++)
 379                 id->words104_125[i]   = __le16_to_cpu(id->words104_125[i]);
 380         id->last_lun       = __le16_to_cpu(id->last_lun);
 381         id->word127        = __le16_to_cpu(id->word127);
 382         id->dlf            = __le16_to_cpu(id->dlf);
 383         id->csfo           = __le16_to_cpu(id->csfo);
 384         for (i = 0; i < 26; i++)
 385                 id->words130_155[i] = __le16_to_cpu(id->words130_155[i]);
 386         id->word156        = __le16_to_cpu(id->word156);
 387         for (i = 0; i < 3; i++)
 388                 id->words157_159[i] = __le16_to_cpu(id->words157_159[i]);
 389         id->cfa_power      = __le16_to_cpu(id->cfa_power);
 390         for (i = 0; i < 14; i++)
 391                 id->words161_175[i] = __le16_to_cpu(id->words161_175[i]);
 392         for (i = 0; i < 31; i++)
 393                 id->words176_205[i] = __le16_to_cpu(id->words176_205[i]);
 394         for (i = 0; i < 48; i++)
 395                 id->words206_254[i] = __le16_to_cpu(id->words206_254[i]);
 396         id->integrity_word  = __le16_to_cpu(id->integrity_word);
 397 # else
 398 #  error "Please fix <asm/byteorder.h>"
 399 # endif
 400 #endif
 401 }
 402
 403 /*
 404  * ide_fixstring() cleans up and (optionally) byte-swaps a text string,
 405  * removing leading/trailing blanks and compressing internal blanks.
 406  * It is primarily used to tidy up the model name/number fields as
 407  * returned by the WIN_[P]IDENTIFY commands.
 408  */
 409
 410 void ide_fixstring (u8 *s, const int bytecount, const int byteswap)
 411 {
 412         u8 *p = s, *end = &s[bytecount & ~1]; /* bytecount must be even */
 413
 414         if (byteswap) {
 415                 /* convert from big-endian to host byte order */
 416                 for (p = end ; p != s;) {
 417                         unsigned short *pp = (unsigned short *) (p -= 2);
 418                         *pp = ntohs(*pp);
 419                 }
 420         }
 421         /* strip leading blanks */
 422         while (s != end && *s == ' ')
 423                 ++s;
 424         /* compress internal blanks and strip trailing blanks */
 425         while (s != end && *s) {
 426                 if (*s++ != ' ' || (s != end && *s && *s != ' '))
 427                         *p++ = *(s-1);
 428         }
 429         /* wipe out trailing garbage */
 430         while (p != end)
 431                 *p++ = '\0';
 432 }
 433
 434 EXPORT_SYMBOL(ide_fixstring);
 435
 436 /*
 437  * Needed for PCI irq sharing
 438  */
 439 int drive_is_ready (ide_drive_t *drive)
 440 {
 441         ide_hwif_t *hwif        = HWIF(drive);
 442         u8 stat                 = 0;
 443
 444         if (drive->waiting_for_dma)
 445                 return hwif->ide_dma_test_irq(drive);
 446
 447 #if 0
 448         /* need to guarantee 400ns since last command was issued */
 449         udelay(1);
 450 #endif
 451
 452         /*
 453          * We do a passive status test under shared PCI interrupts on
 454          * cards that truly share the ATA side interrupt, but may also share
 455          * an interrupt with another pci card/device.  We make no assumptions
 456          * about possible isa-pnp and pci-pnp issues yet.
 457          */
 458         if (IDE_CONTROL_REG)
 459                 stat = hwif->INB(IDE_ALTSTATUS_REG);
 460         else
 461                 /* Note: this may clear a pending IRQ!! */
 462                 stat = hwif->INB(IDE_STATUS_REG);
 463
 464         if (stat & BUSY_STAT)
 465                 /* drive busy:  definitely not interrupting */
 466                 return 0;
 467
 468         /* drive ready: *might* be interrupting */
 469         return 1;
 470 }
 471
 472 EXPORT_SYMBOL(drive_is_ready);
 473
 474 /*
 475  * This routine busy-waits for the drive status to be not "busy".
 476  * It then checks the status for all of the "good" bits and none
 477  * of the "bad" bits, and if all is okay it returns 0.  All other
 478  * cases return error -- caller may then invoke ide_error().
 479  *
 480  * This routine should get fixed to not hog the cpu during extra long waits..
 481  * That could be done by busy-waiting for the first jiffy or two, and then
 482  * setting a timer to wake up at half second intervals thereafter,
 483  * until timeout is achieved, before timing out.
 484  */
 485 static int __ide_wait_stat(ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout, u8 *rstat)
 486 {
 487         ide_hwif_t *hwif = drive->hwif;
 488         unsigned long flags;
 489         int i;
 490         u8 stat;
 491
 492         udelay(1);      /* spec allows drive 400ns to assert "BUSY" */
 493         if ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
 494                 local_irq_set(flags);
 495                 timeout += jiffies;
 496                 while ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
 497                         if (time_after(jiffies, timeout)) {
 498                                 /*
 499                                  * One last read after the timeout in case
 500                                  * heavy interrupt load made us not make any
 501                                  * progress during the timeout..
 502                                  */
 503                                 stat = hwif->INB(IDE_STATUS_REG);
 504                                 if (!(stat & BUSY_STAT))
 505                                         break;
 506
 507                                 local_irq_restore(flags);
 508                                 *rstat = stat;
 509                                 return -EBUSY;
 510                         }
 511                 }
 512                 local_irq_restore(flags);
 513         }
 514         /*
 515          * Allow status to settle, then read it again.
 516          * A few rare drives vastly violate the 400ns spec here,
 517          * so we'll wait up to 10usec for a "good" status
 518          * rather than expensively fail things immediately.
 519          * This fix courtesy of Matthew Faupel & Niccolo Rigacci.
 520          */
 521         for (i = 0; i < 10; i++) {
 522                 udelay(1);
 523                 if (OK_STAT((stat = hwif->INB(IDE_STATUS_REG)), good, bad)) {
 524                         *rstat = stat;
 525                         return 0;
 526                 }
 527         }
 528         *rstat = stat;
 529         return -EFAULT;
 530 }
 531
 532 /*
 533  * In case of error returns error value after doing "*startstop = ide_error()".
 534  * The caller should return the updated value of "startstop" in this case,
 535  * "startstop" is unchanged when the function returns 0.
 536  */
 537 int ide_wait_stat(ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout)
 538 {
 539         int err;
 540         u8 stat;
 541
 542         /* bail early if we've exceeded max_failures */
 543         if (drive->max_failures && (drive->failures > drive->max_failures)) {
 544                 *startstop = ide_stopped;
 545                 return 1;
 546         }
 547
 548         err = __ide_wait_stat(drive, good, bad, timeout, &stat);
 549
 550         if (err) {
 551                 char *s = (err == -EBUSY) ? "status timeout" : "status error";
 552                 *startstop = ide_error(drive, s, stat);
 553         }
 554
 555         return err;
 556 }
 557
 558 EXPORT_SYMBOL(ide_wait_stat);
 559
 560 /**
 561  *      ide_in_drive_list       -       look for drive in black/white list
 562  *      @id: drive identifier
 563  *      @drive_table: list to inspect
 564  *
 565  *      Look for a drive in the blacklist and the whitelist tables
 566  *      Returns 1 if the drive is found in the table.
 567  */
 568
 569 int ide_in_drive_list(struct hd_driveid *id, const struct drive_list_entry *drive_table)
 570 {
 571         for ( ; drive_table->id_model; drive_table++)
 572                 if ((!strcmp(drive_table->id_model, id->model)) &&
 573                     (!drive_table->id_firmware ||
 574                      strstr(id->fw_rev, drive_table->id_firmware)))
 575                         return 1;
 576         return 0;
 577 }
 578
 579 EXPORT_SYMBOL_GPL(ide_in_drive_list);
 580
 581 /*
 582  * Early UDMA66 devices don't set bit14 to 1, only bit13 is valid.
 583  * We list them here and depend on the device side cable detection for them.
 584  *
 585  * Some optical devices with the buggy firmwares have the same problem.
 586  */
 587 static const struct drive_list_entry ivb_list[] = {
 588         { "QUANTUM FIREBALLlct10 05"    , "A03.0900"    },
 589         { "TSSTcorp CDDVDW SH-S202J"    , "SB00"        },
 590         { "TSSTcorp CDDVDW SH-S202J"    , "SB01"        },
 591         { "TSSTcorp CDDVDW SH-S202N"    , "SB00"        },
 592         { "TSSTcorp CDDVDW SH-S202N"    , "SB01"        },
 593         { NULL                          , NULL          }
 594 };
 595
 596 /*
 597  *  All hosts that use the 80c ribbon must use!
 598  *  The name is derived from upper byte of word 93 and the 80c ribbon.
 599  */
 600 u8 eighty_ninty_three (ide_drive_t *drive)
 601 {
 602         ide_hwif_t *hwif = drive->hwif;
 603         struct hd_driveid *id = drive->id;
 604         int ivb = ide_in_drive_list(id, ivb_list);
 605
 606         if (hwif->cbl == ATA_CBL_PATA40_SHORT)
 607                 return 1;
 608
 609         if (ivb)
 610                 printk(KERN_DEBUG "%s: skipping word 93 validity check\n",
 611                                   drive->name);
 612
 613         if (ide_dev_is_sata(id) && !ivb)
 614                 return 1;
 615
 616         if (hwif->cbl != ATA_CBL_PATA80 && !ivb)
 617                 goto no_80w;
 618
 619         /*
 620          * FIXME:
 621          * - force bit13 (80c cable present) check also for !ivb devices
 622          *   (unless the slave device is pre-ATA3)
 623          */
 624         if ((id->hw_config & 0x4000) || (ivb && (id->hw_config & 0x2000)))
 625                 return 1;
 626
 627 no_80w:
 628         if (drive->udma33_warned == 1)
 629                 return 0;
 630
 631         printk(KERN_WARNING "%s: %s side 80-wire cable detection failed, "
 632                             "limiting max speed to UDMA33\n",
 633                             drive->name,
 634                             hwif->cbl == ATA_CBL_PATA80 ? "drive" : "host");
 635
 636         drive->udma33_warned = 1;
 637
 638         return 0;
 639 }
 640
 641 int ide_ata66_check (ide_drive_t *drive, ide_task_t *args)
 642 {
 643         if (args->tf.command == WIN_SETFEATURES &&
 644             args->tf.lbal > XFER_UDMA_2 &&
 645             args->tf.feature == SETFEATURES_XFER) {
 646                 if (eighty_ninty_three(drive) == 0) {
 647                         printk(KERN_WARNING "%s: UDMA speeds >UDMA33 cannot "
 648                                             "be set\n", drive->name);
 649                         return 1;
 650                 }
 651         }
 652
 653         return 0;
 654 }
 655
 656 /*
 657  * Backside of HDIO_DRIVE_CMD call of SETFEATURES_XFER.
 658  * 1 : Safe to update drive->id DMA registers.
 659  * 0 : OOPs not allowed.
 660  */
 661 int set_transfer (ide_drive_t *drive, ide_task_t *args)
 662 {
 663         if (args->tf.command == WIN_SETFEATURES &&
 664             args->tf.lbal >= XFER_SW_DMA_0 &&
 665             args->tf.feature == SETFEATURES_XFER &&
 666             (drive->id->dma_ultra ||
 667              drive->id->dma_mword ||
 668              drive->id->dma_1word))
 669                 return 1;
 670
 671         return 0;
 672 }
 673
 674 #ifdef CONFIG_BLK_DEV_IDEDMA
 675 static u8 ide_auto_reduce_xfer (ide_drive_t *drive)
 676 {
 677         if (!drive->crc_count)
 678                 return drive->current_speed;
 679         drive->crc_count = 0;
 680
 681         switch(drive->current_speed) {
 682                 case XFER_UDMA_7:       return XFER_UDMA_6;
 683                 case XFER_UDMA_6:       return XFER_UDMA_5;
 684                 case XFER_UDMA_5:       return XFER_UDMA_4;
 685                 case XFER_UDMA_4:       return XFER_UDMA_3;
 686                 case XFER_UDMA_3:       return XFER_UDMA_2;
 687                 case XFER_UDMA_2:       return XFER_UDMA_1;
 688                 case XFER_UDMA_1:       return XFER_UDMA_0;
 689                         /*
 690                          * OOPS we do not goto non Ultra DMA modes
 691                          * without iCRC's available we force
 692                          * the system to PIO and make the user
 693                          * invoke the ATA-1 ATA-2 DMA modes.
 694                          */
 695                 case XFER_UDMA_0:
 696                 default:                return XFER_PIO_4;
 697         }
 698 }
 699 #endif /* CONFIG_BLK_DEV_IDEDMA */
 700
 701 int ide_driveid_update(ide_drive_t *drive)
 702 {
 703         ide_hwif_t *hwif = drive->hwif;
 704         struct hd_driveid *id;
 705         unsigned long timeout, flags;
 706
 707         /*
 708          * Re-read drive->id for possible DMA mode
 709          * change (copied from ide-probe.c)
 710          */
 711
 712         SELECT_MASK(drive, 1);
 713         if (IDE_CONTROL_REG)
 714                 hwif->OUTB(drive->ctl,IDE_CONTROL_REG);
 715         msleep(50);
 716         hwif->OUTB(WIN_IDENTIFY, IDE_COMMAND_REG);
 717         timeout = jiffies + WAIT_WORSTCASE;
 718         do {
 719                 if (time_after(jiffies, timeout)) {
 720                         SELECT_MASK(drive, 0);
 721                         return 0;       /* drive timed-out */
 722                 }
 723                 msleep(50);     /* give drive a breather */
 724         } while (hwif->INB(IDE_ALTSTATUS_REG) & BUSY_STAT);
 725         msleep(50);     /* wait for IRQ and DRQ_STAT */
 726         if (!OK_STAT(hwif->INB(IDE_STATUS_REG),DRQ_STAT,BAD_R_STAT)) {
 727                 SELECT_MASK(drive, 0);
 728                 printk("%s: CHECK for good STATUS\n", drive->name);
 729                 return 0;
 730         }
 731         local_irq_save(flags);
 732         SELECT_MASK(drive, 0);
 733         id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC);
 734         if (!id) {
 735                 local_irq_restore(flags);
 736                 return 0;
 737         }
 738         ata_input_data(drive, id, SECTOR_WORDS);
 739         (void) hwif->INB(IDE_STATUS_REG);       /* clear drive IRQ */
 740         local_irq_enable();
 741         local_irq_restore(flags);
 742         ide_fix_driveid(id);
 743         if (id) {
 744                 drive->id->dma_ultra = id->dma_ultra;
 745                 drive->id->dma_mword = id->dma_mword;
 746                 drive->id->dma_1word = id->dma_1word;
 747                 /* anything more ? */
 748                 kfree(id);
 749
 750                 if (drive->using_dma && ide_id_dma_bug(drive))
 751                         ide_dma_off(drive);
 752         }
 753
 754         return 1;
 755 }
 756
 757 int ide_config_drive_speed(ide_drive_t *drive, u8 speed)
 758 {
 759         ide_hwif_t *hwif = drive->hwif;
 760         int error = 0;
 761         u8 stat;
 762
 763 //      while (HWGROUP(drive)->busy)
 764 //              msleep(50);
 765
 766 #ifdef CONFIG_BLK_DEV_IDEDMA
 767         if (hwif->ide_dma_on)   /* check if host supports DMA */
 768                 hwif->dma_host_off(drive);
 769 #endif
 770
 771         /* Skip setting PIO flow-control modes on pre-EIDE drives */
 772         if ((speed & 0xf8) == XFER_PIO_0 && !(drive->id->capability & 0x08))
 773                 goto skip;
 774
 775         /*
 776          * Don't use ide_wait_cmd here - it will
 777          * attempt to set_geometry and recalibrate,
 778          * but for some reason these don't work at
 779          * this point (lost interrupt).
 780          */
 781         /*
 782          * Select the drive, and issue the SETFEATURES command
 783          */
 784         disable_irq_nosync(hwif->irq);
 785
 786         /*
 787          *      FIXME: we race against the running IRQ here if
 788          *      this is called from non IRQ context. If we use
 789          *      disable_irq() we hang on the error path. Work
 790          *      is needed.
 791          */
 792
 793         udelay(1);
 794         SELECT_DRIVE(drive);
 795         SELECT_MASK(drive, 0);
 796         udelay(1);
 797         if (IDE_CONTROL_REG)
 798                 hwif->OUTB(drive->ctl | 2, IDE_CONTROL_REG);
 799         hwif->OUTB(speed, IDE_NSECTOR_REG);
 800         hwif->OUTB(SETFEATURES_XFER, IDE_FEATURE_REG);
 801         hwif->OUTBSYNC(drive, WIN_SETFEATURES, IDE_COMMAND_REG);
 802         if ((IDE_CONTROL_REG) && (drive->quirk_list == 2))
 803                 hwif->OUTB(drive->ctl, IDE_CONTROL_REG);
 804
 805         error = __ide_wait_stat(drive, drive->ready_stat,
 806                                 BUSY_STAT|DRQ_STAT|ERR_STAT,
 807                                 WAIT_CMD, &stat);
 808
 809         SELECT_MASK(drive, 0);
 810
 811         enable_irq(hwif->irq);
 812
 813         if (error) {
 814                 (void) ide_dump_status(drive, "set_drive_speed_status", stat);
 815                 return error;
 816         }
 817
 818         drive->id->dma_ultra &= ~0xFF00;
 819         drive->id->dma_mword &= ~0x0F00;
 820         drive->id->dma_1word &= ~0x0F00;
 821
 822  skip:
 823 #ifdef CONFIG_BLK_DEV_IDEDMA
 824         if (speed >= XFER_SW_DMA_0)
 825                 hwif->dma_host_on(drive);
 826         else if (hwif->ide_dma_on)      /* check if host supports DMA */
 827                 hwif->dma_off_quietly(drive);
 828 #endif
 829
 830         switch(speed) {
 831                 case XFER_UDMA_7:   drive->id->dma_ultra |= 0x8080; break;
 832                 case XFER_UDMA_6:   drive->id->dma_ultra |= 0x4040; break;
 833                 case XFER_UDMA_5:   drive->id->dma_ultra |= 0x2020; break;
 834                 case XFER_UDMA_4:   drive->id->dma_ultra |= 0x1010; break;
 835                 case XFER_UDMA_3:   drive->id->dma_ultra |= 0x0808; break;
 836                 case XFER_UDMA_2:   drive->id->dma_ultra |= 0x0404; break;
 837                 case XFER_UDMA_1:   drive->id->dma_ultra |= 0x0202; break;
 838                 case XFER_UDMA_0:   drive->id->dma_ultra |= 0x0101; break;
 839                 case XFER_MW_DMA_2: drive->id->dma_mword |= 0x0404; break;
 840                 case XFER_MW_DMA_1: drive->id->dma_mword |= 0x0202; break;
 841                 case XFER_MW_DMA_0: drive->id->dma_mword |= 0x0101; break;
 842                 case XFER_SW_DMA_2: drive->id->dma_1word |= 0x0404; break;
 843                 case XFER_SW_DMA_1: drive->id->dma_1word |= 0x0202; break;
 844                 case XFER_SW_DMA_0: drive->id->dma_1word |= 0x0101; break;
 845                 default: break;
 846         }
 847         if (!drive->init_speed)
 848                 drive->init_speed = speed;
 849         drive->current_speed = speed;
 850         return error;
 851 }
 852
 853 /*
 854  * This should get invoked any time we exit the driver to
 855  * wait for an interrupt response from a drive.  handler() points
 856  * at the appropriate code to handle the next interrupt, and a
 857  * timer is started to prevent us from waiting forever in case
 858  * something goes wrong (see the ide_timer_expiry() handler later on).
 859  *
 860  * See also ide_execute_command
 861  */
 862 static void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
 863                       unsigned int timeout, ide_expiry_t *expiry)
 864 {
 865         ide_hwgroup_t *hwgroup = HWGROUP(drive);
 866
 867         if (hwgroup->handler != NULL) {
 868                 printk(KERN_CRIT "%s: ide_set_handler: handler not null; "
 869                         "old=%p, new=%p\n",
 870                         drive->name, hwgroup->handler, handler);
 871         }
 872         hwgroup->handler        = handler;
 873         hwgroup->expiry         = expiry;
 874         hwgroup->timer.expires  = jiffies + timeout;
 875         hwgroup->req_gen_timer = hwgroup->req_gen;
 876         add_timer(&hwgroup->timer);
 877 }
 878
 879 void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
 880                       unsigned int timeout, ide_expiry_t *expiry)
 881 {
 882         unsigned long flags;
 883         spin_lock_irqsave(&ide_lock, flags);
 884         __ide_set_handler(drive, handler, timeout, expiry);
 885         spin_unlock_irqrestore(&ide_lock, flags);
 886 }
 887
 888 EXPORT_SYMBOL(ide_set_handler);
 889
 890 /**
 891  *      ide_execute_command     -       execute an IDE command
 892  *      @drive: IDE drive to issue the command against
 893  *      @command: command byte to write
 894  *      @handler: handler for next phase
 895  *      @timeout: timeout for command
 896  *      @expiry:  handler to run on timeout
 897  *
 898  *      Helper function to issue an IDE command. This handles the
 899  *      atomicity requirements, command timing and ensures that the
 900  *      handler and IRQ setup do not race. All IDE command kick off
 901  *      should go via this function or do equivalent locking.
 902  */
 903
 904 void ide_execute_command(ide_drive_t *drive, u8 cmd, ide_handler_t *handler,
 905                          unsigned timeout, ide_expiry_t *expiry)
 906 {
 907         unsigned long flags;
 908         ide_hwgroup_t *hwgroup = HWGROUP(drive);
 909         ide_hwif_t *hwif = HWIF(drive);
 910
 911         spin_lock_irqsave(&ide_lock, flags);
 912
 913         BUG_ON(hwgroup->handler);
 914         hwgroup->handler        = handler;
 915         hwgroup->expiry         = expiry;
 916         hwgroup->timer.expires  = jiffies + timeout;
 917         hwgroup->req_gen_timer = hwgroup->req_gen;
 918         add_timer(&hwgroup->timer);
 919         hwif->OUTBSYNC(drive, cmd, IDE_COMMAND_REG);
 920         /* Drive takes 400nS to respond, we must avoid the IRQ being
 921            serviced before that.
 922
 923            FIXME: we could skip this delay with care on non shared
 924            devices
 925         */
 926         ndelay(400);
 927         spin_unlock_irqrestore(&ide_lock, flags);
 928 }
 929
 930 EXPORT_SYMBOL(ide_execute_command);
 931
 932
 933 /* needed below */
 934 static ide_startstop_t do_reset1 (ide_drive_t *, int);
 935
 936 /*
 937  * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms
 938  * during an atapi drive reset operation. If the drive has not yet responded,
 939  * and we have not yet hit our maximum waiting time, then the timer is restarted
 940  * for another 50ms.
 941  */
 942 static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive)
 943 {
 944         ide_hwgroup_t *hwgroup  = HWGROUP(drive);
 945         ide_hwif_t *hwif        = HWIF(drive);
 946         u8 stat;
 947
 948         SELECT_DRIVE(drive);
 949         udelay (10);
 950
 951         if (OK_STAT(stat = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) {
 952                 printk("%s: ATAPI reset complete\n", drive->name);
 953         } else {
 954                 if (time_before(jiffies, hwgroup->poll_timeout)) {
 955                         BUG_ON(HWGROUP(drive)->handler != NULL);
 956                         ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
 957                         /* continue polling */
 958                         return ide_started;
 959                 }
 960                 /* end of polling */
 961                 hwgroup->polling = 0;
 962                 printk("%s: ATAPI reset timed-out, status=0x%02x\n",
 963                                 drive->name, stat);
 964                 /* do it the old fashioned way */
 965                 return do_reset1(drive, 1);
 966         }
 967         /* done polling */
 968         hwgroup->polling = 0;
 969         hwgroup->resetting = 0;
 970         return ide_stopped;
 971 }
 972
 973 /*
 974  * reset_pollfunc() gets invoked to poll the interface for completion every 50ms
 975  * during an ide reset operation. If the drives have not yet responded,
 976  * and we have not yet hit our maximum waiting time, then the timer is restarted
 977  * for another 50ms.
 978  */
 979 static ide_startstop_t reset_pollfunc (ide_drive_t *drive)
 980 {
 981         ide_hwgroup_t *hwgroup  = HWGROUP(drive);
 982         ide_hwif_t *hwif        = HWIF(drive);
 983         u8 tmp;
 984
 985         if (hwif->reset_poll != NULL) {
 986                 if (hwif->reset_poll(drive)) {
 987                         printk(KERN_ERR "%s: host reset_poll failure for %s.\n",
 988                                 hwif->name, drive->name);
 989                         return ide_stopped;
 990                 }
 991         }
 992
 993         if (!OK_STAT(tmp = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) {
 994                 if (time_before(jiffies, hwgroup->poll_timeout)) {
 995                         BUG_ON(HWGROUP(drive)->handler != NULL);
 996                         ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
 997                         /* continue polling */
 998                         return ide_started;
 999                 }
1000                 printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp);
1001                 drive->failures++;
1002         } else  {
1003                 printk("%s: reset: ", hwif->name);
1004                 if ((tmp = hwif->INB(IDE_ERROR_REG)) == 1) {
1005                         printk("success\n");
1006                         drive->failures = 0;
1007                 } else {
1008                         drive->failures++;
1009                         printk("master: ");
1010                         switch (tmp & 0x7f) {
1011                                 case 1: printk("passed");
1012                                         break;
1013                                 case 2: printk("formatter device error");
1014                                         break;
1015                                 case 3: printk("sector buffer error");
1016                                         break;
1017                                 case 4: printk("ECC circuitry error");
1018                                         break;
1019                                 case 5: printk("controlling MPU error");
1020                                         break;
1021                                 default:printk("error (0x%02x?)", tmp);
1022                         }
1023                         if (tmp & 0x80)
1024                                 printk("; slave: failed");
1025                         printk("\n");
1026                 }
1027         }
1028         hwgroup->polling = 0;   /* done polling */
1029         hwgroup->resetting = 0; /* done reset attempt */
1030         return ide_stopped;
1031 }
1032
1033 static void check_dma_crc(ide_drive_t *drive)
1034 {
1035 #ifdef CONFIG_BLK_DEV_IDEDMA
1036         if (drive->crc_count) {
1037                 drive->hwif->dma_off_quietly(drive);
1038                 ide_set_xfer_rate(drive, ide_auto_reduce_xfer(drive));
1039                 if (drive->current_speed >= XFER_SW_DMA_0)
1040                         (void) HWIF(drive)->ide_dma_on(drive);
1041         } else
1042                 ide_dma_off(drive);
1043 #endif
1044 }
1045
1046 static void ide_disk_pre_reset(ide_drive_t *drive)
1047 {
1048         int legacy = (drive->id->cfs_enable_2 & 0x0400) ? 0 : 1;
1049
1050         drive->special.all = 0;
1051         drive->special.b.set_geometry = legacy;
1052         drive->special.b.recalibrate  = legacy;
1053         if (OK_TO_RESET_CONTROLLER)
1054                 drive->mult_count = 0;
1055         if (!drive->keep_settings && !drive->using_dma)
1056                 drive->mult_req = 0;
1057         if (drive->mult_req != drive->mult_count)
1058                 drive->special.b.set_multmode = 1;
1059 }
1060
1061 static void pre_reset(ide_drive_t *drive)
1062 {
1063         if (drive->media == ide_disk)
1064                 ide_disk_pre_reset(drive);
1065         else
1066                 drive->post_reset = 1;
1067
1068         if (!drive->keep_settings) {
1069                 if (drive->using_dma) {
1070                         check_dma_crc(drive);
1071                 } else {
1072                         drive->unmask = 0;
1073                         drive->io_32bit = 0;
1074                 }
1075                 return;
1076         }
1077         if (drive->using_dma)
1078                 check_dma_crc(drive);
1079
1080         if (HWIF(drive)->pre_reset != NULL)
1081                 HWIF(drive)->pre_reset(drive);
1082
1083         if (drive->current_speed != 0xff)
1084                 drive->desired_speed = drive->current_speed;
1085         drive->current_speed = 0xff;
1086 }
1087
1088 /*
1089  * do_reset1() attempts to recover a confused drive by resetting it.
1090  * Unfortunately, resetting a disk drive actually resets all devices on
1091  * the same interface, so it can really be thought of as resetting the
1092  * interface rather than resetting the drive.
1093  *
1094  * ATAPI devices have their own reset mechanism which allows them to be
1095  * individually reset without clobbering other devices on the same interface.
1096  *
1097  * Unfortunately, the IDE interface does not generate an interrupt to let
1098  * us know when the reset operation has finished, so we must poll for this.
1099  * Equally poor, though, is the fact that this may a very long time to complete,
1100  * (up to 30 seconds worstcase).  So, instead of busy-waiting here for it,
1101  * we set a timer to poll at 50ms intervals.
1102  */
1103 static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi)
1104 {
1105         unsigned int unit;
1106         unsigned long flags;
1107         ide_hwif_t *hwif;
1108         ide_hwgroup_t *hwgroup;
1109
1110         spin_lock_irqsave(&ide_lock, flags);
1111         hwif = HWIF(drive);
1112         hwgroup = HWGROUP(drive);
1113
1114         /* We must not reset with running handlers */
1115         BUG_ON(hwgroup->handler != NULL);
1116
1117         /* For an ATAPI device, first try an ATAPI SRST. */
1118         if (drive->media != ide_disk && !do_not_try_atapi) {
1119                 hwgroup->resetting = 1;
1120                 pre_reset(drive);
1121                 SELECT_DRIVE(drive);
1122                 udelay (20);
1123                 hwif->OUTBSYNC(drive, WIN_SRST, IDE_COMMAND_REG);
1124                 ndelay(400);
1125                 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1126                 hwgroup->polling = 1;
1127                 __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
1128                 spin_unlock_irqrestore(&ide_lock, flags);
1129                 return ide_started;
1130         }
1131
1132         /*
1133          * First, reset any device state data we were maintaining
1134          * for any of the drives on this interface.
1135          */
1136         for (unit = 0; unit < MAX_DRIVES; ++unit)
1137                 pre_reset(&hwif->drives[unit]);
1138
1139 #if OK_TO_RESET_CONTROLLER
1140         if (!IDE_CONTROL_REG) {
1141                 spin_unlock_irqrestore(&ide_lock, flags);
1142                 return ide_stopped;
1143         }
1144
1145         hwgroup->resetting = 1;
1146         /*
1147          * Note that we also set nIEN while resetting the device,
1148          * to mask unwanted interrupts from the interface during the reset.
1149          * However, due to the design of PC hardware, this will cause an
1150          * immediate interrupt due to the edge transition it produces.
1151          * This single interrupt gives us a "fast poll" for drives that
1152          * recover from reset very quickly, saving us the first 50ms wait time.
1153          */
1154         /* set SRST and nIEN */
1155         hwif->OUTBSYNC(drive, drive->ctl|6,IDE_CONTROL_REG);
1156         /* more than enough time */
1157         udelay(10);
1158         if (drive->quirk_list == 2) {
1159                 /* clear SRST and nIEN */
1160                 hwif->OUTBSYNC(drive, drive->ctl, IDE_CONTROL_REG);
1161         } else {
1162                 /* clear SRST, leave nIEN */
1163                 hwif->OUTBSYNC(drive, drive->ctl|2, IDE_CONTROL_REG);
1164         }
1165         /* more than enough time */
1166         udelay(10);
1167         hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1168         hwgroup->polling = 1;
1169         __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
1170
1171         /*
1172          * Some weird controller like resetting themselves to a strange
1173          * state when the disks are reset this way. At least, the Winbond
1174          * 553 documentation says that
1175          */
1176         if (hwif->resetproc != NULL) {
1177                 hwif->resetproc(drive);
1178         }
1179
1180 #endif  /* OK_TO_RESET_CONTROLLER */
1181
1182         spin_unlock_irqrestore(&ide_lock, flags);
1183         return ide_started;
1184 }
1185
1186 /*
1187  * ide_do_reset() is the entry point to the drive/interface reset code.
1188  */
1189
1190 ide_startstop_t ide_do_reset (ide_drive_t *drive)
1191 {
1192         return do_reset1(drive, 0);
1193 }
1194
1195 EXPORT_SYMBOL(ide_do_reset);
1196
1197 /*
1198  * ide_wait_not_busy() waits for the currently selected device on the hwif
1199  * to report a non-busy status, see comments in probe_hwif().
1200  */
1201 int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout)
1202 {
1203         u8 stat = 0;
1204
1205         while(timeout--) {
1206                 /*
1207                  * Turn this into a schedule() sleep once I'm sure
1208                  * about locking issues (2.5 work ?).
1209                  */
1210                 mdelay(1);
1211                 stat = hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]);
1212                 if ((stat & BUSY_STAT) == 0)
1213                         return 0;
1214                 /*
1215                  * Assume a value of 0xff means nothing is connected to
1216                  * the interface and it doesn't implement the pull-down
1217                  * resistor on D7.
1218                  */
1219                 if (stat == 0xff)
1220                         return -ENODEV;
1221                 touch_softlockup_watchdog();
1222                 touch_nmi_watchdog();
1223         }
1224         return -EBUSY;
1225 }
1226
1227 EXPORT_SYMBOL_GPL(ide_wait_not_busy);
1228