drivers/ide/ide-iops.c

   1 /*
   2  * linux/drivers/ide/ide-iops.c Version 0.37    Mar 05, 2003
   3  *
   4  *  Copyright (C) 2000-2002     Andre Hedrick <andre@linux-ide.org>
   5  *  Copyright (C) 2003          Red Hat <alan@redhat.com>
   6  *
   7  */
   8
   9 #include <linux/module.h>
  10 #include <linux/types.h>
  11 #include <linux/string.h>
  12 #include <linux/kernel.h>
  13 #include <linux/timer.h>
  14 #include <linux/mm.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/major.h>
  17 #include <linux/errno.h>
  18 #include <linux/genhd.h>
  19 #include <linux/blkpg.h>
  20 #include <linux/slab.h>
  21 #include <linux/pci.h>
  22 #include <linux/delay.h>
  23 #include <linux/hdreg.h>
  24 #include <linux/ide.h>
  25 #include <linux/bitops.h>
  26 #include <linux/nmi.h>
  27
  28 #include <asm/byteorder.h>
  29 #include <asm/irq.h>
  30 #include <asm/uaccess.h>
  31 #include <asm/io.h>
  32
  33 /*
  34  *      Conventional PIO operations for ATA devices
  35  */
  36
  37 static u8 ide_inb (unsigned long port)
  38 {
  39         return (u8) inb(port);
  40 }
  41
  42 static u16 ide_inw (unsigned long port)
  43 {
  44         return (u16) inw(port);
  45 }
  46
  47 static void ide_insw (unsigned long port, void *addr, u32 count)
  48 {
  49         insw(port, addr, count);
  50 }
  51
  52 static void ide_insl (unsigned long port, void *addr, u32 count)
  53 {
  54         insl(port, addr, count);
  55 }
  56
  57 static void ide_outb (u8 val, unsigned long port)
  58 {
  59         outb(val, port);
  60 }
  61
  62 static void ide_outbsync (ide_drive_t *drive, u8 addr, unsigned long port)
  63 {
  64         outb(addr, port);
  65 }
  66
  67 static void ide_outw (u16 val, unsigned long port)
  68 {
  69         outw(val, port);
  70 }
  71
  72 static void ide_outsw (unsigned long port, void *addr, u32 count)
  73 {
  74         outsw(port, addr, count);
  75 }
  76
  77 static void ide_outsl (unsigned long port, void *addr, u32 count)
  78 {
  79         outsl(port, addr, count);
  80 }
  81
  82 void default_hwif_iops (ide_hwif_t *hwif)
  83 {
  84         hwif->OUTB      = ide_outb;
  85         hwif->OUTBSYNC  = ide_outbsync;
  86         hwif->OUTW      = ide_outw;
  87         hwif->OUTSW     = ide_outsw;
  88         hwif->OUTSL     = ide_outsl;
  89         hwif->INB       = ide_inb;
  90         hwif->INW       = ide_inw;
  91         hwif->INSW      = ide_insw;
  92         hwif->INSL      = ide_insl;
  93 }
  94
  95 /*
  96  *      MMIO operations, typically used for SATA controllers
  97  */
  98
  99 static u8 ide_mm_inb (unsigned long port)
 100 {
 101         return (u8) readb((void __iomem *) port);
 102 }
 103
 104 static u16 ide_mm_inw (unsigned long port)
 105 {
 106         return (u16) readw((void __iomem *) port);
 107 }
 108
 109 static void ide_mm_insw (unsigned long port, void *addr, u32 count)
 110 {
 111         __ide_mm_insw((void __iomem *) port, addr, count);
 112 }
 113
 114 static void ide_mm_insl (unsigned long port, void *addr, u32 count)
 115 {
 116         __ide_mm_insl((void __iomem *) port, addr, count);
 117 }
 118
 119 static void ide_mm_outb (u8 value, unsigned long port)
 120 {
 121         writeb(value, (void __iomem *) port);
 122 }
 123
 124 static void ide_mm_outbsync (ide_drive_t *drive, u8 value, unsigned long port)
 125 {
 126         writeb(value, (void __iomem *) port);
 127 }
 128
 129 static void ide_mm_outw (u16 value, unsigned long port)
 130 {
 131         writew(value, (void __iomem *) port);
 132 }
 133
 134 static void ide_mm_outsw (unsigned long port, void *addr, u32 count)
 135 {
 136         __ide_mm_outsw((void __iomem *) port, addr, count);
 137 }
 138
 139 static void ide_mm_outsl (unsigned long port, void *addr, u32 count)
 140 {
 141         __ide_mm_outsl((void __iomem *) port, addr, count);
 142 }
 143
 144 void default_hwif_mmiops (ide_hwif_t *hwif)
 145 {
 146         hwif->OUTB      = ide_mm_outb;
 147         /* Most systems will need to override OUTBSYNC, alas however
 148            this one is controller specific! */
 149         hwif->OUTBSYNC  = ide_mm_outbsync;
 150         hwif->OUTW      = ide_mm_outw;
 151         hwif->OUTSW     = ide_mm_outsw;
 152         hwif->OUTSL     = ide_mm_outsl;
 153         hwif->INB       = ide_mm_inb;
 154         hwif->INW       = ide_mm_inw;
 155         hwif->INSW      = ide_mm_insw;
 156         hwif->INSL      = ide_mm_insl;
 157 }
 158
 159 EXPORT_SYMBOL(default_hwif_mmiops);
 160
 161 u32 ide_read_24 (ide_drive_t *drive)
 162 {
 163         u8 hcyl = HWIF(drive)->INB(IDE_HCYL_REG);
 164         u8 lcyl = HWIF(drive)->INB(IDE_LCYL_REG);
 165         u8 sect = HWIF(drive)->INB(IDE_SECTOR_REG);
 166         return (hcyl<<16)|(lcyl<<8)|sect;
 167 }
 168
 169 void SELECT_DRIVE (ide_drive_t *drive)
 170 {
 171         if (HWIF(drive)->selectproc)
 172                 HWIF(drive)->selectproc(drive);
 173         HWIF(drive)->OUTB(drive->select.all, IDE_SELECT_REG);
 174 }
 175
 176 EXPORT_SYMBOL(SELECT_DRIVE);
 177
 178 void SELECT_INTERRUPT (ide_drive_t *drive)
 179 {
 180         if (HWIF(drive)->intrproc)
 181                 HWIF(drive)->intrproc(drive);
 182         else
 183                 HWIF(drive)->OUTB(drive->ctl|2, IDE_CONTROL_REG);
 184 }
 185
 186 void SELECT_MASK (ide_drive_t *drive, int mask)
 187 {
 188         if (HWIF(drive)->maskproc)
 189                 HWIF(drive)->maskproc(drive, mask);
 190 }
 191
 192 void QUIRK_LIST (ide_drive_t *drive)
 193 {
 194         if (HWIF(drive)->quirkproc)
 195                 drive->quirk_list = HWIF(drive)->quirkproc(drive);
 196 }
 197
 198 /*
 199  * Some localbus EIDE interfaces require a special access sequence
 200  * when using 32-bit I/O instructions to transfer data.  We call this
 201  * the "vlb_sync" sequence, which consists of three successive reads
 202  * of the sector count register location, with interrupts disabled
 203  * to ensure that the reads all happen together.
 204  */
 205 static void ata_vlb_sync(ide_drive_t *drive, unsigned long port)
 206 {
 207         (void) HWIF(drive)->INB(port);
 208         (void) HWIF(drive)->INB(port);
 209         (void) HWIF(drive)->INB(port);
 210 }
 211
 212 /*
 213  * This is used for most PIO data transfers *from* the IDE interface
 214  */
 215 static void ata_input_data(ide_drive_t *drive, void *buffer, u32 wcount)
 216 {
 217         ide_hwif_t *hwif        = HWIF(drive);
 218         u8 io_32bit             = drive->io_32bit;
 219
 220         if (io_32bit) {
 221                 if (io_32bit & 2) {
 222                         unsigned long flags;
 223                         local_irq_save(flags);
 224                         ata_vlb_sync(drive, IDE_NSECTOR_REG);
 225                         hwif->INSL(IDE_DATA_REG, buffer, wcount);
 226                         local_irq_restore(flags);
 227                 } else
 228                         hwif->INSL(IDE_DATA_REG, buffer, wcount);
 229         } else {
 230                 hwif->INSW(IDE_DATA_REG, buffer, wcount<<1);
 231         }
 232 }
 233
 234 /*
 235  * This is used for most PIO data transfers *to* the IDE interface
 236  */
 237 static void ata_output_data(ide_drive_t *drive, void *buffer, u32 wcount)
 238 {
 239         ide_hwif_t *hwif        = HWIF(drive);
 240         u8 io_32bit             = drive->io_32bit;
 241
 242         if (io_32bit) {
 243                 if (io_32bit & 2) {
 244                         unsigned long flags;
 245                         local_irq_save(flags);
 246                         ata_vlb_sync(drive, IDE_NSECTOR_REG);
 247                         hwif->OUTSL(IDE_DATA_REG, buffer, wcount);
 248                         local_irq_restore(flags);
 249                 } else
 250                         hwif->OUTSL(IDE_DATA_REG, buffer, wcount);
 251         } else {
 252                 hwif->OUTSW(IDE_DATA_REG, buffer, wcount<<1);
 253         }
 254 }
 255
 256 /*
 257  * The following routines are mainly used by the ATAPI drivers.
 258  *
 259  * These routines will round up any request for an odd number of bytes,
 260  * so if an odd bytecount is specified, be sure that there's at least one
 261  * extra byte allocated for the buffer.
 262  */
 263
 264 static void atapi_input_bytes(ide_drive_t *drive, void *buffer, u32 bytecount)
 265 {
 266         ide_hwif_t *hwif = HWIF(drive);
 267
 268         ++bytecount;
 269 #if defined(CONFIG_ATARI) || defined(CONFIG_Q40)
 270         if (MACH_IS_ATARI || MACH_IS_Q40) {
 271                 /* Atari has a byte-swapped IDE interface */
 272                 insw_swapw(IDE_DATA_REG, buffer, bytecount / 2);
 273                 return;
 274         }
 275 #endif /* CONFIG_ATARI || CONFIG_Q40 */
 276         hwif->ata_input_data(drive, buffer, bytecount / 4);
 277         if ((bytecount & 0x03) >= 2)
 278                 hwif->INSW(IDE_DATA_REG, ((u8 *)buffer)+(bytecount & ~0x03), 1);
 279 }
 280
 281 static void atapi_output_bytes(ide_drive_t *drive, void *buffer, u32 bytecount)
 282 {
 283         ide_hwif_t *hwif = HWIF(drive);
 284
 285         ++bytecount;
 286 #if defined(CONFIG_ATARI) || defined(CONFIG_Q40)
 287         if (MACH_IS_ATARI || MACH_IS_Q40) {
 288                 /* Atari has a byte-swapped IDE interface */
 289                 outsw_swapw(IDE_DATA_REG, buffer, bytecount / 2);
 290                 return;
 291         }
 292 #endif /* CONFIG_ATARI || CONFIG_Q40 */
 293         hwif->ata_output_data(drive, buffer, bytecount / 4);
 294         if ((bytecount & 0x03) >= 2)
 295                 hwif->OUTSW(IDE_DATA_REG, ((u8*)buffer)+(bytecount & ~0x03), 1);
 296 }
 297
 298 void default_hwif_transport(ide_hwif_t *hwif)
 299 {
 300         hwif->ata_input_data            = ata_input_data;
 301         hwif->ata_output_data           = ata_output_data;
 302         hwif->atapi_input_bytes         = atapi_input_bytes;
 303         hwif->atapi_output_bytes        = atapi_output_bytes;
 304 }
 305
 306 /*
 307  * Beginning of Taskfile OPCODE Library and feature sets.
 308  */
 309 void ide_fix_driveid (struct hd_driveid *id)
 310 {
 311 #ifndef __LITTLE_ENDIAN
 312 # ifdef __BIG_ENDIAN
 313         int i;
 314         u16 *stringcast;
 315
 316         id->config         = __le16_to_cpu(id->config);
 317         id->cyls           = __le16_to_cpu(id->cyls);
 318         id->reserved2      = __le16_to_cpu(id->reserved2);
 319         id->heads          = __le16_to_cpu(id->heads);
 320         id->track_bytes    = __le16_to_cpu(id->track_bytes);
 321         id->sector_bytes   = __le16_to_cpu(id->sector_bytes);
 322         id->sectors        = __le16_to_cpu(id->sectors);
 323         id->vendor0        = __le16_to_cpu(id->vendor0);
 324         id->vendor1        = __le16_to_cpu(id->vendor1);
 325         id->vendor2        = __le16_to_cpu(id->vendor2);
 326         stringcast = (u16 *)&id->serial_no[0];
 327         for (i = 0; i < (20/2); i++)
 328                 stringcast[i] = __le16_to_cpu(stringcast[i]);
 329         id->buf_type       = __le16_to_cpu(id->buf_type);
 330         id->buf_size       = __le16_to_cpu(id->buf_size);
 331         id->ecc_bytes      = __le16_to_cpu(id->ecc_bytes);
 332         stringcast = (u16 *)&id->fw_rev[0];
 333         for (i = 0; i < (8/2); i++)
 334                 stringcast[i] = __le16_to_cpu(stringcast[i]);
 335         stringcast = (u16 *)&id->model[0];
 336         for (i = 0; i < (40/2); i++)
 337                 stringcast[i] = __le16_to_cpu(stringcast[i]);
 338         id->dword_io       = __le16_to_cpu(id->dword_io);
 339         id->reserved50     = __le16_to_cpu(id->reserved50);
 340         id->field_valid    = __le16_to_cpu(id->field_valid);
 341         id->cur_cyls       = __le16_to_cpu(id->cur_cyls);
 342         id->cur_heads      = __le16_to_cpu(id->cur_heads);
 343         id->cur_sectors    = __le16_to_cpu(id->cur_sectors);
 344         id->cur_capacity0  = __le16_to_cpu(id->cur_capacity0);
 345         id->cur_capacity1  = __le16_to_cpu(id->cur_capacity1);
 346         id->lba_capacity   = __le32_to_cpu(id->lba_capacity);
 347         id->dma_1word      = __le16_to_cpu(id->dma_1word);
 348         id->dma_mword      = __le16_to_cpu(id->dma_mword);
 349         id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes);
 350         id->eide_dma_min   = __le16_to_cpu(id->eide_dma_min);
 351         id->eide_dma_time  = __le16_to_cpu(id->eide_dma_time);
 352         id->eide_pio       = __le16_to_cpu(id->eide_pio);
 353         id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy);
 354         for (i = 0; i < 2; ++i)
 355                 id->words69_70[i] = __le16_to_cpu(id->words69_70[i]);
 356         for (i = 0; i < 4; ++i)
 357                 id->words71_74[i] = __le16_to_cpu(id->words71_74[i]);
 358         id->queue_depth    = __le16_to_cpu(id->queue_depth);
 359         for (i = 0; i < 4; ++i)
 360                 id->words76_79[i] = __le16_to_cpu(id->words76_79[i]);
 361         id->major_rev_num  = __le16_to_cpu(id->major_rev_num);
 362         id->minor_rev_num  = __le16_to_cpu(id->minor_rev_num);
 363         id->command_set_1  = __le16_to_cpu(id->command_set_1);
 364         id->command_set_2  = __le16_to_cpu(id->command_set_2);
 365         id->cfsse          = __le16_to_cpu(id->cfsse);
 366         id->cfs_enable_1   = __le16_to_cpu(id->cfs_enable_1);
 367         id->cfs_enable_2   = __le16_to_cpu(id->cfs_enable_2);
 368         id->csf_default    = __le16_to_cpu(id->csf_default);
 369         id->dma_ultra      = __le16_to_cpu(id->dma_ultra);
 370         id->trseuc         = __le16_to_cpu(id->trseuc);
 371         id->trsEuc         = __le16_to_cpu(id->trsEuc);
 372         id->CurAPMvalues   = __le16_to_cpu(id->CurAPMvalues);
 373         id->mprc           = __le16_to_cpu(id->mprc);
 374         id->hw_config      = __le16_to_cpu(id->hw_config);
 375         id->acoustic       = __le16_to_cpu(id->acoustic);
 376         id->msrqs          = __le16_to_cpu(id->msrqs);
 377         id->sxfert         = __le16_to_cpu(id->sxfert);
 378         id->sal            = __le16_to_cpu(id->sal);
 379         id->spg            = __le32_to_cpu(id->spg);
 380         id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2);
 381         for (i = 0; i < 22; i++)
 382                 id->words104_125[i]   = __le16_to_cpu(id->words104_125[i]);
 383         id->last_lun       = __le16_to_cpu(id->last_lun);
 384         id->word127        = __le16_to_cpu(id->word127);
 385         id->dlf            = __le16_to_cpu(id->dlf);
 386         id->csfo           = __le16_to_cpu(id->csfo);
 387         for (i = 0; i < 26; i++)
 388                 id->words130_155[i] = __le16_to_cpu(id->words130_155[i]);
 389         id->word156        = __le16_to_cpu(id->word156);
 390         for (i = 0; i < 3; i++)
 391                 id->words157_159[i] = __le16_to_cpu(id->words157_159[i]);
 392         id->cfa_power      = __le16_to_cpu(id->cfa_power);
 393         for (i = 0; i < 14; i++)
 394                 id->words161_175[i] = __le16_to_cpu(id->words161_175[i]);
 395         for (i = 0; i < 31; i++)
 396                 id->words176_205[i] = __le16_to_cpu(id->words176_205[i]);
 397         for (i = 0; i < 48; i++)
 398                 id->words206_254[i] = __le16_to_cpu(id->words206_254[i]);
 399         id->integrity_word  = __le16_to_cpu(id->integrity_word);
 400 # else
 401 #  error "Please fix <asm/byteorder.h>"
 402 # endif
 403 #endif
 404 }
 405
 406 /* FIXME: exported for use by the USB storage (isd200.c) code only */
 407 EXPORT_SYMBOL(ide_fix_driveid);
 408
 409 void ide_fixstring (u8 *s, const int bytecount, const int byteswap)
 410 {
 411         u8 *p = s, *end = &s[bytecount & ~1]; /* bytecount must be even */
 412
 413         if (byteswap) {
 414                 /* convert from big-endian to host byte order */
 415                 for (p = end ; p != s;) {
 416                         unsigned short *pp = (unsigned short *) (p -= 2);
 417                         *pp = ntohs(*pp);
 418                 }
 419         }
 420         /* strip leading blanks */
 421         while (s != end && *s == ' ')
 422                 ++s;
 423         /* compress internal blanks and strip trailing blanks */
 424         while (s != end && *s) {
 425                 if (*s++ != ' ' || (s != end && *s && *s != ' '))
 426                         *p++ = *(s-1);
 427         }
 428         /* wipe out trailing garbage */
 429         while (p != end)
 430                 *p++ = '\0';
 431 }
 432
 433 EXPORT_SYMBOL(ide_fixstring);
 434
 435 /*
 436  * Needed for PCI irq sharing
 437  */
 438 int drive_is_ready (ide_drive_t *drive)
 439 {
 440         ide_hwif_t *hwif        = HWIF(drive);
 441         u8 stat                 = 0;
 442
 443         if (drive->waiting_for_dma)
 444                 return hwif->ide_dma_test_irq(drive);
 445
 446 #if 0
 447         /* need to guarantee 400ns since last command was issued */
 448         udelay(1);
 449 #endif
 450
 451 #ifdef CONFIG_IDEPCI_SHARE_IRQ
 452         /*
 453          * We do a passive status test under shared PCI interrupts on
 454          * cards that truly share the ATA side interrupt, but may also share
 455          * an interrupt with another pci card/device.  We make no assumptions
 456          * about possible isa-pnp and pci-pnp issues yet.
 457          */
 458         if (IDE_CONTROL_REG)
 459                 stat = hwif->INB(IDE_ALTSTATUS_REG);
 460         else
 461 #endif /* CONFIG_IDEPCI_SHARE_IRQ */
 462                 /* Note: this may clear a pending IRQ!! */
 463                 stat = hwif->INB(IDE_STATUS_REG);
 464
 465         if (stat & BUSY_STAT)
 466                 /* drive busy:  definitely not interrupting */
 467                 return 0;
 468
 469         /* drive ready: *might* be interrupting */
 470         return 1;
 471 }
 472
 473 EXPORT_SYMBOL(drive_is_ready);
 474
 475 /*
 476  * This routine busy-waits for the drive status to be not "busy".
 477  * It then checks the status for all of the "good" bits and none
 478  * of the "bad" bits, and if all is okay it returns 0.  All other
 479  * cases return error -- caller may then invoke ide_error().
 480  *
 481  * This routine should get fixed to not hog the cpu during extra long waits..
 482  * That could be done by busy-waiting for the first jiffy or two, and then
 483  * setting a timer to wake up at half second intervals thereafter,
 484  * until timeout is achieved, before timing out.
 485  */
 486 static int __ide_wait_stat(ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout, u8 *rstat)
 487 {
 488         ide_hwif_t *hwif = drive->hwif;
 489         unsigned long flags;
 490         int i;
 491         u8 stat;
 492
 493         udelay(1);      /* spec allows drive 400ns to assert "BUSY" */
 494         if ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
 495                 local_irq_set(flags);
 496                 timeout += jiffies;
 497                 while ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
 498                         if (time_after(jiffies, timeout)) {
 499                                 /*
 500                                  * One last read after the timeout in case
 501                                  * heavy interrupt load made us not make any
 502                                  * progress during the timeout..
 503                                  */
 504                                 stat = hwif->INB(IDE_STATUS_REG);
 505                                 if (!(stat & BUSY_STAT))
 506                                         break;
 507
 508                                 local_irq_restore(flags);
 509                                 *rstat = stat;
 510                                 return -EBUSY;
 511                         }
 512                 }
 513                 local_irq_restore(flags);
 514         }
 515         /*
 516          * Allow status to settle, then read it again.
 517          * A few rare drives vastly violate the 400ns spec here,
 518          * so we'll wait up to 10usec for a "good" status
 519          * rather than expensively fail things immediately.
 520          * This fix courtesy of Matthew Faupel & Niccolo Rigacci.
 521          */
 522         for (i = 0; i < 10; i++) {
 523                 udelay(1);
 524                 if (OK_STAT((stat = hwif->INB(IDE_STATUS_REG)), good, bad)) {
 525                         *rstat = stat;
 526                         return 0;
 527                 }
 528         }
 529         *rstat = stat;
 530         return -EFAULT;
 531 }
 532
 533 /*
 534  * In case of error returns error value after doing "*startstop = ide_error()".
 535  * The caller should return the updated value of "startstop" in this case,
 536  * "startstop" is unchanged when the function returns 0.
 537  */
 538 int ide_wait_stat(ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout)
 539 {
 540         int err;
 541         u8 stat;
 542
 543         /* bail early if we've exceeded max_failures */
 544         if (drive->max_failures && (drive->failures > drive->max_failures)) {
 545                 *startstop = ide_stopped;
 546                 return 1;
 547         }
 548
 549         err = __ide_wait_stat(drive, good, bad, timeout, &stat);
 550
 551         if (err) {
 552                 char *s = (err == -EBUSY) ? "status timeout" : "status error";
 553                 *startstop = ide_error(drive, s, stat);
 554         }
 555
 556         return err;
 557 }
 558
 559 EXPORT_SYMBOL(ide_wait_stat);
 560
 561 /**
 562  *      ide_in_drive_list       -       look for drive in black/white list
 563  *      @id: drive identifier
 564  *      @drive_table: list to inspect
 565  *
 566  *      Look for a drive in the blacklist and the whitelist tables
 567  *      Returns 1 if the drive is found in the table.
 568  */
 569
 570 int ide_in_drive_list(struct hd_driveid *id, const struct drive_list_entry *drive_table)
 571 {
 572         for ( ; drive_table->id_model; drive_table++)
 573                 if ((!strcmp(drive_table->id_model, id->model)) &&
 574                     (!drive_table->id_firmware ||
 575                      strstr(id->fw_rev, drive_table->id_firmware)))
 576                         return 1;
 577         return 0;
 578 }
 579
 580 EXPORT_SYMBOL_GPL(ide_in_drive_list);
 581
 582 /*
 583  * Early UDMA66 devices don't set bit14 to 1, only bit13 is valid.
 584  * We list them here and depend on the device side cable detection for them.
 585  *
 586  * Some optical devices with the buggy firmwares have the same problem.
 587  */
 588 static const struct drive_list_entry ivb_list[] = {
 589         { "QUANTUM FIREBALLlct10 05"    , "A03.0900"    },
 590         { "TSSTcorp CDDVDW SH-S202J"    , "SB00"        },
 591         { NULL                          , NULL          }
 592 };
 593
 594 /*
 595  *  All hosts that use the 80c ribbon must use!
 596  *  The name is derived from upper byte of word 93 and the 80c ribbon.
 597  */
 598 u8 eighty_ninty_three (ide_drive_t *drive)
 599 {
 600         ide_hwif_t *hwif = drive->hwif;
 601         struct hd_driveid *id = drive->id;
 602         int ivb = ide_in_drive_list(id, ivb_list);
 603
 604         if (hwif->cbl == ATA_CBL_PATA40_SHORT)
 605                 return 1;
 606
 607         if (ivb)
 608                 printk(KERN_DEBUG "%s: skipping word 93 validity check\n",
 609                                   drive->name);
 610
 611         if (hwif->cbl != ATA_CBL_PATA80 && !ivb)
 612                 goto no_80w;
 613
 614         if (ide_dev_is_sata(id))
 615                 return 1;
 616
 617         /*
 618          * FIXME:
 619          * - force bit13 (80c cable present) check also for !ivb devices
 620          *   (unless the slave device is pre-ATA3)
 621          */
 622         if ((id->hw_config & 0x4000) || (ivb && (id->hw_config & 0x2000)))
 623                 return 1;
 624
 625 no_80w:
 626         if (drive->udma33_warned == 1)
 627                 return 0;
 628
 629         printk(KERN_WARNING "%s: %s side 80-wire cable detection failed, "
 630                             "limiting max speed to UDMA33\n",
 631                             drive->name,
 632                             hwif->cbl == ATA_CBL_PATA80 ? "drive" : "host");
 633
 634         drive->udma33_warned = 1;
 635
 636         return 0;
 637 }
 638
 639 int ide_ata66_check (ide_drive_t *drive, ide_task_t *args)
 640 {
 641         if ((args->tfRegister[IDE_COMMAND_OFFSET] == WIN_SETFEATURES) &&
 642             (args->tfRegister[IDE_SECTOR_OFFSET] > XFER_UDMA_2) &&
 643             (args->tfRegister[IDE_FEATURE_OFFSET] == SETFEATURES_XFER)) {
 644                 if (eighty_ninty_three(drive) == 0) {
 645                         printk(KERN_WARNING "%s: UDMA speeds >UDMA33 cannot "
 646                                             "be set\n", drive->name);
 647                         return 1;
 648                 }
 649         }
 650
 651         return 0;
 652 }
 653
 654 /*
 655  * Backside of HDIO_DRIVE_CMD call of SETFEATURES_XFER.
 656  * 1 : Safe to update drive->id DMA registers.
 657  * 0 : OOPs not allowed.
 658  */
 659 int set_transfer (ide_drive_t *drive, ide_task_t *args)
 660 {
 661         if ((args->tfRegister[IDE_COMMAND_OFFSET] == WIN_SETFEATURES) &&
 662             (args->tfRegister[IDE_SECTOR_OFFSET] >= XFER_SW_DMA_0) &&
 663             (args->tfRegister[IDE_FEATURE_OFFSET] == SETFEATURES_XFER) &&
 664             (drive->id->dma_ultra ||
 665              drive->id->dma_mword ||
 666              drive->id->dma_1word))
 667                 return 1;
 668
 669         return 0;
 670 }
 671
 672 #ifdef CONFIG_BLK_DEV_IDEDMA
 673 static u8 ide_auto_reduce_xfer (ide_drive_t *drive)
 674 {
 675         if (!drive->crc_count)
 676                 return drive->current_speed;
 677         drive->crc_count = 0;
 678
 679         switch(drive->current_speed) {
 680                 case XFER_UDMA_7:       return XFER_UDMA_6;
 681                 case XFER_UDMA_6:       return XFER_UDMA_5;
 682                 case XFER_UDMA_5:       return XFER_UDMA_4;
 683                 case XFER_UDMA_4:       return XFER_UDMA_3;
 684                 case XFER_UDMA_3:       return XFER_UDMA_2;
 685                 case XFER_UDMA_2:       return XFER_UDMA_1;
 686                 case XFER_UDMA_1:       return XFER_UDMA_0;
 687                         /*
 688                          * OOPS we do not goto non Ultra DMA modes
 689                          * without iCRC's available we force
 690                          * the system to PIO and make the user
 691                          * invoke the ATA-1 ATA-2 DMA modes.
 692                          */
 693                 case XFER_UDMA_0:
 694                 default:                return XFER_PIO_4;
 695         }
 696 }
 697 #endif /* CONFIG_BLK_DEV_IDEDMA */
 698
 699 int ide_driveid_update(ide_drive_t *drive)
 700 {
 701         ide_hwif_t *hwif = drive->hwif;
 702         struct hd_driveid *id;
 703         unsigned long timeout, flags;
 704
 705         /*
 706          * Re-read drive->id for possible DMA mode
 707          * change (copied from ide-probe.c)
 708          */
 709
 710         SELECT_MASK(drive, 1);
 711         if (IDE_CONTROL_REG)
 712                 hwif->OUTB(drive->ctl,IDE_CONTROL_REG);
 713         msleep(50);
 714         hwif->OUTB(WIN_IDENTIFY, IDE_COMMAND_REG);
 715         timeout = jiffies + WAIT_WORSTCASE;
 716         do {
 717                 if (time_after(jiffies, timeout)) {
 718                         SELECT_MASK(drive, 0);
 719                         return 0;       /* drive timed-out */
 720                 }
 721                 msleep(50);     /* give drive a breather */
 722         } while (hwif->INB(IDE_ALTSTATUS_REG) & BUSY_STAT);
 723         msleep(50);     /* wait for IRQ and DRQ_STAT */
 724         if (!OK_STAT(hwif->INB(IDE_STATUS_REG),DRQ_STAT,BAD_R_STAT)) {
 725                 SELECT_MASK(drive, 0);
 726                 printk("%s: CHECK for good STATUS\n", drive->name);
 727                 return 0;
 728         }
 729         local_irq_save(flags);
 730         SELECT_MASK(drive, 0);
 731         id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC);
 732         if (!id) {
 733                 local_irq_restore(flags);
 734                 return 0;
 735         }
 736         ata_input_data(drive, id, SECTOR_WORDS);
 737         (void) hwif->INB(IDE_STATUS_REG);       /* clear drive IRQ */
 738         local_irq_enable();
 739         local_irq_restore(flags);
 740         ide_fix_driveid(id);
 741         if (id) {
 742                 drive->id->dma_ultra = id->dma_ultra;
 743                 drive->id->dma_mword = id->dma_mword;
 744                 drive->id->dma_1word = id->dma_1word;
 745                 /* anything more ? */
 746                 kfree(id);
 747         }
 748
 749         return 1;
 750 }
 751
 752 int ide_config_drive_speed(ide_drive_t *drive, u8 speed)
 753 {
 754         ide_hwif_t *hwif = drive->hwif;
 755         int error;
 756         u8 stat;
 757
 758 //      while (HWGROUP(drive)->busy)
 759 //              msleep(50);
 760
 761 #ifdef CONFIG_BLK_DEV_IDEDMA
 762         if (hwif->ide_dma_on)   /* check if host supports DMA */
 763                 hwif->dma_host_off(drive);
 764 #endif
 765
 766         /*
 767          * Don't use ide_wait_cmd here - it will
 768          * attempt to set_geometry and recalibrate,
 769          * but for some reason these don't work at
 770          * this point (lost interrupt).
 771          */
 772         /*
 773          * Select the drive, and issue the SETFEATURES command
 774          */
 775         disable_irq_nosync(hwif->irq);
 776
 777         /*
 778          *      FIXME: we race against the running IRQ here if
 779          *      this is called from non IRQ context. If we use
 780          *      disable_irq() we hang on the error path. Work
 781          *      is needed.
 782          */
 783
 784         udelay(1);
 785         SELECT_DRIVE(drive);
 786         SELECT_MASK(drive, 0);
 787         udelay(1);
 788         if (IDE_CONTROL_REG)
 789                 hwif->OUTB(drive->ctl | 2, IDE_CONTROL_REG);
 790         hwif->OUTB(speed, IDE_NSECTOR_REG);
 791         hwif->OUTB(SETFEATURES_XFER, IDE_FEATURE_REG);
 792         hwif->OUTBSYNC(drive, WIN_SETFEATURES, IDE_COMMAND_REG);
 793         if ((IDE_CONTROL_REG) && (drive->quirk_list == 2))
 794                 hwif->OUTB(drive->ctl, IDE_CONTROL_REG);
 795
 796         error = __ide_wait_stat(drive, drive->ready_stat,
 797                                 BUSY_STAT|DRQ_STAT|ERR_STAT,
 798                                 WAIT_CMD, &stat);
 799
 800         SELECT_MASK(drive, 0);
 801
 802         enable_irq(hwif->irq);
 803
 804         if (error) {
 805                 (void) ide_dump_status(drive, "set_drive_speed_status", stat);
 806                 return error;
 807         }
 808
 809         drive->id->dma_ultra &= ~0xFF00;
 810         drive->id->dma_mword &= ~0x0F00;
 811         drive->id->dma_1word &= ~0x0F00;
 812
 813 #ifdef CONFIG_BLK_DEV_IDEDMA
 814         if (speed >= XFER_SW_DMA_0)
 815                 hwif->dma_host_on(drive);
 816         else if (hwif->ide_dma_on)      /* check if host supports DMA */
 817                 hwif->dma_off_quietly(drive);
 818 #endif
 819
 820         switch(speed) {
 821                 case XFER_UDMA_7:   drive->id->dma_ultra |= 0x8080; break;
 822                 case XFER_UDMA_6:   drive->id->dma_ultra |= 0x4040; break;
 823                 case XFER_UDMA_5:   drive->id->dma_ultra |= 0x2020; break;
 824                 case XFER_UDMA_4:   drive->id->dma_ultra |= 0x1010; break;
 825                 case XFER_UDMA_3:   drive->id->dma_ultra |= 0x0808; break;
 826                 case XFER_UDMA_2:   drive->id->dma_ultra |= 0x0404; break;
 827                 case XFER_UDMA_1:   drive->id->dma_ultra |= 0x0202; break;
 828                 case XFER_UDMA_0:   drive->id->dma_ultra |= 0x0101; break;
 829                 case XFER_MW_DMA_2: drive->id->dma_mword |= 0x0404; break;
 830                 case XFER_MW_DMA_1: drive->id->dma_mword |= 0x0202; break;
 831                 case XFER_MW_DMA_0: drive->id->dma_mword |= 0x0101; break;
 832                 case XFER_SW_DMA_2: drive->id->dma_1word |= 0x0404; break;
 833                 case XFER_SW_DMA_1: drive->id->dma_1word |= 0x0202; break;
 834                 case XFER_SW_DMA_0: drive->id->dma_1word |= 0x0101; break;
 835                 default: break;
 836         }
 837         if (!drive->init_speed)
 838                 drive->init_speed = speed;
 839         drive->current_speed = speed;
 840         return error;
 841 }
 842
 843 /*
 844  * This should get invoked any time we exit the driver to
 845  * wait for an interrupt response from a drive.  handler() points
 846  * at the appropriate code to handle the next interrupt, and a
 847  * timer is started to prevent us from waiting forever in case
 848  * something goes wrong (see the ide_timer_expiry() handler later on).
 849  *
 850  * See also ide_execute_command
 851  */
 852 static void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
 853                       unsigned int timeout, ide_expiry_t *expiry)
 854 {
 855         ide_hwgroup_t *hwgroup = HWGROUP(drive);
 856
 857         if (hwgroup->handler != NULL) {
 858                 printk(KERN_CRIT "%s: ide_set_handler: handler not null; "
 859                         "old=%p, new=%p\n",
 860                         drive->name, hwgroup->handler, handler);
 861         }
 862         hwgroup->handler        = handler;
 863         hwgroup->expiry         = expiry;
 864         hwgroup->timer.expires  = jiffies + timeout;
 865         hwgroup->req_gen_timer = hwgroup->req_gen;
 866         add_timer(&hwgroup->timer);
 867 }
 868
 869 void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
 870                       unsigned int timeout, ide_expiry_t *expiry)
 871 {
 872         unsigned long flags;
 873         spin_lock_irqsave(&ide_lock, flags);
 874         __ide_set_handler(drive, handler, timeout, expiry);
 875         spin_unlock_irqrestore(&ide_lock, flags);
 876 }
 877
 878 EXPORT_SYMBOL(ide_set_handler);
 879
 880 /**
 881  *      ide_execute_command     -       execute an IDE command
 882  *      @drive: IDE drive to issue the command against
 883  *      @command: command byte to write
 884  *      @handler: handler for next phase
 885  *      @timeout: timeout for command
 886  *      @expiry:  handler to run on timeout
 887  *
 888  *      Helper function to issue an IDE command. This handles the
 889  *      atomicity requirements, command timing and ensures that the
 890  *      handler and IRQ setup do not race. All IDE command kick off
 891  *      should go via this function or do equivalent locking.
 892  */
 893
 894 void ide_execute_command(ide_drive_t *drive, task_ioreg_t cmd, ide_handler_t *handler, unsigned timeout, ide_expiry_t *expiry)
 895 {
 896         unsigned long flags;
 897         ide_hwgroup_t *hwgroup = HWGROUP(drive);
 898         ide_hwif_t *hwif = HWIF(drive);
 899
 900         spin_lock_irqsave(&ide_lock, flags);
 901
 902         BUG_ON(hwgroup->handler);
 903         hwgroup->handler        = handler;
 904         hwgroup->expiry         = expiry;
 905         hwgroup->timer.expires  = jiffies + timeout;
 906         hwgroup->req_gen_timer = hwgroup->req_gen;
 907         add_timer(&hwgroup->timer);
 908         hwif->OUTBSYNC(drive, cmd, IDE_COMMAND_REG);
 909         /* Drive takes 400nS to respond, we must avoid the IRQ being
 910            serviced before that.
 911
 912            FIXME: we could skip this delay with care on non shared
 913            devices
 914         */
 915         ndelay(400);
 916         spin_unlock_irqrestore(&ide_lock, flags);
 917 }
 918
 919 EXPORT_SYMBOL(ide_execute_command);
 920
 921
 922 /* needed below */
 923 static ide_startstop_t do_reset1 (ide_drive_t *, int);
 924
 925 /*
 926  * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms
 927  * during an atapi drive reset operation. If the drive has not yet responded,
 928  * and we have not yet hit our maximum waiting time, then the timer is restarted
 929  * for another 50ms.
 930  */
 931 static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive)
 932 {
 933         ide_hwgroup_t *hwgroup  = HWGROUP(drive);
 934         ide_hwif_t *hwif        = HWIF(drive);
 935         u8 stat;
 936
 937         SELECT_DRIVE(drive);
 938         udelay (10);
 939
 940         if (OK_STAT(stat = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) {
 941                 printk("%s: ATAPI reset complete\n", drive->name);
 942         } else {
 943                 if (time_before(jiffies, hwgroup->poll_timeout)) {
 944                         BUG_ON(HWGROUP(drive)->handler != NULL);
 945                         ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
 946                         /* continue polling */
 947                         return ide_started;
 948                 }
 949                 /* end of polling */
 950                 hwgroup->polling = 0;
 951                 printk("%s: ATAPI reset timed-out, status=0x%02x\n",
 952                                 drive->name, stat);
 953                 /* do it the old fashioned way */
 954                 return do_reset1(drive, 1);
 955         }
 956         /* done polling */
 957         hwgroup->polling = 0;
 958         hwgroup->resetting = 0;
 959         return ide_stopped;
 960 }
 961
 962 /*
 963  * reset_pollfunc() gets invoked to poll the interface for completion every 50ms
 964  * during an ide reset operation. If the drives have not yet responded,
 965  * and we have not yet hit our maximum waiting time, then the timer is restarted
 966  * for another 50ms.
 967  */
 968 static ide_startstop_t reset_pollfunc (ide_drive_t *drive)
 969 {
 970         ide_hwgroup_t *hwgroup  = HWGROUP(drive);
 971         ide_hwif_t *hwif        = HWIF(drive);
 972         u8 tmp;
 973
 974         if (hwif->reset_poll != NULL) {
 975                 if (hwif->reset_poll(drive)) {
 976                         printk(KERN_ERR "%s: host reset_poll failure for %s.\n",
 977                                 hwif->name, drive->name);
 978                         return ide_stopped;
 979                 }
 980         }
 981
 982         if (!OK_STAT(tmp = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) {
 983                 if (time_before(jiffies, hwgroup->poll_timeout)) {
 984                         BUG_ON(HWGROUP(drive)->handler != NULL);
 985                         ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
 986                         /* continue polling */
 987                         return ide_started;
 988                 }
 989                 printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp);
 990                 drive->failures++;
 991         } else  {
 992                 printk("%s: reset: ", hwif->name);
 993                 if ((tmp = hwif->INB(IDE_ERROR_REG)) == 1) {
 994                         printk("success\n");
 995                         drive->failures = 0;
 996                 } else {
 997                         drive->failures++;
 998                         printk("master: ");
 999                         switch (tmp & 0x7f) {
1000                                 case 1: printk("passed");
1001                                         break;
1002                                 case 2: printk("formatter device error");
1003                                         break;
1004                                 case 3: printk("sector buffer error");
1005                                         break;
1006                                 case 4: printk("ECC circuitry error");
1007                                         break;
1008                                 case 5: printk("controlling MPU error");
1009                                         break;
1010                                 default:printk("error (0x%02x?)", tmp);
1011                         }
1012                         if (tmp & 0x80)
1013                                 printk("; slave: failed");
1014                         printk("\n");
1015                 }
1016         }
1017         hwgroup->polling = 0;   /* done polling */
1018         hwgroup->resetting = 0; /* done reset attempt */
1019         return ide_stopped;
1020 }
1021
1022 static void check_dma_crc(ide_drive_t *drive)
1023 {
1024 #ifdef CONFIG_BLK_DEV_IDEDMA
1025         if (drive->crc_count) {
1026                 drive->hwif->dma_off_quietly(drive);
1027                 ide_set_xfer_rate(drive, ide_auto_reduce_xfer(drive));
1028                 if (drive->current_speed >= XFER_SW_DMA_0)
1029                         (void) HWIF(drive)->ide_dma_on(drive);
1030         } else
1031                 ide_dma_off(drive);
1032 #endif
1033 }
1034
1035 static void ide_disk_pre_reset(ide_drive_t *drive)
1036 {
1037         int legacy = (drive->id->cfs_enable_2 & 0x0400) ? 0 : 1;
1038
1039         drive->special.all = 0;
1040         drive->special.b.set_geometry = legacy;
1041         drive->special.b.recalibrate  = legacy;
1042         if (OK_TO_RESET_CONTROLLER)
1043                 drive->mult_count = 0;
1044         if (!drive->keep_settings && !drive->using_dma)
1045                 drive->mult_req = 0;
1046         if (drive->mult_req != drive->mult_count)
1047                 drive->special.b.set_multmode = 1;
1048 }
1049
1050 static void pre_reset(ide_drive_t *drive)
1051 {
1052         if (drive->media == ide_disk)
1053                 ide_disk_pre_reset(drive);
1054         else
1055                 drive->post_reset = 1;
1056
1057         if (!drive->keep_settings) {
1058                 if (drive->using_dma) {
1059                         check_dma_crc(drive);
1060                 } else {
1061                         drive->unmask = 0;
1062                         drive->io_32bit = 0;
1063                 }
1064                 return;
1065         }
1066         if (drive->using_dma)
1067                 check_dma_crc(drive);
1068
1069         if (HWIF(drive)->pre_reset != NULL)
1070                 HWIF(drive)->pre_reset(drive);
1071
1072         if (drive->current_speed != 0xff)
1073                 drive->desired_speed = drive->current_speed;
1074         drive->current_speed = 0xff;
1075 }
1076
1077 /*
1078  * do_reset1() attempts to recover a confused drive by resetting it.
1079  * Unfortunately, resetting a disk drive actually resets all devices on
1080  * the same interface, so it can really be thought of as resetting the
1081  * interface rather than resetting the drive.
1082  *
1083  * ATAPI devices have their own reset mechanism which allows them to be
1084  * individually reset without clobbering other devices on the same interface.
1085  *
1086  * Unfortunately, the IDE interface does not generate an interrupt to let
1087  * us know when the reset operation has finished, so we must poll for this.
1088  * Equally poor, though, is the fact that this may a very long time to complete,
1089  * (up to 30 seconds worstcase).  So, instead of busy-waiting here for it,
1090  * we set a timer to poll at 50ms intervals.
1091  */
1092 static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi)
1093 {
1094         unsigned int unit;
1095         unsigned long flags;
1096         ide_hwif_t *hwif;
1097         ide_hwgroup_t *hwgroup;
1098
1099         spin_lock_irqsave(&ide_lock, flags);
1100         hwif = HWIF(drive);
1101         hwgroup = HWGROUP(drive);
1102
1103         /* We must not reset with running handlers */
1104         BUG_ON(hwgroup->handler != NULL);
1105
1106         /* For an ATAPI device, first try an ATAPI SRST. */
1107         if (drive->media != ide_disk && !do_not_try_atapi) {
1108                 hwgroup->resetting = 1;
1109                 pre_reset(drive);
1110                 SELECT_DRIVE(drive);
1111                 udelay (20);
1112                 hwif->OUTBSYNC(drive, WIN_SRST, IDE_COMMAND_REG);
1113                 ndelay(400);
1114                 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1115                 hwgroup->polling = 1;
1116                 __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
1117                 spin_unlock_irqrestore(&ide_lock, flags);
1118                 return ide_started;
1119         }
1120
1121         /*
1122          * First, reset any device state data we were maintaining
1123          * for any of the drives on this interface.
1124          */
1125         for (unit = 0; unit < MAX_DRIVES; ++unit)
1126                 pre_reset(&hwif->drives[unit]);
1127
1128 #if OK_TO_RESET_CONTROLLER
1129         if (!IDE_CONTROL_REG) {
1130                 spin_unlock_irqrestore(&ide_lock, flags);
1131                 return ide_stopped;
1132         }
1133
1134         hwgroup->resetting = 1;
1135         /*
1136          * Note that we also set nIEN while resetting the device,
1137          * to mask unwanted interrupts from the interface during the reset.
1138          * However, due to the design of PC hardware, this will cause an
1139          * immediate interrupt due to the edge transition it produces.
1140          * This single interrupt gives us a "fast poll" for drives that
1141          * recover from reset very quickly, saving us the first 50ms wait time.
1142          */
1143         /* set SRST and nIEN */
1144         hwif->OUTBSYNC(drive, drive->ctl|6,IDE_CONTROL_REG);
1145         /* more than enough time */
1146         udelay(10);
1147         if (drive->quirk_list == 2) {
1148                 /* clear SRST and nIEN */
1149                 hwif->OUTBSYNC(drive, drive->ctl, IDE_CONTROL_REG);
1150         } else {
1151                 /* clear SRST, leave nIEN */
1152                 hwif->OUTBSYNC(drive, drive->ctl|2, IDE_CONTROL_REG);
1153         }
1154         /* more than enough time */
1155         udelay(10);
1156         hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1157         hwgroup->polling = 1;
1158         __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
1159
1160         /*
1161          * Some weird controller like resetting themselves to a strange
1162          * state when the disks are reset this way. At least, the Winbond
1163          * 553 documentation says that
1164          */
1165         if (hwif->resetproc != NULL) {
1166                 hwif->resetproc(drive);
1167         }
1168
1169 #endif  /* OK_TO_RESET_CONTROLLER */
1170
1171         spin_unlock_irqrestore(&ide_lock, flags);
1172         return ide_started;
1173 }
1174
1175 /*
1176  * ide_do_reset() is the entry point to the drive/interface reset code.
1177  */
1178
1179 ide_startstop_t ide_do_reset (ide_drive_t *drive)
1180 {
1181         return do_reset1(drive, 0);
1182 }
1183
1184 EXPORT_SYMBOL(ide_do_reset);
1185
1186 /*
1187  * ide_wait_not_busy() waits for the currently selected device on the hwif
1188  * to report a non-busy status, see comments in probe_hwif().
1189  */
1190 int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout)
1191 {
1192         u8 stat = 0;
1193
1194         while(timeout--) {
1195                 /*
1196                  * Turn this into a schedule() sleep once I'm sure
1197                  * about locking issues (2.5 work ?).
1198                  */
1199                 mdelay(1);
1200                 stat = hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]);
1201                 if ((stat & BUSY_STAT) == 0)
1202                         return 0;
1203                 /*
1204                  * Assume a value of 0xff means nothing is connected to
1205                  * the interface and it doesn't implement the pull-down
1206                  * resistor on D7.
1207                  */
1208                 if (stat == 0xff)
1209                         return -ENODEV;
1210                 touch_softlockup_watchdog();
1211                 touch_nmi_watchdog();
1212         }
1213         return -EBUSY;
1214 }
1215
1216 EXPORT_SYMBOL_GPL(ide_wait_not_busy);
1217