2 * (C) Copyright 2015 Google, Inc
4 * (C) Copyright 2008-2014 Rockchip Electronics
5 * Peter, Software Engineering, <superpeter.cai@gmail.com>.
7 * SPDX-License-Identifier: GPL-2.0+
16 #include <asm/arch/clock.h>
17 #include <asm/arch/i2c.h>
18 #include <asm/arch/periph.h>
19 #include <dm/pinctrl.h>
20 #include <linux/sizes.h>
23 #define I2C_TIMEOUT_MS 100
24 #define I2C_RETRY_COUNT 3
26 /* rk i2c fifo max transfer bytes */
27 #define RK_I2C_FIFO_SIZE 32
31 struct i2c_regs *regs;
35 static inline void rk_i2c_get_div(int div, int *divh, int *divl)
41 *divh = DIV_ROUND_UP(div, 2);
45 * SCL Divisor = 8 * (CLKDIVL+1 + CLKDIVH+1)
46 * SCL = PCLK / SCLK Divisor
49 static void rk_i2c_set_clk(struct rk_i2c *i2c, uint32_t scl_rate)
54 /* First get i2c rate from pclk */
55 i2c_rate = clk_get_rate(&i2c->clk);
57 div = DIV_ROUND_UP(i2c_rate, scl_rate * 8) - 2;
61 rk_i2c_get_div(div, &divh, &divl);
62 writel(I2C_CLKDIV_VAL(divl, divh), &i2c->regs->clkdiv);
64 debug("rk_i2c_set_clk: i2c rate = %d, scl rate = %d\n", i2c_rate,
66 debug("set i2c clk div = %d, divh = %d, divl = %d\n", div, divh, divl);
67 debug("set clk(I2C_CLKDIV: 0x%08x)\n", readl(&i2c->regs->clkdiv));
70 static void rk_i2c_show_regs(struct i2c_regs *regs)
75 debug("i2c_con: 0x%08x\n", readl(®s->con));
76 debug("i2c_clkdiv: 0x%08x\n", readl(®s->clkdiv));
77 debug("i2c_mrxaddr: 0x%08x\n", readl(®s->mrxaddr));
78 debug("i2c_mrxraddR: 0x%08x\n", readl(®s->mrxraddr));
79 debug("i2c_mtxcnt: 0x%08x\n", readl(®s->mtxcnt));
80 debug("i2c_mrxcnt: 0x%08x\n", readl(®s->mrxcnt));
81 debug("i2c_ien: 0x%08x\n", readl(®s->ien));
82 debug("i2c_ipd: 0x%08x\n", readl(®s->ipd));
83 debug("i2c_fcnt: 0x%08x\n", readl(®s->fcnt));
84 for (i = 0; i < 8; i++)
85 debug("i2c_txdata%d: 0x%08x\n", i, readl(®s->txdata[i]));
86 for (i = 0; i < 8; i++)
87 debug("i2c_rxdata%d: 0x%08x\n", i, readl(®s->rxdata[i]));
91 static int rk_i2c_send_start_bit(struct rk_i2c *i2c)
93 struct i2c_regs *regs = i2c->regs;
96 debug("I2c Send Start bit.\n");
97 writel(I2C_IPD_ALL_CLEAN, ®s->ipd);
99 writel(I2C_CON_EN | I2C_CON_START, ®s->con);
100 writel(I2C_STARTIEN, ®s->ien);
102 start = get_timer(0);
104 if (readl(®s->ipd) & I2C_STARTIPD) {
105 writel(I2C_STARTIPD, ®s->ipd);
108 if (get_timer(start) > I2C_TIMEOUT_MS) {
109 debug("I2C Send Start Bit Timeout\n");
110 rk_i2c_show_regs(regs);
119 static int rk_i2c_send_stop_bit(struct rk_i2c *i2c)
121 struct i2c_regs *regs = i2c->regs;
124 debug("I2c Send Stop bit.\n");
125 writel(I2C_IPD_ALL_CLEAN, ®s->ipd);
127 writel(I2C_CON_EN | I2C_CON_STOP, ®s->con);
128 writel(I2C_CON_STOP, ®s->ien);
130 start = get_timer(0);
132 if (readl(®s->ipd) & I2C_STOPIPD) {
133 writel(I2C_STOPIPD, ®s->ipd);
136 if (get_timer(start) > I2C_TIMEOUT_MS) {
137 debug("I2C Send Start Bit Timeout\n");
138 rk_i2c_show_regs(regs);
147 static inline void rk_i2c_disable(struct rk_i2c *i2c)
149 writel(0, &i2c->regs->con);
152 static int rk_i2c_read(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,
153 uchar *buf, uint b_len)
155 struct i2c_regs *regs = i2c->regs;
157 uint bytes_remain_len = b_len;
158 uint bytes_xferred = 0;
159 uint words_xferred = 0;
165 bool snd_chunk = false;
167 debug("rk_i2c_read: chip = %d, reg = %d, r_len = %d, b_len = %d\n",
168 chip, reg, r_len, b_len);
170 err = rk_i2c_send_start_bit(i2c);
174 writel(I2C_MRXADDR_SET(1, chip << 1 | 1), ®s->mrxaddr);
176 writel(0, ®s->mrxraddr);
177 } else if (r_len < 4) {
178 writel(I2C_MRXRADDR_SET(r_len, reg), ®s->mrxraddr);
180 debug("I2C Read: addr len %d not supported\n", r_len);
184 while (bytes_remain_len) {
185 if (bytes_remain_len > RK_I2C_FIFO_SIZE) {
190 * The hw can read up to 32 bytes at a time. If we need
191 * more than one chunk, send an ACK after the last byte.
193 con = I2C_CON_EN | I2C_CON_LASTACK;
194 bytes_xferred = bytes_remain_len;
196 words_xferred = DIV_ROUND_UP(bytes_xferred, 4);
199 * make sure we are in plain RX mode if we read a second chunk
202 con |= I2C_CON_MOD(I2C_MODE_RX);
204 con |= I2C_CON_MOD(I2C_MODE_TRX);
206 writel(con, ®s->con);
207 writel(bytes_xferred, ®s->mrxcnt);
208 writel(I2C_MBRFIEN | I2C_NAKRCVIEN, ®s->ien);
210 start = get_timer(0);
212 if (readl(®s->ipd) & I2C_NAKRCVIPD) {
213 writel(I2C_NAKRCVIPD, ®s->ipd);
216 if (readl(®s->ipd) & I2C_MBRFIPD) {
217 writel(I2C_MBRFIPD, ®s->ipd);
220 if (get_timer(start) > I2C_TIMEOUT_MS) {
221 debug("I2C Read Data Timeout\n");
223 rk_i2c_show_regs(regs);
229 for (i = 0; i < words_xferred; i++) {
230 rxdata = readl(®s->rxdata[i]);
231 debug("I2c Read RXDATA[%d] = 0x%x\n", i, rxdata);
232 for (j = 0; j < 4; j++) {
233 if ((i * 4 + j) == bytes_xferred)
235 *pbuf++ = (rxdata >> (j * 8)) & 0xff;
239 bytes_remain_len -= bytes_xferred;
241 debug("I2C Read bytes_remain_len %d\n", bytes_remain_len);
245 rk_i2c_send_stop_bit(i2c);
251 static int rk_i2c_write(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,
252 uchar *buf, uint b_len)
254 struct i2c_regs *regs = i2c->regs;
257 uint bytes_remain_len = b_len + r_len + 1;
258 uint bytes_xferred = 0;
259 uint words_xferred = 0;
264 debug("rk_i2c_write: chip = %d, reg = %d, r_len = %d, b_len = %d\n",
265 chip, reg, r_len, b_len);
266 err = rk_i2c_send_start_bit(i2c);
270 while (bytes_remain_len) {
271 if (bytes_remain_len > RK_I2C_FIFO_SIZE)
272 bytes_xferred = RK_I2C_FIFO_SIZE;
274 bytes_xferred = bytes_remain_len;
275 words_xferred = DIV_ROUND_UP(bytes_xferred, 4);
277 for (i = 0; i < words_xferred; i++) {
279 for (j = 0; j < 4; j++) {
280 if ((i * 4 + j) == bytes_xferred)
283 if (i == 0 && j == 0 && pbuf == buf) {
284 txdata |= (chip << 1);
285 } else if (i == 0 && j <= r_len && pbuf == buf) {
287 (0xff << ((j - 1) * 8))) << 8;
289 txdata |= (*pbuf++)<<(j * 8);
292 writel(txdata, ®s->txdata[i]);
293 debug("I2c Write TXDATA[%d] = 0x%08x\n", i, txdata);
296 writel(I2C_CON_EN | I2C_CON_MOD(I2C_MODE_TX), ®s->con);
297 writel(bytes_xferred, ®s->mtxcnt);
298 writel(I2C_MBTFIEN | I2C_NAKRCVIEN, ®s->ien);
300 start = get_timer(0);
302 if (readl(®s->ipd) & I2C_NAKRCVIPD) {
303 writel(I2C_NAKRCVIPD, ®s->ipd);
306 if (readl(®s->ipd) & I2C_MBTFIPD) {
307 writel(I2C_MBTFIPD, ®s->ipd);
310 if (get_timer(start) > I2C_TIMEOUT_MS) {
311 debug("I2C Write Data Timeout\n");
313 rk_i2c_show_regs(regs);
319 bytes_remain_len -= bytes_xferred;
320 debug("I2C Write bytes_remain_len %d\n", bytes_remain_len);
324 rk_i2c_send_stop_bit(i2c);
330 static int rockchip_i2c_xfer(struct udevice *bus, struct i2c_msg *msg,
333 struct rk_i2c *i2c = dev_get_priv(bus);
336 debug("i2c_xfer: %d messages\n", nmsgs);
337 for (; nmsgs > 0; nmsgs--, msg++) {
338 debug("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len);
339 if (msg->flags & I2C_M_RD) {
340 ret = rk_i2c_read(i2c, msg->addr, 0, 0, msg->buf,
343 ret = rk_i2c_write(i2c, msg->addr, 0, 0, msg->buf,
347 debug("i2c_write: error sending\n");
355 int rockchip_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
357 struct rk_i2c *i2c = dev_get_priv(bus);
359 rk_i2c_set_clk(i2c, speed);
364 static int rockchip_i2c_ofdata_to_platdata(struct udevice *bus)
366 struct rk_i2c *priv = dev_get_priv(bus);
369 ret = clk_get_by_index(bus, 0, &priv->clk);
371 debug("%s: Could not get clock for %s: %d\n", __func__,
379 static int rockchip_i2c_probe(struct udevice *bus)
381 struct rk_i2c *priv = dev_get_priv(bus);
383 priv->regs = dev_read_addr_ptr(bus);
388 static const struct dm_i2c_ops rockchip_i2c_ops = {
389 .xfer = rockchip_i2c_xfer,
390 .set_bus_speed = rockchip_i2c_set_bus_speed,
393 static const struct udevice_id rockchip_i2c_ids[] = {
394 { .compatible = "rockchip,rk3066-i2c" },
395 { .compatible = "rockchip,rk3188-i2c" },
396 { .compatible = "rockchip,rk3288-i2c" },
397 { .compatible = "rockchip,rk3328-i2c" },
398 { .compatible = "rockchip,rk3399-i2c" },
402 U_BOOT_DRIVER(i2c_rockchip) = {
403 .name = "i2c_rockchip",
405 .of_match = rockchip_i2c_ids,
406 .ofdata_to_platdata = rockchip_i2c_ofdata_to_platdata,
407 .probe = rockchip_i2c_probe,
408 .priv_auto_alloc_size = sizeof(struct rk_i2c),
409 .ops = &rockchip_i2c_ops,