2 * Provides I2C support for Philips PNX010x/PNX4008 boards.
4 * Authors: Dennis Kovalev <dkovalev@ru.mvista.com>
5 * Vitaly Wool <vwool@ru.mvista.com>
7 * 2004-2006 (c) MontaVista Software, Inc. This file is licensed under
8 * the terms of the GNU General Public License version 2. This program
9 * is licensed "as is" without any warranty of any kind, whether express
13 #include <linux/module.h>
14 #include <linux/interrupt.h>
15 #include <linux/ioport.h>
16 #include <linux/delay.h>
17 #include <linux/i2c.h>
18 #include <linux/timer.h>
19 #include <linux/completion.h>
20 #include <linux/platform_device.h>
21 #include <linux/i2c-pnx.h>
23 #include <linux/err.h>
24 #include <linux/clk.h>
26 #include <mach/hardware.h>
29 #define I2C_PNX_TIMEOUT 10 /* msec */
30 #define I2C_PNX_SPEED_KHZ 100
31 #define I2C_PNX_REGION_SIZE 0x100
33 static inline int wait_timeout(long timeout, struct i2c_pnx_algo_data *data)
36 (ioread32(I2C_REG_STS(data)) & mstatus_active)) {
40 return (timeout <= 0);
43 static inline int wait_reset(long timeout, struct i2c_pnx_algo_data *data)
46 (ioread32(I2C_REG_CTL(data)) & mcntrl_reset)) {
50 return (timeout <= 0);
53 static inline void i2c_pnx_arm_timer(struct i2c_pnx_algo_data *alg_data)
55 struct timer_list *timer = &alg_data->mif.timer;
56 unsigned long expires = msecs_to_jiffies(I2C_PNX_TIMEOUT);
61 del_timer_sync(timer);
63 dev_dbg(&alg_data->adapter.dev, "Timer armed at %lu plus %lu jiffies.\n",
66 timer->expires = jiffies + expires;
67 timer->data = (unsigned long)&alg_data;
73 * i2c_pnx_start - start a device
74 * @slave_addr: slave address
75 * @adap: pointer to adapter structure
77 * Generate a START signal in the desired mode.
79 static int i2c_pnx_start(unsigned char slave_addr,
80 struct i2c_pnx_algo_data *alg_data)
82 dev_dbg(&alg_data->adapter.dev, "%s(): addr 0x%x mode %d\n", __func__,
83 slave_addr, alg_data->mif.mode);
85 /* Check for 7 bit slave addresses only */
86 if (slave_addr & ~0x7f) {
87 dev_err(&alg_data->adapter.dev,
88 "%s: Invalid slave address %x. Only 7-bit addresses are supported\n",
89 alg_data->adapter.name, slave_addr);
93 /* First, make sure bus is idle */
94 if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) {
95 /* Somebody else is monopolizing the bus */
96 dev_err(&alg_data->adapter.dev,
97 "%s: Bus busy. Slave addr = %02x, cntrl = %x, stat = %x\n",
98 alg_data->adapter.name, slave_addr,
99 ioread32(I2C_REG_CTL(alg_data)),
100 ioread32(I2C_REG_STS(alg_data)));
102 } else if (ioread32(I2C_REG_STS(alg_data)) & mstatus_afi) {
103 /* Sorry, we lost the bus */
104 dev_err(&alg_data->adapter.dev,
105 "%s: Arbitration failure. Slave addr = %02x\n",
106 alg_data->adapter.name, slave_addr);
111 * OK, I2C is enabled and we have the bus.
112 * Clear the current TDI and AFI status flags.
114 iowrite32(ioread32(I2C_REG_STS(alg_data)) | mstatus_tdi | mstatus_afi,
115 I2C_REG_STS(alg_data));
117 dev_dbg(&alg_data->adapter.dev, "%s(): sending %#x\n", __func__,
118 (slave_addr << 1) | start_bit | alg_data->mif.mode);
120 /* Write the slave address, START bit and R/W bit */
121 iowrite32((slave_addr << 1) | start_bit | alg_data->mif.mode,
122 I2C_REG_TX(alg_data));
124 dev_dbg(&alg_data->adapter.dev, "%s(): exit\n", __func__);
130 * i2c_pnx_stop - stop a device
131 * @adap: pointer to I2C adapter structure
133 * Generate a STOP signal to terminate the master transaction.
135 static void i2c_pnx_stop(struct i2c_pnx_algo_data *alg_data)
137 /* Only 1 msec max timeout due to interrupt context */
140 dev_dbg(&alg_data->adapter.dev, "%s(): entering: stat = %04x.\n",
141 __func__, ioread32(I2C_REG_STS(alg_data)));
143 /* Write a STOP bit to TX FIFO */
144 iowrite32(0xff | stop_bit, I2C_REG_TX(alg_data));
146 /* Wait until the STOP is seen. */
147 while (timeout > 0 &&
148 (ioread32(I2C_REG_STS(alg_data)) & mstatus_active)) {
149 /* may be called from interrupt context */
154 dev_dbg(&alg_data->adapter.dev, "%s(): exiting: stat = %04x.\n",
155 __func__, ioread32(I2C_REG_STS(alg_data)));
159 * i2c_pnx_master_xmit - transmit data to slave
160 * @adap: pointer to I2C adapter structure
162 * Sends one byte of data to the slave
164 static int i2c_pnx_master_xmit(struct i2c_pnx_algo_data *alg_data)
168 dev_dbg(&alg_data->adapter.dev, "%s(): entering: stat = %04x.\n",
169 __func__, ioread32(I2C_REG_STS(alg_data)));
171 if (alg_data->mif.len > 0) {
172 /* We still have something to talk about... */
173 val = *alg_data->mif.buf++;
175 if (alg_data->mif.len == 1) {
182 iowrite32(val, I2C_REG_TX(alg_data));
184 dev_dbg(&alg_data->adapter.dev, "%s(): xmit %#x [%d]\n",
185 __func__, val, alg_data->mif.len + 1);
187 if (alg_data->mif.len == 0) {
188 if (alg_data->last) {
189 /* Wait until the STOP is seen. */
190 if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))
191 dev_err(&alg_data->adapter.dev,
192 "The bus is still active after timeout\n");
194 /* Disable master interrupts */
195 iowrite32(ioread32(I2C_REG_CTL(alg_data)) &
196 ~(mcntrl_afie | mcntrl_naie | mcntrl_drmie),
197 I2C_REG_CTL(alg_data));
199 del_timer_sync(&alg_data->mif.timer);
201 dev_dbg(&alg_data->adapter.dev,
202 "%s(): Waking up xfer routine.\n",
205 complete(&alg_data->mif.complete);
207 } else if (alg_data->mif.len == 0) {
208 /* zero-sized transfer */
209 i2c_pnx_stop(alg_data);
211 /* Disable master interrupts. */
212 iowrite32(ioread32(I2C_REG_CTL(alg_data)) &
213 ~(mcntrl_afie | mcntrl_naie | mcntrl_drmie),
214 I2C_REG_CTL(alg_data));
217 del_timer_sync(&alg_data->mif.timer);
218 dev_dbg(&alg_data->adapter.dev,
219 "%s(): Waking up xfer routine after zero-xfer.\n",
222 complete(&alg_data->mif.complete);
225 dev_dbg(&alg_data->adapter.dev, "%s(): exiting: stat = %04x.\n",
226 __func__, ioread32(I2C_REG_STS(alg_data)));
232 * i2c_pnx_master_rcv - receive data from slave
233 * @adap: pointer to I2C adapter structure
235 * Reads one byte data from the slave
237 static int i2c_pnx_master_rcv(struct i2c_pnx_algo_data *alg_data)
239 unsigned int val = 0;
242 dev_dbg(&alg_data->adapter.dev, "%s(): entering: stat = %04x.\n",
243 __func__, ioread32(I2C_REG_STS(alg_data)));
245 /* Check, whether there is already data,
246 * or we didn't 'ask' for it yet.
248 if (ioread32(I2C_REG_STS(alg_data)) & mstatus_rfe) {
249 dev_dbg(&alg_data->adapter.dev,
250 "%s(): Write dummy data to fill Rx-fifo...\n",
253 if (alg_data->mif.len == 1) {
254 /* Last byte, do not acknowledge next rcv. */
260 * Enable interrupt RFDAIE (data in Rx fifo),
261 * and disable DRMIE (need data for Tx)
263 ctl = ioread32(I2C_REG_CTL(alg_data));
264 ctl |= mcntrl_rffie | mcntrl_daie;
265 ctl &= ~mcntrl_drmie;
266 iowrite32(ctl, I2C_REG_CTL(alg_data));
270 * Now we'll 'ask' for data:
271 * For each byte we want to receive, we must
272 * write a (dummy) byte to the Tx-FIFO.
274 iowrite32(val, I2C_REG_TX(alg_data));
280 if (alg_data->mif.len > 0) {
281 val = ioread32(I2C_REG_RX(alg_data));
282 *alg_data->mif.buf++ = (u8) (val & 0xff);
283 dev_dbg(&alg_data->adapter.dev, "%s(): rcv 0x%x [%d]\n",
284 __func__, val, alg_data->mif.len);
287 if (alg_data->mif.len == 0) {
289 /* Wait until the STOP is seen. */
290 if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))
291 dev_err(&alg_data->adapter.dev,
292 "The bus is still active after timeout\n");
294 /* Disable master interrupts */
295 ctl = ioread32(I2C_REG_CTL(alg_data));
296 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie |
297 mcntrl_drmie | mcntrl_daie);
298 iowrite32(ctl, I2C_REG_CTL(alg_data));
301 del_timer_sync(&alg_data->mif.timer);
302 complete(&alg_data->mif.complete);
306 dev_dbg(&alg_data->adapter.dev, "%s(): exiting: stat = %04x.\n",
307 __func__, ioread32(I2C_REG_STS(alg_data)));
312 static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id)
314 struct i2c_pnx_algo_data *alg_data = dev_id;
317 dev_dbg(&alg_data->adapter.dev,
318 "%s(): mstat = %x mctrl = %x, mode = %d\n",
320 ioread32(I2C_REG_STS(alg_data)),
321 ioread32(I2C_REG_CTL(alg_data)),
323 stat = ioread32(I2C_REG_STS(alg_data));
325 /* let's see what kind of event this is */
326 if (stat & mstatus_afi) {
327 /* We lost arbitration in the midst of a transfer */
328 alg_data->mif.ret = -EIO;
330 /* Disable master interrupts. */
331 ctl = ioread32(I2C_REG_CTL(alg_data));
332 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie |
334 iowrite32(ctl, I2C_REG_CTL(alg_data));
336 /* Stop timer, to prevent timeout. */
337 del_timer_sync(&alg_data->mif.timer);
338 complete(&alg_data->mif.complete);
339 } else if (stat & mstatus_nai) {
340 /* Slave did not acknowledge, generate a STOP */
341 dev_dbg(&alg_data->adapter.dev,
342 "%s(): Slave did not acknowledge, generating a STOP.\n",
344 i2c_pnx_stop(alg_data);
346 /* Disable master interrupts. */
347 ctl = ioread32(I2C_REG_CTL(alg_data));
348 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie |
350 iowrite32(ctl, I2C_REG_CTL(alg_data));
352 /* Our return value. */
353 alg_data->mif.ret = -EIO;
355 /* Stop timer, to prevent timeout. */
356 del_timer_sync(&alg_data->mif.timer);
357 complete(&alg_data->mif.complete);
361 * - Master Tx needs data.
362 * - There is data in the Rx-fifo
363 * The latter is only the case if we have requested for data,
364 * via a dummy write. (See 'i2c_pnx_master_rcv'.)
365 * We therefore check, as a sanity check, whether that interrupt
368 if ((stat & mstatus_drmi) || !(stat & mstatus_rfe)) {
369 if (alg_data->mif.mode == I2C_SMBUS_WRITE) {
370 i2c_pnx_master_xmit(alg_data);
371 } else if (alg_data->mif.mode == I2C_SMBUS_READ) {
372 i2c_pnx_master_rcv(alg_data);
377 /* Clear TDI and AFI bits */
378 stat = ioread32(I2C_REG_STS(alg_data));
379 iowrite32(stat | mstatus_tdi | mstatus_afi, I2C_REG_STS(alg_data));
381 dev_dbg(&alg_data->adapter.dev,
382 "%s(): exiting, stat = %x ctrl = %x.\n",
383 __func__, ioread32(I2C_REG_STS(alg_data)),
384 ioread32(I2C_REG_CTL(alg_data)));
389 static void i2c_pnx_timeout(unsigned long data)
391 struct i2c_pnx_algo_data *alg_data = (struct i2c_pnx_algo_data *)data;
394 dev_err(&alg_data->adapter.dev,
395 "Master timed out. stat = %04x, cntrl = %04x. Resetting master...\n",
396 ioread32(I2C_REG_STS(alg_data)),
397 ioread32(I2C_REG_CTL(alg_data)));
399 /* Reset master and disable interrupts */
400 ctl = ioread32(I2C_REG_CTL(alg_data));
401 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie | mcntrl_drmie);
402 iowrite32(ctl, I2C_REG_CTL(alg_data));
405 iowrite32(ctl, I2C_REG_CTL(alg_data));
406 wait_reset(I2C_PNX_TIMEOUT, alg_data);
407 alg_data->mif.ret = -EIO;
408 complete(&alg_data->mif.complete);
411 static inline void bus_reset_if_active(struct i2c_pnx_algo_data *alg_data)
415 if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_active) {
416 dev_err(&alg_data->adapter.dev,
417 "%s: Bus is still active after xfer. Reset it...\n",
418 alg_data->adapter.name);
419 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
420 I2C_REG_CTL(alg_data));
421 wait_reset(I2C_PNX_TIMEOUT, alg_data);
422 } else if (!(stat & mstatus_rfe) || !(stat & mstatus_tfe)) {
423 /* If there is data in the fifo's after transfer,
424 * flush fifo's by reset.
426 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
427 I2C_REG_CTL(alg_data));
428 wait_reset(I2C_PNX_TIMEOUT, alg_data);
429 } else if (stat & mstatus_nai) {
430 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
431 I2C_REG_CTL(alg_data));
432 wait_reset(I2C_PNX_TIMEOUT, alg_data);
437 * i2c_pnx_xfer - generic transfer entry point
438 * @adap: pointer to I2C adapter structure
439 * @msgs: array of messages
440 * @num: number of messages
442 * Initiates the transfer
445 i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
447 struct i2c_msg *pmsg;
448 int rc = 0, completed = 0, i;
449 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
450 u32 stat = ioread32(I2C_REG_STS(alg_data));
452 dev_dbg(&alg_data->adapter.dev,
453 "%s(): entering: %d messages, stat = %04x.\n",
454 __func__, num, ioread32(I2C_REG_STS(alg_data)));
456 bus_reset_if_active(alg_data);
458 /* Process transactions in a loop. */
459 for (i = 0; rc >= 0 && i < num; i++) {
465 if (pmsg->flags & I2C_M_TEN) {
466 dev_err(&alg_data->adapter.dev,
467 "%s: 10 bits addr not supported!\n",
468 alg_data->adapter.name);
473 alg_data->mif.buf = pmsg->buf;
474 alg_data->mif.len = pmsg->len;
475 alg_data->mif.mode = (pmsg->flags & I2C_M_RD) ?
476 I2C_SMBUS_READ : I2C_SMBUS_WRITE;
477 alg_data->mif.ret = 0;
478 alg_data->last = (i == num - 1);
480 dev_dbg(&alg_data->adapter.dev, "%s(): mode %d, %d bytes\n",
481 __func__, alg_data->mif.mode, alg_data->mif.len);
483 i2c_pnx_arm_timer(alg_data);
485 /* initialize the completion var */
486 init_completion(&alg_data->mif.complete);
488 /* Enable master interrupt */
489 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_afie |
490 mcntrl_naie | mcntrl_drmie,
491 I2C_REG_CTL(alg_data));
493 /* Put start-code and slave-address on the bus. */
494 rc = i2c_pnx_start(addr, alg_data);
498 /* Wait for completion */
499 wait_for_completion(&alg_data->mif.complete);
501 if (!(rc = alg_data->mif.ret))
503 dev_dbg(&alg_data->adapter.dev,
504 "%s(): Complete, return code = %d.\n",
507 /* Clear TDI and AFI bits in case they are set. */
508 if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_tdi) {
509 dev_dbg(&alg_data->adapter.dev,
510 "%s: TDI still set... clearing now.\n",
511 alg_data->adapter.name);
512 iowrite32(stat, I2C_REG_STS(alg_data));
514 if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_afi) {
515 dev_dbg(&alg_data->adapter.dev,
516 "%s: AFI still set... clearing now.\n",
517 alg_data->adapter.name);
518 iowrite32(stat, I2C_REG_STS(alg_data));
522 bus_reset_if_active(alg_data);
524 /* Cleanup to be sure... */
525 alg_data->mif.buf = NULL;
526 alg_data->mif.len = 0;
528 dev_dbg(&alg_data->adapter.dev, "%s(): exiting, stat = %x\n",
529 __func__, ioread32(I2C_REG_STS(alg_data)));
531 if (completed != num)
532 return ((rc < 0) ? rc : -EREMOTEIO);
537 static u32 i2c_pnx_func(struct i2c_adapter *adapter)
539 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
542 static struct i2c_algorithm pnx_algorithm = {
543 .master_xfer = i2c_pnx_xfer,
544 .functionality = i2c_pnx_func,
548 static int i2c_pnx_controller_suspend(struct platform_device *pdev,
551 struct i2c_pnx_algo_data *alg_data = platform_get_drvdata(pdev);
553 /* FIXME: shouldn't this be clk_disable? */
554 clk_enable(alg_data->clk);
559 static int i2c_pnx_controller_resume(struct platform_device *pdev)
561 struct i2c_pnx_algo_data *alg_data = platform_get_drvdata(pdev);
563 return clk_enable(alg_data->clk);
566 #define i2c_pnx_controller_suspend NULL
567 #define i2c_pnx_controller_resume NULL
570 static int __devinit i2c_pnx_probe(struct platform_device *pdev)
574 struct i2c_pnx_algo_data *alg_data;
576 struct i2c_pnx_data *i2c_pnx = pdev->dev.platform_data;
578 if (!i2c_pnx || !i2c_pnx->name) {
579 dev_err(&pdev->dev, "%s: no platform data supplied\n",
585 alg_data = kzalloc(sizeof(*alg_data), GFP_KERNEL);
591 platform_set_drvdata(pdev, alg_data);
593 strlcpy(alg_data->adapter.name, i2c_pnx->name,
594 sizeof(alg_data->adapter.name));
595 alg_data->adapter.dev.parent = &pdev->dev;
596 alg_data->adapter.algo = &pnx_algorithm;
597 alg_data->adapter.algo_data = alg_data;
598 alg_data->adapter.nr = pdev->id;
599 alg_data->i2c_pnx = i2c_pnx;
601 alg_data->clk = clk_get(&pdev->dev, NULL);
602 if (IS_ERR(alg_data->clk)) {
603 ret = PTR_ERR(alg_data->clk);
607 init_timer(&alg_data->mif.timer);
608 alg_data->mif.timer.function = i2c_pnx_timeout;
609 alg_data->mif.timer.data = (unsigned long)alg_data;
611 /* Register I/O resource */
612 if (!request_mem_region(i2c_pnx->base, I2C_PNX_REGION_SIZE,
615 "I/O region 0x%08x for I2C already in use.\n",
621 alg_data->ioaddr = ioremap(i2c_pnx->base, I2C_PNX_REGION_SIZE);
622 if (!alg_data->ioaddr) {
623 dev_err(&pdev->dev, "Couldn't ioremap I2C I/O region\n");
628 ret = clk_enable(alg_data->clk);
632 freq = clk_get_rate(alg_data->clk);
635 * Clock Divisor High This value is the number of system clocks
636 * the serial clock (SCL) will be high.
637 * For example, if the system clock period is 50 ns and the maximum
638 * desired serial period is 10000 ns (100 kHz), then CLKHI would be
639 * set to 0.5*(f_sys/f_i2c)-2=0.5*(20e6/100e3)-2=98. The actual value
640 * programmed into CLKHI will vary from this slightly due to
641 * variations in the output pad's rise and fall times as well as
642 * the deglitching filter length.
645 tmp = ((freq / 1000) / I2C_PNX_SPEED_KHZ) / 2 - 2;
646 iowrite32(tmp, I2C_REG_CKH(alg_data));
647 iowrite32(tmp, I2C_REG_CKL(alg_data));
649 iowrite32(mcntrl_reset, I2C_REG_CTL(alg_data));
650 if (wait_reset(I2C_PNX_TIMEOUT, alg_data)) {
654 init_completion(&alg_data->mif.complete);
656 ret = request_irq(i2c_pnx->irq, i2c_pnx_interrupt,
657 0, pdev->name, alg_data);
661 /* Register this adapter with the I2C subsystem */
662 ret = i2c_add_numbered_adapter(&alg_data->adapter);
664 dev_err(&pdev->dev, "I2C: Failed to add bus\n");
668 dev_dbg(&pdev->dev, "%s: Master at %#8x, irq %d.\n",
669 alg_data->adapter.name, i2c_pnx->base, i2c_pnx->irq);
674 free_irq(i2c_pnx->irq, alg_data);
676 clk_disable(alg_data->clk);
678 iounmap(alg_data->ioaddr);
680 release_mem_region(i2c_pnx->base, I2C_PNX_REGION_SIZE);
682 clk_put(alg_data->clk);
686 platform_set_drvdata(pdev, NULL);
691 static int __devexit i2c_pnx_remove(struct platform_device *pdev)
693 struct i2c_pnx_algo_data *alg_data = platform_get_drvdata(pdev);
694 struct i2c_pnx_data *i2c_pnx = alg_data->i2c_pnx;
696 free_irq(i2c_pnx->irq, alg_data);
697 i2c_del_adapter(&alg_data->adapter);
698 clk_disable(alg_data->clk);
699 iounmap(alg_data->ioaddr);
700 release_mem_region(i2c_pnx->base, I2C_PNX_REGION_SIZE);
701 clk_put(alg_data->clk);
703 platform_set_drvdata(pdev, NULL);
708 static struct platform_driver i2c_pnx_driver = {
711 .owner = THIS_MODULE,
713 .probe = i2c_pnx_probe,
714 .remove = __devexit_p(i2c_pnx_remove),
715 .suspend = i2c_pnx_controller_suspend,
716 .resume = i2c_pnx_controller_resume,
719 static int __init i2c_adap_pnx_init(void)
721 return platform_driver_register(&i2c_pnx_driver);
724 static void __exit i2c_adap_pnx_exit(void)
726 platform_driver_unregister(&i2c_pnx_driver);
729 MODULE_AUTHOR("Vitaly Wool, Dennis Kovalev <source@mvista.com>");
730 MODULE_DESCRIPTION("I2C driver for Philips IP3204-based I2C busses");
731 MODULE_LICENSE("GPL");
732 MODULE_ALIAS("platform:pnx-i2c");
734 /* We need to make sure I2C is initialized before USB */
735 subsys_initcall(i2c_adap_pnx_init);
736 module_exit(i2c_adap_pnx_exit);