drivers/hwmon/w83627hf.c

   1 /*
   2     w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware
   3                 monitoring
   4     Copyright (c) 1998 - 2003  Frodo Looijaard <frodol@dds.nl>,
   5     Philip Edelbrock <phil@netroedge.com>,
   6     and Mark Studebaker <mdsxyz123@yahoo.com>
   7     Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org>
   8
   9     This program is free software; you can redistribute it and/or modify
  10     it under the terms of the GNU General Public License as published by
  11     the Free Software Foundation; either version 2 of the License, or
  12     (at your option) any later version.
  13
  14     This program is distributed in the hope that it will be useful,
  15     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17     GNU General Public License for more details.
  18
  19     You should have received a copy of the GNU General Public License
  20     along with this program; if not, write to the Free Software
  21     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22 */
  23
  24 /*
  25     Supports following chips:
  26
  27     Chip        #vin    #fanin  #pwm    #temp   wchipid vendid  i2c     ISA
  28     w83627hf    9       3       2       3       0x20    0x5ca3  no      yes(LPC)
  29     w83627thf   7       3       3       3       0x90    0x5ca3  no      yes(LPC)
  30     w83637hf    7       3       3       3       0x80    0x5ca3  no      yes(LPC)
  31     w83697hf    8       2       2       2       0x60    0x5ca3  no      yes(LPC)
  32
  33     For other winbond chips, and for i2c support in the above chips,
  34     use w83781d.c.
  35
  36     Note: automatic ("cruise") fan control for 697, 637 & 627thf not
  37     supported yet.
  38 */
  39
  40 #include <linux/module.h>
  41 #include <linux/init.h>
  42 #include <linux/slab.h>
  43 #include <linux/jiffies.h>
  44 #include <linux/i2c.h>
  45 #include <linux/i2c-isa.h>
  46 #include <linux/hwmon.h>
  47 #include <linux/hwmon-vid.h>
  48 #include <linux/err.h>
  49 #include <asm/io.h>
  50 #include "lm75.h"
  51
  52 static u16 force_addr;
  53 module_param(force_addr, ushort, 0);
  54 MODULE_PARM_DESC(force_addr,
  55                  "Initialize the base address of the sensors");
  56 static u8 force_i2c = 0x1f;
  57 module_param(force_i2c, byte, 0);
  58 MODULE_PARM_DESC(force_i2c,
  59                  "Initialize the i2c address of the sensors");
  60
  61 /* The actual ISA address is read from Super-I/O configuration space */
  62 static unsigned short address;
  63
  64 /* Insmod parameters */
  65 enum chips { any_chip, w83627hf, w83627thf, w83697hf, w83637hf };
  66
  67 static int reset;
  68 module_param(reset, bool, 0);
  69 MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
  70
  71 static int init = 1;
  72 module_param(init, bool, 0);
  73 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
  74
  75 /* modified from kernel/include/traps.c */
  76 static int REG;         /* The register to read/write */
  77 #define DEV     0x07    /* Register: Logical device select */
  78 static int VAL;         /* The value to read/write */
  79
  80 /* logical device numbers for superio_select (below) */
  81 #define W83627HF_LD_FDC         0x00
  82 #define W83627HF_LD_PRT         0x01
  83 #define W83627HF_LD_UART1       0x02
  84 #define W83627HF_LD_UART2       0x03
  85 #define W83627HF_LD_KBC         0x05
  86 #define W83627HF_LD_CIR         0x06 /* w83627hf only */
  87 #define W83627HF_LD_GAME        0x07
  88 #define W83627HF_LD_MIDI        0x07
  89 #define W83627HF_LD_GPIO1       0x07
  90 #define W83627HF_LD_GPIO5       0x07 /* w83627thf only */
  91 #define W83627HF_LD_GPIO2       0x08
  92 #define W83627HF_LD_GPIO3       0x09
  93 #define W83627HF_LD_GPIO4       0x09 /* w83627thf only */
  94 #define W83627HF_LD_ACPI        0x0a
  95 #define W83627HF_LD_HWM         0x0b
  96
  97 #define DEVID   0x20    /* Register: Device ID */
  98
  99 #define W83627THF_GPIO5_EN      0x30 /* w83627thf only */
 100 #define W83627THF_GPIO5_IOSR    0xf3 /* w83627thf only */
 101 #define W83627THF_GPIO5_DR      0xf4 /* w83627thf only */
 102
 103 static inline void
 104 superio_outb(int reg, int val)
 105 {
 106         outb(reg, REG);
 107         outb(val, VAL);
 108 }
 109
 110 static inline int
 111 superio_inb(int reg)
 112 {
 113         outb(reg, REG);
 114         return inb(VAL);
 115 }
 116
 117 static inline void
 118 superio_select(int ld)
 119 {
 120         outb(DEV, REG);
 121         outb(ld, VAL);
 122 }
 123
 124 static inline void
 125 superio_enter(void)
 126 {
 127         outb(0x87, REG);
 128         outb(0x87, REG);
 129 }
 130
 131 static inline void
 132 superio_exit(void)
 133 {
 134         outb(0xAA, REG);
 135 }
 136
 137 #define W627_DEVID 0x52
 138 #define W627THF_DEVID 0x82
 139 #define W697_DEVID 0x60
 140 #define W637_DEVID 0x70
 141 #define WINB_ACT_REG 0x30
 142 #define WINB_BASE_REG 0x60
 143 /* Constants specified below */
 144
 145 /* Alignment of the base address */
 146 #define WINB_ALIGNMENT          ~7
 147
 148 /* Offset & size of I/O region we are interested in */
 149 #define WINB_REGION_OFFSET      5
 150 #define WINB_REGION_SIZE        2
 151
 152 /* Where are the sensors address/data registers relative to the base address */
 153 #define W83781D_ADDR_REG_OFFSET 5
 154 #define W83781D_DATA_REG_OFFSET 6
 155
 156 /* The W83781D registers */
 157 /* The W83782D registers for nr=7,8 are in bank 5 */
 158 #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
 159                                            (0x554 + (((nr) - 7) * 2)))
 160 #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
 161                                            (0x555 + (((nr) - 7) * 2)))
 162 #define W83781D_REG_IN(nr)     ((nr < 7) ? (0x20 + (nr)) : \
 163                                            (0x550 + (nr) - 7))
 164
 165 #define W83781D_REG_FAN_MIN(nr) (0x3a + (nr))
 166 #define W83781D_REG_FAN(nr) (0x27 + (nr))
 167
 168 #define W83781D_REG_TEMP2_CONFIG 0x152
 169 #define W83781D_REG_TEMP3_CONFIG 0x252
 170 #define W83781D_REG_TEMP(nr)            ((nr == 3) ? (0x0250) : \
 171                                         ((nr == 2) ? (0x0150) : \
 172                                                      (0x27)))
 173 #define W83781D_REG_TEMP_HYST(nr)       ((nr == 3) ? (0x253) : \
 174                                         ((nr == 2) ? (0x153) : \
 175                                                      (0x3A)))
 176 #define W83781D_REG_TEMP_OVER(nr)       ((nr == 3) ? (0x255) : \
 177                                         ((nr == 2) ? (0x155) : \
 178                                                      (0x39)))
 179
 180 #define W83781D_REG_BANK 0x4E
 181
 182 #define W83781D_REG_CONFIG 0x40
 183 #define W83781D_REG_ALARM1 0x459
 184 #define W83781D_REG_ALARM2 0x45A
 185 #define W83781D_REG_ALARM3 0x45B
 186
 187 #define W83781D_REG_BEEP_CONFIG 0x4D
 188 #define W83781D_REG_BEEP_INTS1 0x56
 189 #define W83781D_REG_BEEP_INTS2 0x57
 190 #define W83781D_REG_BEEP_INTS3 0x453
 191
 192 #define W83781D_REG_VID_FANDIV 0x47
 193
 194 #define W83781D_REG_CHIPID 0x49
 195 #define W83781D_REG_WCHIPID 0x58
 196 #define W83781D_REG_CHIPMAN 0x4F
 197 #define W83781D_REG_PIN 0x4B
 198
 199 #define W83781D_REG_VBAT 0x5D
 200
 201 #define W83627HF_REG_PWM1 0x5A
 202 #define W83627HF_REG_PWM2 0x5B
 203
 204 #define W83627THF_REG_PWM1              0x01    /* 697HF and 637HF too */
 205 #define W83627THF_REG_PWM2              0x03    /* 697HF and 637HF too */
 206 #define W83627THF_REG_PWM3              0x11    /* 637HF too */
 207
 208 #define W83627THF_REG_VRM_OVT_CFG       0x18    /* 637HF too */
 209
 210 static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 };
 211 static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2,
 212                              W83627THF_REG_PWM3 };
 213 #define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \
 214                                      regpwm_627hf[(nr) - 1] : regpwm[(nr) - 1])
 215
 216 #define W83781D_REG_I2C_ADDR 0x48
 217 #define W83781D_REG_I2C_SUBADDR 0x4A
 218
 219 /* Sensor selection */
 220 #define W83781D_REG_SCFG1 0x5D
 221 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
 222 #define W83781D_REG_SCFG2 0x59
 223 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
 224 #define W83781D_DEFAULT_BETA 3435
 225
 226 /* Conversions. Limit checking is only done on the TO_REG
 227    variants. Note that you should be a bit careful with which arguments
 228    these macros are called: arguments may be evaluated more than once.
 229    Fixing this is just not worth it. */
 230 #define IN_TO_REG(val)  (SENSORS_LIMIT((((val) + 8)/16),0,255))
 231 #define IN_FROM_REG(val) ((val) * 16)
 232
 233 static inline u8 FAN_TO_REG(long rpm, int div)
 234 {
 235         if (rpm == 0)
 236                 return 255;
 237         rpm = SENSORS_LIMIT(rpm, 1, 1000000);
 238         return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
 239                              254);
 240 }
 241
 242 #define TEMP_MIN (-128000)
 243 #define TEMP_MAX ( 127000)
 244
 245 /* TEMP: 0.001C/bit (-128C to +127C)
 246    REG: 1C/bit, two's complement */
 247 static u8 TEMP_TO_REG(int temp)
 248 {
 249         int ntemp = SENSORS_LIMIT(temp, TEMP_MIN, TEMP_MAX);
 250         ntemp += (ntemp<0 ? -500 : 500);
 251         return (u8)(ntemp / 1000);
 252 }
 253
 254 static int TEMP_FROM_REG(u8 reg)
 255 {
 256         return (s8)reg * 1000;
 257 }
 258
 259 #define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
 260
 261 #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
 262
 263 #define BEEP_MASK_FROM_REG(val)          (val)
 264 #define BEEP_MASK_TO_REG(val)           ((val) & 0xffffff)
 265 #define BEEP_ENABLE_TO_REG(val)         ((val)?1:0)
 266 #define BEEP_ENABLE_FROM_REG(val)       ((val)?1:0)
 267
 268 #define DIV_FROM_REG(val) (1 << (val))
 269
 270 static inline u8 DIV_TO_REG(long val)
 271 {
 272         int i;
 273         val = SENSORS_LIMIT(val, 1, 128) >> 1;
 274         for (i = 0; i < 7; i++) {
 275                 if (val == 0)
 276                         break;
 277                 val >>= 1;
 278         }
 279         return ((u8) i);
 280 }
 281
 282 /* For each registered chip, we need to keep some data in memory. That
 283    data is pointed to by w83627hf_list[NR]->data. The structure itself is
 284    dynamically allocated, at the same time when a new client is allocated. */
 285 struct w83627hf_data {
 286         struct i2c_client client;
 287         struct class_device *class_dev;
 288         struct semaphore lock;
 289         enum chips type;
 290
 291         struct semaphore update_lock;
 292         char valid;             /* !=0 if following fields are valid */
 293         unsigned long last_updated;     /* In jiffies */
 294
 295         struct i2c_client *lm75;        /* for secondary I2C addresses */
 296         /* pointer to array of 2 subclients */
 297
 298         u8 in[9];               /* Register value */
 299         u8 in_max[9];           /* Register value */
 300         u8 in_min[9];           /* Register value */
 301         u8 fan[3];              /* Register value */
 302         u8 fan_min[3];          /* Register value */
 303         u8 temp;
 304         u8 temp_max;            /* Register value */
 305         u8 temp_max_hyst;       /* Register value */
 306         u16 temp_add[2];        /* Register value */
 307         u16 temp_max_add[2];    /* Register value */
 308         u16 temp_max_hyst_add[2]; /* Register value */
 309         u8 fan_div[3];          /* Register encoding, shifted right */
 310         u8 vid;                 /* Register encoding, combined */
 311         u32 alarms;             /* Register encoding, combined */
 312         u32 beep_mask;          /* Register encoding, combined */
 313         u8 beep_enable;         /* Boolean */
 314         u8 pwm[3];              /* Register value */
 315         u16 sens[3];            /* 782D/783S only.
 316                                    1 = pentium diode; 2 = 3904 diode;
 317                                    3000-5000 = thermistor beta.
 318                                    Default = 3435.
 319                                    Other Betas unimplemented */
 320         u8 vrm;
 321         u8 vrm_ovt;             /* Register value, 627thf & 637hf only */
 322 };
 323
 324
 325 static int w83627hf_detect(struct i2c_adapter *adapter);
 326 static int w83627hf_detach_client(struct i2c_client *client);
 327
 328 static int w83627hf_read_value(struct i2c_client *client, u16 register);
 329 static int w83627hf_write_value(struct i2c_client *client, u16 register,
 330                                u16 value);
 331 static struct w83627hf_data *w83627hf_update_device(struct device *dev);
 332 static void w83627hf_init_client(struct i2c_client *client);
 333
 334 static struct i2c_driver w83627hf_driver = {
 335         .driver = {
 336                 .name   = "w83627hf",
 337         },
 338         .attach_adapter = w83627hf_detect,
 339         .detach_client  = w83627hf_detach_client,
 340 };
 341
 342 /* following are the sysfs callback functions */
 343 #define show_in_reg(reg) \
 344 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
 345 { \
 346         struct w83627hf_data *data = w83627hf_update_device(dev); \
 347         return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr])); \
 348 }
 349 show_in_reg(in)
 350 show_in_reg(in_min)
 351 show_in_reg(in_max)
 352
 353 #define store_in_reg(REG, reg) \
 354 static ssize_t \
 355 store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \
 356 { \
 357         struct i2c_client *client = to_i2c_client(dev); \
 358         struct w83627hf_data *data = i2c_get_clientdata(client); \
 359         u32 val; \
 360          \
 361         val = simple_strtoul(buf, NULL, 10); \
 362          \
 363         down(&data->update_lock); \
 364         data->in_##reg[nr] = IN_TO_REG(val); \
 365         w83627hf_write_value(client, W83781D_REG_IN_##REG(nr), \
 366                             data->in_##reg[nr]); \
 367          \
 368         up(&data->update_lock); \
 369         return count; \
 370 }
 371 store_in_reg(MIN, min)
 372 store_in_reg(MAX, max)
 373
 374 #define sysfs_in_offset(offset) \
 375 static ssize_t \
 376 show_regs_in_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 377 { \
 378         return show_in(dev, buf, offset); \
 379 } \
 380 static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL);
 381
 382 #define sysfs_in_reg_offset(reg, offset) \
 383 static ssize_t show_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 384 { \
 385         return show_in_##reg (dev, buf, offset); \
 386 } \
 387 static ssize_t \
 388 store_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, \
 389                             const char *buf, size_t count) \
 390 { \
 391         return store_in_##reg (dev, buf, count, offset); \
 392 } \
 393 static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, \
 394                   show_regs_in_##reg##offset, store_regs_in_##reg##offset);
 395
 396 #define sysfs_in_offsets(offset) \
 397 sysfs_in_offset(offset) \
 398 sysfs_in_reg_offset(min, offset) \
 399 sysfs_in_reg_offset(max, offset)
 400
 401 sysfs_in_offsets(1);
 402 sysfs_in_offsets(2);
 403 sysfs_in_offsets(3);
 404 sysfs_in_offsets(4);
 405 sysfs_in_offsets(5);
 406 sysfs_in_offsets(6);
 407 sysfs_in_offsets(7);
 408 sysfs_in_offsets(8);
 409
 410 /* use a different set of functions for in0 */
 411 static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg)
 412 {
 413         long in0;
 414
 415         if ((data->vrm_ovt & 0x01) &&
 416                 (w83627thf == data->type || w83637hf == data->type))
 417
 418                 /* use VRM9 calculation */
 419                 in0 = (long)((reg * 488 + 70000 + 50) / 100);
 420         else
 421                 /* use VRM8 (standard) calculation */
 422                 in0 = (long)IN_FROM_REG(reg);
 423
 424         return sprintf(buf,"%ld\n", in0);
 425 }
 426
 427 static ssize_t show_regs_in_0(struct device *dev, struct device_attribute *attr, char *buf)
 428 {
 429         struct w83627hf_data *data = w83627hf_update_device(dev);
 430         return show_in_0(data, buf, data->in[0]);
 431 }
 432
 433 static ssize_t show_regs_in_min0(struct device *dev, struct device_attribute *attr, char *buf)
 434 {
 435         struct w83627hf_data *data = w83627hf_update_device(dev);
 436         return show_in_0(data, buf, data->in_min[0]);
 437 }
 438
 439 static ssize_t show_regs_in_max0(struct device *dev, struct device_attribute *attr, char *buf)
 440 {
 441         struct w83627hf_data *data = w83627hf_update_device(dev);
 442         return show_in_0(data, buf, data->in_max[0]);
 443 }
 444
 445 static ssize_t store_regs_in_min0(struct device *dev, struct device_attribute *attr,
 446         const char *buf, size_t count)
 447 {
 448         struct i2c_client *client = to_i2c_client(dev);
 449         struct w83627hf_data *data = i2c_get_clientdata(client);
 450         u32 val;
 451
 452         val = simple_strtoul(buf, NULL, 10);
 453
 454         down(&data->update_lock);
 455
 456         if ((data->vrm_ovt & 0x01) &&
 457                 (w83627thf == data->type || w83637hf == data->type))
 458
 459                 /* use VRM9 calculation */
 460                 data->in_min[0] =
 461                         SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0,
 462                                         255);
 463         else
 464                 /* use VRM8 (standard) calculation */
 465                 data->in_min[0] = IN_TO_REG(val);
 466
 467         w83627hf_write_value(client, W83781D_REG_IN_MIN(0), data->in_min[0]);
 468         up(&data->update_lock);
 469         return count;
 470 }
 471
 472 static ssize_t store_regs_in_max0(struct device *dev, struct device_attribute *attr,
 473         const char *buf, size_t count)
 474 {
 475         struct i2c_client *client = to_i2c_client(dev);
 476         struct w83627hf_data *data = i2c_get_clientdata(client);
 477         u32 val;
 478
 479         val = simple_strtoul(buf, NULL, 10);
 480
 481         down(&data->update_lock);
 482
 483         if ((data->vrm_ovt & 0x01) &&
 484                 (w83627thf == data->type || w83637hf == data->type))
 485
 486                 /* use VRM9 calculation */
 487                 data->in_max[0] =
 488                         SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0,
 489                                         255);
 490         else
 491                 /* use VRM8 (standard) calculation */
 492                 data->in_max[0] = IN_TO_REG(val);
 493
 494         w83627hf_write_value(client, W83781D_REG_IN_MAX(0), data->in_max[0]);
 495         up(&data->update_lock);
 496         return count;
 497 }
 498
 499 static DEVICE_ATTR(in0_input, S_IRUGO, show_regs_in_0, NULL);
 500 static DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR,
 501         show_regs_in_min0, store_regs_in_min0);
 502 static DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR,
 503         show_regs_in_max0, store_regs_in_max0);
 504
 505 #define device_create_file_in(client, offset) \
 506 do { \
 507 device_create_file(&client->dev, &dev_attr_in##offset##_input); \
 508 device_create_file(&client->dev, &dev_attr_in##offset##_min); \
 509 device_create_file(&client->dev, &dev_attr_in##offset##_max); \
 510 } while (0)
 511
 512 #define show_fan_reg(reg) \
 513 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
 514 { \
 515         struct w83627hf_data *data = w83627hf_update_device(dev); \
 516         return sprintf(buf,"%ld\n", \
 517                 FAN_FROM_REG(data->reg[nr-1], \
 518                             (long)DIV_FROM_REG(data->fan_div[nr-1]))); \
 519 }
 520 show_fan_reg(fan);
 521 show_fan_reg(fan_min);
 522
 523 static ssize_t
 524 store_fan_min(struct device *dev, const char *buf, size_t count, int nr)
 525 {
 526         struct i2c_client *client = to_i2c_client(dev);
 527         struct w83627hf_data *data = i2c_get_clientdata(client);
 528         u32 val;
 529
 530         val = simple_strtoul(buf, NULL, 10);
 531
 532         down(&data->update_lock);
 533         data->fan_min[nr - 1] =
 534             FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1]));
 535         w83627hf_write_value(client, W83781D_REG_FAN_MIN(nr),
 536                             data->fan_min[nr - 1]);
 537
 538         up(&data->update_lock);
 539         return count;
 540 }
 541
 542 #define sysfs_fan_offset(offset) \
 543 static ssize_t show_regs_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 544 { \
 545         return show_fan(dev, buf, offset); \
 546 } \
 547 static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL);
 548
 549 #define sysfs_fan_min_offset(offset) \
 550 static ssize_t show_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 551 { \
 552         return show_fan_min(dev, buf, offset); \
 553 } \
 554 static ssize_t \
 555 store_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 556 { \
 557         return store_fan_min(dev, buf, count, offset); \
 558 } \
 559 static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
 560                   show_regs_fan_min##offset, store_regs_fan_min##offset);
 561
 562 sysfs_fan_offset(1);
 563 sysfs_fan_min_offset(1);
 564 sysfs_fan_offset(2);
 565 sysfs_fan_min_offset(2);
 566 sysfs_fan_offset(3);
 567 sysfs_fan_min_offset(3);
 568
 569 #define device_create_file_fan(client, offset) \
 570 do { \
 571 device_create_file(&client->dev, &dev_attr_fan##offset##_input); \
 572 device_create_file(&client->dev, &dev_attr_fan##offset##_min); \
 573 } while (0)
 574
 575 #define show_temp_reg(reg) \
 576 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
 577 { \
 578         struct w83627hf_data *data = w83627hf_update_device(dev); \
 579         if (nr >= 2) {  /* TEMP2 and TEMP3 */ \
 580                 return sprintf(buf,"%ld\n", \
 581                         (long)LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
 582         } else {        /* TEMP1 */ \
 583                 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
 584         } \
 585 }
 586 show_temp_reg(temp);
 587 show_temp_reg(temp_max);
 588 show_temp_reg(temp_max_hyst);
 589
 590 #define store_temp_reg(REG, reg) \
 591 static ssize_t \
 592 store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \
 593 { \
 594         struct i2c_client *client = to_i2c_client(dev); \
 595         struct w83627hf_data *data = i2c_get_clientdata(client); \
 596         u32 val; \
 597          \
 598         val = simple_strtoul(buf, NULL, 10); \
 599          \
 600         down(&data->update_lock); \
 601          \
 602         if (nr >= 2) {  /* TEMP2 and TEMP3 */ \
 603                 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
 604                 w83627hf_write_value(client, W83781D_REG_TEMP_##REG(nr), \
 605                                 data->temp_##reg##_add[nr-2]); \
 606         } else {        /* TEMP1 */ \
 607                 data->temp_##reg = TEMP_TO_REG(val); \
 608                 w83627hf_write_value(client, W83781D_REG_TEMP_##REG(nr), \
 609                         data->temp_##reg); \
 610         } \
 611          \
 612         up(&data->update_lock); \
 613         return count; \
 614 }
 615 store_temp_reg(OVER, max);
 616 store_temp_reg(HYST, max_hyst);
 617
 618 #define sysfs_temp_offset(offset) \
 619 static ssize_t \
 620 show_regs_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 621 { \
 622         return show_temp(dev, buf, offset); \
 623 } \
 624 static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL);
 625
 626 #define sysfs_temp_reg_offset(reg, offset) \
 627 static ssize_t show_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 628 { \
 629         return show_temp_##reg (dev, buf, offset); \
 630 } \
 631 static ssize_t \
 632 store_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, \
 633                               const char *buf, size_t count) \
 634 { \
 635         return store_temp_##reg (dev, buf, count, offset); \
 636 } \
 637 static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, \
 638                   show_regs_temp_##reg##offset, store_regs_temp_##reg##offset);
 639
 640 #define sysfs_temp_offsets(offset) \
 641 sysfs_temp_offset(offset) \
 642 sysfs_temp_reg_offset(max, offset) \
 643 sysfs_temp_reg_offset(max_hyst, offset)
 644
 645 sysfs_temp_offsets(1);
 646 sysfs_temp_offsets(2);
 647 sysfs_temp_offsets(3);
 648
 649 #define device_create_file_temp(client, offset) \
 650 do { \
 651 device_create_file(&client->dev, &dev_attr_temp##offset##_input); \
 652 device_create_file(&client->dev, &dev_attr_temp##offset##_max); \
 653 device_create_file(&client->dev, &dev_attr_temp##offset##_max_hyst); \
 654 } while (0)
 655
 656 static ssize_t
 657 show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
 658 {
 659         struct w83627hf_data *data = w83627hf_update_device(dev);
 660         return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
 661 }
 662 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
 663 #define device_create_file_vid(client) \
 664 device_create_file(&client->dev, &dev_attr_cpu0_vid)
 665
 666 static ssize_t
 667 show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
 668 {
 669         struct w83627hf_data *data = w83627hf_update_device(dev);
 670         return sprintf(buf, "%ld\n", (long) data->vrm);
 671 }
 672 static ssize_t
 673 store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
 674 {
 675         struct i2c_client *client = to_i2c_client(dev);
 676         struct w83627hf_data *data = i2c_get_clientdata(client);
 677         u32 val;
 678
 679         val = simple_strtoul(buf, NULL, 10);
 680         data->vrm = val;
 681
 682         return count;
 683 }
 684 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
 685 #define device_create_file_vrm(client) \
 686 device_create_file(&client->dev, &dev_attr_vrm)
 687
 688 static ssize_t
 689 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
 690 {
 691         struct w83627hf_data *data = w83627hf_update_device(dev);
 692         return sprintf(buf, "%ld\n", (long) data->alarms);
 693 }
 694 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
 695 #define device_create_file_alarms(client) \
 696 device_create_file(&client->dev, &dev_attr_alarms)
 697
 698 #define show_beep_reg(REG, reg) \
 699 static ssize_t show_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
 700 { \
 701         struct w83627hf_data *data = w83627hf_update_device(dev); \
 702         return sprintf(buf,"%ld\n", \
 703                       (long)BEEP_##REG##_FROM_REG(data->beep_##reg)); \
 704 }
 705 show_beep_reg(ENABLE, enable)
 706 show_beep_reg(MASK, mask)
 707
 708 #define BEEP_ENABLE                     0       /* Store beep_enable */
 709 #define BEEP_MASK                       1       /* Store beep_mask */
 710
 711 static ssize_t
 712 store_beep_reg(struct device *dev, const char *buf, size_t count,
 713                int update_mask)
 714 {
 715         struct i2c_client *client = to_i2c_client(dev);
 716         struct w83627hf_data *data = i2c_get_clientdata(client);
 717         u32 val, val2;
 718
 719         val = simple_strtoul(buf, NULL, 10);
 720
 721         down(&data->update_lock);
 722
 723         if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
 724                 data->beep_mask = BEEP_MASK_TO_REG(val);
 725                 w83627hf_write_value(client, W83781D_REG_BEEP_INTS1,
 726                                     data->beep_mask & 0xff);
 727                 w83627hf_write_value(client, W83781D_REG_BEEP_INTS3,
 728                                     ((data->beep_mask) >> 16) & 0xff);
 729                 val2 = (data->beep_mask >> 8) & 0x7f;
 730         } else {                /* We are storing beep_enable */
 731                 val2 =
 732                     w83627hf_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f;
 733                 data->beep_enable = BEEP_ENABLE_TO_REG(val);
 734         }
 735
 736         w83627hf_write_value(client, W83781D_REG_BEEP_INTS2,
 737                             val2 | data->beep_enable << 7);
 738
 739         up(&data->update_lock);
 740         return count;
 741 }
 742
 743 #define sysfs_beep(REG, reg) \
 744 static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
 745 { \
 746         return show_beep_##reg(dev, attr, buf); \
 747 } \
 748 static ssize_t \
 749 store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 750 { \
 751         return store_beep_reg(dev, buf, count, BEEP_##REG); \
 752 } \
 753 static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, \
 754                   show_regs_beep_##reg, store_regs_beep_##reg);
 755
 756 sysfs_beep(ENABLE, enable);
 757 sysfs_beep(MASK, mask);
 758
 759 #define device_create_file_beep(client) \
 760 do { \
 761 device_create_file(&client->dev, &dev_attr_beep_enable); \
 762 device_create_file(&client->dev, &dev_attr_beep_mask); \
 763 } while (0)
 764
 765 static ssize_t
 766 show_fan_div_reg(struct device *dev, char *buf, int nr)
 767 {
 768         struct w83627hf_data *data = w83627hf_update_device(dev);
 769         return sprintf(buf, "%ld\n",
 770                        (long) DIV_FROM_REG(data->fan_div[nr - 1]));
 771 }
 772
 773 /* Note: we save and restore the fan minimum here, because its value is
 774    determined in part by the fan divisor.  This follows the principle of
 775    least suprise; the user doesn't expect the fan minimum to change just
 776    because the divisor changed. */
 777 static ssize_t
 778 store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr)
 779 {
 780         struct i2c_client *client = to_i2c_client(dev);
 781         struct w83627hf_data *data = i2c_get_clientdata(client);
 782         unsigned long min;
 783         u8 reg;
 784         unsigned long val = simple_strtoul(buf, NULL, 10);
 785
 786         down(&data->update_lock);
 787
 788         /* Save fan_min */
 789         min = FAN_FROM_REG(data->fan_min[nr],
 790                            DIV_FROM_REG(data->fan_div[nr]));
 791
 792         data->fan_div[nr] = DIV_TO_REG(val);
 793
 794         reg = (w83627hf_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
 795                & (nr==0 ? 0xcf : 0x3f))
 796             | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
 797         w83627hf_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
 798
 799         reg = (w83627hf_read_value(client, W83781D_REG_VBAT)
 800                & ~(1 << (5 + nr)))
 801             | ((data->fan_div[nr] & 0x04) << (3 + nr));
 802         w83627hf_write_value(client, W83781D_REG_VBAT, reg);
 803
 804         /* Restore fan_min */
 805         data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
 806         w83627hf_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]);
 807
 808         up(&data->update_lock);
 809         return count;
 810 }
 811
 812 #define sysfs_fan_div(offset) \
 813 static ssize_t show_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 814 { \
 815         return show_fan_div_reg(dev, buf, offset); \
 816 } \
 817 static ssize_t \
 818 store_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, \
 819                             const char *buf, size_t count) \
 820 { \
 821         return store_fan_div_reg(dev, buf, count, offset - 1); \
 822 } \
 823 static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
 824                   show_regs_fan_div_##offset, store_regs_fan_div_##offset);
 825
 826 sysfs_fan_div(1);
 827 sysfs_fan_div(2);
 828 sysfs_fan_div(3);
 829
 830 #define device_create_file_fan_div(client, offset) \
 831 do { \
 832 device_create_file(&client->dev, &dev_attr_fan##offset##_div); \
 833 } while (0)
 834
 835 static ssize_t
 836 show_pwm_reg(struct device *dev, char *buf, int nr)
 837 {
 838         struct w83627hf_data *data = w83627hf_update_device(dev);
 839         return sprintf(buf, "%ld\n", (long) data->pwm[nr - 1]);
 840 }
 841
 842 static ssize_t
 843 store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr)
 844 {
 845         struct i2c_client *client = to_i2c_client(dev);
 846         struct w83627hf_data *data = i2c_get_clientdata(client);
 847         u32 val;
 848
 849         val = simple_strtoul(buf, NULL, 10);
 850
 851         down(&data->update_lock);
 852
 853         if (data->type == w83627thf) {
 854                 /* bits 0-3 are reserved  in 627THF */
 855                 data->pwm[nr - 1] = PWM_TO_REG(val) & 0xf0;
 856                 w83627hf_write_value(client,
 857                                      W836X7HF_REG_PWM(data->type, nr),
 858                                      data->pwm[nr - 1] |
 859                                      (w83627hf_read_value(client,
 860                                      W836X7HF_REG_PWM(data->type, nr)) & 0x0f));
 861         } else {
 862                 data->pwm[nr - 1] = PWM_TO_REG(val);
 863                 w83627hf_write_value(client,
 864                                      W836X7HF_REG_PWM(data->type, nr),
 865                                      data->pwm[nr - 1]);
 866         }
 867
 868         up(&data->update_lock);
 869         return count;
 870 }
 871
 872 #define sysfs_pwm(offset) \
 873 static ssize_t show_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 874 { \
 875         return show_pwm_reg(dev, buf, offset); \
 876 } \
 877 static ssize_t \
 878 store_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 879 { \
 880         return store_pwm_reg(dev, buf, count, offset); \
 881 } \
 882 static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
 883                   show_regs_pwm_##offset, store_regs_pwm_##offset);
 884
 885 sysfs_pwm(1);
 886 sysfs_pwm(2);
 887 sysfs_pwm(3);
 888
 889 #define device_create_file_pwm(client, offset) \
 890 do { \
 891 device_create_file(&client->dev, &dev_attr_pwm##offset); \
 892 } while (0)
 893
 894 static ssize_t
 895 show_sensor_reg(struct device *dev, char *buf, int nr)
 896 {
 897         struct w83627hf_data *data = w83627hf_update_device(dev);
 898         return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]);
 899 }
 900
 901 static ssize_t
 902 store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr)
 903 {
 904         struct i2c_client *client = to_i2c_client(dev);
 905         struct w83627hf_data *data = i2c_get_clientdata(client);
 906         u32 val, tmp;
 907
 908         val = simple_strtoul(buf, NULL, 10);
 909
 910         down(&data->update_lock);
 911
 912         switch (val) {
 913         case 1:         /* PII/Celeron diode */
 914                 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
 915                 w83627hf_write_value(client, W83781D_REG_SCFG1,
 916                                     tmp | BIT_SCFG1[nr - 1]);
 917                 tmp = w83627hf_read_value(client, W83781D_REG_SCFG2);
 918                 w83627hf_write_value(client, W83781D_REG_SCFG2,
 919                                     tmp | BIT_SCFG2[nr - 1]);
 920                 data->sens[nr - 1] = val;
 921                 break;
 922         case 2:         /* 3904 */
 923                 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
 924                 w83627hf_write_value(client, W83781D_REG_SCFG1,
 925                                     tmp | BIT_SCFG1[nr - 1]);
 926                 tmp = w83627hf_read_value(client, W83781D_REG_SCFG2);
 927                 w83627hf_write_value(client, W83781D_REG_SCFG2,
 928                                     tmp & ~BIT_SCFG2[nr - 1]);
 929                 data->sens[nr - 1] = val;
 930                 break;
 931         case W83781D_DEFAULT_BETA:      /* thermistor */
 932                 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
 933                 w83627hf_write_value(client, W83781D_REG_SCFG1,
 934                                     tmp & ~BIT_SCFG1[nr - 1]);
 935                 data->sens[nr - 1] = val;
 936                 break;
 937         default:
 938                 dev_err(&client->dev,
 939                        "Invalid sensor type %ld; must be 1, 2, or %d\n",
 940                        (long) val, W83781D_DEFAULT_BETA);
 941                 break;
 942         }
 943
 944         up(&data->update_lock);
 945         return count;
 946 }
 947
 948 #define sysfs_sensor(offset) \
 949 static ssize_t show_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 950 { \
 951     return show_sensor_reg(dev, buf, offset); \
 952 } \
 953 static ssize_t \
 954 store_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 955 { \
 956     return store_sensor_reg(dev, buf, count, offset); \
 957 } \
 958 static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
 959                   show_regs_sensor_##offset, store_regs_sensor_##offset);
 960
 961 sysfs_sensor(1);
 962 sysfs_sensor(2);
 963 sysfs_sensor(3);
 964
 965 #define device_create_file_sensor(client, offset) \
 966 do { \
 967 device_create_file(&client->dev, &dev_attr_temp##offset##_type); \
 968 } while (0)
 969
 970
 971 static int __init w83627hf_find(int sioaddr, unsigned short *addr)
 972 {
 973         u16 val;
 974
 975         REG = sioaddr;
 976         VAL = sioaddr + 1;
 977
 978         superio_enter();
 979         val= superio_inb(DEVID);
 980         if(val != W627_DEVID &&
 981            val != W627THF_DEVID &&
 982            val != W697_DEVID &&
 983            val != W637_DEVID) {
 984                 superio_exit();
 985                 return -ENODEV;
 986         }
 987
 988         superio_select(W83627HF_LD_HWM);
 989         val = (superio_inb(WINB_BASE_REG) << 8) |
 990                superio_inb(WINB_BASE_REG + 1);
 991         *addr = val & WINB_ALIGNMENT;
 992         if (*addr == 0 && force_addr == 0) {
 993                 superio_exit();
 994                 return -ENODEV;
 995         }
 996
 997         superio_exit();
 998         return 0;
 999 }
1000
1001 static int w83627hf_detect(struct i2c_adapter *adapter)
1002 {
1003         int val, kind;
1004         struct i2c_client *new_client;
1005         struct w83627hf_data *data;
1006         int err = 0;
1007         const char *client_name = "";
1008
1009         if(force_addr)
1010                 address = force_addr & WINB_ALIGNMENT;
1011
1012         if (!request_region(address + WINB_REGION_OFFSET, WINB_REGION_SIZE,
1013                             w83627hf_driver.driver.name)) {
1014                 err = -EBUSY;
1015                 goto ERROR0;
1016         }
1017
1018         if(force_addr) {
1019                 printk("w83627hf.o: forcing ISA address 0x%04X\n", address);
1020                 superio_enter();
1021                 superio_select(W83627HF_LD_HWM);
1022                 superio_outb(WINB_BASE_REG, address >> 8);
1023                 superio_outb(WINB_BASE_REG+1, address & 0xff);
1024                 superio_exit();
1025         }
1026
1027         superio_enter();
1028         val= superio_inb(DEVID);
1029         if(val == W627_DEVID)
1030                 kind = w83627hf;
1031         else if(val == W697_DEVID)
1032                 kind = w83697hf;
1033         else if(val == W627THF_DEVID)
1034                 kind = w83627thf;
1035         else if(val == W637_DEVID)
1036                 kind = w83637hf;
1037         else {
1038                 dev_info(&adapter->dev,
1039                          "Unsupported chip (dev_id=0x%02X).\n", val);
1040                 goto ERROR1;
1041         }
1042
1043         superio_select(W83627HF_LD_HWM);
1044         if((val = 0x01 & superio_inb(WINB_ACT_REG)) == 0)
1045                 superio_outb(WINB_ACT_REG, 1);
1046         superio_exit();
1047
1048         /* OK. For now, we presume we have a valid client. We now create the
1049            client structure, even though we cannot fill it completely yet.
1050            But it allows us to access w83627hf_{read,write}_value. */
1051
1052         if (!(data = kzalloc(sizeof(struct w83627hf_data), GFP_KERNEL))) {
1053                 err = -ENOMEM;
1054                 goto ERROR1;
1055         }
1056
1057         new_client = &data->client;
1058         i2c_set_clientdata(new_client, data);
1059         new_client->addr = address;
1060         init_MUTEX(&data->lock);
1061         new_client->adapter = adapter;
1062         new_client->driver = &w83627hf_driver;
1063         new_client->flags = 0;
1064
1065
1066         if (kind == w83627hf) {
1067                 client_name = "w83627hf";
1068         } else if (kind == w83627thf) {
1069                 client_name = "w83627thf";
1070         } else if (kind == w83697hf) {
1071                 client_name = "w83697hf";
1072         } else if (kind == w83637hf) {
1073                 client_name = "w83637hf";
1074         }
1075
1076         /* Fill in the remaining client fields and put into the global list */
1077         strlcpy(new_client->name, client_name, I2C_NAME_SIZE);
1078         data->type = kind;
1079         data->valid = 0;
1080         init_MUTEX(&data->update_lock);
1081
1082         /* Tell the I2C layer a new client has arrived */
1083         if ((err = i2c_attach_client(new_client)))
1084                 goto ERROR2;
1085
1086         data->lm75 = NULL;
1087
1088         /* Initialize the chip */
1089         w83627hf_init_client(new_client);
1090
1091         /* A few vars need to be filled upon startup */
1092         data->fan_min[0] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(1));
1093         data->fan_min[1] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(2));
1094         data->fan_min[2] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(3));
1095
1096         /* Register sysfs hooks */
1097         data->class_dev = hwmon_device_register(&new_client->dev);
1098         if (IS_ERR(data->class_dev)) {
1099                 err = PTR_ERR(data->class_dev);
1100                 goto ERROR3;
1101         }
1102
1103         device_create_file_in(new_client, 0);
1104         if (kind != w83697hf)
1105                 device_create_file_in(new_client, 1);
1106         device_create_file_in(new_client, 2);
1107         device_create_file_in(new_client, 3);
1108         device_create_file_in(new_client, 4);
1109         if (kind != w83627thf && kind != w83637hf) {
1110                 device_create_file_in(new_client, 5);
1111                 device_create_file_in(new_client, 6);
1112         }
1113         device_create_file_in(new_client, 7);
1114         device_create_file_in(new_client, 8);
1115
1116         device_create_file_fan(new_client, 1);
1117         device_create_file_fan(new_client, 2);
1118         if (kind != w83697hf)
1119                 device_create_file_fan(new_client, 3);
1120
1121         device_create_file_temp(new_client, 1);
1122         device_create_file_temp(new_client, 2);
1123         if (kind != w83697hf)
1124                 device_create_file_temp(new_client, 3);
1125
1126         if (kind != w83697hf && data->vid != 0xff) {
1127                 device_create_file_vid(new_client);
1128                 device_create_file_vrm(new_client);
1129         }
1130
1131         device_create_file_fan_div(new_client, 1);
1132         device_create_file_fan_div(new_client, 2);
1133         if (kind != w83697hf)
1134                 device_create_file_fan_div(new_client, 3);
1135
1136         device_create_file_alarms(new_client);
1137
1138         device_create_file_beep(new_client);
1139
1140         device_create_file_pwm(new_client, 1);
1141         device_create_file_pwm(new_client, 2);
1142         if (kind == w83627thf || kind == w83637hf)
1143                 device_create_file_pwm(new_client, 3);
1144
1145         device_create_file_sensor(new_client, 1);
1146         device_create_file_sensor(new_client, 2);
1147         if (kind != w83697hf)
1148                 device_create_file_sensor(new_client, 3);
1149
1150         return 0;
1151
1152       ERROR3:
1153         i2c_detach_client(new_client);
1154       ERROR2:
1155         kfree(data);
1156       ERROR1:
1157         release_region(address + WINB_REGION_OFFSET, WINB_REGION_SIZE);
1158       ERROR0:
1159         return err;
1160 }
1161
1162 static int w83627hf_detach_client(struct i2c_client *client)
1163 {
1164         struct w83627hf_data *data = i2c_get_clientdata(client);
1165         int err;
1166
1167         hwmon_device_unregister(data->class_dev);
1168
1169         if ((err = i2c_detach_client(client)))
1170                 return err;
1171
1172         release_region(client->addr + WINB_REGION_OFFSET, WINB_REGION_SIZE);
1173         kfree(data);
1174
1175         return 0;
1176 }
1177
1178
1179 /*
1180    ISA access must always be locked explicitly!
1181    We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1182    would slow down the W83781D access and should not be necessary.
1183    There are some ugly typecasts here, but the good news is - they should
1184    nowhere else be necessary! */
1185 static int w83627hf_read_value(struct i2c_client *client, u16 reg)
1186 {
1187         struct w83627hf_data *data = i2c_get_clientdata(client);
1188         int res, word_sized;
1189
1190         down(&data->lock);
1191         word_sized = (((reg & 0xff00) == 0x100)
1192                    || ((reg & 0xff00) == 0x200))
1193                   && (((reg & 0x00ff) == 0x50)
1194                    || ((reg & 0x00ff) == 0x53)
1195                    || ((reg & 0x00ff) == 0x55));
1196         if (reg & 0xff00) {
1197                 outb_p(W83781D_REG_BANK,
1198                        client->addr + W83781D_ADDR_REG_OFFSET);
1199                 outb_p(reg >> 8,
1200                        client->addr + W83781D_DATA_REG_OFFSET);
1201         }
1202         outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1203         res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1204         if (word_sized) {
1205                 outb_p((reg & 0xff) + 1,
1206                        client->addr + W83781D_ADDR_REG_OFFSET);
1207                 res =
1208                     (res << 8) + inb_p(client->addr +
1209                                        W83781D_DATA_REG_OFFSET);
1210         }
1211         if (reg & 0xff00) {
1212                 outb_p(W83781D_REG_BANK,
1213                        client->addr + W83781D_ADDR_REG_OFFSET);
1214                 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1215         }
1216         up(&data->lock);
1217         return res;
1218 }
1219
1220 static int w83627thf_read_gpio5(struct i2c_client *client)
1221 {
1222         int res = 0xff, sel;
1223
1224         superio_enter();
1225         superio_select(W83627HF_LD_GPIO5);
1226
1227         /* Make sure these GPIO pins are enabled */
1228         if (!(superio_inb(W83627THF_GPIO5_EN) & (1<<3))) {
1229                 dev_dbg(&client->dev, "GPIO5 disabled, no VID function\n");
1230                 goto exit;
1231         }
1232
1233         /* Make sure the pins are configured for input
1234            There must be at least five (VRM 9), and possibly 6 (VRM 10) */
1235         sel = superio_inb(W83627THF_GPIO5_IOSR) & 0x3f;
1236         if ((sel & 0x1f) != 0x1f) {
1237                 dev_dbg(&client->dev, "GPIO5 not configured for VID "
1238                         "function\n");
1239                 goto exit;
1240         }
1241
1242         dev_info(&client->dev, "Reading VID from GPIO5\n");
1243         res = superio_inb(W83627THF_GPIO5_DR) & sel;
1244
1245 exit:
1246         superio_exit();
1247         return res;
1248 }
1249
1250 static int w83627hf_write_value(struct i2c_client *client, u16 reg, u16 value)
1251 {
1252         struct w83627hf_data *data = i2c_get_clientdata(client);
1253         int word_sized;
1254
1255         down(&data->lock);
1256         word_sized = (((reg & 0xff00) == 0x100)
1257                    || ((reg & 0xff00) == 0x200))
1258                   && (((reg & 0x00ff) == 0x53)
1259                    || ((reg & 0x00ff) == 0x55));
1260         if (reg & 0xff00) {
1261                 outb_p(W83781D_REG_BANK,
1262                        client->addr + W83781D_ADDR_REG_OFFSET);
1263                 outb_p(reg >> 8,
1264                        client->addr + W83781D_DATA_REG_OFFSET);
1265         }
1266         outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1267         if (word_sized) {
1268                 outb_p(value >> 8,
1269                        client->addr + W83781D_DATA_REG_OFFSET);
1270                 outb_p((reg & 0xff) + 1,
1271                        client->addr + W83781D_ADDR_REG_OFFSET);
1272         }
1273         outb_p(value & 0xff,
1274                client->addr + W83781D_DATA_REG_OFFSET);
1275         if (reg & 0xff00) {
1276                 outb_p(W83781D_REG_BANK,
1277                        client->addr + W83781D_ADDR_REG_OFFSET);
1278                 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1279         }
1280         up(&data->lock);
1281         return 0;
1282 }
1283
1284 static void w83627hf_init_client(struct i2c_client *client)
1285 {
1286         struct w83627hf_data *data = i2c_get_clientdata(client);
1287         int i;
1288         int type = data->type;
1289         u8 tmp;
1290
1291         if (reset) {
1292                 /* Resetting the chip has been the default for a long time,
1293                    but repeatedly caused problems (fans going to full
1294                    speed...) so it is now optional. It might even go away if
1295                    nobody reports it as being useful, as I see very little
1296                    reason why this would be needed at all. */
1297                 dev_info(&client->dev, "If reset=1 solved a problem you were "
1298                          "having, please report!\n");
1299
1300                 /* save this register */
1301                 i = w83627hf_read_value(client, W83781D_REG_BEEP_CONFIG);
1302                 /* Reset all except Watchdog values and last conversion values
1303                    This sets fan-divs to 2, among others */
1304                 w83627hf_write_value(client, W83781D_REG_CONFIG, 0x80);
1305                 /* Restore the register and disable power-on abnormal beep.
1306                    This saves FAN 1/2/3 input/output values set by BIOS. */
1307                 w83627hf_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
1308                 /* Disable master beep-enable (reset turns it on).
1309                    Individual beeps should be reset to off but for some reason
1310                    disabling this bit helps some people not get beeped */
1311                 w83627hf_write_value(client, W83781D_REG_BEEP_INTS2, 0);
1312         }
1313
1314         /* Minimize conflicts with other winbond i2c-only clients...  */
1315         /* disable i2c subclients... how to disable main i2c client?? */
1316         /* force i2c address to relatively uncommon address */
1317         w83627hf_write_value(client, W83781D_REG_I2C_SUBADDR, 0x89);
1318         w83627hf_write_value(client, W83781D_REG_I2C_ADDR, force_i2c);
1319
1320         /* Read VID only once */
1321         if (w83627hf == data->type || w83637hf == data->type) {
1322                 int lo = w83627hf_read_value(client, W83781D_REG_VID_FANDIV);
1323                 int hi = w83627hf_read_value(client, W83781D_REG_CHIPID);
1324                 data->vid = (lo & 0x0f) | ((hi & 0x01) << 4);
1325         } else if (w83627thf == data->type) {
1326                 data->vid = w83627thf_read_gpio5(client);
1327         }
1328
1329         /* Read VRM & OVT Config only once */
1330         if (w83627thf == data->type || w83637hf == data->type) {
1331                 data->vrm_ovt =
1332                         w83627hf_read_value(client, W83627THF_REG_VRM_OVT_CFG);
1333         }
1334
1335         /* Convert VID to voltage based on VRM */
1336         data->vrm = vid_which_vrm();
1337
1338         tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
1339         for (i = 1; i <= 3; i++) {
1340                 if (!(tmp & BIT_SCFG1[i - 1])) {
1341                         data->sens[i - 1] = W83781D_DEFAULT_BETA;
1342                 } else {
1343                         if (w83627hf_read_value
1344                             (client,
1345                              W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1346                                 data->sens[i - 1] = 1;
1347                         else
1348                                 data->sens[i - 1] = 2;
1349                 }
1350                 if ((type == w83697hf) && (i == 2))
1351                         break;
1352         }
1353
1354         if(init) {
1355                 /* Enable temp2 */
1356                 tmp = w83627hf_read_value(client, W83781D_REG_TEMP2_CONFIG);
1357                 if (tmp & 0x01) {
1358                         dev_warn(&client->dev, "Enabling temp2, readings "
1359                                  "might not make sense\n");
1360                         w83627hf_write_value(client, W83781D_REG_TEMP2_CONFIG,
1361                                 tmp & 0xfe);
1362                 }
1363
1364                 /* Enable temp3 */
1365                 if (type != w83697hf) {
1366                         tmp = w83627hf_read_value(client,
1367                                 W83781D_REG_TEMP3_CONFIG);
1368                         if (tmp & 0x01) {
1369                                 dev_warn(&client->dev, "Enabling temp3, "
1370                                          "readings might not make sense\n");
1371                                 w83627hf_write_value(client,
1372                                         W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1373                         }
1374                 }
1375         }
1376
1377         /* Start monitoring */
1378         w83627hf_write_value(client, W83781D_REG_CONFIG,
1379                             (w83627hf_read_value(client,
1380                                                 W83781D_REG_CONFIG) & 0xf7)
1381                             | 0x01);
1382 }
1383
1384 static struct w83627hf_data *w83627hf_update_device(struct device *dev)
1385 {
1386         struct i2c_client *client = to_i2c_client(dev);
1387         struct w83627hf_data *data = i2c_get_clientdata(client);
1388         int i;
1389
1390         down(&data->update_lock);
1391
1392         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1393             || !data->valid) {
1394                 for (i = 0; i <= 8; i++) {
1395                         /* skip missing sensors */
1396                         if (((data->type == w83697hf) && (i == 1)) ||
1397                             ((data->type == w83627thf || data->type == w83637hf)
1398                             && (i == 5 || i == 6)))
1399                                 continue;
1400                         data->in[i] =
1401                             w83627hf_read_value(client, W83781D_REG_IN(i));
1402                         data->in_min[i] =
1403                             w83627hf_read_value(client,
1404                                                W83781D_REG_IN_MIN(i));
1405                         data->in_max[i] =
1406                             w83627hf_read_value(client,
1407                                                W83781D_REG_IN_MAX(i));
1408                 }
1409                 for (i = 1; i <= 3; i++) {
1410                         data->fan[i - 1] =
1411                             w83627hf_read_value(client, W83781D_REG_FAN(i));
1412                         data->fan_min[i - 1] =
1413                             w83627hf_read_value(client,
1414                                                W83781D_REG_FAN_MIN(i));
1415                 }
1416                 for (i = 1; i <= 3; i++) {
1417                         u8 tmp = w83627hf_read_value(client,
1418                                 W836X7HF_REG_PWM(data->type, i));
1419                         /* bits 0-3 are reserved  in 627THF */
1420                         if (data->type == w83627thf)
1421                                 tmp &= 0xf0;
1422                         data->pwm[i - 1] = tmp;
1423                         if(i == 2 &&
1424                            (data->type == w83627hf || data->type == w83697hf))
1425                                 break;
1426                 }
1427
1428                 data->temp = w83627hf_read_value(client, W83781D_REG_TEMP(1));
1429                 data->temp_max =
1430                     w83627hf_read_value(client, W83781D_REG_TEMP_OVER(1));
1431                 data->temp_max_hyst =
1432                     w83627hf_read_value(client, W83781D_REG_TEMP_HYST(1));
1433                 data->temp_add[0] =
1434                     w83627hf_read_value(client, W83781D_REG_TEMP(2));
1435                 data->temp_max_add[0] =
1436                     w83627hf_read_value(client, W83781D_REG_TEMP_OVER(2));
1437                 data->temp_max_hyst_add[0] =
1438                     w83627hf_read_value(client, W83781D_REG_TEMP_HYST(2));
1439                 if (data->type != w83697hf) {
1440                         data->temp_add[1] =
1441                           w83627hf_read_value(client, W83781D_REG_TEMP(3));
1442                         data->temp_max_add[1] =
1443                           w83627hf_read_value(client, W83781D_REG_TEMP_OVER(3));
1444                         data->temp_max_hyst_add[1] =
1445                           w83627hf_read_value(client, W83781D_REG_TEMP_HYST(3));
1446                 }
1447
1448                 i = w83627hf_read_value(client, W83781D_REG_VID_FANDIV);
1449                 data->fan_div[0] = (i >> 4) & 0x03;
1450                 data->fan_div[1] = (i >> 6) & 0x03;
1451                 if (data->type != w83697hf) {
1452                         data->fan_div[2] = (w83627hf_read_value(client,
1453                                                W83781D_REG_PIN) >> 6) & 0x03;
1454                 }
1455                 i = w83627hf_read_value(client, W83781D_REG_VBAT);
1456                 data->fan_div[0] |= (i >> 3) & 0x04;
1457                 data->fan_div[1] |= (i >> 4) & 0x04;
1458                 if (data->type != w83697hf)
1459                         data->fan_div[2] |= (i >> 5) & 0x04;
1460                 data->alarms =
1461                     w83627hf_read_value(client, W83781D_REG_ALARM1) |
1462                     (w83627hf_read_value(client, W83781D_REG_ALARM2) << 8) |
1463                     (w83627hf_read_value(client, W83781D_REG_ALARM3) << 16);
1464                 i = w83627hf_read_value(client, W83781D_REG_BEEP_INTS2);
1465                 data->beep_enable = i >> 7;
1466                 data->beep_mask = ((i & 0x7f) << 8) |
1467                     w83627hf_read_value(client, W83781D_REG_BEEP_INTS1) |
1468                     w83627hf_read_value(client, W83781D_REG_BEEP_INTS3) << 16;
1469                 data->last_updated = jiffies;
1470                 data->valid = 1;
1471         }
1472
1473         up(&data->update_lock);
1474
1475         return data;
1476 }
1477
1478 static int __init sensors_w83627hf_init(void)
1479 {
1480         if (w83627hf_find(0x2e, &address)
1481          && w83627hf_find(0x4e, &address)) {
1482                 return -ENODEV;
1483         }
1484
1485         return i2c_isa_add_driver(&w83627hf_driver);
1486 }
1487
1488 static void __exit sensors_w83627hf_exit(void)
1489 {
1490         i2c_isa_del_driver(&w83627hf_driver);
1491 }
1492
1493 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1494               "Philip Edelbrock <phil@netroedge.com>, "
1495               "and Mark Studebaker <mdsxyz123@yahoo.com>");
1496 MODULE_DESCRIPTION("W83627HF driver");
1497 MODULE_LICENSE("GPL");
1498
1499 module_init(sensors_w83627hf_init);
1500 module_exit(sensors_w83627hf_exit);