drivers/hwmon/w83627ehf.c

   1 /*
   2  *  w83627ehf - Driver for the hardware monitoring functionality of
   3  *              the Winbond W83627EHF Super-I/O chip
   4  *  Copyright (C) 2005-2012  Jean Delvare <khali@linux-fr.org>
   5  *  Copyright (C) 2006  Yuan Mu (Winbond),
   6  *                      Rudolf Marek <r.marek@assembler.cz>
   7  *                      David Hubbard <david.c.hubbard@gmail.com>
   8  *                      Daniel J Blueman <daniel.blueman@gmail.com>
   9  *  Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
  10  *
  11  *  Shamelessly ripped from the w83627hf driver
  12  *  Copyright (C) 2003  Mark Studebaker
  13  *
  14  *  Thanks to Leon Moonen, Steve Cliffe and Grant Coady for their help
  15  *  in testing and debugging this driver.
  16  *
  17  *  This driver also supports the W83627EHG, which is the lead-free
  18  *  version of the W83627EHF.
  19  *
  20  *  This program is free software; you can redistribute it and/or modify
  21  *  it under the terms of the GNU General Public License as published by
  22  *  the Free Software Foundation; either version 2 of the License, or
  23  *  (at your option) any later version.
  24  *
  25  *  This program is distributed in the hope that it will be useful,
  26  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  27  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  28  *  GNU General Public License for more details.
  29  *
  30  *  You should have received a copy of the GNU General Public License
  31  *  along with this program; if not, write to the Free Software
  32  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  33  *
  34  *  Supports the following chips:
  35  *
  36  *  Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
  37  *  w83627ehf   10      5       4       3      0x8850 0x88    0x5ca3
  38  *                                             0x8860 0xa1
  39  *  w83627dhg    9      5       4       3      0xa020 0xc1    0x5ca3
  40  *  w83627dhg-p  9      5       4       3      0xb070 0xc1    0x5ca3
  41  *  w83627uhg    8      2       2       3      0xa230 0xc1    0x5ca3
  42  *  w83667hg     9      5       3       3      0xa510 0xc1    0x5ca3
  43  *  w83667hg-b   9      5       3       4      0xb350 0xc1    0x5ca3
  44  *  nct6775f     9      4       3       9      0xb470 0xc1    0x5ca3
  45  *  nct6776f     9      5       3       9      0xC330 0xc1    0x5ca3
  46  */
  47
  48 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  49
  50 #include <linux/module.h>
  51 #include <linux/init.h>
  52 #include <linux/slab.h>
  53 #include <linux/jiffies.h>
  54 #include <linux/platform_device.h>
  55 #include <linux/hwmon.h>
  56 #include <linux/hwmon-sysfs.h>
  57 #include <linux/hwmon-vid.h>
  58 #include <linux/err.h>
  59 #include <linux/mutex.h>
  60 #include <linux/acpi.h>
  61 #include <linux/io.h>
  62 #include "lm75.h"
  63
  64 enum kinds {
  65         w83627ehf, w83627dhg, w83627dhg_p, w83627uhg,
  66         w83667hg, w83667hg_b, nct6775, nct6776,
  67 };
  68
  69 /* used to set data->name = w83627ehf_device_names[data->sio_kind] */
  70 static const char * const w83627ehf_device_names[] = {
  71         "w83627ehf",
  72         "w83627dhg",
  73         "w83627dhg",
  74         "w83627uhg",
  75         "w83667hg",
  76         "w83667hg",
  77         "nct6775",
  78         "nct6776",
  79 };
  80
  81 static unsigned short force_id;
  82 module_param(force_id, ushort, 0);
  83 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  84
  85 static unsigned short fan_debounce;
  86 module_param(fan_debounce, ushort, 0);
  87 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
  88
  89 #define DRVNAME "w83627ehf"
  90
  91 /*
  92  * Super-I/O constants and functions
  93  */
  94
  95 #define W83627EHF_LD_HWM        0x0b
  96 #define W83667HG_LD_VID         0x0d
  97
  98 #define SIO_REG_LDSEL           0x07    /* Logical device select */
  99 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
 100 #define SIO_REG_EN_VRM10        0x2C    /* GPIO3, GPIO4 selection */
 101 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
 102 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
 103 #define SIO_REG_VID_CTRL        0xF0    /* VID control */
 104 #define SIO_REG_VID_DATA        0xF1    /* VID data */
 105
 106 #define SIO_W83627EHF_ID        0x8850
 107 #define SIO_W83627EHG_ID        0x8860
 108 #define SIO_W83627DHG_ID        0xa020
 109 #define SIO_W83627DHG_P_ID      0xb070
 110 #define SIO_W83627UHG_ID        0xa230
 111 #define SIO_W83667HG_ID         0xa510
 112 #define SIO_W83667HG_B_ID       0xb350
 113 #define SIO_NCT6775_ID          0xb470
 114 #define SIO_NCT6776_ID          0xc330
 115 #define SIO_ID_MASK             0xFFF0
 116
 117 static inline void
 118 superio_outb(int ioreg, int reg, int val)
 119 {
 120         outb(reg, ioreg);
 121         outb(val, ioreg + 1);
 122 }
 123
 124 static inline int
 125 superio_inb(int ioreg, int reg)
 126 {
 127         outb(reg, ioreg);
 128         return inb(ioreg + 1);
 129 }
 130
 131 static inline void
 132 superio_select(int ioreg, int ld)
 133 {
 134         outb(SIO_REG_LDSEL, ioreg);
 135         outb(ld, ioreg + 1);
 136 }
 137
 138 static inline void
 139 superio_enter(int ioreg)
 140 {
 141         outb(0x87, ioreg);
 142         outb(0x87, ioreg);
 143 }
 144
 145 static inline void
 146 superio_exit(int ioreg)
 147 {
 148         outb(0xaa, ioreg);
 149         outb(0x02, ioreg);
 150         outb(0x02, ioreg + 1);
 151 }
 152
 153 /*
 154  * ISA constants
 155  */
 156
 157 #define IOREGION_ALIGNMENT      (~7)
 158 #define IOREGION_OFFSET         5
 159 #define IOREGION_LENGTH         2
 160 #define ADDR_REG_OFFSET         0
 161 #define DATA_REG_OFFSET         1
 162
 163 #define W83627EHF_REG_BANK              0x4E
 164 #define W83627EHF_REG_CONFIG            0x40
 165
 166 /*
 167  * Not currently used:
 168  * REG_MAN_ID has the value 0x5ca3 for all supported chips.
 169  * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
 170  * REG_MAN_ID is at port 0x4f
 171  * REG_CHIP_ID is at port 0x58
 172  */
 173
 174 static const u16 W83627EHF_REG_FAN[] = { 0x28, 0x29, 0x2a, 0x3f, 0x553 };
 175 static const u16 W83627EHF_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d, 0x3e, 0x55c };
 176
 177 /* The W83627EHF registers for nr=7,8,9 are in bank 5 */
 178 #define W83627EHF_REG_IN_MAX(nr)        ((nr < 7) ? (0x2b + (nr) * 2) : \
 179                                          (0x554 + (((nr) - 7) * 2)))
 180 #define W83627EHF_REG_IN_MIN(nr)        ((nr < 7) ? (0x2c + (nr) * 2) : \
 181                                          (0x555 + (((nr) - 7) * 2)))
 182 #define W83627EHF_REG_IN(nr)            ((nr < 7) ? (0x20 + (nr)) : \
 183                                          (0x550 + (nr) - 7))
 184
 185 static const u16 W83627EHF_REG_TEMP[] = { 0x27, 0x150, 0x250, 0x7e };
 186 static const u16 W83627EHF_REG_TEMP_HYST[] = { 0x3a, 0x153, 0x253, 0 };
 187 static const u16 W83627EHF_REG_TEMP_OVER[] = { 0x39, 0x155, 0x255, 0 };
 188 static const u16 W83627EHF_REG_TEMP_CONFIG[] = { 0, 0x152, 0x252, 0 };
 189
 190 /* Fan clock dividers are spread over the following five registers */
 191 #define W83627EHF_REG_FANDIV1           0x47
 192 #define W83627EHF_REG_FANDIV2           0x4B
 193 #define W83627EHF_REG_VBAT              0x5D
 194 #define W83627EHF_REG_DIODE             0x59
 195 #define W83627EHF_REG_SMI_OVT           0x4C
 196
 197 /* NCT6775F has its own fan divider registers */
 198 #define NCT6775_REG_FANDIV1             0x506
 199 #define NCT6775_REG_FANDIV2             0x507
 200 #define NCT6775_REG_FAN_DEBOUNCE        0xf0
 201
 202 #define W83627EHF_REG_ALARM1            0x459
 203 #define W83627EHF_REG_ALARM2            0x45A
 204 #define W83627EHF_REG_ALARM3            0x45B
 205
 206 #define W83627EHF_REG_CASEOPEN_DET      0x42 /* SMI STATUS #2 */
 207 #define W83627EHF_REG_CASEOPEN_CLR      0x46 /* SMI MASK #3 */
 208
 209 /* SmartFan registers */
 210 #define W83627EHF_REG_FAN_STEPUP_TIME 0x0f
 211 #define W83627EHF_REG_FAN_STEPDOWN_TIME 0x0e
 212
 213 /* DC or PWM output fan configuration */
 214 static const u8 W83627EHF_REG_PWM_ENABLE[] = {
 215         0x04,                   /* SYS FAN0 output mode and PWM mode */
 216         0x04,                   /* CPU FAN0 output mode and PWM mode */
 217         0x12,                   /* AUX FAN mode */
 218         0x62,                   /* CPU FAN1 mode */
 219 };
 220
 221 static const u8 W83627EHF_PWM_MODE_SHIFT[] = { 0, 1, 0, 6 };
 222 static const u8 W83627EHF_PWM_ENABLE_SHIFT[] = { 2, 4, 1, 4 };
 223
 224 /* FAN Duty Cycle, be used to control */
 225 static const u16 W83627EHF_REG_PWM[] = { 0x01, 0x03, 0x11, 0x61 };
 226 static const u16 W83627EHF_REG_TARGET[] = { 0x05, 0x06, 0x13, 0x63 };
 227 static const u8 W83627EHF_REG_TOLERANCE[] = { 0x07, 0x07, 0x14, 0x62 };
 228
 229 /* Advanced Fan control, some values are common for all fans */
 230 static const u16 W83627EHF_REG_FAN_START_OUTPUT[] = { 0x0a, 0x0b, 0x16, 0x65 };
 231 static const u16 W83627EHF_REG_FAN_STOP_OUTPUT[] = { 0x08, 0x09, 0x15, 0x64 };
 232 static const u16 W83627EHF_REG_FAN_STOP_TIME[] = { 0x0c, 0x0d, 0x17, 0x66 };
 233
 234 static const u16 W83627EHF_REG_FAN_MAX_OUTPUT_COMMON[]
 235                                                 = { 0xff, 0x67, 0xff, 0x69 };
 236 static const u16 W83627EHF_REG_FAN_STEP_OUTPUT_COMMON[]
 237                                                 = { 0xff, 0x68, 0xff, 0x6a };
 238
 239 static const u16 W83627EHF_REG_FAN_MAX_OUTPUT_W83667_B[] = { 0x67, 0x69, 0x6b };
 240 static const u16 W83627EHF_REG_FAN_STEP_OUTPUT_W83667_B[]
 241                                                 = { 0x68, 0x6a, 0x6c };
 242
 243 static const u16 W83627EHF_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
 244
 245 static const u16 NCT6775_REG_TARGET[] = { 0x101, 0x201, 0x301 };
 246 static const u16 NCT6775_REG_FAN_MODE[] = { 0x102, 0x202, 0x302 };
 247 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = { 0x105, 0x205, 0x305 };
 248 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = { 0x106, 0x206, 0x306 };
 249 static const u16 NCT6775_REG_FAN_STOP_TIME[] = { 0x107, 0x207, 0x307 };
 250 static const u16 NCT6775_REG_PWM[] = { 0x109, 0x209, 0x309 };
 251 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
 252 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
 253 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
 254 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642};
 255
 256 static const u16 NCT6775_REG_TEMP[]
 257         = { 0x27, 0x150, 0x250, 0x73, 0x75, 0x77, 0x62b, 0x62c, 0x62d };
 258 static const u16 NCT6775_REG_TEMP_CONFIG[]
 259         = { 0, 0x152, 0x252, 0, 0, 0, 0x628, 0x629, 0x62A };
 260 static const u16 NCT6775_REG_TEMP_HYST[]
 261         = { 0x3a, 0x153, 0x253, 0, 0, 0, 0x673, 0x678, 0x67D };
 262 static const u16 NCT6775_REG_TEMP_OVER[]
 263         = { 0x39, 0x155, 0x255, 0, 0, 0, 0x672, 0x677, 0x67C };
 264 static const u16 NCT6775_REG_TEMP_SOURCE[]
 265         = { 0x621, 0x622, 0x623, 0x100, 0x200, 0x300, 0x624, 0x625, 0x626 };
 266
 267 static const char *const w83667hg_b_temp_label[] = {
 268         "SYSTIN",
 269         "CPUTIN",
 270         "AUXTIN",
 271         "AMDTSI",
 272         "PECI Agent 1",
 273         "PECI Agent 2",
 274         "PECI Agent 3",
 275         "PECI Agent 4"
 276 };
 277
 278 static const char *const nct6775_temp_label[] = {
 279         "",
 280         "SYSTIN",
 281         "CPUTIN",
 282         "AUXTIN",
 283         "AMD SB-TSI",
 284         "PECI Agent 0",
 285         "PECI Agent 1",
 286         "PECI Agent 2",
 287         "PECI Agent 3",
 288         "PECI Agent 4",
 289         "PECI Agent 5",
 290         "PECI Agent 6",
 291         "PECI Agent 7",
 292         "PCH_CHIP_CPU_MAX_TEMP",
 293         "PCH_CHIP_TEMP",
 294         "PCH_CPU_TEMP",
 295         "PCH_MCH_TEMP",
 296         "PCH_DIM0_TEMP",
 297         "PCH_DIM1_TEMP",
 298         "PCH_DIM2_TEMP",
 299         "PCH_DIM3_TEMP"
 300 };
 301
 302 static const char *const nct6776_temp_label[] = {
 303         "",
 304         "SYSTIN",
 305         "CPUTIN",
 306         "AUXTIN",
 307         "SMBUSMASTER 0",
 308         "SMBUSMASTER 1",
 309         "SMBUSMASTER 2",
 310         "SMBUSMASTER 3",
 311         "SMBUSMASTER 4",
 312         "SMBUSMASTER 5",
 313         "SMBUSMASTER 6",
 314         "SMBUSMASTER 7",
 315         "PECI Agent 0",
 316         "PECI Agent 1",
 317         "PCH_CHIP_CPU_MAX_TEMP",
 318         "PCH_CHIP_TEMP",
 319         "PCH_CPU_TEMP",
 320         "PCH_MCH_TEMP",
 321         "PCH_DIM0_TEMP",
 322         "PCH_DIM1_TEMP",
 323         "PCH_DIM2_TEMP",
 324         "PCH_DIM3_TEMP",
 325         "BYTE_TEMP"
 326 };
 327
 328 #define NUM_REG_TEMP    ARRAY_SIZE(NCT6775_REG_TEMP)
 329
 330 static int is_word_sized(u16 reg)
 331 {
 332         return ((((reg & 0xff00) == 0x100
 333               || (reg & 0xff00) == 0x200)
 334              && ((reg & 0x00ff) == 0x50
 335               || (reg & 0x00ff) == 0x53
 336               || (reg & 0x00ff) == 0x55))
 337              || (reg & 0xfff0) == 0x630
 338              || reg == 0x640 || reg == 0x642
 339              || ((reg & 0xfff0) == 0x650
 340                  && (reg & 0x000f) >= 0x06)
 341              || reg == 0x73 || reg == 0x75 || reg == 0x77
 342                 );
 343 }
 344
 345 /*
 346  * Conversions
 347  */
 348
 349 /* 1 is PWM mode, output in ms */
 350 static inline unsigned int step_time_from_reg(u8 reg, u8 mode)
 351 {
 352         return mode ? 100 * reg : 400 * reg;
 353 }
 354
 355 static inline u8 step_time_to_reg(unsigned int msec, u8 mode)
 356 {
 357         return SENSORS_LIMIT((mode ? (msec + 50) / 100 :
 358                                                 (msec + 200) / 400), 1, 255);
 359 }
 360
 361 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
 362 {
 363         if (reg == 0 || reg == 255)
 364                 return 0;
 365         return 1350000U / (reg << divreg);
 366 }
 367
 368 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
 369 {
 370         if ((reg & 0xff1f) == 0xff1f)
 371                 return 0;
 372
 373         reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
 374
 375         if (reg == 0)
 376                 return 0;
 377
 378         return 1350000U / reg;
 379 }
 380
 381 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
 382 {
 383         if (reg == 0 || reg == 0xffff)
 384                 return 0;
 385
 386         /*
 387          * Even though the registers are 16 bit wide, the fan divisor
 388          * still applies.
 389          */
 390         return 1350000U / (reg << divreg);
 391 }
 392
 393 static inline unsigned int
 394 div_from_reg(u8 reg)
 395 {
 396         return 1 << reg;
 397 }
 398
 399 /*
 400  * Some of the voltage inputs have internal scaling, the tables below
 401  * contain 8 (the ADC LSB in mV) * scaling factor * 100
 402  */
 403 static const u16 scale_in_common[10] = {
 404         800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800
 405 };
 406 static const u16 scale_in_w83627uhg[9] = {
 407         800, 800, 3328, 3424, 800, 800, 0, 3328, 3400
 408 };
 409
 410 static inline long in_from_reg(u8 reg, u8 nr, const u16 *scale_in)
 411 {
 412         return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
 413 }
 414
 415 static inline u8 in_to_reg(u32 val, u8 nr, const u16 *scale_in)
 416 {
 417         return SENSORS_LIMIT(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0,
 418                              255);
 419 }
 420
 421 /*
 422  * Data structures and manipulation thereof
 423  */
 424
 425 struct w83627ehf_data {
 426         int addr;       /* IO base of hw monitor block */
 427         const char *name;
 428
 429         struct device *hwmon_dev;
 430         struct mutex lock;
 431
 432         u16 reg_temp[NUM_REG_TEMP];
 433         u16 reg_temp_over[NUM_REG_TEMP];
 434         u16 reg_temp_hyst[NUM_REG_TEMP];
 435         u16 reg_temp_config[NUM_REG_TEMP];
 436         u8 temp_src[NUM_REG_TEMP];
 437         const char * const *temp_label;
 438
 439         const u16 *REG_PWM;
 440         const u16 *REG_TARGET;
 441         const u16 *REG_FAN;
 442         const u16 *REG_FAN_MIN;
 443         const u16 *REG_FAN_START_OUTPUT;
 444         const u16 *REG_FAN_STOP_OUTPUT;
 445         const u16 *REG_FAN_STOP_TIME;
 446         const u16 *REG_FAN_MAX_OUTPUT;
 447         const u16 *REG_FAN_STEP_OUTPUT;
 448         const u16 *scale_in;
 449
 450         unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
 451         unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
 452
 453         struct mutex update_lock;
 454         char valid;             /* !=0 if following fields are valid */
 455         unsigned long last_updated;     /* In jiffies */
 456
 457         /* Register values */
 458         u8 bank;                /* current register bank */
 459         u8 in_num;              /* number of in inputs we have */
 460         u8 in[10];              /* Register value */
 461         u8 in_max[10];          /* Register value */
 462         u8 in_min[10];          /* Register value */
 463         unsigned int rpm[5];
 464         u16 fan_min[5];
 465         u8 fan_div[5];
 466         u8 has_fan;             /* some fan inputs can be disabled */
 467         u8 has_fan_min;         /* some fans don't have min register */
 468         bool has_fan_div;
 469         u8 temp_type[3];
 470         s8 temp_offset[3];
 471         s16 temp[9];
 472         s16 temp_max[9];
 473         s16 temp_max_hyst[9];
 474         u32 alarms;
 475         u8 caseopen;
 476
 477         u8 pwm_mode[4]; /* 0->DC variable voltage, 1->PWM variable duty cycle */
 478         u8 pwm_enable[4]; /* 1->manual
 479                            * 2->thermal cruise mode (also called SmartFan I)
 480                            * 3->fan speed cruise mode
 481                            * 4->variable thermal cruise (also called
 482                            * SmartFan III)
 483                            * 5->enhanced variable thermal cruise (also called
 484                            * SmartFan IV)
 485                            */
 486         u8 pwm_enable_orig[4];  /* original value of pwm_enable */
 487         u8 pwm_num;             /* number of pwm */
 488         u8 pwm[4];
 489         u8 target_temp[4];
 490         u8 tolerance[4];
 491
 492         u8 fan_start_output[4]; /* minimum fan speed when spinning up */
 493         u8 fan_stop_output[4]; /* minimum fan speed when spinning down */
 494         u8 fan_stop_time[4]; /* time at minimum before disabling fan */
 495         u8 fan_max_output[4]; /* maximum fan speed */
 496         u8 fan_step_output[4]; /* rate of change output value */
 497
 498         u8 vid;
 499         u8 vrm;
 500
 501         u16 have_temp;
 502         u16 have_temp_offset;
 503         u8 in6_skip:1;
 504         u8 temp3_val_only:1;
 505
 506 #ifdef CONFIG_PM
 507         /* Remember extra register values over suspend/resume */
 508         u8 vbat;
 509         u8 fandiv1;
 510         u8 fandiv2;
 511 #endif
 512 };
 513
 514 struct w83627ehf_sio_data {
 515         int sioreg;
 516         enum kinds kind;
 517 };
 518
 519 /*
 520  * On older chips, only registers 0x50-0x5f are banked.
 521  * On more recent chips, all registers are banked.
 522  * Assume that is the case and set the bank number for each access.
 523  * Cache the bank number so it only needs to be set if it changes.
 524  */
 525 static inline void w83627ehf_set_bank(struct w83627ehf_data *data, u16 reg)
 526 {
 527         u8 bank = reg >> 8;
 528         if (data->bank != bank) {
 529                 outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
 530                 outb_p(bank, data->addr + DATA_REG_OFFSET);
 531                 data->bank = bank;
 532         }
 533 }
 534
 535 static u16 w83627ehf_read_value(struct w83627ehf_data *data, u16 reg)
 536 {
 537         int res, word_sized = is_word_sized(reg);
 538
 539         mutex_lock(&data->lock);
 540
 541         w83627ehf_set_bank(data, reg);
 542         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
 543         res = inb_p(data->addr + DATA_REG_OFFSET);
 544         if (word_sized) {
 545                 outb_p((reg & 0xff) + 1,
 546                        data->addr + ADDR_REG_OFFSET);
 547                 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
 548         }
 549
 550         mutex_unlock(&data->lock);
 551         return res;
 552 }
 553
 554 static int w83627ehf_write_value(struct w83627ehf_data *data, u16 reg,
 555                                  u16 value)
 556 {
 557         int word_sized = is_word_sized(reg);
 558
 559         mutex_lock(&data->lock);
 560
 561         w83627ehf_set_bank(data, reg);
 562         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
 563         if (word_sized) {
 564                 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
 565                 outb_p((reg & 0xff) + 1,
 566                        data->addr + ADDR_REG_OFFSET);
 567         }
 568         outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
 569
 570         mutex_unlock(&data->lock);
 571         return 0;
 572 }
 573
 574 /* We left-align 8-bit temperature values to make the code simpler */
 575 static u16 w83627ehf_read_temp(struct w83627ehf_data *data, u16 reg)
 576 {
 577         u16 res;
 578
 579         res = w83627ehf_read_value(data, reg);
 580         if (!is_word_sized(reg))
 581                 res <<= 8;
 582
 583         return res;
 584 }
 585
 586 static int w83627ehf_write_temp(struct w83627ehf_data *data, u16 reg,
 587                                        u16 value)
 588 {
 589         if (!is_word_sized(reg))
 590                 value >>= 8;
 591         return w83627ehf_write_value(data, reg, value);
 592 }
 593
 594 /* This function assumes that the caller holds data->update_lock */
 595 static void nct6775_write_fan_div(struct w83627ehf_data *data, int nr)
 596 {
 597         u8 reg;
 598
 599         switch (nr) {
 600         case 0:
 601                 reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
 602                     | (data->fan_div[0] & 0x7);
 603                 w83627ehf_write_value(data, NCT6775_REG_FANDIV1, reg);
 604                 break;
 605         case 1:
 606                 reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
 607                     | ((data->fan_div[1] << 4) & 0x70);
 608                 w83627ehf_write_value(data, NCT6775_REG_FANDIV1, reg);
 609                 break;
 610         case 2:
 611                 reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
 612                     | (data->fan_div[2] & 0x7);
 613                 w83627ehf_write_value(data, NCT6775_REG_FANDIV2, reg);
 614                 break;
 615         case 3:
 616                 reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
 617                     | ((data->fan_div[3] << 4) & 0x70);
 618                 w83627ehf_write_value(data, NCT6775_REG_FANDIV2, reg);
 619                 break;
 620         }
 621 }
 622
 623 /* This function assumes that the caller holds data->update_lock */
 624 static void w83627ehf_write_fan_div(struct w83627ehf_data *data, int nr)
 625 {
 626         u8 reg;
 627
 628         switch (nr) {
 629         case 0:
 630                 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0xcf)
 631                     | ((data->fan_div[0] & 0x03) << 4);
 632                 /* fan5 input control bit is write only, compute the value */
 633                 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
 634                 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
 635                 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xdf)
 636                     | ((data->fan_div[0] & 0x04) << 3);
 637                 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
 638                 break;
 639         case 1:
 640                 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0x3f)
 641                     | ((data->fan_div[1] & 0x03) << 6);
 642                 /* fan5 input control bit is write only, compute the value */
 643                 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
 644                 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
 645                 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xbf)
 646                     | ((data->fan_div[1] & 0x04) << 4);
 647                 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
 648                 break;
 649         case 2:
 650                 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV2) & 0x3f)
 651                     | ((data->fan_div[2] & 0x03) << 6);
 652                 w83627ehf_write_value(data, W83627EHF_REG_FANDIV2, reg);
 653                 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0x7f)
 654                     | ((data->fan_div[2] & 0x04) << 5);
 655                 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
 656                 break;
 657         case 3:
 658                 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0xfc)
 659                     | (data->fan_div[3] & 0x03);
 660                 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
 661                 reg = (w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT) & 0x7f)
 662                     | ((data->fan_div[3] & 0x04) << 5);
 663                 w83627ehf_write_value(data, W83627EHF_REG_SMI_OVT, reg);
 664                 break;
 665         case 4:
 666                 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0x73)
 667                     | ((data->fan_div[4] & 0x03) << 2)
 668                     | ((data->fan_div[4] & 0x04) << 5);
 669                 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
 670                 break;
 671         }
 672 }
 673
 674 static void w83627ehf_write_fan_div_common(struct device *dev,
 675                                            struct w83627ehf_data *data, int nr)
 676 {
 677         struct w83627ehf_sio_data *sio_data = dev->platform_data;
 678
 679         if (sio_data->kind == nct6776)
 680                 ; /* no dividers, do nothing */
 681         else if (sio_data->kind == nct6775)
 682                 nct6775_write_fan_div(data, nr);
 683         else
 684                 w83627ehf_write_fan_div(data, nr);
 685 }
 686
 687 static void nct6775_update_fan_div(struct w83627ehf_data *data)
 688 {
 689         u8 i;
 690
 691         i = w83627ehf_read_value(data, NCT6775_REG_FANDIV1);
 692         data->fan_div[0] = i & 0x7;
 693         data->fan_div[1] = (i & 0x70) >> 4;
 694         i = w83627ehf_read_value(data, NCT6775_REG_FANDIV2);
 695         data->fan_div[2] = i & 0x7;
 696         if (data->has_fan & (1<<3))
 697                 data->fan_div[3] = (i & 0x70) >> 4;
 698 }
 699
 700 static void w83627ehf_update_fan_div(struct w83627ehf_data *data)
 701 {
 702         int i;
 703
 704         i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
 705         data->fan_div[0] = (i >> 4) & 0x03;
 706         data->fan_div[1] = (i >> 6) & 0x03;
 707         i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV2);
 708         data->fan_div[2] = (i >> 6) & 0x03;
 709         i = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
 710         data->fan_div[0] |= (i >> 3) & 0x04;
 711         data->fan_div[1] |= (i >> 4) & 0x04;
 712         data->fan_div[2] |= (i >> 5) & 0x04;
 713         if (data->has_fan & ((1 << 3) | (1 << 4))) {
 714                 i = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
 715                 data->fan_div[3] = i & 0x03;
 716                 data->fan_div[4] = ((i >> 2) & 0x03)
 717                                  | ((i >> 5) & 0x04);
 718         }
 719         if (data->has_fan & (1 << 3)) {
 720                 i = w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT);
 721                 data->fan_div[3] |= (i >> 5) & 0x04;
 722         }
 723 }
 724
 725 static void w83627ehf_update_fan_div_common(struct device *dev,
 726                                             struct w83627ehf_data *data)
 727 {
 728         struct w83627ehf_sio_data *sio_data = dev->platform_data;
 729
 730         if (sio_data->kind == nct6776)
 731                 ; /* no dividers, do nothing */
 732         else if (sio_data->kind == nct6775)
 733                 nct6775_update_fan_div(data);
 734         else
 735                 w83627ehf_update_fan_div(data);
 736 }
 737
 738 static void nct6775_update_pwm(struct w83627ehf_data *data)
 739 {
 740         int i;
 741         int pwmcfg, fanmodecfg;
 742
 743         for (i = 0; i < data->pwm_num; i++) {
 744                 pwmcfg = w83627ehf_read_value(data,
 745                                               W83627EHF_REG_PWM_ENABLE[i]);
 746                 fanmodecfg = w83627ehf_read_value(data,
 747                                                   NCT6775_REG_FAN_MODE[i]);
 748                 data->pwm_mode[i] =
 749                   ((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1) ? 0 : 1;
 750                 data->pwm_enable[i] = ((fanmodecfg >> 4) & 7) + 1;
 751                 data->tolerance[i] = fanmodecfg & 0x0f;
 752                 data->pwm[i] = w83627ehf_read_value(data, data->REG_PWM[i]);
 753         }
 754 }
 755
 756 static void w83627ehf_update_pwm(struct w83627ehf_data *data)
 757 {
 758         int i;
 759         int pwmcfg = 0, tolerance = 0; /* shut up the compiler */
 760
 761         for (i = 0; i < data->pwm_num; i++) {
 762                 if (!(data->has_fan & (1 << i)))
 763                         continue;
 764
 765                 /* pwmcfg, tolerance mapped for i=0, i=1 to same reg */
 766                 if (i != 1) {
 767                         pwmcfg = w83627ehf_read_value(data,
 768                                         W83627EHF_REG_PWM_ENABLE[i]);
 769                         tolerance = w83627ehf_read_value(data,
 770                                         W83627EHF_REG_TOLERANCE[i]);
 771                 }
 772                 data->pwm_mode[i] =
 773                         ((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1) ? 0 : 1;
 774                 data->pwm_enable[i] = ((pwmcfg >> W83627EHF_PWM_ENABLE_SHIFT[i])
 775                                        & 3) + 1;
 776                 data->pwm[i] = w83627ehf_read_value(data, data->REG_PWM[i]);
 777
 778                 data->tolerance[i] = (tolerance >> (i == 1 ? 4 : 0)) & 0x0f;
 779         }
 780 }
 781
 782 static void w83627ehf_update_pwm_common(struct device *dev,
 783                                         struct w83627ehf_data *data)
 784 {
 785         struct w83627ehf_sio_data *sio_data = dev->platform_data;
 786
 787         if (sio_data->kind == nct6775 || sio_data->kind == nct6776)
 788                 nct6775_update_pwm(data);
 789         else
 790                 w83627ehf_update_pwm(data);
 791 }
 792
 793 static struct w83627ehf_data *w83627ehf_update_device(struct device *dev)
 794 {
 795         struct w83627ehf_data *data = dev_get_drvdata(dev);
 796         struct w83627ehf_sio_data *sio_data = dev->platform_data;
 797
 798         int i;
 799
 800         mutex_lock(&data->update_lock);
 801
 802         if (time_after(jiffies, data->last_updated + HZ + HZ/2)
 803          || !data->valid) {
 804                 /* Fan clock dividers */
 805                 w83627ehf_update_fan_div_common(dev, data);
 806
 807                 /* Measured voltages and limits */
 808                 for (i = 0; i < data->in_num; i++) {
 809                         if ((i == 6) && data->in6_skip)
 810                                 continue;
 811
 812                         data->in[i] = w83627ehf_read_value(data,
 813                                       W83627EHF_REG_IN(i));
 814                         data->in_min[i] = w83627ehf_read_value(data,
 815                                           W83627EHF_REG_IN_MIN(i));
 816                         data->in_max[i] = w83627ehf_read_value(data,
 817                                           W83627EHF_REG_IN_MAX(i));
 818                 }
 819
 820                 /* Measured fan speeds and limits */
 821                 for (i = 0; i < 5; i++) {
 822                         u16 reg;
 823
 824                         if (!(data->has_fan & (1 << i)))
 825                                 continue;
 826
 827                         reg = w83627ehf_read_value(data, data->REG_FAN[i]);
 828                         data->rpm[i] = data->fan_from_reg(reg,
 829                                                           data->fan_div[i]);
 830
 831                         if (data->has_fan_min & (1 << i))
 832                                 data->fan_min[i] = w83627ehf_read_value(data,
 833                                            data->REG_FAN_MIN[i]);
 834
 835                         /*
 836                          * If we failed to measure the fan speed and clock
 837                          * divider can be increased, let's try that for next
 838                          * time
 839                          */
 840                         if (data->has_fan_div
 841                             && (reg >= 0xff || (sio_data->kind == nct6775
 842                                                 && reg == 0x00))
 843                             && data->fan_div[i] < 0x07) {
 844                                 dev_dbg(dev, "Increasing fan%d "
 845                                         "clock divider from %u to %u\n",
 846                                         i + 1, div_from_reg(data->fan_div[i]),
 847                                         div_from_reg(data->fan_div[i] + 1));
 848                                 data->fan_div[i]++;
 849                                 w83627ehf_write_fan_div_common(dev, data, i);
 850                                 /* Preserve min limit if possible */
 851                                 if ((data->has_fan_min & (1 << i))
 852                                  && data->fan_min[i] >= 2
 853                                  && data->fan_min[i] != 255)
 854                                         w83627ehf_write_value(data,
 855                                                 data->REG_FAN_MIN[i],
 856                                                 (data->fan_min[i] /= 2));
 857                         }
 858                 }
 859
 860                 w83627ehf_update_pwm_common(dev, data);
 861
 862                 for (i = 0; i < data->pwm_num; i++) {
 863                         if (!(data->has_fan & (1 << i)))
 864                                 continue;
 865
 866                         data->fan_start_output[i] =
 867                           w83627ehf_read_value(data,
 868                                                data->REG_FAN_START_OUTPUT[i]);
 869                         data->fan_stop_output[i] =
 870                           w83627ehf_read_value(data,
 871                                                data->REG_FAN_STOP_OUTPUT[i]);
 872                         data->fan_stop_time[i] =
 873                           w83627ehf_read_value(data,
 874                                                data->REG_FAN_STOP_TIME[i]);
 875
 876                         if (data->REG_FAN_MAX_OUTPUT &&
 877                             data->REG_FAN_MAX_OUTPUT[i] != 0xff)
 878                                 data->fan_max_output[i] =
 879                                   w83627ehf_read_value(data,
 880                                                 data->REG_FAN_MAX_OUTPUT[i]);
 881
 882                         if (data->REG_FAN_STEP_OUTPUT &&
 883                             data->REG_FAN_STEP_OUTPUT[i] != 0xff)
 884                                 data->fan_step_output[i] =
 885                                   w83627ehf_read_value(data,
 886                                                 data->REG_FAN_STEP_OUTPUT[i]);
 887
 888                         data->target_temp[i] =
 889                                 w83627ehf_read_value(data,
 890                                         data->REG_TARGET[i]) &
 891                                         (data->pwm_mode[i] == 1 ? 0x7f : 0xff);
 892                 }
 893
 894                 /* Measured temperatures and limits */
 895                 for (i = 0; i < NUM_REG_TEMP; i++) {
 896                         if (!(data->have_temp & (1 << i)))
 897                                 continue;
 898                         data->temp[i] = w83627ehf_read_temp(data,
 899                                                 data->reg_temp[i]);
 900                         if (data->reg_temp_over[i])
 901                                 data->temp_max[i]
 902                                   = w83627ehf_read_temp(data,
 903                                                 data->reg_temp_over[i]);
 904                         if (data->reg_temp_hyst[i])
 905                                 data->temp_max_hyst[i]
 906                                   = w83627ehf_read_temp(data,
 907                                                 data->reg_temp_hyst[i]);
 908                         if (i > 2)
 909                                 continue;
 910                         if (data->have_temp_offset & (1 << i))
 911                                 data->temp_offset[i]
 912                                   = w83627ehf_read_value(data,
 913                                                 W83627EHF_REG_TEMP_OFFSET[i]);
 914                 }
 915
 916                 data->alarms = w83627ehf_read_value(data,
 917                                         W83627EHF_REG_ALARM1) |
 918                                (w83627ehf_read_value(data,
 919                                         W83627EHF_REG_ALARM2) << 8) |
 920                                (w83627ehf_read_value(data,
 921                                         W83627EHF_REG_ALARM3) << 16);
 922
 923                 data->caseopen = w83627ehf_read_value(data,
 924                                                 W83627EHF_REG_CASEOPEN_DET);
 925
 926                 data->last_updated = jiffies;
 927                 data->valid = 1;
 928         }
 929
 930         mutex_unlock(&data->update_lock);
 931         return data;
 932 }
 933
 934 /*
 935  * Sysfs callback functions
 936  */
 937 #define show_in_reg(reg) \
 938 static ssize_t \
 939 show_##reg(struct device *dev, struct device_attribute *attr, \
 940            char *buf) \
 941 { \
 942         struct w83627ehf_data *data = w83627ehf_update_device(dev); \
 943         struct sensor_device_attribute *sensor_attr = \
 944                 to_sensor_dev_attr(attr); \
 945         int nr = sensor_attr->index; \
 946         return sprintf(buf, "%ld\n", in_from_reg(data->reg[nr], nr, \
 947                        data->scale_in)); \
 948 }
 949 show_in_reg(in)
 950 show_in_reg(in_min)
 951 show_in_reg(in_max)
 952
 953 #define store_in_reg(REG, reg) \
 954 static ssize_t \
 955 store_in_##reg(struct device *dev, struct device_attribute *attr, \
 956                const char *buf, size_t count) \
 957 { \
 958         struct w83627ehf_data *data = dev_get_drvdata(dev); \
 959         struct sensor_device_attribute *sensor_attr = \
 960                 to_sensor_dev_attr(attr); \
 961         int nr = sensor_attr->index; \
 962         unsigned long val; \
 963         int err; \
 964         err = kstrtoul(buf, 10, &val); \
 965         if (err < 0) \
 966                 return err; \
 967         mutex_lock(&data->update_lock); \
 968         data->in_##reg[nr] = in_to_reg(val, nr, data->scale_in); \
 969         w83627ehf_write_value(data, W83627EHF_REG_IN_##REG(nr), \
 970                               data->in_##reg[nr]); \
 971         mutex_unlock(&data->update_lock); \
 972         return count; \
 973 }
 974
 975 store_in_reg(MIN, min)
 976 store_in_reg(MAX, max)
 977
 978 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
 979                           char *buf)
 980 {
 981         struct w83627ehf_data *data = w83627ehf_update_device(dev);
 982         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
 983         int nr = sensor_attr->index;
 984         return sprintf(buf, "%u\n", (data->alarms >> nr) & 0x01);
 985 }
 986
 987 static struct sensor_device_attribute sda_in_input[] = {
 988         SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0),
 989         SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1),
 990         SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2),
 991         SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3),
 992         SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4),
 993         SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5),
 994         SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6),
 995         SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7),
 996         SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8),
 997         SENSOR_ATTR(in9_input, S_IRUGO, show_in, NULL, 9),
 998 };
 999
1000 static struct sensor_device_attribute sda_in_alarm[] = {
1001         SENSOR_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0),
1002         SENSOR_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1),
1003         SENSOR_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2),
1004         SENSOR_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3),
1005         SENSOR_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8),
1006         SENSOR_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 21),
1007         SENSOR_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 20),
1008         SENSOR_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16),
1009         SENSOR_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17),
1010         SENSOR_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 19),
1011 };
1012
1013 static struct sensor_device_attribute sda_in_min[] = {
1014         SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0),
1015         SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1),
1016         SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2),
1017         SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3),
1018         SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4),
1019         SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5),
1020         SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6),
1021         SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7),
1022         SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8),
1023         SENSOR_ATTR(in9_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 9),
1024 };
1025
1026 static struct sensor_device_attribute sda_in_max[] = {
1027         SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0),
1028         SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1),
1029         SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2),
1030         SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3),
1031         SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4),
1032         SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5),
1033         SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6),
1034         SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7),
1035         SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8),
1036         SENSOR_ATTR(in9_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 9),
1037 };
1038
1039 static ssize_t
1040 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1041 {
1042         struct w83627ehf_data *data = w83627ehf_update_device(dev);
1043         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1044         int nr = sensor_attr->index;
1045         return sprintf(buf, "%d\n", data->rpm[nr]);
1046 }
1047
1048 static ssize_t
1049 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1050 {
1051         struct w83627ehf_data *data = w83627ehf_update_device(dev);
1052         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1053         int nr = sensor_attr->index;
1054         return sprintf(buf, "%d\n",
1055                        data->fan_from_reg_min(data->fan_min[nr],
1056                                               data->fan_div[nr]));
1057 }
1058
1059 static ssize_t
1060 show_fan_div(struct device *dev, struct device_attribute *attr,
1061              char *buf)
1062 {
1063         struct w83627ehf_data *data = w83627ehf_update_device(dev);
1064         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1065         int nr = sensor_attr->index;
1066         return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1067 }
1068
1069 static ssize_t
1070 store_fan_min(struct device *dev, struct device_attribute *attr,
1071               const char *buf, size_t count)
1072 {
1073         struct w83627ehf_data *data = dev_get_drvdata(dev);
1074         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1075         int nr = sensor_attr->index;
1076         unsigned long val;
1077         int err;
1078         unsigned int reg;
1079         u8 new_div;
1080
1081         err = kstrtoul(buf, 10, &val);
1082         if (err < 0)
1083                 return err;
1084
1085         mutex_lock(&data->update_lock);
1086         if (!data->has_fan_div) {
1087                 /*
1088                  * Only NCT6776F for now, so we know that this is a 13 bit
1089                  * register
1090                  */
1091                 if (!val) {
1092                         val = 0xff1f;
1093                 } else {
1094                         if (val > 1350000U)
1095                                 val = 135000U;
1096                         val = 1350000U / val;
1097                         val = (val & 0x1f) | ((val << 3) & 0xff00);
1098                 }
1099                 data->fan_min[nr] = val;
1100                 goto done;      /* Leave fan divider alone */
1101         }
1102         if (!val) {
1103                 /* No min limit, alarm disabled */
1104                 data->fan_min[nr] = 255;
1105                 new_div = data->fan_div[nr]; /* No change */
1106                 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1107         } else if ((reg = 1350000U / val) >= 128 * 255) {
1108                 /*
1109                  * Speed below this value cannot possibly be represented,
1110                  * even with the highest divider (128)
1111                  */
1112                 data->fan_min[nr] = 254;
1113                 new_div = 7; /* 128 == (1 << 7) */
1114                 dev_warn(dev, "fan%u low limit %lu below minimum %u, set to "
1115                          "minimum\n", nr + 1, val,
1116                          data->fan_from_reg_min(254, 7));
1117         } else if (!reg) {
1118                 /*
1119                  * Speed above this value cannot possibly be represented,
1120                  * even with the lowest divider (1)
1121                  */
1122                 data->fan_min[nr] = 1;
1123                 new_div = 0; /* 1 == (1 << 0) */
1124                 dev_warn(dev, "fan%u low limit %lu above maximum %u, set to "
1125                          "maximum\n", nr + 1, val,
1126                          data->fan_from_reg_min(1, 0));
1127         } else {
1128                 /*
1129                  * Automatically pick the best divider, i.e. the one such
1130                  * that the min limit will correspond to a register value
1131                  * in the 96..192 range
1132                  */
1133                 new_div = 0;
1134                 while (reg > 192 && new_div < 7) {
1135                         reg >>= 1;
1136                         new_div++;
1137                 }
1138                 data->fan_min[nr] = reg;
1139         }
1140
1141         /*
1142          * Write both the fan clock divider (if it changed) and the new
1143          * fan min (unconditionally)
1144          */
1145         if (new_div != data->fan_div[nr]) {
1146                 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1147                         nr + 1, div_from_reg(data->fan_div[nr]),
1148                         div_from_reg(new_div));
1149                 data->fan_div[nr] = new_div;
1150                 w83627ehf_write_fan_div_common(dev, data, nr);
1151                 /* Give the chip time to sample a new speed value */
1152                 data->last_updated = jiffies;
1153         }
1154 done:
1155         w83627ehf_write_value(data, data->REG_FAN_MIN[nr],
1156                               data->fan_min[nr]);
1157         mutex_unlock(&data->update_lock);
1158
1159         return count;
1160 }
1161
1162 static struct sensor_device_attribute sda_fan_input[] = {
1163         SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
1164         SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
1165         SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
1166         SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
1167         SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
1168 };
1169
1170 static struct sensor_device_attribute sda_fan_alarm[] = {
1171         SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6),
1172         SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7),
1173         SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11),
1174         SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 10),
1175         SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 23),
1176 };
1177
1178 static struct sensor_device_attribute sda_fan_min[] = {
1179         SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
1180                     store_fan_min, 0),
1181         SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
1182                     store_fan_min, 1),
1183         SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
1184                     store_fan_min, 2),
1185         SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
1186                     store_fan_min, 3),
1187         SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
1188                     store_fan_min, 4),
1189 };
1190
1191 static struct sensor_device_attribute sda_fan_div[] = {
1192         SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
1193         SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
1194         SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
1195         SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
1196         SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
1197 };
1198
1199 static ssize_t
1200 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1201 {
1202         struct w83627ehf_data *data = w83627ehf_update_device(dev);
1203         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1204         int nr = sensor_attr->index;
1205         return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1206 }
1207
1208 #define show_temp_reg(addr, reg) \
1209 static ssize_t \
1210 show_##reg(struct device *dev, struct device_attribute *attr, \
1211            char *buf) \
1212 { \
1213         struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1214         struct sensor_device_attribute *sensor_attr = \
1215                 to_sensor_dev_attr(attr); \
1216         int nr = sensor_attr->index; \
1217         return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->reg[nr])); \
1218 }
1219 show_temp_reg(reg_temp, temp);
1220 show_temp_reg(reg_temp_over, temp_max);
1221 show_temp_reg(reg_temp_hyst, temp_max_hyst);
1222
1223 #define store_temp_reg(addr, reg) \
1224 static ssize_t \
1225 store_##reg(struct device *dev, struct device_attribute *attr, \
1226             const char *buf, size_t count) \
1227 { \
1228         struct w83627ehf_data *data = dev_get_drvdata(dev); \
1229         struct sensor_device_attribute *sensor_attr = \
1230                 to_sensor_dev_attr(attr); \
1231         int nr = sensor_attr->index; \
1232         int err; \
1233         long val; \
1234         err = kstrtol(buf, 10, &val); \
1235         if (err < 0) \
1236                 return err; \
1237         mutex_lock(&data->update_lock); \
1238         data->reg[nr] = LM75_TEMP_TO_REG(val); \
1239         w83627ehf_write_temp(data, data->addr[nr], data->reg[nr]); \
1240         mutex_unlock(&data->update_lock); \
1241         return count; \
1242 }
1243 store_temp_reg(reg_temp_over, temp_max);
1244 store_temp_reg(reg_temp_hyst, temp_max_hyst);
1245
1246 static ssize_t
1247 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
1248 {
1249         struct w83627ehf_data *data = w83627ehf_update_device(dev);
1250         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1251
1252         return sprintf(buf, "%d\n",
1253                        data->temp_offset[sensor_attr->index] * 1000);
1254 }
1255
1256 static ssize_t
1257 store_temp_offset(struct device *dev, struct device_attribute *attr,
1258                   const char *buf, size_t count)
1259 {
1260         struct w83627ehf_data *data = dev_get_drvdata(dev);
1261         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1262         int nr = sensor_attr->index;
1263         long val;
1264         int err;
1265
1266         err = kstrtol(buf, 10, &val);
1267         if (err < 0)
1268                 return err;
1269
1270         val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
1271
1272         mutex_lock(&data->update_lock);
1273         data->temp_offset[nr] = val;
1274         w83627ehf_write_value(data, W83627EHF_REG_TEMP_OFFSET[nr], val);
1275         mutex_unlock(&data->update_lock);
1276         return count;
1277 }
1278
1279 static ssize_t
1280 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
1281 {
1282         struct w83627ehf_data *data = w83627ehf_update_device(dev);
1283         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1284         int nr = sensor_attr->index;
1285         return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
1286 }
1287
1288 static struct sensor_device_attribute sda_temp_input[] = {
1289         SENSOR_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0),
1290         SENSOR_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1),
1291         SENSOR_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2),
1292         SENSOR_ATTR(temp4_input, S_IRUGO, show_temp, NULL, 3),
1293         SENSOR_ATTR(temp5_input, S_IRUGO, show_temp, NULL, 4),
1294         SENSOR_ATTR(temp6_input, S_IRUGO, show_temp, NULL, 5),
1295         SENSOR_ATTR(temp7_input, S_IRUGO, show_temp, NULL, 6),
1296         SENSOR_ATTR(temp8_input, S_IRUGO, show_temp, NULL, 7),
1297         SENSOR_ATTR(temp9_input, S_IRUGO, show_temp, NULL, 8),
1298 };
1299
1300 static struct sensor_device_attribute sda_temp_label[] = {
1301         SENSOR_ATTR(temp1_label, S_IRUGO, show_temp_label, NULL, 0),
1302         SENSOR_ATTR(temp2_label, S_IRUGO, show_temp_label, NULL, 1),
1303         SENSOR_ATTR(temp3_label, S_IRUGO, show_temp_label, NULL, 2),
1304         SENSOR_ATTR(temp4_label, S_IRUGO, show_temp_label, NULL, 3),
1305         SENSOR_ATTR(temp5_label, S_IRUGO, show_temp_label, NULL, 4),
1306         SENSOR_ATTR(temp6_label, S_IRUGO, show_temp_label, NULL, 5),
1307         SENSOR_ATTR(temp7_label, S_IRUGO, show_temp_label, NULL, 6),
1308         SENSOR_ATTR(temp8_label, S_IRUGO, show_temp_label, NULL, 7),
1309         SENSOR_ATTR(temp9_label, S_IRUGO, show_temp_label, NULL, 8),
1310 };
1311
1312 static struct sensor_device_attribute sda_temp_max[] = {
1313         SENSOR_ATTR(temp1_max, S_IRUGO | S_IWUSR, show_temp_max,
1314                     store_temp_max, 0),
1315         SENSOR_ATTR(temp2_max, S_IRUGO | S_IWUSR, show_temp_max,
1316                     store_temp_max, 1),
1317         SENSOR_ATTR(temp3_max, S_IRUGO | S_IWUSR, show_temp_max,
1318                     store_temp_max, 2),
1319         SENSOR_ATTR(temp4_max, S_IRUGO | S_IWUSR, show_temp_max,
1320                     store_temp_max, 3),
1321         SENSOR_ATTR(temp5_max, S_IRUGO | S_IWUSR, show_temp_max,
1322                     store_temp_max, 4),
1323         SENSOR_ATTR(temp6_max, S_IRUGO | S_IWUSR, show_temp_max,
1324                     store_temp_max, 5),
1325         SENSOR_ATTR(temp7_max, S_IRUGO | S_IWUSR, show_temp_max,
1326                     store_temp_max, 6),
1327         SENSOR_ATTR(temp8_max, S_IRUGO | S_IWUSR, show_temp_max,
1328                     store_temp_max, 7),
1329         SENSOR_ATTR(temp9_max, S_IRUGO | S_IWUSR, show_temp_max,
1330                     store_temp_max, 8),
1331 };
1332
1333 static struct sensor_device_attribute sda_temp_max_hyst[] = {
1334         SENSOR_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1335                     store_temp_max_hyst, 0),
1336         SENSOR_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1337                     store_temp_max_hyst, 1),
1338         SENSOR_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1339                     store_temp_max_hyst, 2),
1340         SENSOR_ATTR(temp4_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1341                     store_temp_max_hyst, 3),
1342         SENSOR_ATTR(temp5_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1343                     store_temp_max_hyst, 4),
1344         SENSOR_ATTR(temp6_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1345                     store_temp_max_hyst, 5),
1346         SENSOR_ATTR(temp7_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1347                     store_temp_max_hyst, 6),
1348         SENSOR_ATTR(temp8_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1349                     store_temp_max_hyst, 7),
1350         SENSOR_ATTR(temp9_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1351                     store_temp_max_hyst, 8),
1352 };
1353
1354 static struct sensor_device_attribute sda_temp_alarm[] = {
1355         SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4),
1356         SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5),
1357         SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13),
1358 };
1359
1360 static struct sensor_device_attribute sda_temp_type[] = {
1361         SENSOR_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0),
1362         SENSOR_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1),
1363         SENSOR_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2),
1364 };
1365
1366 static struct sensor_device_attribute sda_temp_offset[] = {
1367         SENSOR_ATTR(temp1_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1368                     store_temp_offset, 0),
1369         SENSOR_ATTR(temp2_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1370                     store_temp_offset, 1),
1371         SENSOR_ATTR(temp3_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1372                     store_temp_offset, 2),
1373 };
1374
1375 #define show_pwm_reg(reg) \
1376 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1377                           char *buf) \
1378 { \
1379         struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1380         struct sensor_device_attribute *sensor_attr = \
1381                 to_sensor_dev_attr(attr); \
1382         int nr = sensor_attr->index; \
1383         return sprintf(buf, "%d\n", data->reg[nr]); \
1384 }
1385
1386 show_pwm_reg(pwm_mode)
1387 show_pwm_reg(pwm_enable)
1388 show_pwm_reg(pwm)
1389
1390 static ssize_t
1391 store_pwm_mode(struct device *dev, struct device_attribute *attr,
1392                         const char *buf, size_t count)
1393 {
1394         struct w83627ehf_data *data = dev_get_drvdata(dev);
1395         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1396         struct w83627ehf_sio_data *sio_data = dev->platform_data;
1397         int nr = sensor_attr->index;
1398         unsigned long val;
1399         int err;
1400         u16 reg;
1401
1402         err = kstrtoul(buf, 10, &val);
1403         if (err < 0)
1404                 return err;
1405
1406         if (val > 1)
1407                 return -EINVAL;
1408
1409         /* On NCT67766F, DC mode is only supported for pwm1 */
1410         if (sio_data->kind == nct6776 && nr && val != 1)
1411                 return -EINVAL;
1412
1413         mutex_lock(&data->update_lock);
1414         reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
1415         data->pwm_mode[nr] = val;
1416         reg &= ~(1 << W83627EHF_PWM_MODE_SHIFT[nr]);
1417         if (!val)
1418                 reg |= 1 << W83627EHF_PWM_MODE_SHIFT[nr];
1419         w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
1420         mutex_unlock(&data->update_lock);
1421         return count;
1422 }
1423
1424 static ssize_t
1425 store_pwm(struct device *dev, struct device_attribute *attr,
1426                         const char *buf, size_t count)
1427 {
1428         struct w83627ehf_data *data = dev_get_drvdata(dev);
1429         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1430         int nr = sensor_attr->index;
1431         unsigned long val;
1432         int err;
1433
1434         err = kstrtoul(buf, 10, &val);
1435         if (err < 0)
1436                 return err;
1437
1438         val = SENSORS_LIMIT(val, 0, 255);
1439
1440         mutex_lock(&data->update_lock);
1441         data->pwm[nr] = val;
1442         w83627ehf_write_value(data, data->REG_PWM[nr], val);
1443         mutex_unlock(&data->update_lock);
1444         return count;
1445 }
1446
1447 static ssize_t
1448 store_pwm_enable(struct device *dev, struct device_attribute *attr,
1449                         const char *buf, size_t count)
1450 {
1451         struct w83627ehf_data *data = dev_get_drvdata(dev);
1452         struct w83627ehf_sio_data *sio_data = dev->platform_data;
1453         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1454         int nr = sensor_attr->index;
1455         unsigned long val;
1456         int err;
1457         u16 reg;
1458
1459         err = kstrtoul(buf, 10, &val);
1460         if (err < 0)
1461                 return err;
1462
1463         if (!val || (val > 4 && val != data->pwm_enable_orig[nr]))
1464                 return -EINVAL;
1465         /* SmartFan III mode is not supported on NCT6776F */
1466         if (sio_data->kind == nct6776 && val == 4)
1467                 return -EINVAL;
1468
1469         mutex_lock(&data->update_lock);
1470         data->pwm_enable[nr] = val;
1471         if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
1472                 reg = w83627ehf_read_value(data,
1473                                            NCT6775_REG_FAN_MODE[nr]);
1474                 reg &= 0x0f;
1475                 reg |= (val - 1) << 4;
1476                 w83627ehf_write_value(data,
1477                                       NCT6775_REG_FAN_MODE[nr], reg);
1478         } else {
1479                 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
1480                 reg &= ~(0x03 << W83627EHF_PWM_ENABLE_SHIFT[nr]);
1481                 reg |= (val - 1) << W83627EHF_PWM_ENABLE_SHIFT[nr];
1482                 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
1483         }
1484         mutex_unlock(&data->update_lock);
1485         return count;
1486 }
1487
1488
1489 #define show_tol_temp(reg) \
1490 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1491                                 char *buf) \
1492 { \
1493         struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1494         struct sensor_device_attribute *sensor_attr = \
1495                 to_sensor_dev_attr(attr); \
1496         int nr = sensor_attr->index; \
1497         return sprintf(buf, "%d\n", data->reg[nr] * 1000); \
1498 }
1499
1500 show_tol_temp(tolerance)
1501 show_tol_temp(target_temp)
1502
1503 static ssize_t
1504 store_target_temp(struct device *dev, struct device_attribute *attr,
1505                         const char *buf, size_t count)
1506 {
1507         struct w83627ehf_data *data = dev_get_drvdata(dev);
1508         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1509         int nr = sensor_attr->index;
1510         long val;
1511         int err;
1512
1513         err = kstrtol(buf, 10, &val);
1514         if (err < 0)
1515                 return err;
1516
1517         val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), 0, 127);
1518
1519         mutex_lock(&data->update_lock);
1520         data->target_temp[nr] = val;
1521         w83627ehf_write_value(data, data->REG_TARGET[nr], val);
1522         mutex_unlock(&data->update_lock);
1523         return count;
1524 }
1525
1526 static ssize_t
1527 store_tolerance(struct device *dev, struct device_attribute *attr,
1528                         const char *buf, size_t count)
1529 {
1530         struct w83627ehf_data *data = dev_get_drvdata(dev);
1531         struct w83627ehf_sio_data *sio_data = dev->platform_data;
1532         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1533         int nr = sensor_attr->index;
1534         u16 reg;
1535         long val;
1536         int err;
1537
1538         err = kstrtol(buf, 10, &val);
1539         if (err < 0)
1540                 return err;
1541
1542         /* Limit the temp to 0C - 15C */
1543         val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), 0, 15);
1544
1545         mutex_lock(&data->update_lock);
1546         if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
1547                 /* Limit tolerance further for NCT6776F */
1548                 if (sio_data->kind == nct6776 && val > 7)
1549                         val = 7;
1550                 reg = w83627ehf_read_value(data, NCT6775_REG_FAN_MODE[nr]);
1551                 reg = (reg & 0xf0) | val;
1552                 w83627ehf_write_value(data, NCT6775_REG_FAN_MODE[nr], reg);
1553         } else {
1554                 reg = w83627ehf_read_value(data, W83627EHF_REG_TOLERANCE[nr]);
1555                 if (nr == 1)
1556                         reg = (reg & 0x0f) | (val << 4);
1557                 else
1558                         reg = (reg & 0xf0) | val;
1559                 w83627ehf_write_value(data, W83627EHF_REG_TOLERANCE[nr], reg);
1560         }
1561         data->tolerance[nr] = val;
1562         mutex_unlock(&data->update_lock);
1563         return count;
1564 }
1565
1566 static struct sensor_device_attribute sda_pwm[] = {
1567         SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0),
1568         SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1),
1569         SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2),
1570         SENSOR_ATTR(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3),
1571 };
1572
1573 static struct sensor_device_attribute sda_pwm_mode[] = {
1574         SENSOR_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1575                     store_pwm_mode, 0),
1576         SENSOR_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1577                     store_pwm_mode, 1),
1578         SENSOR_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1579                     store_pwm_mode, 2),
1580         SENSOR_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1581                     store_pwm_mode, 3),
1582 };
1583
1584 static struct sensor_device_attribute sda_pwm_enable[] = {
1585         SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1586                     store_pwm_enable, 0),
1587         SENSOR_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1588                     store_pwm_enable, 1),
1589         SENSOR_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1590                     store_pwm_enable, 2),
1591         SENSOR_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1592                     store_pwm_enable, 3),
1593 };
1594
1595 static struct sensor_device_attribute sda_target_temp[] = {
1596         SENSOR_ATTR(pwm1_target, S_IWUSR | S_IRUGO, show_target_temp,
1597                     store_target_temp, 0),
1598         SENSOR_ATTR(pwm2_target, S_IWUSR | S_IRUGO, show_target_temp,
1599                     store_target_temp, 1),
1600         SENSOR_ATTR(pwm3_target, S_IWUSR | S_IRUGO, show_target_temp,
1601                     store_target_temp, 2),
1602         SENSOR_ATTR(pwm4_target, S_IWUSR | S_IRUGO, show_target_temp,
1603                     store_target_temp, 3),
1604 };
1605
1606 static struct sensor_device_attribute sda_tolerance[] = {
1607         SENSOR_ATTR(pwm1_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1608                     store_tolerance, 0),
1609         SENSOR_ATTR(pwm2_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1610                     store_tolerance, 1),
1611         SENSOR_ATTR(pwm3_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1612                     store_tolerance, 2),
1613         SENSOR_ATTR(pwm4_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1614                     store_tolerance, 3),
1615 };
1616
1617 /* Smart Fan registers */
1618
1619 #define fan_functions(reg, REG) \
1620 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1621                        char *buf) \
1622 { \
1623         struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1624         struct sensor_device_attribute *sensor_attr = \
1625                 to_sensor_dev_attr(attr); \
1626         int nr = sensor_attr->index; \
1627         return sprintf(buf, "%d\n", data->reg[nr]); \
1628 } \
1629 static ssize_t \
1630 store_##reg(struct device *dev, struct device_attribute *attr, \
1631                             const char *buf, size_t count) \
1632 { \
1633         struct w83627ehf_data *data = dev_get_drvdata(dev); \
1634         struct sensor_device_attribute *sensor_attr = \
1635                 to_sensor_dev_attr(attr); \
1636         int nr = sensor_attr->index; \
1637         unsigned long val; \
1638         int err; \
1639         err = kstrtoul(buf, 10, &val); \
1640         if (err < 0) \
1641                 return err; \
1642         val = SENSORS_LIMIT(val, 1, 255); \
1643         mutex_lock(&data->update_lock); \
1644         data->reg[nr] = val; \
1645         w83627ehf_write_value(data, data->REG_##REG[nr], val); \
1646         mutex_unlock(&data->update_lock); \
1647         return count; \
1648 }
1649
1650 fan_functions(fan_start_output, FAN_START_OUTPUT)
1651 fan_functions(fan_stop_output, FAN_STOP_OUTPUT)
1652 fan_functions(fan_max_output, FAN_MAX_OUTPUT)
1653 fan_functions(fan_step_output, FAN_STEP_OUTPUT)
1654
1655 #define fan_time_functions(reg, REG) \
1656 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1657                                 char *buf) \
1658 { \
1659         struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1660         struct sensor_device_attribute *sensor_attr = \
1661                 to_sensor_dev_attr(attr); \
1662         int nr = sensor_attr->index; \
1663         return sprintf(buf, "%d\n", \
1664                         step_time_from_reg(data->reg[nr], \
1665                                            data->pwm_mode[nr])); \
1666 } \
1667 \
1668 static ssize_t \
1669 store_##reg(struct device *dev, struct device_attribute *attr, \
1670                         const char *buf, size_t count) \
1671 { \
1672         struct w83627ehf_data *data = dev_get_drvdata(dev); \
1673         struct sensor_device_attribute *sensor_attr = \
1674                 to_sensor_dev_attr(attr); \
1675         int nr = sensor_attr->index; \
1676         unsigned long val; \
1677         int err; \
1678         err = kstrtoul(buf, 10, &val); \
1679         if (err < 0) \
1680                 return err; \
1681         val = step_time_to_reg(val, data->pwm_mode[nr]); \
1682         mutex_lock(&data->update_lock); \
1683         data->reg[nr] = val; \
1684         w83627ehf_write_value(data, data->REG_##REG[nr], val); \
1685         mutex_unlock(&data->update_lock); \
1686         return count; \
1687 } \
1688
1689 fan_time_functions(fan_stop_time, FAN_STOP_TIME)
1690
1691 static ssize_t show_name(struct device *dev, struct device_attribute *attr,
1692                          char *buf)
1693 {
1694         struct w83627ehf_data *data = dev_get_drvdata(dev);
1695
1696         return sprintf(buf, "%s\n", data->name);
1697 }
1698 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1699
1700 static struct sensor_device_attribute sda_sf3_arrays_fan4[] = {
1701         SENSOR_ATTR(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1702                     store_fan_stop_time, 3),
1703         SENSOR_ATTR(pwm4_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1704                     store_fan_start_output, 3),
1705         SENSOR_ATTR(pwm4_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1706                     store_fan_stop_output, 3),
1707         SENSOR_ATTR(pwm4_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1708                     store_fan_max_output, 3),
1709         SENSOR_ATTR(pwm4_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1710                     store_fan_step_output, 3),
1711 };
1712
1713 static struct sensor_device_attribute sda_sf3_arrays_fan3[] = {
1714         SENSOR_ATTR(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1715                     store_fan_stop_time, 2),
1716         SENSOR_ATTR(pwm3_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1717                     store_fan_start_output, 2),
1718         SENSOR_ATTR(pwm3_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1719                     store_fan_stop_output, 2),
1720 };
1721
1722 static struct sensor_device_attribute sda_sf3_arrays[] = {
1723         SENSOR_ATTR(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1724                     store_fan_stop_time, 0),
1725         SENSOR_ATTR(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1726                     store_fan_stop_time, 1),
1727         SENSOR_ATTR(pwm1_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1728                     store_fan_start_output, 0),
1729         SENSOR_ATTR(pwm2_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1730                     store_fan_start_output, 1),
1731         SENSOR_ATTR(pwm1_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1732                     store_fan_stop_output, 0),
1733         SENSOR_ATTR(pwm2_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1734                     store_fan_stop_output, 1),
1735 };
1736
1737
1738 /*
1739  * pwm1 and pwm3 don't support max and step settings on all chips.
1740  * Need to check support while generating/removing attribute files.
1741  */
1742 static struct sensor_device_attribute sda_sf3_max_step_arrays[] = {
1743         SENSOR_ATTR(pwm1_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1744                     store_fan_max_output, 0),
1745         SENSOR_ATTR(pwm1_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1746                     store_fan_step_output, 0),
1747         SENSOR_ATTR(pwm2_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1748                     store_fan_max_output, 1),
1749         SENSOR_ATTR(pwm2_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1750                     store_fan_step_output, 1),
1751         SENSOR_ATTR(pwm3_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1752                     store_fan_max_output, 2),
1753         SENSOR_ATTR(pwm3_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1754                     store_fan_step_output, 2),
1755 };
1756
1757 static ssize_t
1758 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
1759 {
1760         struct w83627ehf_data *data = dev_get_drvdata(dev);
1761         return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1762 }
1763 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
1764
1765
1766 /* Case open detection */
1767
1768 static ssize_t
1769 show_caseopen(struct device *dev, struct device_attribute *attr, char *buf)
1770 {
1771         struct w83627ehf_data *data = w83627ehf_update_device(dev);
1772
1773         return sprintf(buf, "%d\n",
1774                 !!(data->caseopen & to_sensor_dev_attr_2(attr)->index));
1775 }
1776
1777 static ssize_t
1778 clear_caseopen(struct device *dev, struct device_attribute *attr,
1779                         const char *buf, size_t count)
1780 {
1781         struct w83627ehf_data *data = dev_get_drvdata(dev);
1782         unsigned long val;
1783         u16 reg, mask;
1784
1785         if (kstrtoul(buf, 10, &val) || val != 0)
1786                 return -EINVAL;
1787
1788         mask = to_sensor_dev_attr_2(attr)->nr;
1789
1790         mutex_lock(&data->update_lock);
1791         reg = w83627ehf_read_value(data, W83627EHF_REG_CASEOPEN_CLR);
1792         w83627ehf_write_value(data, W83627EHF_REG_CASEOPEN_CLR, reg | mask);
1793         w83627ehf_write_value(data, W83627EHF_REG_CASEOPEN_CLR, reg & ~mask);
1794         data->valid = 0;        /* Force cache refresh */
1795         mutex_unlock(&data->update_lock);
1796
1797         return count;
1798 }
1799
1800 static struct sensor_device_attribute_2 sda_caseopen[] = {
1801         SENSOR_ATTR_2(intrusion0_alarm, S_IWUSR | S_IRUGO, show_caseopen,
1802                         clear_caseopen, 0x80, 0x10),
1803         SENSOR_ATTR_2(intrusion1_alarm, S_IWUSR | S_IRUGO, show_caseopen,
1804                         clear_caseopen, 0x40, 0x40),
1805 };
1806
1807 /*
1808  * Driver and device management
1809  */
1810
1811 static void w83627ehf_device_remove_files(struct device *dev)
1812 {
1813         /*
1814          * some entries in the following arrays may not have been used in
1815          * device_create_file(), but device_remove_file() will ignore them
1816          */
1817         int i;
1818         struct w83627ehf_data *data = dev_get_drvdata(dev);
1819
1820         for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
1821                 device_remove_file(dev, &sda_sf3_arrays[i].dev_attr);
1822         for (i = 0; i < ARRAY_SIZE(sda_sf3_max_step_arrays); i++) {
1823                 struct sensor_device_attribute *attr =
1824                   &sda_sf3_max_step_arrays[i];
1825                 if (data->REG_FAN_STEP_OUTPUT &&
1826                     data->REG_FAN_STEP_OUTPUT[attr->index] != 0xff)
1827                         device_remove_file(dev, &attr->dev_attr);
1828         }
1829         for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan3); i++)
1830                 device_remove_file(dev, &sda_sf3_arrays_fan3[i].dev_attr);
1831         for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++)
1832                 device_remove_file(dev, &sda_sf3_arrays_fan4[i].dev_attr);
1833         for (i = 0; i < data->in_num; i++) {
1834                 if ((i == 6) && data->in6_skip)
1835                         continue;
1836                 device_remove_file(dev, &sda_in_input[i].dev_attr);
1837                 device_remove_file(dev, &sda_in_alarm[i].dev_attr);
1838                 device_remove_file(dev, &sda_in_min[i].dev_attr);
1839                 device_remove_file(dev, &sda_in_max[i].dev_attr);
1840         }
1841         for (i = 0; i < 5; i++) {
1842                 device_remove_file(dev, &sda_fan_input[i].dev_attr);
1843                 device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
1844                 device_remove_file(dev, &sda_fan_div[i].dev_attr);
1845                 device_remove_file(dev, &sda_fan_min[i].dev_attr);
1846         }
1847         for (i = 0; i < data->pwm_num; i++) {
1848                 device_remove_file(dev, &sda_pwm[i].dev_attr);
1849                 device_remove_file(dev, &sda_pwm_mode[i].dev_attr);
1850                 device_remove_file(dev, &sda_pwm_enable[i].dev_attr);
1851                 device_remove_file(dev, &sda_target_temp[i].dev_attr);
1852                 device_remove_file(dev, &sda_tolerance[i].dev_attr);
1853         }
1854         for (i = 0; i < NUM_REG_TEMP; i++) {
1855                 if (!(data->have_temp & (1 << i)))
1856                         continue;
1857                 device_remove_file(dev, &sda_temp_input[i].dev_attr);
1858                 device_remove_file(dev, &sda_temp_label[i].dev_attr);
1859                 if (i == 2 && data->temp3_val_only)
1860                         continue;
1861                 device_remove_file(dev, &sda_temp_max[i].dev_attr);
1862                 device_remove_file(dev, &sda_temp_max_hyst[i].dev_attr);
1863                 if (i > 2)
1864                         continue;
1865                 device_remove_file(dev, &sda_temp_alarm[i].dev_attr);
1866                 device_remove_file(dev, &sda_temp_type[i].dev_attr);
1867                 device_remove_file(dev, &sda_temp_offset[i].dev_attr);
1868         }
1869
1870         device_remove_file(dev, &sda_caseopen[0].dev_attr);
1871         device_remove_file(dev, &sda_caseopen[1].dev_attr);
1872
1873         device_remove_file(dev, &dev_attr_name);
1874         device_remove_file(dev, &dev_attr_cpu0_vid);
1875 }
1876
1877 /* Get the monitoring functions started */
1878 static inline void w83627ehf_init_device(struct w83627ehf_data *data,
1879                                                    enum kinds kind)
1880 {
1881         int i;
1882         u8 tmp, diode;
1883
1884         /* Start monitoring is needed */
1885         tmp = w83627ehf_read_value(data, W83627EHF_REG_CONFIG);
1886         if (!(tmp & 0x01))
1887                 w83627ehf_write_value(data, W83627EHF_REG_CONFIG,
1888                                       tmp | 0x01);
1889
1890         /* Enable temperature sensors if needed */
1891         for (i = 0; i < NUM_REG_TEMP; i++) {
1892                 if (!(data->have_temp & (1 << i)))
1893                         continue;
1894                 if (!data->reg_temp_config[i])
1895                         continue;
1896                 tmp = w83627ehf_read_value(data,
1897                                            data->reg_temp_config[i]);
1898                 if (tmp & 0x01)
1899                         w83627ehf_write_value(data,
1900                                               data->reg_temp_config[i],
1901                                               tmp & 0xfe);
1902         }
1903
1904         /* Enable VBAT monitoring if needed */
1905         tmp = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
1906         if (!(tmp & 0x01))
1907                 w83627ehf_write_value(data, W83627EHF_REG_VBAT, tmp | 0x01);
1908
1909         /* Get thermal sensor types */
1910         switch (kind) {
1911         case w83627ehf:
1912                 diode = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
1913                 break;
1914         case w83627uhg:
1915                 diode = 0x00;
1916                 break;
1917         default:
1918                 diode = 0x70;
1919         }
1920         for (i = 0; i < 3; i++) {
1921                 const char *label = NULL;
1922
1923                 if (data->temp_label)
1924                         label = data->temp_label[data->temp_src[i]];
1925
1926                 /* Digital source overrides analog type */
1927                 if (label && strncmp(label, "PECI", 4) == 0)
1928                         data->temp_type[i] = 6;
1929                 else if (label && strncmp(label, "AMD", 3) == 0)
1930                         data->temp_type[i] = 5;
1931                 else if ((tmp & (0x02 << i)))
1932                         data->temp_type[i] = (diode & (0x10 << i)) ? 1 : 3;
1933                 else
1934                         data->temp_type[i] = 4; /* thermistor */
1935         }
1936 }
1937
1938 static void w82627ehf_swap_tempreg(struct w83627ehf_data *data,
1939                                    int r1, int r2)
1940 {
1941         u16 tmp;
1942
1943         tmp = data->temp_src[r1];
1944         data->temp_src[r1] = data->temp_src[r2];
1945         data->temp_src[r2] = tmp;
1946
1947         tmp = data->reg_temp[r1];
1948         data->reg_temp[r1] = data->reg_temp[r2];
1949         data->reg_temp[r2] = tmp;
1950
1951         tmp = data->reg_temp_over[r1];
1952         data->reg_temp_over[r1] = data->reg_temp_over[r2];
1953         data->reg_temp_over[r2] = tmp;
1954
1955         tmp = data->reg_temp_hyst[r1];
1956         data->reg_temp_hyst[r1] = data->reg_temp_hyst[r2];
1957         data->reg_temp_hyst[r2] = tmp;
1958
1959         tmp = data->reg_temp_config[r1];
1960         data->reg_temp_config[r1] = data->reg_temp_config[r2];
1961         data->reg_temp_config[r2] = tmp;
1962 }
1963
1964 static void
1965 w83627ehf_set_temp_reg_ehf(struct w83627ehf_data *data, int n_temp)
1966 {
1967         int i;
1968
1969         for (i = 0; i < n_temp; i++) {
1970                 data->reg_temp[i] = W83627EHF_REG_TEMP[i];
1971                 data->reg_temp_over[i] = W83627EHF_REG_TEMP_OVER[i];
1972                 data->reg_temp_hyst[i] = W83627EHF_REG_TEMP_HYST[i];
1973                 data->reg_temp_config[i] = W83627EHF_REG_TEMP_CONFIG[i];
1974         }
1975 }
1976
1977 static void
1978 w83627ehf_check_fan_inputs(const struct w83627ehf_sio_data *sio_data,
1979                            struct w83627ehf_data *data)
1980 {
1981         int fan3pin, fan4pin, fan4min, fan5pin, regval;
1982
1983         /* The W83627UHG is simple, only two fan inputs, no config */
1984         if (sio_data->kind == w83627uhg) {
1985                 data->has_fan = 0x03; /* fan1 and fan2 */
1986                 data->has_fan_min = 0x03;
1987                 return;
1988         }
1989
1990         superio_enter(sio_data->sioreg);
1991
1992         /* fan4 and fan5 share some pins with the GPIO and serial flash */
1993         if (sio_data->kind == nct6775) {
1994                 /* On NCT6775, fan4 shares pins with the fdc interface */
1995                 fan3pin = 1;
1996                 fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
1997                 fan4min = 0;
1998                 fan5pin = 0;
1999         } else if (sio_data->kind == nct6776) {
2000                 bool gpok = superio_inb(sio_data->sioreg, 0x27) & 0x80;
2001
2002                 superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
2003                 regval = superio_inb(sio_data->sioreg, SIO_REG_ENABLE);
2004
2005                 if (regval & 0x80)
2006                         fan3pin = gpok;
2007                 else
2008                         fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
2009
2010                 if (regval & 0x40)
2011                         fan4pin = gpok;
2012                 else
2013                         fan4pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x01);
2014
2015                 if (regval & 0x20)
2016                         fan5pin = gpok;
2017                 else
2018                         fan5pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x02);
2019
2020                 fan4min = fan4pin;
2021         } else if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b) {
2022                 fan3pin = 1;
2023                 fan4pin = superio_inb(sio_data->sioreg, 0x27) & 0x40;
2024                 fan5pin = superio_inb(sio_data->sioreg, 0x27) & 0x20;
2025                 fan4min = fan4pin;
2026         } else {
2027                 fan3pin = 1;
2028                 fan4pin = !(superio_inb(sio_data->sioreg, 0x29) & 0x06);
2029                 fan5pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x02);
2030                 fan4min = fan4pin;
2031         }
2032
2033         superio_exit(sio_data->sioreg);
2034
2035         data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
2036         data->has_fan |= (fan3pin << 2);
2037         data->has_fan_min |= (fan3pin << 2);
2038
2039         if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
2040                 /*
2041                  * NCT6775F and NCT6776F don't have the W83627EHF_REG_FANDIV1
2042                  * register
2043                  */
2044                 data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
2045                 data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
2046         } else {
2047                 /*
2048                  * It looks like fan4 and fan5 pins can be alternatively used
2049                  * as fan on/off switches, but fan5 control is write only :/
2050                  * We assume that if the serial interface is disabled, designers
2051                  * connected fan5 as input unless they are emitting log 1, which
2052                  * is not the default.
2053                  */
2054                 regval = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
2055                 if ((regval & (1 << 2)) && fan4pin) {
2056                         data->has_fan |= (1 << 3);
2057                         data->has_fan_min |= (1 << 3);
2058                 }
2059                 if (!(regval & (1 << 1)) && fan5pin) {
2060                         data->has_fan |= (1 << 4);
2061                         data->has_fan_min |= (1 << 4);
2062                 }
2063         }
2064 }
2065
2066 static int w83627ehf_probe(struct platform_device *pdev)
2067 {
2068         struct device *dev = &pdev->dev;
2069         struct w83627ehf_sio_data *sio_data = dev->platform_data;
2070         struct w83627ehf_data *data;
2071         struct resource *res;
2072         u8 en_vrm10;
2073         int i, err = 0;
2074
2075         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
2076         if (!request_region(res->start, IOREGION_LENGTH, DRVNAME)) {
2077                 err = -EBUSY;
2078                 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
2079                         (unsigned long)res->start,
2080                         (unsigned long)res->start + IOREGION_LENGTH - 1);
2081                 goto exit;
2082         }
2083
2084         data = devm_kzalloc(&pdev->dev, sizeof(struct w83627ehf_data),
2085                             GFP_KERNEL);
2086         if (!data) {
2087                 err = -ENOMEM;
2088                 goto exit_release;
2089         }
2090
2091         data->addr = res->start;
2092         mutex_init(&data->lock);
2093         mutex_init(&data->update_lock);
2094         data->name = w83627ehf_device_names[sio_data->kind];
2095         data->bank = 0xff;              /* Force initial bank selection */
2096         platform_set_drvdata(pdev, data);
2097
2098         /* 627EHG and 627EHF have 10 voltage inputs; 627DHG and 667HG have 9 */
2099         data->in_num = (sio_data->kind == w83627ehf) ? 10 : 9;
2100         /* 667HG, NCT6775F, and NCT6776F have 3 pwms, and 627UHG has only 2 */
2101         switch (sio_data->kind) {
2102         default:
2103                 data->pwm_num = 4;
2104                 break;
2105         case w83667hg:
2106         case w83667hg_b:
2107         case nct6775:
2108         case nct6776:
2109                 data->pwm_num = 3;
2110                 break;
2111         case w83627uhg:
2112                 data->pwm_num = 2;
2113                 break;
2114         }
2115
2116         /* Default to 3 temperature inputs, code below will adjust as needed */
2117         data->have_temp = 0x07;
2118
2119         /* Deal with temperature register setup first. */
2120         if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
2121                 int mask = 0;
2122
2123                 /*
2124                  * Display temperature sensor output only if it monitors
2125                  * a source other than one already reported. Always display
2126                  * first three temperature registers, though.
2127                  */
2128                 for (i = 0; i < NUM_REG_TEMP; i++) {
2129                         u8 src;
2130
2131                         data->reg_temp[i] = NCT6775_REG_TEMP[i];
2132                         data->reg_temp_over[i] = NCT6775_REG_TEMP_OVER[i];
2133                         data->reg_temp_hyst[i] = NCT6775_REG_TEMP_HYST[i];
2134                         data->reg_temp_config[i] = NCT6775_REG_TEMP_CONFIG[i];
2135
2136                         src = w83627ehf_read_value(data,
2137                                                    NCT6775_REG_TEMP_SOURCE[i]);
2138                         src &= 0x1f;
2139                         if (src && !(mask & (1 << src))) {
2140                                 data->have_temp |= 1 << i;
2141                                 mask |= 1 << src;
2142                         }
2143
2144                         data->temp_src[i] = src;
2145
2146                         /*
2147                          * Now do some register swapping if index 0..2 don't
2148                          * point to SYSTIN(1), CPUIN(2), and AUXIN(3).
2149                          * Idea is to have the first three attributes
2150                          * report SYSTIN, CPUIN, and AUXIN if possible
2151                          * without overriding the basic system configuration.
2152                          */
2153                         if (i > 0 && data->temp_src[0] != 1
2154                             && data->temp_src[i] == 1)
2155                                 w82627ehf_swap_tempreg(data, 0, i);
2156                         if (i > 1 && data->temp_src[1] != 2
2157                             && data->temp_src[i] == 2)
2158                                 w82627ehf_swap_tempreg(data, 1, i);
2159                         if (i > 2 && data->temp_src[2] != 3
2160                             && data->temp_src[i] == 3)
2161                                 w82627ehf_swap_tempreg(data, 2, i);
2162                 }
2163                 if (sio_data->kind == nct6776) {
2164                         /*
2165                          * On NCT6776, AUXTIN and VIN3 pins are shared.
2166                          * Only way to detect it is to check if AUXTIN is used
2167                          * as a temperature source, and if that source is
2168                          * enabled.
2169                          *
2170                          * If that is the case, disable in6, which reports VIN3.
2171                          * Otherwise disable temp3.
2172                          */
2173                         if (data->temp_src[2] == 3) {
2174                                 u8 reg;
2175
2176                                 if (data->reg_temp_config[2])
2177                                         reg = w83627ehf_read_value(data,
2178                                                 data->reg_temp_config[2]);
2179                                 else
2180                                         reg = 0; /* Assume AUXTIN is used */
2181
2182                                 if (reg & 0x01)
2183                                         data->have_temp &= ~(1 << 2);
2184                                 else
2185                                         data->in6_skip = 1;
2186                         }
2187                         data->temp_label = nct6776_temp_label;
2188                 } else {
2189                         data->temp_label = nct6775_temp_label;
2190                 }
2191                 data->have_temp_offset = data->have_temp & 0x07;
2192                 for (i = 0; i < 3; i++) {
2193                         if (data->temp_src[i] > 3)
2194                                 data->have_temp_offset &= ~(1 << i);
2195                 }
2196         } else if (sio_data->kind == w83667hg_b) {
2197                 u8 reg;
2198
2199                 w83627ehf_set_temp_reg_ehf(data, 4);
2200
2201                 /*
2202                  * Temperature sources are selected with bank 0, registers 0x49
2203                  * and 0x4a.
2204                  */
2205                 reg = w83627ehf_read_value(data, 0x4a);
2206                 data->temp_src[0] = reg >> 5;
2207                 reg = w83627ehf_read_value(data, 0x49);
2208                 data->temp_src[1] = reg & 0x07;
2209                 data->temp_src[2] = (reg >> 4) & 0x07;
2210
2211                 /*
2212                  * W83667HG-B has another temperature register at 0x7e.
2213                  * The temperature source is selected with register 0x7d.
2214                  * Support it if the source differs from already reported
2215                  * sources.
2216                  */
2217                 reg = w83627ehf_read_value(data, 0x7d);
2218                 reg &= 0x07;
2219                 if (reg != data->temp_src[0] && reg != data->temp_src[1]
2220                     && reg != data->temp_src[2]) {
2221                         data->temp_src[3] = reg;
2222                         data->have_temp |= 1 << 3;
2223                 }
2224
2225                 /*
2226                  * Chip supports either AUXTIN or VIN3. Try to find out which
2227                  * one.
2228                  */
2229                 reg = w83627ehf_read_value(data, W83627EHF_REG_TEMP_CONFIG[2]);
2230                 if (data->temp_src[2] == 2 && (reg & 0x01))
2231                         data->have_temp &= ~(1 << 2);
2232
2233                 if ((data->temp_src[2] == 2 && (data->have_temp & (1 << 2)))
2234                     || (data->temp_src[3] == 2 && (data->have_temp & (1 << 3))))
2235                         data->in6_skip = 1;
2236
2237                 data->temp_label = w83667hg_b_temp_label;
2238                 data->have_temp_offset = data->have_temp & 0x07;
2239                 for (i = 0; i < 3; i++) {
2240                         if (data->temp_src[i] > 2)
2241                                 data->have_temp_offset &= ~(1 << i);
2242                 }
2243         } else if (sio_data->kind == w83627uhg) {
2244                 u8 reg;
2245
2246                 w83627ehf_set_temp_reg_ehf(data, 3);
2247
2248                 /*
2249                  * Temperature sources for temp2 and temp3 are selected with
2250                  * bank 0, registers 0x49 and 0x4a.
2251                  */
2252                 data->temp_src[0] = 0;  /* SYSTIN */
2253                 reg = w83627ehf_read_value(data, 0x49) & 0x07;
2254                 /* Adjust to have the same mapping as other source registers */
2255                 if (reg == 0)
2256                         data->temp_src[1] = 1;
2257                 else if (reg >= 2 && reg <= 5)
2258                         data->temp_src[1] = reg + 2;
2259                 else    /* should never happen */
2260                         data->have_temp &= ~(1 << 1);
2261                 reg = w83627ehf_read_value(data, 0x4a);
2262                 data->temp_src[2] = reg >> 5;
2263
2264                 /*
2265                  * Skip temp3 if source is invalid or the same as temp1
2266                  * or temp2.
2267                  */
2268                 if (data->temp_src[2] == 2 || data->temp_src[2] == 3 ||
2269                     data->temp_src[2] == data->temp_src[0] ||
2270                     ((data->have_temp & (1 << 1)) &&
2271                      data->temp_src[2] == data->temp_src[1]))
2272                         data->have_temp &= ~(1 << 2);
2273                 else
2274                         data->temp3_val_only = 1;       /* No limit regs */
2275
2276                 data->in6_skip = 1;                     /* No VIN3 */
2277
2278                 data->temp_label = w83667hg_b_temp_label;
2279                 data->have_temp_offset = data->have_temp & 0x03;
2280                 for (i = 0; i < 3; i++) {
2281                         if (data->temp_src[i] > 1)
2282                                 data->have_temp_offset &= ~(1 << i);
2283                 }
2284         } else {
2285                 w83627ehf_set_temp_reg_ehf(data, 3);
2286
2287                 /* Temperature sources are fixed */
2288
2289                 if (sio_data->kind == w83667hg) {
2290                         u8 reg;
2291
2292                         /*
2293                          * Chip supports either AUXTIN or VIN3. Try to find
2294                          * out which one.
2295                          */
2296                         reg = w83627ehf_read_value(data,
2297                                                 W83627EHF_REG_TEMP_CONFIG[2]);
2298                         if (reg & 0x01)
2299                                 data->have_temp &= ~(1 << 2);
2300                         else
2301                                 data->in6_skip = 1;
2302                 }
2303                 data->have_temp_offset = data->have_temp & 0x07;
2304         }
2305
2306         if (sio_data->kind == nct6775) {
2307                 data->has_fan_div = true;
2308                 data->fan_from_reg = fan_from_reg16;
2309                 data->fan_from_reg_min = fan_from_reg8;
2310                 data->REG_PWM = NCT6775_REG_PWM;
2311                 data->REG_TARGET = NCT6775_REG_TARGET;
2312                 data->REG_FAN = NCT6775_REG_FAN;
2313                 data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;
2314                 data->REG_FAN_START_OUTPUT = NCT6775_REG_FAN_START_OUTPUT;
2315                 data->REG_FAN_STOP_OUTPUT = NCT6775_REG_FAN_STOP_OUTPUT;
2316                 data->REG_FAN_STOP_TIME = NCT6775_REG_FAN_STOP_TIME;
2317                 data->REG_FAN_MAX_OUTPUT = NCT6775_REG_FAN_MAX_OUTPUT;
2318                 data->REG_FAN_STEP_OUTPUT = NCT6775_REG_FAN_STEP_OUTPUT;
2319         } else if (sio_data->kind == nct6776) {
2320                 data->has_fan_div = false;
2321                 data->fan_from_reg = fan_from_reg13;
2322                 data->fan_from_reg_min = fan_from_reg13;
2323                 data->REG_PWM = NCT6775_REG_PWM;
2324                 data->REG_TARGET = NCT6775_REG_TARGET;
2325                 data->REG_FAN = NCT6775_REG_FAN;
2326                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
2327                 data->REG_FAN_START_OUTPUT = NCT6775_REG_FAN_START_OUTPUT;
2328                 data->REG_FAN_STOP_OUTPUT = NCT6775_REG_FAN_STOP_OUTPUT;
2329                 data->REG_FAN_STOP_TIME = NCT6775_REG_FAN_STOP_TIME;
2330         } else if (sio_data->kind == w83667hg_b) {
2331                 data->has_fan_div = true;
2332                 data->fan_from_reg = fan_from_reg8;
2333                 data->fan_from_reg_min = fan_from_reg8;
2334                 data->REG_PWM = W83627EHF_REG_PWM;
2335                 data->REG_TARGET = W83627EHF_REG_TARGET;
2336                 data->REG_FAN = W83627EHF_REG_FAN;
2337                 data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;
2338                 data->REG_FAN_START_OUTPUT = W83627EHF_REG_FAN_START_OUTPUT;
2339                 data->REG_FAN_STOP_OUTPUT = W83627EHF_REG_FAN_STOP_OUTPUT;
2340                 data->REG_FAN_STOP_TIME = W83627EHF_REG_FAN_STOP_TIME;
2341                 data->REG_FAN_MAX_OUTPUT =
2342                   W83627EHF_REG_FAN_MAX_OUTPUT_W83667_B;
2343                 data->REG_FAN_STEP_OUTPUT =
2344                   W83627EHF_REG_FAN_STEP_OUTPUT_W83667_B;
2345         } else {
2346                 data->has_fan_div = true;
2347                 data->fan_from_reg = fan_from_reg8;
2348                 data->fan_from_reg_min = fan_from_reg8;
2349                 data->REG_PWM = W83627EHF_REG_PWM;
2350                 data->REG_TARGET = W83627EHF_REG_TARGET;
2351                 data->REG_FAN = W83627EHF_REG_FAN;
2352                 data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;
2353                 data->REG_FAN_START_OUTPUT = W83627EHF_REG_FAN_START_OUTPUT;
2354                 data->REG_FAN_STOP_OUTPUT = W83627EHF_REG_FAN_STOP_OUTPUT;
2355                 data->REG_FAN_STOP_TIME = W83627EHF_REG_FAN_STOP_TIME;
2356                 data->REG_FAN_MAX_OUTPUT =
2357                   W83627EHF_REG_FAN_MAX_OUTPUT_COMMON;
2358                 data->REG_FAN_STEP_OUTPUT =
2359                   W83627EHF_REG_FAN_STEP_OUTPUT_COMMON;
2360         }
2361
2362         /* Setup input voltage scaling factors */
2363         if (sio_data->kind == w83627uhg)
2364                 data->scale_in = scale_in_w83627uhg;
2365         else
2366                 data->scale_in = scale_in_common;
2367
2368         /* Initialize the chip */
2369         w83627ehf_init_device(data, sio_data->kind);
2370
2371         data->vrm = vid_which_vrm();
2372         superio_enter(sio_data->sioreg);
2373         /* Read VID value */
2374         if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b ||
2375             sio_data->kind == nct6775 || sio_data->kind == nct6776) {
2376                 /*
2377                  * W83667HG has different pins for VID input and output, so
2378                  * we can get the VID input values directly at logical device D
2379                  * 0xe3.
2380                  */
2381                 superio_select(sio_data->sioreg, W83667HG_LD_VID);
2382                 data->vid = superio_inb(sio_data->sioreg, 0xe3);
2383                 err = device_create_file(dev, &dev_attr_cpu0_vid);
2384                 if (err)
2385                         goto exit_release;
2386         } else if (sio_data->kind != w83627uhg) {
2387                 superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
2388                 if (superio_inb(sio_data->sioreg, SIO_REG_VID_CTRL) & 0x80) {
2389                         /*
2390                          * Set VID input sensibility if needed. In theory the
2391                          * BIOS should have set it, but in practice it's not
2392                          * always the case. We only do it for the W83627EHF/EHG
2393                          * because the W83627DHG is more complex in this
2394                          * respect.
2395                          */
2396                         if (sio_data->kind == w83627ehf) {
2397                                 en_vrm10 = superio_inb(sio_data->sioreg,
2398                                                        SIO_REG_EN_VRM10);
2399                                 if ((en_vrm10 & 0x08) && data->vrm == 90) {
2400                                         dev_warn(dev, "Setting VID input "
2401                                                  "voltage to TTL\n");
2402                                         superio_outb(sio_data->sioreg,
2403                                                      SIO_REG_EN_VRM10,
2404                                                      en_vrm10 & ~0x08);
2405                                 } else if (!(en_vrm10 & 0x08)
2406                                            && data->vrm == 100) {
2407                                         dev_warn(dev, "Setting VID input "
2408                                                  "voltage to VRM10\n");
2409                                         superio_outb(sio_data->sioreg,
2410                                                      SIO_REG_EN_VRM10,
2411                                                      en_vrm10 | 0x08);
2412                                 }
2413                         }
2414
2415                         data->vid = superio_inb(sio_data->sioreg,
2416                                                 SIO_REG_VID_DATA);
2417                         if (sio_data->kind == w83627ehf) /* 6 VID pins only */
2418                                 data->vid &= 0x3f;
2419
2420                         err = device_create_file(dev, &dev_attr_cpu0_vid);
2421                         if (err)
2422                                 goto exit_release;
2423                 } else {
2424                         dev_info(dev, "VID pins in output mode, CPU VID not "
2425                                  "available\n");
2426                 }
2427         }
2428
2429         if (fan_debounce &&
2430             (sio_data->kind == nct6775 || sio_data->kind == nct6776)) {
2431                 u8 tmp;
2432
2433                 superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
2434                 tmp = superio_inb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE);
2435                 if (sio_data->kind == nct6776)
2436                         superio_outb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE,
2437                                      0x3e | tmp);
2438                 else
2439                         superio_outb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE,
2440                                      0x1e | tmp);
2441                 pr_info("Enabled fan debounce for chip %s\n", data->name);
2442         }
2443
2444         superio_exit(sio_data->sioreg);
2445
2446         w83627ehf_check_fan_inputs(sio_data, data);
2447
2448         /* Read fan clock dividers immediately */
2449         w83627ehf_update_fan_div_common(dev, data);
2450
2451         /* Read pwm data to save original values */
2452         w83627ehf_update_pwm_common(dev, data);
2453         for (i = 0; i < data->pwm_num; i++)
2454                 data->pwm_enable_orig[i] = data->pwm_enable[i];
2455
2456         /* Register sysfs hooks */
2457         for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++) {
2458                 err = device_create_file(dev, &sda_sf3_arrays[i].dev_attr);
2459                 if (err)
2460                         goto exit_remove;
2461         }
2462
2463         for (i = 0; i < ARRAY_SIZE(sda_sf3_max_step_arrays); i++) {
2464                 struct sensor_device_attribute *attr =
2465                   &sda_sf3_max_step_arrays[i];
2466                 if (data->REG_FAN_STEP_OUTPUT &&
2467                     data->REG_FAN_STEP_OUTPUT[attr->index] != 0xff) {
2468                         err = device_create_file(dev, &attr->dev_attr);
2469                         if (err)
2470                                 goto exit_remove;
2471                 }
2472         }
2473         /* if fan3 and fan4 are enabled create the sf3 files for them */
2474         if ((data->has_fan & (1 << 2)) && data->pwm_num >= 3)
2475                 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan3); i++) {
2476                         err = device_create_file(dev,
2477                                         &sda_sf3_arrays_fan3[i].dev_attr);
2478                         if (err)
2479                                 goto exit_remove;
2480                 }
2481         if ((data->has_fan & (1 << 3)) && data->pwm_num >= 4)
2482                 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++) {
2483                         err = device_create_file(dev,
2484                                         &sda_sf3_arrays_fan4[i].dev_attr);
2485                         if (err)
2486                                 goto exit_remove;
2487                 }
2488
2489         for (i = 0; i < data->in_num; i++) {
2490                 if ((i == 6) && data->in6_skip)
2491                         continue;
2492                 if ((err = device_create_file(dev, &sda_in_input[i].dev_attr))
2493                         || (err = device_create_file(dev,
2494                                 &sda_in_alarm[i].dev_attr))
2495                         || (err = device_create_file(dev,
2496                                 &sda_in_min[i].dev_attr))
2497                         || (err = device_create_file(dev,
2498                                 &sda_in_max[i].dev_attr)))
2499                         goto exit_remove;
2500         }
2501
2502         for (i = 0; i < 5; i++) {
2503                 if (data->has_fan & (1 << i)) {
2504                         if ((err = device_create_file(dev,
2505                                         &sda_fan_input[i].dev_attr))
2506                                 || (err = device_create_file(dev,
2507                                         &sda_fan_alarm[i].dev_attr)))
2508                                 goto exit_remove;
2509                         if (sio_data->kind != nct6776) {
2510                                 err = device_create_file(dev,
2511                                                 &sda_fan_div[i].dev_attr);
2512                                 if (err)
2513                                         goto exit_remove;
2514                         }
2515                         if (data->has_fan_min & (1 << i)) {
2516                                 err = device_create_file(dev,
2517                                                 &sda_fan_min[i].dev_attr);
2518                                 if (err)
2519                                         goto exit_remove;
2520                         }
2521                         if (i < data->pwm_num &&
2522                                 ((err = device_create_file(dev,
2523                                         &sda_pwm[i].dev_attr))
2524                                 || (err = device_create_file(dev,
2525                                         &sda_pwm_mode[i].dev_attr))
2526                                 || (err = device_create_file(dev,
2527                                         &sda_pwm_enable[i].dev_attr))
2528                                 || (err = device_create_file(dev,
2529                                         &sda_target_temp[i].dev_attr))
2530                                 || (err = device_create_file(dev,
2531                                         &sda_tolerance[i].dev_attr))))
2532                                 goto exit_remove;
2533                 }
2534         }
2535
2536         for (i = 0; i < NUM_REG_TEMP; i++) {
2537                 if (!(data->have_temp & (1 << i)))
2538                         continue;
2539                 err = device_create_file(dev, &sda_temp_input[i].dev_attr);
2540                 if (err)
2541                         goto exit_remove;
2542                 if (data->temp_label) {
2543                         err = device_create_file(dev,
2544                                                  &sda_temp_label[i].dev_attr);
2545                         if (err)
2546                                 goto exit_remove;
2547                 }
2548                 if (i == 2 && data->temp3_val_only)
2549                         continue;
2550                 if (data->reg_temp_over[i]) {
2551                         err = device_create_file(dev,
2552                                 &sda_temp_max[i].dev_attr);
2553                         if (err)
2554                                 goto exit_remove;
2555                 }
2556                 if (data->reg_temp_hyst[i]) {
2557                         err = device_create_file(dev,
2558                                 &sda_temp_max_hyst[i].dev_attr);
2559                         if (err)
2560                                 goto exit_remove;
2561                 }
2562                 if (i > 2)
2563                         continue;
2564                 if ((err = device_create_file(dev,
2565                                 &sda_temp_alarm[i].dev_attr))
2566                         || (err = device_create_file(dev,
2567                                 &sda_temp_type[i].dev_attr)))
2568                         goto exit_remove;
2569                 if (data->have_temp_offset & (1 << i)) {
2570                         err = device_create_file(dev,
2571                                                  &sda_temp_offset[i].dev_attr);
2572                         if (err)
2573                                 goto exit_remove;
2574                 }
2575         }
2576
2577         err = device_create_file(dev, &sda_caseopen[0].dev_attr);
2578         if (err)
2579                 goto exit_remove;
2580
2581         if (sio_data->kind == nct6776) {
2582                 err = device_create_file(dev, &sda_caseopen[1].dev_attr);
2583                 if (err)
2584                         goto exit_remove;
2585         }
2586
2587         err = device_create_file(dev, &dev_attr_name);
2588         if (err)
2589                 goto exit_remove;
2590
2591         data->hwmon_dev = hwmon_device_register(dev);
2592         if (IS_ERR(data->hwmon_dev)) {
2593                 err = PTR_ERR(data->hwmon_dev);
2594                 goto exit_remove;
2595         }
2596
2597         return 0;
2598
2599 exit_remove:
2600         w83627ehf_device_remove_files(dev);
2601 exit_release:
2602         platform_set_drvdata(pdev, NULL);
2603         release_region(res->start, IOREGION_LENGTH);
2604 exit:
2605         return err;
2606 }
2607
2608 static int w83627ehf_remove(struct platform_device *pdev)
2609 {
2610         struct w83627ehf_data *data = platform_get_drvdata(pdev);
2611
2612         hwmon_device_unregister(data->hwmon_dev);
2613         w83627ehf_device_remove_files(&pdev->dev);
2614         release_region(data->addr, IOREGION_LENGTH);
2615         platform_set_drvdata(pdev, NULL);
2616
2617         return 0;
2618 }
2619
2620 #ifdef CONFIG_PM
2621 static int w83627ehf_suspend(struct device *dev)
2622 {
2623         struct w83627ehf_data *data = w83627ehf_update_device(dev);
2624         struct w83627ehf_sio_data *sio_data = dev->platform_data;
2625
2626         mutex_lock(&data->update_lock);
2627         data->vbat = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
2628         if (sio_data->kind == nct6775) {
2629                 data->fandiv1 = w83627ehf_read_value(data, NCT6775_REG_FANDIV1);
2630                 data->fandiv2 = w83627ehf_read_value(data, NCT6775_REG_FANDIV2);
2631         }
2632         mutex_unlock(&data->update_lock);
2633
2634         return 0;
2635 }
2636
2637 static int w83627ehf_resume(struct device *dev)
2638 {
2639         struct w83627ehf_data *data = dev_get_drvdata(dev);
2640         struct w83627ehf_sio_data *sio_data = dev->platform_data;
2641         int i;
2642
2643         mutex_lock(&data->update_lock);
2644         data->bank = 0xff;              /* Force initial bank selection */
2645
2646         /* Restore limits */
2647         for (i = 0; i < data->in_num; i++) {
2648                 if ((i == 6) && data->in6_skip)
2649                         continue;
2650
2651                 w83627ehf_write_value(data, W83627EHF_REG_IN_MIN(i),
2652                                       data->in_min[i]);
2653                 w83627ehf_write_value(data, W83627EHF_REG_IN_MAX(i),
2654                                       data->in_max[i]);
2655         }
2656
2657         for (i = 0; i < 5; i++) {
2658                 if (!(data->has_fan_min & (1 << i)))
2659                         continue;
2660
2661                 w83627ehf_write_value(data, data->REG_FAN_MIN[i],
2662                                       data->fan_min[i]);
2663         }
2664
2665         for (i = 0; i < NUM_REG_TEMP; i++) {
2666                 if (!(data->have_temp & (1 << i)))
2667                         continue;
2668
2669                 if (data->reg_temp_over[i])
2670                         w83627ehf_write_temp(data, data->reg_temp_over[i],
2671                                              data->temp_max[i]);
2672                 if (data->reg_temp_hyst[i])
2673                         w83627ehf_write_temp(data, data->reg_temp_hyst[i],
2674                                              data->temp_max_hyst[i]);
2675                 if (i > 2)
2676                         continue;
2677                 if (data->have_temp_offset & (1 << i))
2678                         w83627ehf_write_value(data,
2679                                               W83627EHF_REG_TEMP_OFFSET[i],
2680                                               data->temp_offset[i]);
2681         }
2682
2683         /* Restore other settings */
2684         w83627ehf_write_value(data, W83627EHF_REG_VBAT, data->vbat);
2685         if (sio_data->kind == nct6775) {
2686                 w83627ehf_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
2687                 w83627ehf_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
2688         }
2689
2690         /* Force re-reading all values */
2691         data->valid = 0;
2692         mutex_unlock(&data->update_lock);
2693
2694         return 0;
2695 }
2696
2697 static const struct dev_pm_ops w83627ehf_dev_pm_ops = {
2698         .suspend = w83627ehf_suspend,
2699         .resume = w83627ehf_resume,
2700 };
2701
2702 #define W83627EHF_DEV_PM_OPS    (&w83627ehf_dev_pm_ops)
2703 #else
2704 #define W83627EHF_DEV_PM_OPS    NULL
2705 #endif /* CONFIG_PM */
2706
2707 static struct platform_driver w83627ehf_driver = {
2708         .driver = {
2709                 .owner  = THIS_MODULE,
2710                 .name   = DRVNAME,
2711                 .pm     = W83627EHF_DEV_PM_OPS,
2712         },
2713         .probe          = w83627ehf_probe,
2714         .remove         = w83627ehf_remove,
2715 };
2716
2717 /* w83627ehf_find() looks for a '627 in the Super-I/O config space */
2718 static int __init w83627ehf_find(int sioaddr, unsigned short *addr,
2719                                  struct w83627ehf_sio_data *sio_data)
2720 {
2721         static const char sio_name_W83627EHF[] __initconst = "W83627EHF";
2722         static const char sio_name_W83627EHG[] __initconst = "W83627EHG";
2723         static const char sio_name_W83627DHG[] __initconst = "W83627DHG";
2724         static const char sio_name_W83627DHG_P[] __initconst = "W83627DHG-P";
2725         static const char sio_name_W83627UHG[] __initconst = "W83627UHG";
2726         static const char sio_name_W83667HG[] __initconst = "W83667HG";
2727         static const char sio_name_W83667HG_B[] __initconst = "W83667HG-B";
2728         static const char sio_name_NCT6775[] __initconst = "NCT6775F";
2729         static const char sio_name_NCT6776[] __initconst = "NCT6776F";
2730
2731         u16 val;
2732         const char *sio_name;
2733
2734         superio_enter(sioaddr);
2735
2736         if (force_id)
2737                 val = force_id;
2738         else
2739                 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
2740                     | superio_inb(sioaddr, SIO_REG_DEVID + 1);
2741         switch (val & SIO_ID_MASK) {
2742         case SIO_W83627EHF_ID:
2743                 sio_data->kind = w83627ehf;
2744                 sio_name = sio_name_W83627EHF;
2745                 break;
2746         case SIO_W83627EHG_ID:
2747                 sio_data->kind = w83627ehf;
2748                 sio_name = sio_name_W83627EHG;
2749                 break;
2750         case SIO_W83627DHG_ID:
2751                 sio_data->kind = w83627dhg;
2752                 sio_name = sio_name_W83627DHG;
2753                 break;
2754         case SIO_W83627DHG_P_ID:
2755                 sio_data->kind = w83627dhg_p;
2756                 sio_name = sio_name_W83627DHG_P;
2757                 break;
2758         case SIO_W83627UHG_ID:
2759                 sio_data->kind = w83627uhg;
2760                 sio_name = sio_name_W83627UHG;
2761                 break;
2762         case SIO_W83667HG_ID:
2763                 sio_data->kind = w83667hg;
2764                 sio_name = sio_name_W83667HG;
2765                 break;
2766         case SIO_W83667HG_B_ID:
2767                 sio_data->kind = w83667hg_b;
2768                 sio_name = sio_name_W83667HG_B;
2769                 break;
2770         case SIO_NCT6775_ID:
2771                 sio_data->kind = nct6775;
2772                 sio_name = sio_name_NCT6775;
2773                 break;
2774         case SIO_NCT6776_ID:
2775                 sio_data->kind = nct6776;
2776                 sio_name = sio_name_NCT6776;
2777                 break;
2778         default:
2779                 if (val != 0xffff)
2780                         pr_debug("unsupported chip ID: 0x%04x\n", val);
2781                 superio_exit(sioaddr);
2782                 return -ENODEV;
2783         }
2784
2785         /* We have a known chip, find the HWM I/O address */
2786         superio_select(sioaddr, W83627EHF_LD_HWM);
2787         val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
2788             | superio_inb(sioaddr, SIO_REG_ADDR + 1);
2789         *addr = val & IOREGION_ALIGNMENT;
2790         if (*addr == 0) {
2791                 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
2792                 superio_exit(sioaddr);
2793                 return -ENODEV;
2794         }
2795
2796         /* Activate logical device if needed */
2797         val = superio_inb(sioaddr, SIO_REG_ENABLE);
2798         if (!(val & 0x01)) {
2799                 pr_warn("Forcibly enabling Super-I/O. "
2800                         "Sensor is probably unusable.\n");
2801                 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
2802         }
2803
2804         superio_exit(sioaddr);
2805         pr_info("Found %s chip at %#x\n", sio_name, *addr);
2806         sio_data->sioreg = sioaddr;
2807
2808         return 0;
2809 }
2810
2811 /*
2812  * when Super-I/O functions move to a separate file, the Super-I/O
2813  * bus will manage the lifetime of the device and this module will only keep
2814  * track of the w83627ehf driver. But since we platform_device_alloc(), we
2815  * must keep track of the device
2816  */
2817 static struct platform_device *pdev;
2818
2819 static int __init sensors_w83627ehf_init(void)
2820 {
2821         int err;
2822         unsigned short address;
2823         struct resource res;
2824         struct w83627ehf_sio_data sio_data;
2825
2826         /*
2827          * initialize sio_data->kind and sio_data->sioreg.
2828          *
2829          * when Super-I/O functions move to a separate file, the Super-I/O
2830          * driver will probe 0x2e and 0x4e and auto-detect the presence of a
2831          * w83627ehf hardware monitor, and call probe()
2832          */
2833         if (w83627ehf_find(0x2e, &address, &sio_data) &&
2834             w83627ehf_find(0x4e, &address, &sio_data))
2835                 return -ENODEV;
2836
2837         err = platform_driver_register(&w83627ehf_driver);
2838         if (err)
2839                 goto exit;
2840
2841         pdev = platform_device_alloc(DRVNAME, address);
2842         if (!pdev) {
2843                 err = -ENOMEM;
2844                 pr_err("Device allocation failed\n");
2845                 goto exit_unregister;
2846         }
2847
2848         err = platform_device_add_data(pdev, &sio_data,
2849                                        sizeof(struct w83627ehf_sio_data));
2850         if (err) {
2851                 pr_err("Platform data allocation failed\n");
2852                 goto exit_device_put;
2853         }
2854
2855         memset(&res, 0, sizeof(res));
2856         res.name = DRVNAME;
2857         res.start = address + IOREGION_OFFSET;
2858         res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
2859         res.flags = IORESOURCE_IO;
2860
2861         err = acpi_check_resource_conflict(&res);
2862         if (err)
2863                 goto exit_device_put;
2864
2865         err = platform_device_add_resources(pdev, &res, 1);
2866         if (err) {
2867                 pr_err("Device resource addition failed (%d)\n", err);
2868                 goto exit_device_put;
2869         }
2870
2871         /* platform_device_add calls probe() */
2872         err = platform_device_add(pdev);
2873         if (err) {
2874                 pr_err("Device addition failed (%d)\n", err);
2875                 goto exit_device_put;
2876         }
2877
2878         return 0;
2879
2880 exit_device_put:
2881         platform_device_put(pdev);
2882 exit_unregister:
2883         platform_driver_unregister(&w83627ehf_driver);
2884 exit:
2885         return err;
2886 }
2887
2888 static void __exit sensors_w83627ehf_exit(void)
2889 {
2890         platform_device_unregister(pdev);
2891         platform_driver_unregister(&w83627ehf_driver);
2892 }
2893
2894 MODULE_AUTHOR("Jean Delvare <khali@linux-fr.org>");
2895 MODULE_DESCRIPTION("W83627EHF driver");
2896 MODULE_LICENSE("GPL");
2897
2898 module_init(sensors_w83627ehf_init);
2899 module_exit(sensors_w83627ehf_exit);