drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

   1 /**************************************************************************
   2  *
   3  * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #include "vmwgfx_kms.h"
  29
  30
  31 /* Might need a hrtimer here? */
  32 #define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
  33
  34 void vmw_display_unit_cleanup(struct vmw_display_unit *du)
  35 {
  36         if (du->cursor_surface)
  37                 vmw_surface_unreference(&du->cursor_surface);
  38         if (du->cursor_dmabuf)
  39                 vmw_dmabuf_unreference(&du->cursor_dmabuf);
  40         drm_crtc_cleanup(&du->crtc);
  41         drm_encoder_cleanup(&du->encoder);
  42         drm_connector_cleanup(&du->connector);
  43 }
  44
  45 /*
  46  * Display Unit Cursor functions
  47  */
  48
  49 int vmw_cursor_update_image(struct vmw_private *dev_priv,
  50                             u32 *image, u32 width, u32 height,
  51                             u32 hotspotX, u32 hotspotY)
  52 {
  53         struct {
  54                 u32 cmd;
  55                 SVGAFifoCmdDefineAlphaCursor cursor;
  56         } *cmd;
  57         u32 image_size = width * height * 4;
  58         u32 cmd_size = sizeof(*cmd) + image_size;
  59
  60         if (!image)
  61                 return -EINVAL;
  62
  63         cmd = vmw_fifo_reserve(dev_priv, cmd_size);
  64         if (unlikely(cmd == NULL)) {
  65                 DRM_ERROR("Fifo reserve failed.\n");
  66                 return -ENOMEM;
  67         }
  68
  69         memset(cmd, 0, sizeof(*cmd));
  70
  71         memcpy(&cmd[1], image, image_size);
  72
  73         cmd->cmd = cpu_to_le32(SVGA_CMD_DEFINE_ALPHA_CURSOR);
  74         cmd->cursor.id = cpu_to_le32(0);
  75         cmd->cursor.width = cpu_to_le32(width);
  76         cmd->cursor.height = cpu_to_le32(height);
  77         cmd->cursor.hotspotX = cpu_to_le32(hotspotX);
  78         cmd->cursor.hotspotY = cpu_to_le32(hotspotY);
  79
  80         vmw_fifo_commit(dev_priv, cmd_size);
  81
  82         return 0;
  83 }
  84
  85 void vmw_cursor_update_position(struct vmw_private *dev_priv,
  86                                 bool show, int x, int y)
  87 {
  88         __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
  89         uint32_t count;
  90
  91         iowrite32(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON);
  92         iowrite32(x, fifo_mem + SVGA_FIFO_CURSOR_X);
  93         iowrite32(y, fifo_mem + SVGA_FIFO_CURSOR_Y);
  94         count = ioread32(fifo_mem + SVGA_FIFO_CURSOR_COUNT);
  95         iowrite32(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT);
  96 }
  97
  98 int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
  99                            uint32_t handle, uint32_t width, uint32_t height)
 100 {
 101         struct vmw_private *dev_priv = vmw_priv(crtc->dev);
 102         struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
 103         struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
 104         struct vmw_surface *surface = NULL;
 105         struct vmw_dma_buffer *dmabuf = NULL;
 106         int ret;
 107
 108         if (handle) {
 109                 ret = vmw_user_surface_lookup_handle(dev_priv, tfile,
 110                                                      handle, &surface);
 111                 if (!ret) {
 112                         if (!surface->snooper.image) {
 113                                 DRM_ERROR("surface not suitable for cursor\n");
 114                                 return -EINVAL;
 115                         }
 116                 } else {
 117                         ret = vmw_user_dmabuf_lookup(tfile,
 118                                                      handle, &dmabuf);
 119                         if (ret) {
 120                                 DRM_ERROR("failed to find surface or dmabuf: %i\n", ret);
 121                                 return -EINVAL;
 122                         }
 123                 }
 124         }
 125
 126         /* takedown old cursor */
 127         if (du->cursor_surface) {
 128                 du->cursor_surface->snooper.crtc = NULL;
 129                 vmw_surface_unreference(&du->cursor_surface);
 130         }
 131         if (du->cursor_dmabuf)
 132                 vmw_dmabuf_unreference(&du->cursor_dmabuf);
 133
 134         /* setup new image */
 135         if (surface) {
 136                 /* vmw_user_surface_lookup takes one reference */
 137                 du->cursor_surface = surface;
 138
 139                 du->cursor_surface->snooper.crtc = crtc;
 140                 du->cursor_age = du->cursor_surface->snooper.age;
 141                 vmw_cursor_update_image(dev_priv, surface->snooper.image,
 142                                         64, 64, du->hotspot_x, du->hotspot_y);
 143         } else if (dmabuf) {
 144                 struct ttm_bo_kmap_obj map;
 145                 unsigned long kmap_offset;
 146                 unsigned long kmap_num;
 147                 void *virtual;
 148                 bool dummy;
 149
 150                 /* vmw_user_surface_lookup takes one reference */
 151                 du->cursor_dmabuf = dmabuf;
 152
 153                 kmap_offset = 0;
 154                 kmap_num = (64*64*4) >> PAGE_SHIFT;
 155
 156                 ret = ttm_bo_reserve(&dmabuf->base, true, false, false, 0);
 157                 if (unlikely(ret != 0)) {
 158                         DRM_ERROR("reserve failed\n");
 159                         return -EINVAL;
 160                 }
 161
 162                 ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map);
 163                 if (unlikely(ret != 0))
 164                         goto err_unreserve;
 165
 166                 virtual = ttm_kmap_obj_virtual(&map, &dummy);
 167                 vmw_cursor_update_image(dev_priv, virtual, 64, 64,
 168                                         du->hotspot_x, du->hotspot_y);
 169
 170                 ttm_bo_kunmap(&map);
 171 err_unreserve:
 172                 ttm_bo_unreserve(&dmabuf->base);
 173
 174         } else {
 175                 vmw_cursor_update_position(dev_priv, false, 0, 0);
 176                 return 0;
 177         }
 178
 179         vmw_cursor_update_position(dev_priv, true, du->cursor_x, du->cursor_y);
 180
 181         return 0;
 182 }
 183
 184 int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
 185 {
 186         struct vmw_private *dev_priv = vmw_priv(crtc->dev);
 187         struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
 188         bool shown = du->cursor_surface || du->cursor_dmabuf ? true : false;
 189
 190         du->cursor_x = x + crtc->x;
 191         du->cursor_y = y + crtc->y;
 192
 193         vmw_cursor_update_position(dev_priv, shown,
 194                                    du->cursor_x, du->cursor_y);
 195
 196         return 0;
 197 }
 198
 199 void vmw_kms_cursor_snoop(struct vmw_surface *srf,
 200                           struct ttm_object_file *tfile,
 201                           struct ttm_buffer_object *bo,
 202                           SVGA3dCmdHeader *header)
 203 {
 204         struct ttm_bo_kmap_obj map;
 205         unsigned long kmap_offset;
 206         unsigned long kmap_num;
 207         SVGA3dCopyBox *box;
 208         unsigned box_count;
 209         void *virtual;
 210         bool dummy;
 211         struct vmw_dma_cmd {
 212                 SVGA3dCmdHeader header;
 213                 SVGA3dCmdSurfaceDMA dma;
 214         } *cmd;
 215         int ret;
 216
 217         cmd = container_of(header, struct vmw_dma_cmd, header);
 218
 219         /* No snooper installed */
 220         if (!srf->snooper.image)
 221                 return;
 222
 223         if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) {
 224                 DRM_ERROR("face and mipmap for cursors should never != 0\n");
 225                 return;
 226         }
 227
 228         if (cmd->header.size < 64) {
 229                 DRM_ERROR("at least one full copy box must be given\n");
 230                 return;
 231         }
 232
 233         box = (SVGA3dCopyBox *)&cmd[1];
 234         box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) /
 235                         sizeof(SVGA3dCopyBox);
 236
 237         if (cmd->dma.guest.pitch != (64 * 4) ||
 238             cmd->dma.guest.ptr.offset % PAGE_SIZE ||
 239             box->x != 0    || box->y != 0    || box->z != 0    ||
 240             box->srcx != 0 || box->srcy != 0 || box->srcz != 0 ||
 241             box->w != 64   || box->h != 64   || box->d != 1    ||
 242             box_count != 1) {
 243                 /* TODO handle none page aligned offsets */
 244                 /* TODO handle partial uploads and pitch != 256 */
 245                 /* TODO handle more then one copy (size != 64) */
 246                 DRM_ERROR("lazy programmer, can't handle weird stuff\n");
 247                 return;
 248         }
 249
 250         kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT;
 251         kmap_num = (64*64*4) >> PAGE_SHIFT;
 252
 253         ret = ttm_bo_reserve(bo, true, false, false, 0);
 254         if (unlikely(ret != 0)) {
 255                 DRM_ERROR("reserve failed\n");
 256                 return;
 257         }
 258
 259         ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map);
 260         if (unlikely(ret != 0))
 261                 goto err_unreserve;
 262
 263         virtual = ttm_kmap_obj_virtual(&map, &dummy);
 264
 265         memcpy(srf->snooper.image, virtual, 64*64*4);
 266         srf->snooper.age++;
 267
 268         /* we can't call this function from this function since execbuf has
 269          * reserved fifo space.
 270          *
 271          * if (srf->snooper.crtc)
 272          *      vmw_ldu_crtc_cursor_update_image(dev_priv,
 273          *                                       srf->snooper.image, 64, 64,
 274          *                                       du->hotspot_x, du->hotspot_y);
 275          */
 276
 277         ttm_bo_kunmap(&map);
 278 err_unreserve:
 279         ttm_bo_unreserve(bo);
 280 }
 281
 282 void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
 283 {
 284         struct drm_device *dev = dev_priv->dev;
 285         struct vmw_display_unit *du;
 286         struct drm_crtc *crtc;
 287
 288         mutex_lock(&dev->mode_config.mutex);
 289
 290         list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
 291                 du = vmw_crtc_to_du(crtc);
 292                 if (!du->cursor_surface ||
 293                     du->cursor_age == du->cursor_surface->snooper.age)
 294                         continue;
 295
 296                 du->cursor_age = du->cursor_surface->snooper.age;
 297                 vmw_cursor_update_image(dev_priv,
 298                                         du->cursor_surface->snooper.image,
 299                                         64, 64, du->hotspot_x, du->hotspot_y);
 300         }
 301
 302         mutex_unlock(&dev->mode_config.mutex);
 303 }
 304
 305 /*
 306  * Generic framebuffer code
 307  */
 308
 309 int vmw_framebuffer_create_handle(struct drm_framebuffer *fb,
 310                                   struct drm_file *file_priv,
 311                                   unsigned int *handle)
 312 {
 313         if (handle)
 314                 handle = 0;
 315
 316         return 0;
 317 }
 318
 319 /*
 320  * Surface framebuffer code
 321  */
 322
 323 #define vmw_framebuffer_to_vfbs(x) \
 324         container_of(x, struct vmw_framebuffer_surface, base.base)
 325
 326 struct vmw_framebuffer_surface {
 327         struct vmw_framebuffer base;
 328         struct vmw_surface *surface;
 329         struct vmw_dma_buffer *buffer;
 330         struct list_head head;
 331         struct drm_master *master;
 332 };
 333
 334 void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer)
 335 {
 336         struct vmw_framebuffer_surface *vfbs =
 337                 vmw_framebuffer_to_vfbs(framebuffer);
 338         struct vmw_master *vmaster = vmw_master(vfbs->master);
 339
 340
 341         mutex_lock(&vmaster->fb_surf_mutex);
 342         list_del(&vfbs->head);
 343         mutex_unlock(&vmaster->fb_surf_mutex);
 344
 345         drm_master_put(&vfbs->master);
 346         drm_framebuffer_cleanup(framebuffer);
 347         vmw_surface_unreference(&vfbs->surface);
 348         ttm_base_object_unref(&vfbs->base.user_obj);
 349
 350         kfree(vfbs);
 351 }
 352
 353 static int do_surface_dirty_sou(struct vmw_private *dev_priv,
 354                                 struct drm_file *file_priv,
 355                                 struct vmw_framebuffer *framebuffer,
 356                                 unsigned flags, unsigned color,
 357                                 struct drm_clip_rect *clips,
 358                                 unsigned num_clips, int inc)
 359 {
 360         struct drm_clip_rect *clips_ptr;
 361         struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
 362         struct drm_crtc *crtc;
 363         size_t fifo_size;
 364         int i, num_units;
 365         int ret = 0; /* silence warning */
 366         int left, right, top, bottom;
 367
 368         struct {
 369                 SVGA3dCmdHeader header;
 370                 SVGA3dCmdBlitSurfaceToScreen body;
 371         } *cmd;
 372         SVGASignedRect *blits;
 373
 374
 375         num_units = 0;
 376         list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list,
 377                             head) {
 378                 if (crtc->fb != &framebuffer->base)
 379                         continue;
 380                 units[num_units++] = vmw_crtc_to_du(crtc);
 381         }
 382
 383         BUG_ON(!clips || !num_clips);
 384
 385         fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
 386         cmd = kzalloc(fifo_size, GFP_KERNEL);
 387         if (unlikely(cmd == NULL)) {
 388                 DRM_ERROR("Temporary fifo memory alloc failed.\n");
 389                 return -ENOMEM;
 390         }
 391
 392         left = clips->x1;
 393         right = clips->x2;
 394         top = clips->y1;
 395         bottom = clips->y2;
 396
 397         clips_ptr = clips;
 398         for (i = 1; i < num_clips; i++, clips_ptr += inc) {
 399                 left = min_t(int, left, (int)clips_ptr->x1);
 400                 right = max_t(int, right, (int)clips_ptr->x2);
 401                 top = min_t(int, top, (int)clips_ptr->y1);
 402                 bottom = max_t(int, bottom, (int)clips_ptr->y2);
 403         }
 404
 405         /* only need to do this once */
 406         memset(cmd, 0, fifo_size);
 407         cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
 408         cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
 409
 410         cmd->body.srcRect.left = left;
 411         cmd->body.srcRect.right = right;
 412         cmd->body.srcRect.top = top;
 413         cmd->body.srcRect.bottom = bottom;
 414
 415         clips_ptr = clips;
 416         blits = (SVGASignedRect *)&cmd[1];
 417         for (i = 0; i < num_clips; i++, clips_ptr += inc) {
 418                 blits[i].left   = clips_ptr->x1 - left;
 419                 blits[i].right  = clips_ptr->x2 - left;
 420                 blits[i].top    = clips_ptr->y1 - top;
 421                 blits[i].bottom = clips_ptr->y2 - top;
 422         }
 423
 424         /* do per unit writing, reuse fifo for each */
 425         for (i = 0; i < num_units; i++) {
 426                 struct vmw_display_unit *unit = units[i];
 427                 int clip_x1 = left - unit->crtc.x;
 428                 int clip_y1 = top - unit->crtc.y;
 429                 int clip_x2 = right - unit->crtc.x;
 430                 int clip_y2 = bottom - unit->crtc.y;
 431
 432                 /* skip any crtcs that misses the clip region */
 433                 if (clip_x1 >= unit->crtc.mode.hdisplay ||
 434                     clip_y1 >= unit->crtc.mode.vdisplay ||
 435                     clip_x2 <= 0 || clip_y2 <= 0)
 436                         continue;
 437
 438                 /* need to reset sid as it is changed by execbuf */
 439                 cmd->body.srcImage.sid = cpu_to_le32(framebuffer->user_handle);
 440
 441                 cmd->body.destScreenId = unit->unit;
 442
 443                 /*
 444                  * The blit command is a lot more resilient then the
 445                  * readback command when it comes to clip rects. So its
 446                  * okay to go out of bounds.
 447                  */
 448
 449                 cmd->body.destRect.left = clip_x1;
 450                 cmd->body.destRect.right = clip_x2;
 451                 cmd->body.destRect.top = clip_y1;
 452                 cmd->body.destRect.bottom = clip_y2;
 453
 454
 455                 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
 456                                           fifo_size, 0, NULL);
 457
 458                 if (unlikely(ret != 0))
 459                         break;
 460         }
 461
 462         kfree(cmd);
 463
 464         return ret;
 465 }
 466
 467 int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer,
 468                                   struct drm_file *file_priv,
 469                                   unsigned flags, unsigned color,
 470                                   struct drm_clip_rect *clips,
 471                                   unsigned num_clips)
 472 {
 473         struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
 474         struct vmw_master *vmaster = vmw_master(file_priv->master);
 475         struct vmw_framebuffer_surface *vfbs =
 476                 vmw_framebuffer_to_vfbs(framebuffer);
 477         struct drm_clip_rect norect;
 478         int ret, inc = 1;
 479
 480         if (unlikely(vfbs->master != file_priv->master))
 481                 return -EINVAL;
 482
 483         /* Require ScreenObject support for 3D */
 484         if (!dev_priv->sou_priv)
 485                 return -EINVAL;
 486
 487         ret = ttm_read_lock(&vmaster->lock, true);
 488         if (unlikely(ret != 0))
 489                 return ret;
 490
 491         if (!num_clips) {
 492                 num_clips = 1;
 493                 clips = &norect;
 494                 norect.x1 = norect.y1 = 0;
 495                 norect.x2 = framebuffer->width;
 496                 norect.y2 = framebuffer->height;
 497         } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
 498                 num_clips /= 2;
 499                 inc = 2; /* skip source rects */
 500         }
 501
 502         ret = do_surface_dirty_sou(dev_priv, file_priv, &vfbs->base,
 503                                    flags, color,
 504                                    clips, num_clips, inc);
 505
 506         ttm_read_unlock(&vmaster->lock);
 507         return 0;
 508 }
 509
 510 static struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = {
 511         .destroy = vmw_framebuffer_surface_destroy,
 512         .dirty = vmw_framebuffer_surface_dirty,
 513         .create_handle = vmw_framebuffer_create_handle,
 514 };
 515
 516 static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
 517                                            struct drm_file *file_priv,
 518                                            struct vmw_surface *surface,
 519                                            struct vmw_framebuffer **out,
 520                                            const struct drm_mode_fb_cmd
 521                                            *mode_cmd)
 522
 523 {
 524         struct drm_device *dev = dev_priv->dev;
 525         struct vmw_framebuffer_surface *vfbs;
 526         enum SVGA3dSurfaceFormat format;
 527         struct vmw_master *vmaster = vmw_master(file_priv->master);
 528         int ret;
 529
 530         /* 3D is only supported on HWv8 hosts which supports screen objects */
 531         if (!dev_priv->sou_priv)
 532                 return -ENOSYS;
 533
 534         /*
 535          * Sanity checks.
 536          */
 537
 538         if (unlikely(surface->mip_levels[0] != 1 ||
 539                      surface->num_sizes != 1 ||
 540                      surface->sizes[0].width < mode_cmd->width ||
 541                      surface->sizes[0].height < mode_cmd->height ||
 542                      surface->sizes[0].depth != 1)) {
 543                 DRM_ERROR("Incompatible surface dimensions "
 544                           "for requested mode.\n");
 545                 return -EINVAL;
 546         }
 547
 548         switch (mode_cmd->depth) {
 549         case 32:
 550                 format = SVGA3D_A8R8G8B8;
 551                 break;
 552         case 24:
 553                 format = SVGA3D_X8R8G8B8;
 554                 break;
 555         case 16:
 556                 format = SVGA3D_R5G6B5;
 557                 break;
 558         case 15:
 559                 format = SVGA3D_A1R5G5B5;
 560                 break;
 561         case 8:
 562                 format = SVGA3D_LUMINANCE8;
 563                 break;
 564         default:
 565                 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
 566                 return -EINVAL;
 567         }
 568
 569         if (unlikely(format != surface->format)) {
 570                 DRM_ERROR("Invalid surface format for requested mode.\n");
 571                 return -EINVAL;
 572         }
 573
 574         vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL);
 575         if (!vfbs) {
 576                 ret = -ENOMEM;
 577                 goto out_err1;
 578         }
 579
 580         ret = drm_framebuffer_init(dev, &vfbs->base.base,
 581                                    &vmw_framebuffer_surface_funcs);
 582         if (ret)
 583                 goto out_err2;
 584
 585         if (!vmw_surface_reference(surface)) {
 586                 DRM_ERROR("failed to reference surface %p\n", surface);
 587                 goto out_err3;
 588         }
 589
 590         /* XXX get the first 3 from the surface info */
 591         vfbs->base.base.bits_per_pixel = mode_cmd->bpp;
 592         vfbs->base.base.pitch = mode_cmd->pitch;
 593         vfbs->base.base.depth = mode_cmd->depth;
 594         vfbs->base.base.width = mode_cmd->width;
 595         vfbs->base.base.height = mode_cmd->height;
 596         vfbs->surface = surface;
 597         vfbs->base.user_handle = mode_cmd->handle;
 598         vfbs->master = drm_master_get(file_priv->master);
 599
 600         mutex_lock(&vmaster->fb_surf_mutex);
 601         list_add_tail(&vfbs->head, &vmaster->fb_surf);
 602         mutex_unlock(&vmaster->fb_surf_mutex);
 603
 604         *out = &vfbs->base;
 605
 606         return 0;
 607
 608 out_err3:
 609         drm_framebuffer_cleanup(&vfbs->base.base);
 610 out_err2:
 611         kfree(vfbs);
 612 out_err1:
 613         return ret;
 614 }
 615
 616 /*
 617  * Dmabuf framebuffer code
 618  */
 619
 620 #define vmw_framebuffer_to_vfbd(x) \
 621         container_of(x, struct vmw_framebuffer_dmabuf, base.base)
 622
 623 struct vmw_framebuffer_dmabuf {
 624         struct vmw_framebuffer base;
 625         struct vmw_dma_buffer *buffer;
 626 };
 627
 628 void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer)
 629 {
 630         struct vmw_framebuffer_dmabuf *vfbd =
 631                 vmw_framebuffer_to_vfbd(framebuffer);
 632
 633         drm_framebuffer_cleanup(framebuffer);
 634         vmw_dmabuf_unreference(&vfbd->buffer);
 635         ttm_base_object_unref(&vfbd->base.user_obj);
 636
 637         kfree(vfbd);
 638 }
 639
 640 static int do_dmabuf_dirty_ldu(struct vmw_private *dev_priv,
 641                                struct vmw_framebuffer *framebuffer,
 642                                unsigned flags, unsigned color,
 643                                struct drm_clip_rect *clips,
 644                                unsigned num_clips, int increment)
 645 {
 646         size_t fifo_size;
 647         int i;
 648
 649         struct {
 650                 uint32_t header;
 651                 SVGAFifoCmdUpdate body;
 652         } *cmd;
 653
 654         fifo_size = sizeof(*cmd) * num_clips;
 655         cmd = vmw_fifo_reserve(dev_priv, fifo_size);
 656         if (unlikely(cmd == NULL)) {
 657                 DRM_ERROR("Fifo reserve failed.\n");
 658                 return -ENOMEM;
 659         }
 660
 661         memset(cmd, 0, fifo_size);
 662         for (i = 0; i < num_clips; i++, clips += increment) {
 663                 cmd[i].header = cpu_to_le32(SVGA_CMD_UPDATE);
 664                 cmd[i].body.x = cpu_to_le32(clips->x1);
 665                 cmd[i].body.y = cpu_to_le32(clips->y1);
 666                 cmd[i].body.width = cpu_to_le32(clips->x2 - clips->x1);
 667                 cmd[i].body.height = cpu_to_le32(clips->y2 - clips->y1);
 668         }
 669
 670         vmw_fifo_commit(dev_priv, fifo_size);
 671         return 0;
 672 }
 673
 674 static int do_dmabuf_define_gmrfb(struct drm_file *file_priv,
 675                                   struct vmw_private *dev_priv,
 676                                   struct vmw_framebuffer *framebuffer)
 677 {
 678         int depth = framebuffer->base.depth;
 679         size_t fifo_size;
 680         int ret;
 681
 682         struct {
 683                 uint32_t header;
 684                 SVGAFifoCmdDefineGMRFB body;
 685         } *cmd;
 686
 687         /* Emulate RGBA support, contrary to svga_reg.h this is not
 688          * supported by hosts. This is only a problem if we are reading
 689          * this value later and expecting what we uploaded back.
 690          */
 691         if (depth == 32)
 692                 depth = 24;
 693
 694         fifo_size = sizeof(*cmd);
 695         cmd = kmalloc(fifo_size, GFP_KERNEL);
 696         if (unlikely(cmd == NULL)) {
 697                 DRM_ERROR("Failed to allocate temporary cmd buffer.\n");
 698                 return -ENOMEM;
 699         }
 700
 701         memset(cmd, 0, fifo_size);
 702         cmd->header = SVGA_CMD_DEFINE_GMRFB;
 703         cmd->body.format.bitsPerPixel = framebuffer->base.bits_per_pixel;
 704         cmd->body.format.colorDepth = depth;
 705         cmd->body.format.reserved = 0;
 706         cmd->body.bytesPerLine = framebuffer->base.pitch;
 707         cmd->body.ptr.gmrId = framebuffer->user_handle;
 708         cmd->body.ptr.offset = 0;
 709
 710         ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
 711                                   fifo_size, 0, NULL);
 712
 713         kfree(cmd);
 714
 715         return ret;
 716 }
 717
 718 static int do_dmabuf_dirty_sou(struct drm_file *file_priv,
 719                                struct vmw_private *dev_priv,
 720                                struct vmw_framebuffer *framebuffer,
 721                                unsigned flags, unsigned color,
 722                                struct drm_clip_rect *clips,
 723                                unsigned num_clips, int increment)
 724 {
 725         struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
 726         struct drm_clip_rect *clips_ptr;
 727         int i, k, num_units, ret;
 728         struct drm_crtc *crtc;
 729         size_t fifo_size;
 730
 731         struct {
 732                 uint32_t header;
 733                 SVGAFifoCmdBlitGMRFBToScreen body;
 734         } *blits;
 735
 736         ret = do_dmabuf_define_gmrfb(file_priv, dev_priv, framebuffer);
 737         if (unlikely(ret != 0))
 738                 return ret; /* define_gmrfb prints warnings */
 739
 740         fifo_size = sizeof(*blits) * num_clips;
 741         blits = kmalloc(fifo_size, GFP_KERNEL);
 742         if (unlikely(blits == NULL)) {
 743                 DRM_ERROR("Failed to allocate temporary cmd buffer.\n");
 744                 return -ENOMEM;
 745         }
 746
 747         num_units = 0;
 748         list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
 749                 if (crtc->fb != &framebuffer->base)
 750                         continue;
 751                 units[num_units++] = vmw_crtc_to_du(crtc);
 752         }
 753
 754         for (k = 0; k < num_units; k++) {
 755                 struct vmw_display_unit *unit = units[k];
 756                 int hit_num = 0;
 757
 758                 clips_ptr = clips;
 759                 for (i = 0; i < num_clips; i++, clips_ptr += increment) {
 760                         int clip_x1 = clips_ptr->x1 - unit->crtc.x;
 761                         int clip_y1 = clips_ptr->y1 - unit->crtc.y;
 762                         int clip_x2 = clips_ptr->x2 - unit->crtc.x;
 763                         int clip_y2 = clips_ptr->y2 - unit->crtc.y;
 764
 765                         /* skip any crtcs that misses the clip region */
 766                         if (clip_x1 >= unit->crtc.mode.hdisplay ||
 767                             clip_y1 >= unit->crtc.mode.vdisplay ||
 768                             clip_x2 <= 0 || clip_y2 <= 0)
 769                                 continue;
 770
 771                         blits[hit_num].header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN;
 772                         blits[hit_num].body.destScreenId = unit->unit;
 773                         blits[hit_num].body.srcOrigin.x = clips_ptr->x1;
 774                         blits[hit_num].body.srcOrigin.y = clips_ptr->y1;
 775                         blits[hit_num].body.destRect.left = clip_x1;
 776                         blits[hit_num].body.destRect.top = clip_y1;
 777                         blits[hit_num].body.destRect.right = clip_x2;
 778                         blits[hit_num].body.destRect.bottom = clip_y2;
 779                         hit_num++;
 780                 }
 781
 782                 /* no clips hit the crtc */
 783                 if (hit_num == 0)
 784                         continue;
 785
 786                 fifo_size = sizeof(*blits) * hit_num;
 787                 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, blits,
 788                                           fifo_size, 0, NULL);
 789
 790                 if (unlikely(ret != 0))
 791                         break;
 792         }
 793
 794         kfree(blits);
 795
 796         return ret;
 797 }
 798
 799 int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer,
 800                                  struct drm_file *file_priv,
 801                                  unsigned flags, unsigned color,
 802                                  struct drm_clip_rect *clips,
 803                                  unsigned num_clips)
 804 {
 805         struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
 806         struct vmw_master *vmaster = vmw_master(file_priv->master);
 807         struct vmw_framebuffer_dmabuf *vfbd =
 808                 vmw_framebuffer_to_vfbd(framebuffer);
 809         struct drm_clip_rect norect;
 810         int ret, increment = 1;
 811
 812         ret = ttm_read_lock(&vmaster->lock, true);
 813         if (unlikely(ret != 0))
 814                 return ret;
 815
 816         if (!num_clips) {
 817                 num_clips = 1;
 818                 clips = &norect;
 819                 norect.x1 = norect.y1 = 0;
 820                 norect.x2 = framebuffer->width;
 821                 norect.y2 = framebuffer->height;
 822         } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
 823                 num_clips /= 2;
 824                 increment = 2;
 825         }
 826
 827         if (dev_priv->ldu_priv) {
 828                 ret = do_dmabuf_dirty_ldu(dev_priv, &vfbd->base,
 829                                           flags, color,
 830                                           clips, num_clips, increment);
 831         } else {
 832                 ret = do_dmabuf_dirty_sou(file_priv, dev_priv, &vfbd->base,
 833                                           flags, color,
 834                                           clips, num_clips, increment);
 835         }
 836
 837         ttm_read_unlock(&vmaster->lock);
 838         return ret;
 839 }
 840
 841 static struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs = {
 842         .destroy = vmw_framebuffer_dmabuf_destroy,
 843         .dirty = vmw_framebuffer_dmabuf_dirty,
 844         .create_handle = vmw_framebuffer_create_handle,
 845 };
 846
 847 /**
 848  * Pin the dmabuffer to the start of vram.
 849  */
 850 static int vmw_framebuffer_dmabuf_pin(struct vmw_framebuffer *vfb)
 851 {
 852         struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
 853         struct vmw_framebuffer_dmabuf *vfbd =
 854                 vmw_framebuffer_to_vfbd(&vfb->base);
 855         int ret;
 856
 857         /* This code should not be used with screen objects */
 858         BUG_ON(dev_priv->sou_priv);
 859
 860         vmw_overlay_pause_all(dev_priv);
 861
 862         ret = vmw_dmabuf_to_start_of_vram(dev_priv, vfbd->buffer, true, false);
 863
 864         vmw_overlay_resume_all(dev_priv);
 865
 866         WARN_ON(ret != 0);
 867
 868         return 0;
 869 }
 870
 871 static int vmw_framebuffer_dmabuf_unpin(struct vmw_framebuffer *vfb)
 872 {
 873         struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
 874         struct vmw_framebuffer_dmabuf *vfbd =
 875                 vmw_framebuffer_to_vfbd(&vfb->base);
 876
 877         if (!vfbd->buffer) {
 878                 WARN_ON(!vfbd->buffer);
 879                 return 0;
 880         }
 881
 882         return vmw_dmabuf_unpin(dev_priv, vfbd->buffer, false);
 883 }
 884
 885 static int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv,
 886                                           struct vmw_dma_buffer *dmabuf,
 887                                           struct vmw_framebuffer **out,
 888                                           const struct drm_mode_fb_cmd
 889                                           *mode_cmd)
 890
 891 {
 892         struct drm_device *dev = dev_priv->dev;
 893         struct vmw_framebuffer_dmabuf *vfbd;
 894         unsigned int requested_size;
 895         int ret;
 896
 897         requested_size = mode_cmd->height * mode_cmd->pitch;
 898         if (unlikely(requested_size > dmabuf->base.num_pages * PAGE_SIZE)) {
 899                 DRM_ERROR("Screen buffer object size is too small "
 900                           "for requested mode.\n");
 901                 return -EINVAL;
 902         }
 903
 904         /* Limited framebuffer color depth support for screen objects */
 905         if (dev_priv->sou_priv) {
 906                 switch (mode_cmd->depth) {
 907                 case 32:
 908                 case 24:
 909                         /* Only support 32 bpp for 32 and 24 depth fbs */
 910                         if (mode_cmd->bpp == 32)
 911                                 break;
 912
 913                         DRM_ERROR("Invalid color depth/bbp: %d %d\n",
 914                                   mode_cmd->depth, mode_cmd->bpp);
 915                         return -EINVAL;
 916                 case 16:
 917                 case 15:
 918                         /* Only support 16 bpp for 16 and 15 depth fbs */
 919                         if (mode_cmd->bpp == 16)
 920                                 break;
 921
 922                         DRM_ERROR("Invalid color depth/bbp: %d %d\n",
 923                                   mode_cmd->depth, mode_cmd->bpp);
 924                         return -EINVAL;
 925                 default:
 926                         DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
 927                         return -EINVAL;
 928                 }
 929         }
 930
 931         vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL);
 932         if (!vfbd) {
 933                 ret = -ENOMEM;
 934                 goto out_err1;
 935         }
 936
 937         ret = drm_framebuffer_init(dev, &vfbd->base.base,
 938                                    &vmw_framebuffer_dmabuf_funcs);
 939         if (ret)
 940                 goto out_err2;
 941
 942         if (!vmw_dmabuf_reference(dmabuf)) {
 943                 DRM_ERROR("failed to reference dmabuf %p\n", dmabuf);
 944                 goto out_err3;
 945         }
 946
 947         vfbd->base.base.bits_per_pixel = mode_cmd->bpp;
 948         vfbd->base.base.pitch = mode_cmd->pitch;
 949         vfbd->base.base.depth = mode_cmd->depth;
 950         vfbd->base.base.width = mode_cmd->width;
 951         vfbd->base.base.height = mode_cmd->height;
 952         if (!dev_priv->sou_priv) {
 953                 vfbd->base.pin = vmw_framebuffer_dmabuf_pin;
 954                 vfbd->base.unpin = vmw_framebuffer_dmabuf_unpin;
 955         }
 956         vfbd->base.dmabuf = true;
 957         vfbd->buffer = dmabuf;
 958         vfbd->base.user_handle = mode_cmd->handle;
 959         *out = &vfbd->base;
 960
 961         return 0;
 962
 963 out_err3:
 964         drm_framebuffer_cleanup(&vfbd->base.base);
 965 out_err2:
 966         kfree(vfbd);
 967 out_err1:
 968         return ret;
 969 }
 970
 971 /*
 972  * Generic Kernel modesetting functions
 973  */
 974
 975 static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
 976                                                  struct drm_file *file_priv,
 977                                                  struct drm_mode_fb_cmd *mode_cmd)
 978 {
 979         struct vmw_private *dev_priv = vmw_priv(dev);
 980         struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
 981         struct vmw_framebuffer *vfb = NULL;
 982         struct vmw_surface *surface = NULL;
 983         struct vmw_dma_buffer *bo = NULL;
 984         struct ttm_base_object *user_obj;
 985         u64 required_size;
 986         int ret;
 987
 988         /**
 989          * This code should be conditioned on Screen Objects not being used.
 990          * If screen objects are used, we can allocate a GMR to hold the
 991          * requested framebuffer.
 992          */
 993
 994         required_size = mode_cmd->pitch * mode_cmd->height;
 995         if (unlikely(required_size > (u64) dev_priv->vram_size)) {
 996                 DRM_ERROR("VRAM size is too small for requested mode.\n");
 997                 return NULL;
 998         }
 999
1000         /*
1001          * Take a reference on the user object of the resource
1002          * backing the kms fb. This ensures that user-space handle
1003          * lookups on that resource will always work as long as
1004          * it's registered with a kms framebuffer. This is important,
1005          * since vmw_execbuf_process identifies resources in the
1006          * command stream using user-space handles.
1007          */
1008
1009         user_obj = ttm_base_object_lookup(tfile, mode_cmd->handle);
1010         if (unlikely(user_obj == NULL)) {
1011                 DRM_ERROR("Could not locate requested kms frame buffer.\n");
1012                 return ERR_PTR(-ENOENT);
1013         }
1014
1015         /**
1016          * End conditioned code.
1017          */
1018
1019         ret = vmw_user_surface_lookup_handle(dev_priv, tfile,
1020                                              mode_cmd->handle, &surface);
1021         if (ret)
1022                 goto try_dmabuf;
1023
1024         if (!surface->scanout)
1025                 goto err_not_scanout;
1026
1027         ret = vmw_kms_new_framebuffer_surface(dev_priv, file_priv, surface,
1028                                               &vfb, mode_cmd);
1029
1030         /* vmw_user_surface_lookup takes one ref so does new_fb */
1031         vmw_surface_unreference(&surface);
1032
1033         if (ret) {
1034                 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
1035                 ttm_base_object_unref(&user_obj);
1036                 return ERR_PTR(ret);
1037         } else
1038                 vfb->user_obj = user_obj;
1039         return &vfb->base;
1040
1041 try_dmabuf:
1042         DRM_INFO("%s: trying buffer\n", __func__);
1043
1044         ret = vmw_user_dmabuf_lookup(tfile, mode_cmd->handle, &bo);
1045         if (ret) {
1046                 DRM_ERROR("failed to find buffer: %i\n", ret);
1047                 return ERR_PTR(-ENOENT);
1048         }
1049
1050         ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, bo, &vfb,
1051                                              mode_cmd);
1052
1053         /* vmw_user_dmabuf_lookup takes one ref so does new_fb */
1054         vmw_dmabuf_unreference(&bo);
1055
1056         if (ret) {
1057                 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
1058                 ttm_base_object_unref(&user_obj);
1059                 return ERR_PTR(ret);
1060         } else
1061                 vfb->user_obj = user_obj;
1062
1063         return &vfb->base;
1064
1065 err_not_scanout:
1066         DRM_ERROR("surface not marked as scanout\n");
1067         /* vmw_user_surface_lookup takes one ref */
1068         vmw_surface_unreference(&surface);
1069         ttm_base_object_unref(&user_obj);
1070
1071         return ERR_PTR(-EINVAL);
1072 }
1073
1074 static struct drm_mode_config_funcs vmw_kms_funcs = {
1075         .fb_create = vmw_kms_fb_create,
1076 };
1077
1078 int vmw_kms_present(struct vmw_private *dev_priv,
1079                     struct drm_file *file_priv,
1080                     struct vmw_framebuffer *vfb,
1081                     struct vmw_surface *surface,
1082                     uint32_t sid,
1083                     int32_t destX, int32_t destY,
1084                     struct drm_vmw_rect *clips,
1085                     uint32_t num_clips)
1086 {
1087         struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
1088         struct drm_crtc *crtc;
1089         size_t fifo_size;
1090         int i, k, num_units;
1091         int ret = 0; /* silence warning */
1092
1093         struct {
1094                 SVGA3dCmdHeader header;
1095                 SVGA3dCmdBlitSurfaceToScreen body;
1096         } *cmd;
1097         SVGASignedRect *blits;
1098
1099         num_units = 0;
1100         list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
1101                 if (crtc->fb != &vfb->base)
1102                         continue;
1103                 units[num_units++] = vmw_crtc_to_du(crtc);
1104         }
1105
1106         BUG_ON(surface == NULL);
1107         BUG_ON(!clips || !num_clips);
1108
1109         fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
1110         cmd = kmalloc(fifo_size, GFP_KERNEL);
1111         if (unlikely(cmd == NULL)) {
1112                 DRM_ERROR("Failed to allocate temporary fifo memory.\n");
1113                 return -ENOMEM;
1114         }
1115
1116         /* only need to do this once */
1117         memset(cmd, 0, fifo_size);
1118         cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
1119         cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
1120
1121         cmd->body.srcRect.left = 0;
1122         cmd->body.srcRect.right = surface->sizes[0].width;
1123         cmd->body.srcRect.top = 0;
1124         cmd->body.srcRect.bottom = surface->sizes[0].height;
1125
1126         blits = (SVGASignedRect *)&cmd[1];
1127         for (i = 0; i < num_clips; i++) {
1128                 blits[i].left   = clips[i].x;
1129                 blits[i].right  = clips[i].x + clips[i].w;
1130                 blits[i].top    = clips[i].y;
1131                 blits[i].bottom = clips[i].y + clips[i].h;
1132         }
1133
1134         for (k = 0; k < num_units; k++) {
1135                 struct vmw_display_unit *unit = units[k];
1136                 int clip_x1 = destX - unit->crtc.x;
1137                 int clip_y1 = destY - unit->crtc.y;
1138                 int clip_x2 = clip_x1 + surface->sizes[0].width;
1139                 int clip_y2 = clip_y1 + surface->sizes[0].height;
1140
1141                 /* skip any crtcs that misses the clip region */
1142                 if (clip_x1 >= unit->crtc.mode.hdisplay ||
1143                     clip_y1 >= unit->crtc.mode.vdisplay ||
1144                     clip_x2 <= 0 || clip_y2 <= 0)
1145                         continue;
1146
1147                 /* need to reset sid as it is changed by execbuf */
1148                 cmd->body.srcImage.sid = sid;
1149
1150                 cmd->body.destScreenId = unit->unit;
1151
1152                 /*
1153                  * The blit command is a lot more resilient then the
1154                  * readback command when it comes to clip rects. So its
1155                  * okay to go out of bounds.
1156                  */
1157
1158                 cmd->body.destRect.left = clip_x1;
1159                 cmd->body.destRect.right = clip_x2;
1160                 cmd->body.destRect.top = clip_y1;
1161                 cmd->body.destRect.bottom = clip_y2;
1162
1163                 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
1164                                           fifo_size, 0, NULL);
1165
1166                 if (unlikely(ret != 0))
1167                         break;
1168         }
1169
1170         kfree(cmd);
1171
1172         return ret;
1173 }
1174
1175 int vmw_kms_readback(struct vmw_private *dev_priv,
1176                      struct drm_file *file_priv,
1177                      struct vmw_framebuffer *vfb,
1178                      struct drm_vmw_fence_rep __user *user_fence_rep,
1179                      struct drm_vmw_rect *clips,
1180                      uint32_t num_clips)
1181 {
1182         struct vmw_framebuffer_dmabuf *vfbd =
1183                 vmw_framebuffer_to_vfbd(&vfb->base);
1184         struct vmw_dma_buffer *dmabuf = vfbd->buffer;
1185         struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
1186         struct drm_crtc *crtc;
1187         size_t fifo_size;
1188         int i, k, ret, num_units, blits_pos;
1189
1190         struct {
1191                 uint32_t header;
1192                 SVGAFifoCmdDefineGMRFB body;
1193         } *cmd;
1194         struct {
1195                 uint32_t header;
1196                 SVGAFifoCmdBlitScreenToGMRFB body;
1197         } *blits;
1198
1199         num_units = 0;
1200         list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
1201                 if (crtc->fb != &vfb->base)
1202                         continue;
1203                 units[num_units++] = vmw_crtc_to_du(crtc);
1204         }
1205
1206         BUG_ON(dmabuf == NULL);
1207         BUG_ON(!clips || !num_clips);
1208
1209         /* take a safe guess at fifo size */
1210         fifo_size = sizeof(*cmd) + sizeof(*blits) * num_clips * num_units;
1211         cmd = kmalloc(fifo_size, GFP_KERNEL);
1212         if (unlikely(cmd == NULL)) {
1213                 DRM_ERROR("Failed to allocate temporary fifo memory.\n");
1214                 return -ENOMEM;
1215         }
1216
1217         memset(cmd, 0, fifo_size);
1218         cmd->header = SVGA_CMD_DEFINE_GMRFB;
1219         cmd->body.format.bitsPerPixel = vfb->base.bits_per_pixel;
1220         cmd->body.format.colorDepth = vfb->base.depth;
1221         cmd->body.format.reserved = 0;
1222         cmd->body.bytesPerLine = vfb->base.pitch;
1223         cmd->body.ptr.gmrId = vfb->user_handle;
1224         cmd->body.ptr.offset = 0;
1225
1226         blits = (void *)&cmd[1];
1227         blits_pos = 0;
1228         for (i = 0; i < num_units; i++) {
1229                 struct drm_vmw_rect *c = clips;
1230                 for (k = 0; k < num_clips; k++, c++) {
1231                         /* transform clip coords to crtc origin based coords */
1232                         int clip_x1 = c->x - units[i]->crtc.x;
1233                         int clip_x2 = c->x - units[i]->crtc.x + c->w;
1234                         int clip_y1 = c->y - units[i]->crtc.y;
1235                         int clip_y2 = c->y - units[i]->crtc.y + c->h;
1236                         int dest_x = c->x;
1237                         int dest_y = c->y;
1238
1239                         /* compensate for clipping, we negate
1240                          * a negative number and add that.
1241                          */
1242                         if (clip_x1 < 0)
1243                                 dest_x += -clip_x1;
1244                         if (clip_y1 < 0)
1245                                 dest_y += -clip_y1;
1246
1247                         /* clip */
1248                         clip_x1 = max(clip_x1, 0);
1249                         clip_y1 = max(clip_y1, 0);
1250                         clip_x2 = min(clip_x2, units[i]->crtc.mode.hdisplay);
1251                         clip_y2 = min(clip_y2, units[i]->crtc.mode.vdisplay);
1252
1253                         /* and cull any rects that misses the crtc */
1254                         if (clip_x1 >= units[i]->crtc.mode.hdisplay ||
1255                             clip_y1 >= units[i]->crtc.mode.vdisplay ||
1256                             clip_x2 <= 0 || clip_y2 <= 0)
1257                                 continue;
1258
1259                         blits[blits_pos].header = SVGA_CMD_BLIT_SCREEN_TO_GMRFB;
1260                         blits[blits_pos].body.srcScreenId = units[i]->unit;
1261                         blits[blits_pos].body.destOrigin.x = dest_x;
1262                         blits[blits_pos].body.destOrigin.y = dest_y;
1263
1264                         blits[blits_pos].body.srcRect.left = clip_x1;
1265                         blits[blits_pos].body.srcRect.top = clip_y1;
1266                         blits[blits_pos].body.srcRect.right = clip_x2;
1267                         blits[blits_pos].body.srcRect.bottom = clip_y2;
1268                         blits_pos++;
1269                 }
1270         }
1271         /* reset size here and use calculated exact size from loops */
1272         fifo_size = sizeof(*cmd) + sizeof(*blits) * blits_pos;
1273
1274         ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, fifo_size,
1275                                   0, user_fence_rep);
1276
1277         kfree(cmd);
1278
1279         return ret;
1280 }
1281
1282 int vmw_kms_init(struct vmw_private *dev_priv)
1283 {
1284         struct drm_device *dev = dev_priv->dev;
1285         int ret;
1286
1287         drm_mode_config_init(dev);
1288         dev->mode_config.funcs = &vmw_kms_funcs;
1289         dev->mode_config.min_width = 1;
1290         dev->mode_config.min_height = 1;
1291         /* assumed largest fb size */
1292         dev->mode_config.max_width = 8192;
1293         dev->mode_config.max_height = 8192;
1294
1295         ret = vmw_kms_init_screen_object_display(dev_priv);
1296         if (ret) /* Fallback */
1297                 (void)vmw_kms_init_legacy_display_system(dev_priv);
1298
1299         return 0;
1300 }
1301
1302 int vmw_kms_close(struct vmw_private *dev_priv)
1303 {
1304         /*
1305          * Docs says we should take the lock before calling this function
1306          * but since it destroys encoders and our destructor calls
1307          * drm_encoder_cleanup which takes the lock we deadlock.
1308          */
1309         drm_mode_config_cleanup(dev_priv->dev);
1310         vmw_kms_close_legacy_display_system(dev_priv);
1311         return 0;
1312 }
1313
1314 int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
1315                                 struct drm_file *file_priv)
1316 {
1317         struct drm_vmw_cursor_bypass_arg *arg = data;
1318         struct vmw_display_unit *du;
1319         struct drm_mode_object *obj;
1320         struct drm_crtc *crtc;
1321         int ret = 0;
1322
1323
1324         mutex_lock(&dev->mode_config.mutex);
1325         if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) {
1326
1327                 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
1328                         du = vmw_crtc_to_du(crtc);
1329                         du->hotspot_x = arg->xhot;
1330                         du->hotspot_y = arg->yhot;
1331                 }
1332
1333                 mutex_unlock(&dev->mode_config.mutex);
1334                 return 0;
1335         }
1336
1337         obj = drm_mode_object_find(dev, arg->crtc_id, DRM_MODE_OBJECT_CRTC);
1338         if (!obj) {
1339                 ret = -EINVAL;
1340                 goto out;
1341         }
1342
1343         crtc = obj_to_crtc(obj);
1344         du = vmw_crtc_to_du(crtc);
1345
1346         du->hotspot_x = arg->xhot;
1347         du->hotspot_y = arg->yhot;
1348
1349 out:
1350         mutex_unlock(&dev->mode_config.mutex);
1351
1352         return ret;
1353 }
1354
1355 int vmw_kms_write_svga(struct vmw_private *vmw_priv,
1356                         unsigned width, unsigned height, unsigned pitch,
1357                         unsigned bpp, unsigned depth)
1358 {
1359         if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1360                 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch);
1361         else if (vmw_fifo_have_pitchlock(vmw_priv))
1362                 iowrite32(pitch, vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
1363         vmw_write(vmw_priv, SVGA_REG_WIDTH, width);
1364         vmw_write(vmw_priv, SVGA_REG_HEIGHT, height);
1365         vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bpp);
1366
1367         if (vmw_read(vmw_priv, SVGA_REG_DEPTH) != depth) {
1368                 DRM_ERROR("Invalid depth %u for %u bpp, host expects %u\n",
1369                           depth, bpp, vmw_read(vmw_priv, SVGA_REG_DEPTH));
1370                 return -EINVAL;
1371         }
1372
1373         return 0;
1374 }
1375
1376 int vmw_kms_save_vga(struct vmw_private *vmw_priv)
1377 {
1378         struct vmw_vga_topology_state *save;
1379         uint32_t i;
1380
1381         vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH);
1382         vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT);
1383         vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL);
1384         if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1385                 vmw_priv->vga_pitchlock =
1386                   vmw_read(vmw_priv, SVGA_REG_PITCHLOCK);
1387         else if (vmw_fifo_have_pitchlock(vmw_priv))
1388                 vmw_priv->vga_pitchlock = ioread32(vmw_priv->mmio_virt +
1389                                                        SVGA_FIFO_PITCHLOCK);
1390
1391         if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1392                 return 0;
1393
1394         vmw_priv->num_displays = vmw_read(vmw_priv,
1395                                           SVGA_REG_NUM_GUEST_DISPLAYS);
1396
1397         if (vmw_priv->num_displays == 0)
1398                 vmw_priv->num_displays = 1;
1399
1400         for (i = 0; i < vmw_priv->num_displays; ++i) {
1401                 save = &vmw_priv->vga_save[i];
1402                 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1403                 save->primary = vmw_read(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY);
1404                 save->pos_x = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_X);
1405                 save->pos_y = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y);
1406                 save->width = vmw_read(vmw_priv, SVGA_REG_DISPLAY_WIDTH);
1407                 save->height = vmw_read(vmw_priv, SVGA_REG_DISPLAY_HEIGHT);
1408                 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
1409                 if (i == 0 && vmw_priv->num_displays == 1 &&
1410                     save->width == 0 && save->height == 0) {
1411
1412                         /*
1413                          * It should be fairly safe to assume that these
1414                          * values are uninitialized.
1415                          */
1416
1417                         save->width = vmw_priv->vga_width - save->pos_x;
1418                         save->height = vmw_priv->vga_height - save->pos_y;
1419                 }
1420         }
1421
1422         return 0;
1423 }
1424
1425 int vmw_kms_restore_vga(struct vmw_private *vmw_priv)
1426 {
1427         struct vmw_vga_topology_state *save;
1428         uint32_t i;
1429
1430         vmw_write(vmw_priv, SVGA_REG_WIDTH, vmw_priv->vga_width);
1431         vmw_write(vmw_priv, SVGA_REG_HEIGHT, vmw_priv->vga_height);
1432         vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, vmw_priv->vga_bpp);
1433         if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1434                 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK,
1435                           vmw_priv->vga_pitchlock);
1436         else if (vmw_fifo_have_pitchlock(vmw_priv))
1437                 iowrite32(vmw_priv->vga_pitchlock,
1438                           vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
1439
1440         if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1441                 return 0;
1442
1443         for (i = 0; i < vmw_priv->num_displays; ++i) {
1444                 save = &vmw_priv->vga_save[i];
1445                 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1446                 vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, save->primary);
1447                 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, save->pos_x);
1448                 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, save->pos_y);
1449                 vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, save->width);
1450                 vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, save->height);
1451                 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
1452         }
1453
1454         return 0;
1455 }
1456
1457 bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv,
1458                                 uint32_t pitch,
1459                                 uint32_t height)
1460 {
1461         return ((u64) pitch * (u64) height) < (u64) dev_priv->vram_size;
1462 }
1463
1464
1465 /**
1466  * Function called by DRM code called with vbl_lock held.
1467  */
1468 u32 vmw_get_vblank_counter(struct drm_device *dev, int crtc)
1469 {
1470         return 0;
1471 }
1472
1473 /**
1474  * Function called by DRM code called with vbl_lock held.
1475  */
1476 int vmw_enable_vblank(struct drm_device *dev, int crtc)
1477 {
1478         return -ENOSYS;
1479 }
1480
1481 /**
1482  * Function called by DRM code called with vbl_lock held.
1483  */
1484 void vmw_disable_vblank(struct drm_device *dev, int crtc)
1485 {
1486 }
1487
1488
1489 /*
1490  * Small shared kms functions.
1491  */
1492
1493 int vmw_du_update_layout(struct vmw_private *dev_priv, unsigned num,
1494                          struct drm_vmw_rect *rects)
1495 {
1496         struct drm_device *dev = dev_priv->dev;
1497         struct vmw_display_unit *du;
1498         struct drm_connector *con;
1499
1500         mutex_lock(&dev->mode_config.mutex);
1501
1502 #if 0
1503         {
1504                 unsigned int i;
1505
1506                 DRM_INFO("%s: new layout ", __func__);
1507                 for (i = 0; i < num; i++)
1508                         DRM_INFO("(%i, %i %ux%u) ", rects[i].x, rects[i].y,
1509                                  rects[i].w, rects[i].h);
1510                 DRM_INFO("\n");
1511         }
1512 #endif
1513
1514         list_for_each_entry(con, &dev->mode_config.connector_list, head) {
1515                 du = vmw_connector_to_du(con);
1516                 if (num > du->unit) {
1517                         du->pref_width = rects[du->unit].w;
1518                         du->pref_height = rects[du->unit].h;
1519                         du->pref_active = true;
1520                 } else {
1521                         du->pref_width = 800;
1522                         du->pref_height = 600;
1523                         du->pref_active = false;
1524                 }
1525                 con->status = vmw_du_connector_detect(con, true);
1526         }
1527
1528         mutex_unlock(&dev->mode_config.mutex);
1529
1530         return 0;
1531 }
1532
1533 void vmw_du_crtc_save(struct drm_crtc *crtc)
1534 {
1535 }
1536
1537 void vmw_du_crtc_restore(struct drm_crtc *crtc)
1538 {
1539 }
1540
1541 void vmw_du_crtc_gamma_set(struct drm_crtc *crtc,
1542                            u16 *r, u16 *g, u16 *b,
1543                            uint32_t start, uint32_t size)
1544 {
1545         struct vmw_private *dev_priv = vmw_priv(crtc->dev);
1546         int i;
1547
1548         for (i = 0; i < size; i++) {
1549                 DRM_DEBUG("%d r/g/b = 0x%04x / 0x%04x / 0x%04x\n", i,
1550                           r[i], g[i], b[i]);
1551                 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 0, r[i] >> 8);
1552                 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 1, g[i] >> 8);
1553                 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 2, b[i] >> 8);
1554         }
1555 }
1556
1557 void vmw_du_connector_dpms(struct drm_connector *connector, int mode)
1558 {
1559 }
1560
1561 void vmw_du_connector_save(struct drm_connector *connector)
1562 {
1563 }
1564
1565 void vmw_du_connector_restore(struct drm_connector *connector)
1566 {
1567 }
1568
1569 enum drm_connector_status
1570 vmw_du_connector_detect(struct drm_connector *connector, bool force)
1571 {
1572         uint32_t num_displays;
1573         struct drm_device *dev = connector->dev;
1574         struct vmw_private *dev_priv = vmw_priv(dev);
1575
1576         mutex_lock(&dev_priv->hw_mutex);
1577         num_displays = vmw_read(dev_priv, SVGA_REG_NUM_DISPLAYS);
1578         mutex_unlock(&dev_priv->hw_mutex);
1579
1580         return ((vmw_connector_to_du(connector)->unit < num_displays) ?
1581                 connector_status_connected : connector_status_disconnected);
1582 }
1583
1584 static struct drm_display_mode vmw_kms_connector_builtin[] = {
1585         /* 640x480@60Hz */
1586         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
1587                    752, 800, 0, 480, 489, 492, 525, 0,
1588                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1589         /* 800x600@60Hz */
1590         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
1591                    968, 1056, 0, 600, 601, 605, 628, 0,
1592                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1593         /* 1024x768@60Hz */
1594         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
1595                    1184, 1344, 0, 768, 771, 777, 806, 0,
1596                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1597         /* 1152x864@75Hz */
1598         { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
1599                    1344, 1600, 0, 864, 865, 868, 900, 0,
1600                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1601         /* 1280x768@60Hz */
1602         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
1603                    1472, 1664, 0, 768, 771, 778, 798, 0,
1604                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1605         /* 1280x800@60Hz */
1606         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
1607                    1480, 1680, 0, 800, 803, 809, 831, 0,
1608                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1609         /* 1280x960@60Hz */
1610         { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
1611                    1488, 1800, 0, 960, 961, 964, 1000, 0,
1612                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1613         /* 1280x1024@60Hz */
1614         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
1615                    1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
1616                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1617         /* 1360x768@60Hz */
1618         { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
1619                    1536, 1792, 0, 768, 771, 777, 795, 0,
1620                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1621         /* 1440x1050@60Hz */
1622         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
1623                    1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
1624                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1625         /* 1440x900@60Hz */
1626         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
1627                    1672, 1904, 0, 900, 903, 909, 934, 0,
1628                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1629         /* 1600x1200@60Hz */
1630         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
1631                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
1632                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1633         /* 1680x1050@60Hz */
1634         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
1635                    1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
1636                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1637         /* 1792x1344@60Hz */
1638         { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
1639                    2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
1640                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1641         /* 1853x1392@60Hz */
1642         { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
1643                    2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
1644                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1645         /* 1920x1200@60Hz */
1646         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
1647                    2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
1648                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1649         /* 1920x1440@60Hz */
1650         { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
1651                    2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
1652                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1653         /* 2560x1600@60Hz */
1654         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
1655                    3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
1656                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1657         /* Terminate */
1658         { DRM_MODE("", 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) },
1659 };
1660
1661 int vmw_du_connector_fill_modes(struct drm_connector *connector,
1662                                 uint32_t max_width, uint32_t max_height)
1663 {
1664         struct vmw_display_unit *du = vmw_connector_to_du(connector);
1665         struct drm_device *dev = connector->dev;
1666         struct vmw_private *dev_priv = vmw_priv(dev);
1667         struct drm_display_mode *mode = NULL;
1668         struct drm_display_mode *bmode;
1669         struct drm_display_mode prefmode = { DRM_MODE("preferred",
1670                 DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1671                 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1672                 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC)
1673         };
1674         int i;
1675
1676         /* Add preferred mode */
1677         {
1678                 mode = drm_mode_duplicate(dev, &prefmode);
1679                 if (!mode)
1680                         return 0;
1681                 mode->hdisplay = du->pref_width;
1682                 mode->vdisplay = du->pref_height;
1683                 mode->vrefresh = drm_mode_vrefresh(mode);
1684                 if (vmw_kms_validate_mode_vram(dev_priv, mode->hdisplay * 2,
1685                                                mode->vdisplay)) {
1686                         drm_mode_probed_add(connector, mode);
1687
1688                         if (du->pref_mode) {
1689                                 list_del_init(&du->pref_mode->head);
1690                                 drm_mode_destroy(dev, du->pref_mode);
1691                         }
1692
1693                         du->pref_mode = mode;
1694                 }
1695         }
1696
1697         for (i = 0; vmw_kms_connector_builtin[i].type != 0; i++) {
1698                 bmode = &vmw_kms_connector_builtin[i];
1699                 if (bmode->hdisplay > max_width ||
1700                     bmode->vdisplay > max_height)
1701                         continue;
1702
1703                 if (!vmw_kms_validate_mode_vram(dev_priv, bmode->hdisplay * 2,
1704                                                 bmode->vdisplay))
1705                         continue;
1706
1707                 mode = drm_mode_duplicate(dev, bmode);
1708                 if (!mode)
1709                         return 0;
1710                 mode->vrefresh = drm_mode_vrefresh(mode);
1711
1712                 drm_mode_probed_add(connector, mode);
1713         }
1714
1715         drm_mode_connector_list_update(connector);
1716
1717         return 1;
1718 }
1719
1720 int vmw_du_connector_set_property(struct drm_connector *connector,
1721                                   struct drm_property *property,
1722                                   uint64_t val)
1723 {
1724         return 0;
1725 }