drivers/gpu/drm/vmwgfx/vmwgfx_drv.c

   1 /**************************************************************************
   2  *
   3  * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #include "drmP.h"
  29 #include "vmwgfx_drv.h"
  30 #include "ttm/ttm_placement.h"
  31 #include "ttm/ttm_bo_driver.h"
  32 #include "ttm/ttm_object.h"
  33 #include "ttm/ttm_module.h"
  34
  35 #define VMWGFX_DRIVER_NAME "vmwgfx"
  36 #define VMWGFX_DRIVER_DESC "Linux drm driver for VMware graphics devices"
  37 #define VMWGFX_CHIP_SVGAII 0
  38 #define VMW_FB_RESERVATION 0
  39
  40 /**
  41  * Fully encoded drm commands. Might move to vmw_drm.h
  42  */
  43
  44 #define DRM_IOCTL_VMW_GET_PARAM                                 \
  45         DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_GET_PARAM,          \
  46                  struct drm_vmw_getparam_arg)
  47 #define DRM_IOCTL_VMW_ALLOC_DMABUF                              \
  48         DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_ALLOC_DMABUF,       \
  49                 union drm_vmw_alloc_dmabuf_arg)
  50 #define DRM_IOCTL_VMW_UNREF_DMABUF                              \
  51         DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_DMABUF,        \
  52                 struct drm_vmw_unref_dmabuf_arg)
  53 #define DRM_IOCTL_VMW_CURSOR_BYPASS                             \
  54         DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_CURSOR_BYPASS,       \
  55                  struct drm_vmw_cursor_bypass_arg)
  56
  57 #define DRM_IOCTL_VMW_CONTROL_STREAM                            \
  58         DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_CONTROL_STREAM,      \
  59                  struct drm_vmw_control_stream_arg)
  60 #define DRM_IOCTL_VMW_CLAIM_STREAM                              \
  61         DRM_IOR(DRM_COMMAND_BASE + DRM_VMW_CLAIM_STREAM,        \
  62                  struct drm_vmw_stream_arg)
  63 #define DRM_IOCTL_VMW_UNREF_STREAM                              \
  64         DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_STREAM,        \
  65                  struct drm_vmw_stream_arg)
  66
  67 #define DRM_IOCTL_VMW_CREATE_CONTEXT                            \
  68         DRM_IOR(DRM_COMMAND_BASE + DRM_VMW_CREATE_CONTEXT,      \
  69                 struct drm_vmw_context_arg)
  70 #define DRM_IOCTL_VMW_UNREF_CONTEXT                             \
  71         DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_CONTEXT,       \
  72                 struct drm_vmw_context_arg)
  73 #define DRM_IOCTL_VMW_CREATE_SURFACE                            \
  74         DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_CREATE_SURFACE,     \
  75                  union drm_vmw_surface_create_arg)
  76 #define DRM_IOCTL_VMW_UNREF_SURFACE                             \
  77         DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_SURFACE,       \
  78                  struct drm_vmw_surface_arg)
  79 #define DRM_IOCTL_VMW_REF_SURFACE                               \
  80         DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_REF_SURFACE,        \
  81                  union drm_vmw_surface_reference_arg)
  82 #define DRM_IOCTL_VMW_EXECBUF                                   \
  83         DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_EXECBUF,             \
  84                 struct drm_vmw_execbuf_arg)
  85 #define DRM_IOCTL_VMW_GET_3D_CAP                                \
  86         DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_GET_3D_CAP,          \
  87                  struct drm_vmw_get_3d_cap_arg)
  88 #define DRM_IOCTL_VMW_FENCE_WAIT                                \
  89         DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_FENCE_WAIT,         \
  90                  struct drm_vmw_fence_wait_arg)
  91 #define DRM_IOCTL_VMW_FENCE_SIGNALED                            \
  92         DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_FENCE_SIGNALED,     \
  93                  struct drm_vmw_fence_signaled_arg)
  94 #define DRM_IOCTL_VMW_FENCE_UNREF                               \
  95         DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_FENCE_UNREF,         \
  96                  struct drm_vmw_fence_arg)
  97
  98 /**
  99  * The core DRM version of this macro doesn't account for
 100  * DRM_COMMAND_BASE.
 101  */
 102
 103 #define VMW_IOCTL_DEF(ioctl, func, flags) \
 104   [DRM_IOCTL_NR(DRM_IOCTL_##ioctl) - DRM_COMMAND_BASE] = {DRM_##ioctl, flags, func, DRM_IOCTL_##ioctl}
 105
 106 /**
 107  * Ioctl definitions.
 108  */
 109
 110 static struct drm_ioctl_desc vmw_ioctls[] = {
 111         VMW_IOCTL_DEF(VMW_GET_PARAM, vmw_getparam_ioctl,
 112                       DRM_AUTH | DRM_UNLOCKED),
 113         VMW_IOCTL_DEF(VMW_ALLOC_DMABUF, vmw_dmabuf_alloc_ioctl,
 114                       DRM_AUTH | DRM_UNLOCKED),
 115         VMW_IOCTL_DEF(VMW_UNREF_DMABUF, vmw_dmabuf_unref_ioctl,
 116                       DRM_AUTH | DRM_UNLOCKED),
 117         VMW_IOCTL_DEF(VMW_CURSOR_BYPASS,
 118                       vmw_kms_cursor_bypass_ioctl,
 119                       DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
 120
 121         VMW_IOCTL_DEF(VMW_CONTROL_STREAM, vmw_overlay_ioctl,
 122                       DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
 123         VMW_IOCTL_DEF(VMW_CLAIM_STREAM, vmw_stream_claim_ioctl,
 124                       DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
 125         VMW_IOCTL_DEF(VMW_UNREF_STREAM, vmw_stream_unref_ioctl,
 126                       DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
 127
 128         VMW_IOCTL_DEF(VMW_CREATE_CONTEXT, vmw_context_define_ioctl,
 129                       DRM_AUTH | DRM_UNLOCKED),
 130         VMW_IOCTL_DEF(VMW_UNREF_CONTEXT, vmw_context_destroy_ioctl,
 131                       DRM_AUTH | DRM_UNLOCKED),
 132         VMW_IOCTL_DEF(VMW_CREATE_SURFACE, vmw_surface_define_ioctl,
 133                       DRM_AUTH | DRM_UNLOCKED),
 134         VMW_IOCTL_DEF(VMW_UNREF_SURFACE, vmw_surface_destroy_ioctl,
 135                       DRM_AUTH | DRM_UNLOCKED),
 136         VMW_IOCTL_DEF(VMW_REF_SURFACE, vmw_surface_reference_ioctl,
 137                       DRM_AUTH | DRM_UNLOCKED),
 138         VMW_IOCTL_DEF(VMW_EXECBUF, vmw_execbuf_ioctl,
 139                       DRM_AUTH | DRM_UNLOCKED),
 140         VMW_IOCTL_DEF(VMW_FENCE_WAIT, vmw_fence_obj_wait_ioctl,
 141                       DRM_AUTH | DRM_UNLOCKED),
 142         VMW_IOCTL_DEF(VMW_FENCE_SIGNALED,
 143                       vmw_fence_obj_signaled_ioctl,
 144                       DRM_AUTH | DRM_UNLOCKED),
 145         VMW_IOCTL_DEF(VMW_FENCE_UNREF, vmw_fence_obj_unref_ioctl,
 146                       DRM_AUTH | DRM_UNLOCKED),
 147         VMW_IOCTL_DEF(VMW_GET_3D_CAP, vmw_get_cap_3d_ioctl,
 148                       DRM_AUTH | DRM_UNLOCKED),
 149 };
 150
 151 static struct pci_device_id vmw_pci_id_list[] = {
 152         {0x15ad, 0x0405, PCI_ANY_ID, PCI_ANY_ID, 0, 0, VMWGFX_CHIP_SVGAII},
 153         {0, 0, 0}
 154 };
 155
 156 static int enable_fbdev;
 157
 158 static int vmw_probe(struct pci_dev *, const struct pci_device_id *);
 159 static void vmw_master_init(struct vmw_master *);
 160 static int vmwgfx_pm_notifier(struct notifier_block *nb, unsigned long val,
 161                               void *ptr);
 162
 163 MODULE_PARM_DESC(enable_fbdev, "Enable vmwgfx fbdev");
 164 module_param_named(enable_fbdev, enable_fbdev, int, 0600);
 165
 166 static void vmw_print_capabilities(uint32_t capabilities)
 167 {
 168         DRM_INFO("Capabilities:\n");
 169         if (capabilities & SVGA_CAP_RECT_COPY)
 170                 DRM_INFO("  Rect copy.\n");
 171         if (capabilities & SVGA_CAP_CURSOR)
 172                 DRM_INFO("  Cursor.\n");
 173         if (capabilities & SVGA_CAP_CURSOR_BYPASS)
 174                 DRM_INFO("  Cursor bypass.\n");
 175         if (capabilities & SVGA_CAP_CURSOR_BYPASS_2)
 176                 DRM_INFO("  Cursor bypass 2.\n");
 177         if (capabilities & SVGA_CAP_8BIT_EMULATION)
 178                 DRM_INFO("  8bit emulation.\n");
 179         if (capabilities & SVGA_CAP_ALPHA_CURSOR)
 180                 DRM_INFO("  Alpha cursor.\n");
 181         if (capabilities & SVGA_CAP_3D)
 182                 DRM_INFO("  3D.\n");
 183         if (capabilities & SVGA_CAP_EXTENDED_FIFO)
 184                 DRM_INFO("  Extended Fifo.\n");
 185         if (capabilities & SVGA_CAP_MULTIMON)
 186                 DRM_INFO("  Multimon.\n");
 187         if (capabilities & SVGA_CAP_PITCHLOCK)
 188                 DRM_INFO("  Pitchlock.\n");
 189         if (capabilities & SVGA_CAP_IRQMASK)
 190                 DRM_INFO("  Irq mask.\n");
 191         if (capabilities & SVGA_CAP_DISPLAY_TOPOLOGY)
 192                 DRM_INFO("  Display Topology.\n");
 193         if (capabilities & SVGA_CAP_GMR)
 194                 DRM_INFO("  GMR.\n");
 195         if (capabilities & SVGA_CAP_TRACES)
 196                 DRM_INFO("  Traces.\n");
 197         if (capabilities & SVGA_CAP_GMR2)
 198                 DRM_INFO("  GMR2.\n");
 199         if (capabilities & SVGA_CAP_SCREEN_OBJECT_2)
 200                 DRM_INFO("  Screen Object 2.\n");
 201 }
 202
 203 static int vmw_request_device(struct vmw_private *dev_priv)
 204 {
 205         int ret;
 206
 207         ret = vmw_fifo_init(dev_priv, &dev_priv->fifo);
 208         if (unlikely(ret != 0)) {
 209                 DRM_ERROR("Unable to initialize FIFO.\n");
 210                 return ret;
 211         }
 212         vmw_fence_fifo_up(dev_priv->fman);
 213
 214         return 0;
 215 }
 216
 217 static void vmw_release_device(struct vmw_private *dev_priv)
 218 {
 219         vmw_fence_fifo_down(dev_priv->fman);
 220         vmw_fifo_release(dev_priv, &dev_priv->fifo);
 221 }
 222
 223 /**
 224  * Increase the 3d resource refcount.
 225  * If the count was prevously zero, initialize the fifo, switching to svga
 226  * mode. Note that the master holds a ref as well, and may request an
 227  * explicit switch to svga mode if fb is not running, using @unhide_svga.
 228  */
 229 int vmw_3d_resource_inc(struct vmw_private *dev_priv,
 230                         bool unhide_svga)
 231 {
 232         int ret = 0;
 233
 234         mutex_lock(&dev_priv->release_mutex);
 235         if (unlikely(dev_priv->num_3d_resources++ == 0)) {
 236                 ret = vmw_request_device(dev_priv);
 237                 if (unlikely(ret != 0))
 238                         --dev_priv->num_3d_resources;
 239         } else if (unhide_svga) {
 240                 mutex_lock(&dev_priv->hw_mutex);
 241                 vmw_write(dev_priv, SVGA_REG_ENABLE,
 242                           vmw_read(dev_priv, SVGA_REG_ENABLE) &
 243                           ~SVGA_REG_ENABLE_HIDE);
 244                 mutex_unlock(&dev_priv->hw_mutex);
 245         }
 246
 247         mutex_unlock(&dev_priv->release_mutex);
 248         return ret;
 249 }
 250
 251 /**
 252  * Decrease the 3d resource refcount.
 253  * If the count reaches zero, disable the fifo, switching to vga mode.
 254  * Note that the master holds a refcount as well, and may request an
 255  * explicit switch to vga mode when it releases its refcount to account
 256  * for the situation of an X server vt switch to VGA with 3d resources
 257  * active.
 258  */
 259 void vmw_3d_resource_dec(struct vmw_private *dev_priv,
 260                          bool hide_svga)
 261 {
 262         int32_t n3d;
 263
 264         mutex_lock(&dev_priv->release_mutex);
 265         if (unlikely(--dev_priv->num_3d_resources == 0))
 266                 vmw_release_device(dev_priv);
 267         else if (hide_svga) {
 268                 mutex_lock(&dev_priv->hw_mutex);
 269                 vmw_write(dev_priv, SVGA_REG_ENABLE,
 270                           vmw_read(dev_priv, SVGA_REG_ENABLE) |
 271                           SVGA_REG_ENABLE_HIDE);
 272                 mutex_unlock(&dev_priv->hw_mutex);
 273         }
 274
 275         n3d = (int32_t) dev_priv->num_3d_resources;
 276         mutex_unlock(&dev_priv->release_mutex);
 277
 278         BUG_ON(n3d < 0);
 279 }
 280
 281 static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
 282 {
 283         struct vmw_private *dev_priv;
 284         int ret;
 285         uint32_t svga_id;
 286
 287         dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
 288         if (unlikely(dev_priv == NULL)) {
 289                 DRM_ERROR("Failed allocating a device private struct.\n");
 290                 return -ENOMEM;
 291         }
 292         memset(dev_priv, 0, sizeof(*dev_priv));
 293
 294         dev_priv->dev = dev;
 295         dev_priv->vmw_chipset = chipset;
 296         dev_priv->last_read_seqno = (uint32_t) -100;
 297         mutex_init(&dev_priv->hw_mutex);
 298         mutex_init(&dev_priv->cmdbuf_mutex);
 299         mutex_init(&dev_priv->release_mutex);
 300         rwlock_init(&dev_priv->resource_lock);
 301         idr_init(&dev_priv->context_idr);
 302         idr_init(&dev_priv->surface_idr);
 303         idr_init(&dev_priv->stream_idr);
 304         mutex_init(&dev_priv->init_mutex);
 305         init_waitqueue_head(&dev_priv->fence_queue);
 306         init_waitqueue_head(&dev_priv->fifo_queue);
 307         dev_priv->fence_queue_waiters = 0;
 308         atomic_set(&dev_priv->fifo_queue_waiters, 0);
 309
 310         dev_priv->io_start = pci_resource_start(dev->pdev, 0);
 311         dev_priv->vram_start = pci_resource_start(dev->pdev, 1);
 312         dev_priv->mmio_start = pci_resource_start(dev->pdev, 2);
 313
 314         dev_priv->enable_fb = enable_fbdev;
 315
 316         mutex_lock(&dev_priv->hw_mutex);
 317
 318         vmw_write(dev_priv, SVGA_REG_ID, SVGA_ID_2);
 319         svga_id = vmw_read(dev_priv, SVGA_REG_ID);
 320         if (svga_id != SVGA_ID_2) {
 321                 ret = -ENOSYS;
 322                 DRM_ERROR("Unsuported SVGA ID 0x%x\n", svga_id);
 323                 mutex_unlock(&dev_priv->hw_mutex);
 324                 goto out_err0;
 325         }
 326
 327         dev_priv->capabilities = vmw_read(dev_priv, SVGA_REG_CAPABILITIES);
 328
 329         if (dev_priv->capabilities & SVGA_CAP_GMR) {
 330                 dev_priv->max_gmr_descriptors =
 331                         vmw_read(dev_priv,
 332                                  SVGA_REG_GMR_MAX_DESCRIPTOR_LENGTH);
 333                 dev_priv->max_gmr_ids =
 334                         vmw_read(dev_priv, SVGA_REG_GMR_MAX_IDS);
 335         }
 336         if (dev_priv->capabilities & SVGA_CAP_GMR2) {
 337                 dev_priv->max_gmr_pages =
 338                         vmw_read(dev_priv, SVGA_REG_GMRS_MAX_PAGES);
 339                 dev_priv->memory_size =
 340                         vmw_read(dev_priv, SVGA_REG_MEMORY_SIZE);
 341         }
 342
 343         dev_priv->vram_size = vmw_read(dev_priv, SVGA_REG_VRAM_SIZE);
 344         dev_priv->mmio_size = vmw_read(dev_priv, SVGA_REG_MEM_SIZE);
 345         dev_priv->fb_max_width = vmw_read(dev_priv, SVGA_REG_MAX_WIDTH);
 346         dev_priv->fb_max_height = vmw_read(dev_priv, SVGA_REG_MAX_HEIGHT);
 347
 348         mutex_unlock(&dev_priv->hw_mutex);
 349
 350         vmw_print_capabilities(dev_priv->capabilities);
 351
 352         if (dev_priv->capabilities & SVGA_CAP_GMR) {
 353                 DRM_INFO("Max GMR ids is %u\n",
 354                          (unsigned)dev_priv->max_gmr_ids);
 355                 DRM_INFO("Max GMR descriptors is %u\n",
 356                          (unsigned)dev_priv->max_gmr_descriptors);
 357         }
 358         if (dev_priv->capabilities & SVGA_CAP_GMR2) {
 359                 DRM_INFO("Max number of GMR pages is %u\n",
 360                          (unsigned)dev_priv->max_gmr_pages);
 361                 DRM_INFO("Max dedicated hypervisor graphics memory is %u\n",
 362                          (unsigned)dev_priv->memory_size);
 363         }
 364         DRM_INFO("VRAM at 0x%08x size is %u kiB\n",
 365                  dev_priv->vram_start, dev_priv->vram_size / 1024);
 366         DRM_INFO("MMIO at 0x%08x size is %u kiB\n",
 367                  dev_priv->mmio_start, dev_priv->mmio_size / 1024);
 368
 369         ret = vmw_ttm_global_init(dev_priv);
 370         if (unlikely(ret != 0))
 371                 goto out_err0;
 372
 373
 374         vmw_master_init(&dev_priv->fbdev_master);
 375         ttm_lock_set_kill(&dev_priv->fbdev_master.lock, false, SIGTERM);
 376         dev_priv->active_master = &dev_priv->fbdev_master;
 377
 378
 379         ret = ttm_bo_device_init(&dev_priv->bdev,
 380                                  dev_priv->bo_global_ref.ref.object,
 381                                  &vmw_bo_driver, VMWGFX_FILE_PAGE_OFFSET,
 382                                  false);
 383         if (unlikely(ret != 0)) {
 384                 DRM_ERROR("Failed initializing TTM buffer object driver.\n");
 385                 goto out_err1;
 386         }
 387
 388         ret = ttm_bo_init_mm(&dev_priv->bdev, TTM_PL_VRAM,
 389                              (dev_priv->vram_size >> PAGE_SHIFT));
 390         if (unlikely(ret != 0)) {
 391                 DRM_ERROR("Failed initializing memory manager for VRAM.\n");
 392                 goto out_err2;
 393         }
 394
 395         dev_priv->has_gmr = true;
 396         if (ttm_bo_init_mm(&dev_priv->bdev, VMW_PL_GMR,
 397                            dev_priv->max_gmr_ids) != 0) {
 398                 DRM_INFO("No GMR memory available. "
 399                          "Graphics memory resources are very limited.\n");
 400                 dev_priv->has_gmr = false;
 401         }
 402
 403         dev_priv->mmio_mtrr = drm_mtrr_add(dev_priv->mmio_start,
 404                                            dev_priv->mmio_size, DRM_MTRR_WC);
 405
 406         dev_priv->mmio_virt = ioremap_wc(dev_priv->mmio_start,
 407                                          dev_priv->mmio_size);
 408
 409         if (unlikely(dev_priv->mmio_virt == NULL)) {
 410                 ret = -ENOMEM;
 411                 DRM_ERROR("Failed mapping MMIO.\n");
 412                 goto out_err3;
 413         }
 414
 415         /* Need mmio memory to check for fifo pitchlock cap. */
 416         if (!(dev_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY) &&
 417             !(dev_priv->capabilities & SVGA_CAP_PITCHLOCK) &&
 418             !vmw_fifo_have_pitchlock(dev_priv)) {
 419                 ret = -ENOSYS;
 420                 DRM_ERROR("Hardware has no pitchlock\n");
 421                 goto out_err4;
 422         }
 423
 424         dev_priv->tdev = ttm_object_device_init
 425             (dev_priv->mem_global_ref.object, 12);
 426
 427         if (unlikely(dev_priv->tdev == NULL)) {
 428                 DRM_ERROR("Unable to initialize TTM object management.\n");
 429                 ret = -ENOMEM;
 430                 goto out_err4;
 431         }
 432
 433         dev->dev_private = dev_priv;
 434
 435         ret = pci_request_regions(dev->pdev, "vmwgfx probe");
 436         dev_priv->stealth = (ret != 0);
 437         if (dev_priv->stealth) {
 438                 /**
 439                  * Request at least the mmio PCI resource.
 440                  */
 441
 442                 DRM_INFO("It appears like vesafb is loaded. "
 443                          "Ignore above error if any.\n");
 444                 ret = pci_request_region(dev->pdev, 2, "vmwgfx stealth probe");
 445                 if (unlikely(ret != 0)) {
 446                         DRM_ERROR("Failed reserving the SVGA MMIO resource.\n");
 447                         goto out_no_device;
 448                 }
 449         }
 450
 451         dev_priv->fman = vmw_fence_manager_init(dev_priv);
 452         if (unlikely(dev_priv->fman == NULL))
 453                 goto out_no_fman;
 454
 455         /* Need to start the fifo to check if we can do screen objects */
 456         ret = vmw_3d_resource_inc(dev_priv, true);
 457         if (unlikely(ret != 0))
 458                 goto out_no_fifo;
 459         vmw_kms_save_vga(dev_priv);
 460         DRM_INFO("%s", vmw_fifo_have_3d(dev_priv) ?
 461                  "Detected device 3D availability.\n" :
 462                  "Detected no device 3D availability.\n");
 463
 464         /* Start kms and overlay systems, needs fifo. */
 465         ret = vmw_kms_init(dev_priv);
 466         if (unlikely(ret != 0))
 467                 goto out_no_kms;
 468         vmw_overlay_init(dev_priv);
 469
 470         /* We might be done with the fifo now */
 471         if (dev_priv->enable_fb) {
 472                 vmw_fb_init(dev_priv);
 473         } else {
 474                 vmw_kms_restore_vga(dev_priv);
 475                 vmw_3d_resource_dec(dev_priv, true);
 476         }
 477
 478         if (dev_priv->capabilities & SVGA_CAP_IRQMASK) {
 479                 ret = drm_irq_install(dev);
 480                 if (unlikely(ret != 0)) {
 481                         DRM_ERROR("Failed installing irq: %d\n", ret);
 482                         goto out_no_irq;
 483                 }
 484         }
 485
 486         dev_priv->pm_nb.notifier_call = vmwgfx_pm_notifier;
 487         register_pm_notifier(&dev_priv->pm_nb);
 488
 489         return 0;
 490
 491 out_no_irq:
 492         if (dev_priv->enable_fb)
 493                 vmw_fb_close(dev_priv);
 494         vmw_overlay_close(dev_priv);
 495         vmw_kms_close(dev_priv);
 496 out_no_kms:
 497         /* We still have a 3D resource reference held */
 498         if (dev_priv->enable_fb) {
 499                 vmw_kms_restore_vga(dev_priv);
 500                 vmw_3d_resource_dec(dev_priv, false);
 501         }
 502 out_no_fifo:
 503         vmw_fence_manager_takedown(dev_priv->fman);
 504 out_no_fman:
 505         if (dev_priv->stealth)
 506                 pci_release_region(dev->pdev, 2);
 507         else
 508                 pci_release_regions(dev->pdev);
 509 out_no_device:
 510         ttm_object_device_release(&dev_priv->tdev);
 511 out_err4:
 512         iounmap(dev_priv->mmio_virt);
 513 out_err3:
 514         drm_mtrr_del(dev_priv->mmio_mtrr, dev_priv->mmio_start,
 515                      dev_priv->mmio_size, DRM_MTRR_WC);
 516         if (dev_priv->has_gmr)
 517                 (void) ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_GMR);
 518         (void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
 519 out_err2:
 520         (void)ttm_bo_device_release(&dev_priv->bdev);
 521 out_err1:
 522         vmw_ttm_global_release(dev_priv);
 523 out_err0:
 524         idr_destroy(&dev_priv->surface_idr);
 525         idr_destroy(&dev_priv->context_idr);
 526         idr_destroy(&dev_priv->stream_idr);
 527         kfree(dev_priv);
 528         return ret;
 529 }
 530
 531 static int vmw_driver_unload(struct drm_device *dev)
 532 {
 533         struct vmw_private *dev_priv = vmw_priv(dev);
 534
 535         unregister_pm_notifier(&dev_priv->pm_nb);
 536
 537         if (dev_priv->ctx.cmd_bounce)
 538                 vfree(dev_priv->ctx.cmd_bounce);
 539         if (dev_priv->capabilities & SVGA_CAP_IRQMASK)
 540                 drm_irq_uninstall(dev_priv->dev);
 541         if (dev_priv->enable_fb) {
 542                 vmw_fb_close(dev_priv);
 543                 vmw_kms_restore_vga(dev_priv);
 544                 vmw_3d_resource_dec(dev_priv, false);
 545         }
 546         vmw_kms_close(dev_priv);
 547         vmw_overlay_close(dev_priv);
 548         vmw_fence_manager_takedown(dev_priv->fman);
 549         if (dev_priv->stealth)
 550                 pci_release_region(dev->pdev, 2);
 551         else
 552                 pci_release_regions(dev->pdev);
 553
 554         ttm_object_device_release(&dev_priv->tdev);
 555         iounmap(dev_priv->mmio_virt);
 556         drm_mtrr_del(dev_priv->mmio_mtrr, dev_priv->mmio_start,
 557                      dev_priv->mmio_size, DRM_MTRR_WC);
 558         if (dev_priv->has_gmr)
 559                 (void)ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_GMR);
 560         (void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
 561         (void)ttm_bo_device_release(&dev_priv->bdev);
 562         vmw_ttm_global_release(dev_priv);
 563         idr_destroy(&dev_priv->surface_idr);
 564         idr_destroy(&dev_priv->context_idr);
 565         idr_destroy(&dev_priv->stream_idr);
 566
 567         kfree(dev_priv);
 568
 569         return 0;
 570 }
 571
 572 static void vmw_postclose(struct drm_device *dev,
 573                          struct drm_file *file_priv)
 574 {
 575         struct vmw_fpriv *vmw_fp;
 576
 577         vmw_fp = vmw_fpriv(file_priv);
 578         ttm_object_file_release(&vmw_fp->tfile);
 579         if (vmw_fp->locked_master)
 580                 drm_master_put(&vmw_fp->locked_master);
 581         kfree(vmw_fp);
 582 }
 583
 584 static int vmw_driver_open(struct drm_device *dev, struct drm_file *file_priv)
 585 {
 586         struct vmw_private *dev_priv = vmw_priv(dev);
 587         struct vmw_fpriv *vmw_fp;
 588         int ret = -ENOMEM;
 589
 590         vmw_fp = kzalloc(sizeof(*vmw_fp), GFP_KERNEL);
 591         if (unlikely(vmw_fp == NULL))
 592                 return ret;
 593
 594         vmw_fp->tfile = ttm_object_file_init(dev_priv->tdev, 10);
 595         if (unlikely(vmw_fp->tfile == NULL))
 596                 goto out_no_tfile;
 597
 598         file_priv->driver_priv = vmw_fp;
 599
 600         if (unlikely(dev_priv->bdev.dev_mapping == NULL))
 601                 dev_priv->bdev.dev_mapping =
 602                         file_priv->filp->f_path.dentry->d_inode->i_mapping;
 603
 604         return 0;
 605
 606 out_no_tfile:
 607         kfree(vmw_fp);
 608         return ret;
 609 }
 610
 611 static long vmw_unlocked_ioctl(struct file *filp, unsigned int cmd,
 612                                unsigned long arg)
 613 {
 614         struct drm_file *file_priv = filp->private_data;
 615         struct drm_device *dev = file_priv->minor->dev;
 616         unsigned int nr = DRM_IOCTL_NR(cmd);
 617
 618         /*
 619          * Do extra checking on driver private ioctls.
 620          */
 621
 622         if ((nr >= DRM_COMMAND_BASE) && (nr < DRM_COMMAND_END)
 623             && (nr < DRM_COMMAND_BASE + dev->driver->num_ioctls)) {
 624                 struct drm_ioctl_desc *ioctl =
 625                     &vmw_ioctls[nr - DRM_COMMAND_BASE];
 626
 627                 if (unlikely(ioctl->cmd_drv != cmd)) {
 628                         DRM_ERROR("Invalid command format, ioctl %d\n",
 629                                   nr - DRM_COMMAND_BASE);
 630                         return -EINVAL;
 631                 }
 632         }
 633
 634         return drm_ioctl(filp, cmd, arg);
 635 }
 636
 637 static int vmw_firstopen(struct drm_device *dev)
 638 {
 639         struct vmw_private *dev_priv = vmw_priv(dev);
 640         dev_priv->is_opened = true;
 641
 642         return 0;
 643 }
 644
 645 static void vmw_lastclose(struct drm_device *dev)
 646 {
 647         struct vmw_private *dev_priv = vmw_priv(dev);
 648         struct drm_crtc *crtc;
 649         struct drm_mode_set set;
 650         int ret;
 651
 652         /**
 653          * Do nothing on the lastclose call from drm_unload.
 654          */
 655
 656         if (!dev_priv->is_opened)
 657                 return;
 658
 659         dev_priv->is_opened = false;
 660         set.x = 0;
 661         set.y = 0;
 662         set.fb = NULL;
 663         set.mode = NULL;
 664         set.connectors = NULL;
 665         set.num_connectors = 0;
 666
 667         list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
 668                 set.crtc = crtc;
 669                 ret = crtc->funcs->set_config(&set);
 670                 WARN_ON(ret != 0);
 671         }
 672
 673 }
 674
 675 static void vmw_master_init(struct vmw_master *vmaster)
 676 {
 677         ttm_lock_init(&vmaster->lock);
 678         INIT_LIST_HEAD(&vmaster->fb_surf);
 679         mutex_init(&vmaster->fb_surf_mutex);
 680 }
 681
 682 static int vmw_master_create(struct drm_device *dev,
 683                              struct drm_master *master)
 684 {
 685         struct vmw_master *vmaster;
 686
 687         vmaster = kzalloc(sizeof(*vmaster), GFP_KERNEL);
 688         if (unlikely(vmaster == NULL))
 689                 return -ENOMEM;
 690
 691         vmw_master_init(vmaster);
 692         ttm_lock_set_kill(&vmaster->lock, true, SIGTERM);
 693         master->driver_priv = vmaster;
 694
 695         return 0;
 696 }
 697
 698 static void vmw_master_destroy(struct drm_device *dev,
 699                                struct drm_master *master)
 700 {
 701         struct vmw_master *vmaster = vmw_master(master);
 702
 703         master->driver_priv = NULL;
 704         kfree(vmaster);
 705 }
 706
 707
 708 static int vmw_master_set(struct drm_device *dev,
 709                           struct drm_file *file_priv,
 710                           bool from_open)
 711 {
 712         struct vmw_private *dev_priv = vmw_priv(dev);
 713         struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
 714         struct vmw_master *active = dev_priv->active_master;
 715         struct vmw_master *vmaster = vmw_master(file_priv->master);
 716         int ret = 0;
 717
 718         if (!dev_priv->enable_fb) {
 719                 ret = vmw_3d_resource_inc(dev_priv, true);
 720                 if (unlikely(ret != 0))
 721                         return ret;
 722                 vmw_kms_save_vga(dev_priv);
 723                 mutex_lock(&dev_priv->hw_mutex);
 724                 vmw_write(dev_priv, SVGA_REG_TRACES, 0);
 725                 mutex_unlock(&dev_priv->hw_mutex);
 726         }
 727
 728         if (active) {
 729                 BUG_ON(active != &dev_priv->fbdev_master);
 730                 ret = ttm_vt_lock(&active->lock, false, vmw_fp->tfile);
 731                 if (unlikely(ret != 0))
 732                         goto out_no_active_lock;
 733
 734                 ttm_lock_set_kill(&active->lock, true, SIGTERM);
 735                 ret = ttm_bo_evict_mm(&dev_priv->bdev, TTM_PL_VRAM);
 736                 if (unlikely(ret != 0)) {
 737                         DRM_ERROR("Unable to clean VRAM on "
 738                                   "master drop.\n");
 739                 }
 740
 741                 dev_priv->active_master = NULL;
 742         }
 743
 744         ttm_lock_set_kill(&vmaster->lock, false, SIGTERM);
 745         if (!from_open) {
 746                 ttm_vt_unlock(&vmaster->lock);
 747                 BUG_ON(vmw_fp->locked_master != file_priv->master);
 748                 drm_master_put(&vmw_fp->locked_master);
 749         }
 750
 751         dev_priv->active_master = vmaster;
 752
 753         return 0;
 754
 755 out_no_active_lock:
 756         if (!dev_priv->enable_fb) {
 757                 mutex_lock(&dev_priv->hw_mutex);
 758                 vmw_write(dev_priv, SVGA_REG_TRACES, 1);
 759                 mutex_unlock(&dev_priv->hw_mutex);
 760                 vmw_kms_restore_vga(dev_priv);
 761                 vmw_3d_resource_dec(dev_priv, true);
 762         }
 763         return ret;
 764 }
 765
 766 static void vmw_master_drop(struct drm_device *dev,
 767                             struct drm_file *file_priv,
 768                             bool from_release)
 769 {
 770         struct vmw_private *dev_priv = vmw_priv(dev);
 771         struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
 772         struct vmw_master *vmaster = vmw_master(file_priv->master);
 773         int ret;
 774
 775         /**
 776          * Make sure the master doesn't disappear while we have
 777          * it locked.
 778          */
 779
 780         vmw_fp->locked_master = drm_master_get(file_priv->master);
 781         ret = ttm_vt_lock(&vmaster->lock, false, vmw_fp->tfile);
 782         vmw_kms_idle_workqueues(vmaster);
 783
 784         if (unlikely((ret != 0))) {
 785                 DRM_ERROR("Unable to lock TTM at VT switch.\n");
 786                 drm_master_put(&vmw_fp->locked_master);
 787         }
 788
 789         ttm_lock_set_kill(&vmaster->lock, true, SIGTERM);
 790
 791         if (!dev_priv->enable_fb) {
 792                 ret = ttm_bo_evict_mm(&dev_priv->bdev, TTM_PL_VRAM);
 793                 if (unlikely(ret != 0))
 794                         DRM_ERROR("Unable to clean VRAM on master drop.\n");
 795                 mutex_lock(&dev_priv->hw_mutex);
 796                 vmw_write(dev_priv, SVGA_REG_TRACES, 1);
 797                 mutex_unlock(&dev_priv->hw_mutex);
 798                 vmw_kms_restore_vga(dev_priv);
 799                 vmw_3d_resource_dec(dev_priv, true);
 800         }
 801
 802         dev_priv->active_master = &dev_priv->fbdev_master;
 803         ttm_lock_set_kill(&dev_priv->fbdev_master.lock, false, SIGTERM);
 804         ttm_vt_unlock(&dev_priv->fbdev_master.lock);
 805
 806         if (dev_priv->enable_fb)
 807                 vmw_fb_on(dev_priv);
 808 }
 809
 810
 811 static void vmw_remove(struct pci_dev *pdev)
 812 {
 813         struct drm_device *dev = pci_get_drvdata(pdev);
 814
 815         drm_put_dev(dev);
 816 }
 817
 818 static int vmwgfx_pm_notifier(struct notifier_block *nb, unsigned long val,
 819                               void *ptr)
 820 {
 821         struct vmw_private *dev_priv =
 822                 container_of(nb, struct vmw_private, pm_nb);
 823         struct vmw_master *vmaster = dev_priv->active_master;
 824
 825         switch (val) {
 826         case PM_HIBERNATION_PREPARE:
 827         case PM_SUSPEND_PREPARE:
 828                 ttm_suspend_lock(&vmaster->lock);
 829
 830                 /**
 831                  * This empties VRAM and unbinds all GMR bindings.
 832                  * Buffer contents is moved to swappable memory.
 833                  */
 834                 ttm_bo_swapout_all(&dev_priv->bdev);
 835
 836                 break;
 837         case PM_POST_HIBERNATION:
 838         case PM_POST_SUSPEND:
 839         case PM_POST_RESTORE:
 840                 ttm_suspend_unlock(&vmaster->lock);
 841
 842                 break;
 843         case PM_RESTORE_PREPARE:
 844                 break;
 845         default:
 846                 break;
 847         }
 848         return 0;
 849 }
 850
 851 /**
 852  * These might not be needed with the virtual SVGA device.
 853  */
 854
 855 static int vmw_pci_suspend(struct pci_dev *pdev, pm_message_t state)
 856 {
 857         struct drm_device *dev = pci_get_drvdata(pdev);
 858         struct vmw_private *dev_priv = vmw_priv(dev);
 859
 860         if (dev_priv->num_3d_resources != 0) {
 861                 DRM_INFO("Can't suspend or hibernate "
 862                          "while 3D resources are active.\n");
 863                 return -EBUSY;
 864         }
 865
 866         pci_save_state(pdev);
 867         pci_disable_device(pdev);
 868         pci_set_power_state(pdev, PCI_D3hot);
 869         return 0;
 870 }
 871
 872 static int vmw_pci_resume(struct pci_dev *pdev)
 873 {
 874         pci_set_power_state(pdev, PCI_D0);
 875         pci_restore_state(pdev);
 876         return pci_enable_device(pdev);
 877 }
 878
 879 static int vmw_pm_suspend(struct device *kdev)
 880 {
 881         struct pci_dev *pdev = to_pci_dev(kdev);
 882         struct pm_message dummy;
 883
 884         dummy.event = 0;
 885
 886         return vmw_pci_suspend(pdev, dummy);
 887 }
 888
 889 static int vmw_pm_resume(struct device *kdev)
 890 {
 891         struct pci_dev *pdev = to_pci_dev(kdev);
 892
 893         return vmw_pci_resume(pdev);
 894 }
 895
 896 static int vmw_pm_prepare(struct device *kdev)
 897 {
 898         struct pci_dev *pdev = to_pci_dev(kdev);
 899         struct drm_device *dev = pci_get_drvdata(pdev);
 900         struct vmw_private *dev_priv = vmw_priv(dev);
 901
 902         /**
 903          * Release 3d reference held by fbdev and potentially
 904          * stop fifo.
 905          */
 906         dev_priv->suspended = true;
 907         if (dev_priv->enable_fb)
 908                         vmw_3d_resource_dec(dev_priv, true);
 909
 910         if (dev_priv->num_3d_resources != 0) {
 911
 912                 DRM_INFO("Can't suspend or hibernate "
 913                          "while 3D resources are active.\n");
 914
 915                 if (dev_priv->enable_fb)
 916                         vmw_3d_resource_inc(dev_priv, true);
 917                 dev_priv->suspended = false;
 918                 return -EBUSY;
 919         }
 920
 921         return 0;
 922 }
 923
 924 static void vmw_pm_complete(struct device *kdev)
 925 {
 926         struct pci_dev *pdev = to_pci_dev(kdev);
 927         struct drm_device *dev = pci_get_drvdata(pdev);
 928         struct vmw_private *dev_priv = vmw_priv(dev);
 929
 930         /**
 931          * Reclaim 3d reference held by fbdev and potentially
 932          * start fifo.
 933          */
 934         if (dev_priv->enable_fb)
 935                         vmw_3d_resource_inc(dev_priv, false);
 936
 937         dev_priv->suspended = false;
 938 }
 939
 940 static const struct dev_pm_ops vmw_pm_ops = {
 941         .prepare = vmw_pm_prepare,
 942         .complete = vmw_pm_complete,
 943         .suspend = vmw_pm_suspend,
 944         .resume = vmw_pm_resume,
 945 };
 946
 947 static struct drm_driver driver = {
 948         .driver_features = DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED |
 949         DRIVER_MODESET,
 950         .load = vmw_driver_load,
 951         .unload = vmw_driver_unload,
 952         .firstopen = vmw_firstopen,
 953         .lastclose = vmw_lastclose,
 954         .irq_preinstall = vmw_irq_preinstall,
 955         .irq_postinstall = vmw_irq_postinstall,
 956         .irq_uninstall = vmw_irq_uninstall,
 957         .irq_handler = vmw_irq_handler,
 958         .get_vblank_counter = vmw_get_vblank_counter,
 959         .reclaim_buffers_locked = NULL,
 960         .ioctls = vmw_ioctls,
 961         .num_ioctls = DRM_ARRAY_SIZE(vmw_ioctls),
 962         .dma_quiescent = NULL,  /*vmw_dma_quiescent, */
 963         .master_create = vmw_master_create,
 964         .master_destroy = vmw_master_destroy,
 965         .master_set = vmw_master_set,
 966         .master_drop = vmw_master_drop,
 967         .open = vmw_driver_open,
 968         .postclose = vmw_postclose,
 969         .fops = {
 970                  .owner = THIS_MODULE,
 971                  .open = drm_open,
 972                  .release = drm_release,
 973                  .unlocked_ioctl = vmw_unlocked_ioctl,
 974                  .mmap = vmw_mmap,
 975                  .poll = drm_poll,
 976                  .fasync = drm_fasync,
 977 #if defined(CONFIG_COMPAT)
 978                  .compat_ioctl = drm_compat_ioctl,
 979 #endif
 980                  .llseek = noop_llseek,
 981         },
 982         .name = VMWGFX_DRIVER_NAME,
 983         .desc = VMWGFX_DRIVER_DESC,
 984         .date = VMWGFX_DRIVER_DATE,
 985         .major = VMWGFX_DRIVER_MAJOR,
 986         .minor = VMWGFX_DRIVER_MINOR,
 987         .patchlevel = VMWGFX_DRIVER_PATCHLEVEL
 988 };
 989
 990 static struct pci_driver vmw_pci_driver = {
 991         .name = VMWGFX_DRIVER_NAME,
 992         .id_table = vmw_pci_id_list,
 993         .probe = vmw_probe,
 994         .remove = vmw_remove,
 995         .driver = {
 996                 .pm = &vmw_pm_ops
 997         }
 998 };
 999
1000 static int vmw_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1001 {
1002         return drm_get_pci_dev(pdev, ent, &driver);
1003 }
1004
1005 static int __init vmwgfx_init(void)
1006 {
1007         int ret;
1008         ret = drm_pci_init(&driver, &vmw_pci_driver);
1009         if (ret)
1010                 DRM_ERROR("Failed initializing DRM.\n");
1011         return ret;
1012 }
1013
1014 static void __exit vmwgfx_exit(void)
1015 {
1016         drm_pci_exit(&driver, &vmw_pci_driver);
1017 }
1018
1019 module_init(vmwgfx_init);
1020 module_exit(vmwgfx_exit);
1021
1022 MODULE_AUTHOR("VMware Inc. and others");
1023 MODULE_DESCRIPTION("Standalone drm driver for the VMware SVGA device");
1024 MODULE_LICENSE("GPL and additional rights");
1025 MODULE_VERSION(__stringify(VMWGFX_DRIVER_MAJOR) "."
1026                __stringify(VMWGFX_DRIVER_MINOR) "."
1027                __stringify(VMWGFX_DRIVER_PATCHLEVEL) "."
1028                "0");