1 /* via_dmablit.c -- PCI DMA BitBlt support for the VIA Unichrome/Pro
3 * Copyright (C) 2005 Thomas Hellstrom, All Rights Reserved.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sub license,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE.
26 * Partially based on code obtained from Digeo Inc.
31 * Unmaps the DMA mappings.
32 * FIXME: Is this a NoOp on x86? Also
33 * FIXME: What happens if this one is called and a pending blit has previously done
34 * the same DMA mappings?
40 #include "via_dmablit.h"
42 #include <linux/pagemap.h>
43 #include <linux/slab.h>
45 #define VIA_PGDN(x) (((unsigned long)(x)) & PAGE_MASK)
46 #define VIA_PGOFF(x) (((unsigned long)(x)) & ~PAGE_MASK)
47 #define VIA_PFN(x) ((unsigned long)(x) >> PAGE_SHIFT)
49 typedef struct _drm_via_descriptor {
54 } drm_via_descriptor_t;
58 * Unmap a DMA mapping.
64 via_unmap_blit_from_device(struct pci_dev *pdev, drm_via_sg_info_t *vsg)
66 int num_desc = vsg->num_desc;
67 unsigned cur_descriptor_page = num_desc / vsg->descriptors_per_page;
68 unsigned descriptor_this_page = num_desc % vsg->descriptors_per_page;
69 drm_via_descriptor_t *desc_ptr = vsg->desc_pages[cur_descriptor_page] +
71 dma_addr_t next = vsg->chain_start;
74 if (descriptor_this_page-- == 0) {
75 cur_descriptor_page--;
76 descriptor_this_page = vsg->descriptors_per_page - 1;
77 desc_ptr = vsg->desc_pages[cur_descriptor_page] +
80 dma_unmap_single(&pdev->dev, next, sizeof(*desc_ptr), DMA_TO_DEVICE);
81 dma_unmap_page(&pdev->dev, desc_ptr->mem_addr, desc_ptr->size, vsg->direction);
82 next = (dma_addr_t) desc_ptr->next;
88 * If mode = 0, count how many descriptors are needed.
89 * If mode = 1, Map the DMA pages for the device, put together and map also the descriptors.
90 * Descriptors are run in reverse order by the hardware because we are not allowed to update the
91 * 'next' field without syncing calls when the descriptor is already mapped.
95 via_map_blit_for_device(struct pci_dev *pdev,
96 const drm_via_dmablit_t *xfer,
97 drm_via_sg_info_t *vsg,
100 unsigned cur_descriptor_page = 0;
101 unsigned num_descriptors_this_page = 0;
102 unsigned char *mem_addr = xfer->mem_addr;
103 unsigned char *cur_mem;
104 unsigned char *first_addr = (unsigned char *)VIA_PGDN(mem_addr);
105 uint32_t fb_addr = xfer->fb_addr;
107 unsigned long line_len;
108 unsigned remaining_len;
111 dma_addr_t next = 0 | VIA_DMA_DPR_EC;
112 drm_via_descriptor_t *desc_ptr = NULL;
115 desc_ptr = vsg->desc_pages[cur_descriptor_page];
117 for (cur_line = 0; cur_line < xfer->num_lines; ++cur_line) {
119 line_len = xfer->line_length;
123 while (line_len > 0) {
125 remaining_len = min(PAGE_SIZE-VIA_PGOFF(cur_mem), line_len);
126 line_len -= remaining_len;
130 dma_map_page(&pdev->dev,
131 vsg->pages[VIA_PFN(cur_mem) -
132 VIA_PFN(first_addr)],
133 VIA_PGOFF(cur_mem), remaining_len,
135 desc_ptr->dev_addr = cur_fb;
137 desc_ptr->size = remaining_len;
138 desc_ptr->next = (uint32_t) next;
139 next = dma_map_single(&pdev->dev, desc_ptr, sizeof(*desc_ptr),
142 if (++num_descriptors_this_page >= vsg->descriptors_per_page) {
143 num_descriptors_this_page = 0;
144 desc_ptr = vsg->desc_pages[++cur_descriptor_page];
149 cur_mem += remaining_len;
150 cur_fb += remaining_len;
153 mem_addr += xfer->mem_stride;
154 fb_addr += xfer->fb_stride;
158 vsg->chain_start = next;
159 vsg->state = dr_via_device_mapped;
161 vsg->num_desc = num_desc;
165 * Function that frees up all resources for a blit. It is usable even if the
166 * blit info has only been partially built as long as the status enum is consistent
167 * with the actual status of the used resources.
172 via_free_sg_info(struct pci_dev *pdev, drm_via_sg_info_t *vsg)
178 case dr_via_device_mapped:
179 via_unmap_blit_from_device(pdev, vsg);
180 case dr_via_desc_pages_alloc:
181 for (i=0; i<vsg->num_desc_pages; ++i) {
182 if (vsg->desc_pages[i] != NULL)
183 free_page((unsigned long)vsg->desc_pages[i]);
185 kfree(vsg->desc_pages);
186 case dr_via_pages_locked:
187 for (i=0; i<vsg->num_pages; ++i) {
188 if ( NULL != (page = vsg->pages[i])) {
189 if (! PageReserved(page) && (DMA_FROM_DEVICE == vsg->direction))
191 page_cache_release(page);
194 case dr_via_pages_alloc:
197 vsg->state = dr_via_sg_init;
199 vfree(vsg->bounce_buffer);
200 vsg->bounce_buffer = NULL;
201 vsg->free_on_sequence = 0;
205 * Fire a blit engine.
209 via_fire_dmablit(struct drm_device *dev, drm_via_sg_info_t *vsg, int engine)
211 drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
213 VIA_WRITE(VIA_PCI_DMA_MAR0 + engine*0x10, 0);
214 VIA_WRITE(VIA_PCI_DMA_DAR0 + engine*0x10, 0);
215 VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_DD | VIA_DMA_CSR_TD |
217 VIA_WRITE(VIA_PCI_DMA_MR0 + engine*0x04, VIA_DMA_MR_CM | VIA_DMA_MR_TDIE);
218 VIA_WRITE(VIA_PCI_DMA_BCR0 + engine*0x10, 0);
219 VIA_WRITE(VIA_PCI_DMA_DPR0 + engine*0x10, vsg->chain_start);
220 DRM_WRITEMEMORYBARRIER();
221 VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_DE | VIA_DMA_CSR_TS);
222 VIA_READ(VIA_PCI_DMA_CSR0 + engine*0x04);
226 * Obtain a page pointer array and lock all pages into system memory. A segmentation violation will
227 * occur here if the calling user does not have access to the submitted address.
231 via_lock_all_dma_pages(drm_via_sg_info_t *vsg, drm_via_dmablit_t *xfer)
234 unsigned long first_pfn = VIA_PFN(xfer->mem_addr);
235 vsg->num_pages = VIA_PFN(xfer->mem_addr + (xfer->num_lines * xfer->mem_stride -1)) -
238 if (NULL == (vsg->pages = vmalloc(sizeof(struct page *) * vsg->num_pages)))
240 memset(vsg->pages, 0, sizeof(struct page *) * vsg->num_pages);
241 down_read(¤t->mm->mmap_sem);
242 ret = get_user_pages(current, current->mm,
243 (unsigned long)xfer->mem_addr,
245 (vsg->direction == DMA_FROM_DEVICE),
246 0, vsg->pages, NULL);
248 up_read(¤t->mm->mmap_sem);
249 if (ret != vsg->num_pages) {
252 vsg->state = dr_via_pages_locked;
255 vsg->state = dr_via_pages_locked;
256 DRM_DEBUG("DMA pages locked\n");
261 * Allocate DMA capable memory for the blit descriptor chain, and an array that keeps track of the
262 * pages we allocate. We don't want to use kmalloc for the descriptor chain because it may be
263 * quite large for some blits, and pages don't need to be contingous.
267 via_alloc_desc_pages(drm_via_sg_info_t *vsg)
271 vsg->descriptors_per_page = PAGE_SIZE / sizeof( drm_via_descriptor_t);
272 vsg->num_desc_pages = (vsg->num_desc + vsg->descriptors_per_page - 1) /
273 vsg->descriptors_per_page;
275 if (NULL == (vsg->desc_pages = kcalloc(vsg->num_desc_pages, sizeof(void *), GFP_KERNEL)))
278 vsg->state = dr_via_desc_pages_alloc;
279 for (i=0; i<vsg->num_desc_pages; ++i) {
280 if (NULL == (vsg->desc_pages[i] =
281 (drm_via_descriptor_t *) __get_free_page(GFP_KERNEL)))
284 DRM_DEBUG("Allocated %d pages for %d descriptors.\n", vsg->num_desc_pages,
290 via_abort_dmablit(struct drm_device *dev, int engine)
292 drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
294 VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TA);
298 via_dmablit_engine_off(struct drm_device *dev, int engine)
300 drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
302 VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TD | VIA_DMA_CSR_DD);
308 * The dmablit part of the IRQ handler. Trying to do only reasonably fast things here.
309 * The rest, like unmapping and freeing memory for done blits is done in a separate workqueue
310 * task. Basically the task of the interrupt handler is to submit a new blit to the engine, while
311 * the workqueue task takes care of processing associated with the old blit.
315 via_dmablit_handler(struct drm_device *dev, int engine, int from_irq)
317 drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
318 drm_via_blitq_t *blitq = dev_priv->blit_queues + engine;
321 unsigned long irqsave=0;
324 DRM_DEBUG("DMA blit handler called. engine = %d, from_irq = %d, blitq = 0x%lx\n",
325 engine, from_irq, (unsigned long) blitq);
328 spin_lock(&blitq->blit_lock);
330 spin_lock_irqsave(&blitq->blit_lock, irqsave);
333 done_transfer = blitq->is_active &&
334 (( status = VIA_READ(VIA_PCI_DMA_CSR0 + engine*0x04)) & VIA_DMA_CSR_TD);
335 done_transfer = done_transfer || ( blitq->aborting && !(status & VIA_DMA_CSR_DE));
340 blitq->blits[cur]->aborted = blitq->aborting;
341 blitq->done_blit_handle++;
342 DRM_WAKEUP(blitq->blit_queue + cur);
345 if (cur >= VIA_NUM_BLIT_SLOTS)
350 * Clear transfer done flag.
353 VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TD);
355 blitq->is_active = 0;
357 schedule_work(&blitq->wq);
359 } else if (blitq->is_active && time_after_eq(jiffies, blitq->end)) {
362 * Abort transfer after one second.
365 via_abort_dmablit(dev, engine);
367 blitq->end = jiffies + DRM_HZ;
370 if (!blitq->is_active) {
371 if (blitq->num_outstanding) {
372 via_fire_dmablit(dev, blitq->blits[cur], engine);
373 blitq->is_active = 1;
375 blitq->num_outstanding--;
376 blitq->end = jiffies + DRM_HZ;
377 if (!timer_pending(&blitq->poll_timer))
378 mod_timer(&blitq->poll_timer, jiffies + 1);
380 if (timer_pending(&blitq->poll_timer)) {
381 del_timer(&blitq->poll_timer);
383 via_dmablit_engine_off(dev, engine);
388 spin_unlock(&blitq->blit_lock);
390 spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
397 * Check whether this blit is still active, performing necessary locking.
401 via_dmablit_active(drm_via_blitq_t *blitq, int engine, uint32_t handle, wait_queue_head_t **queue)
403 unsigned long irqsave;
407 spin_lock_irqsave(&blitq->blit_lock, irqsave);
410 * Allow for handle wraparounds.
413 active = ((blitq->done_blit_handle - handle) > (1 << 23)) &&
414 ((blitq->cur_blit_handle - handle) <= (1 << 23));
416 if (queue && active) {
417 slot = handle - blitq->done_blit_handle + blitq->cur -1;
418 if (slot >= VIA_NUM_BLIT_SLOTS) {
419 slot -= VIA_NUM_BLIT_SLOTS;
421 *queue = blitq->blit_queue + slot;
424 spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
430 * Sync. Wait for at least three seconds for the blit to be performed.
434 via_dmablit_sync(struct drm_device *dev, uint32_t handle, int engine)
437 drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
438 drm_via_blitq_t *blitq = dev_priv->blit_queues + engine;
439 wait_queue_head_t *queue;
442 if (via_dmablit_active(blitq, engine, handle, &queue)) {
443 DRM_WAIT_ON(ret, *queue, 3 * DRM_HZ,
444 !via_dmablit_active(blitq, engine, handle, NULL));
446 DRM_DEBUG("DMA blit sync handle 0x%x engine %d returned %d\n",
447 handle, engine, ret);
454 * A timer that regularly polls the blit engine in cases where we don't have interrupts:
455 * a) Broken hardware (typically those that don't have any video capture facility).
456 * b) Blit abort. The hardware doesn't send an interrupt when a blit is aborted.
457 * The timer and hardware IRQ's can and do work in parallel. If the hardware has
458 * irqs, it will shorten the latency somewhat.
464 via_dmablit_timer(unsigned long data)
466 drm_via_blitq_t *blitq = (drm_via_blitq_t *) data;
467 struct drm_device *dev = blitq->dev;
469 (blitq - ((drm_via_private_t *)dev->dev_private)->blit_queues);
471 DRM_DEBUG("Polling timer called for engine %d, jiffies %lu\n", engine,
472 (unsigned long) jiffies);
474 via_dmablit_handler(dev, engine, 0);
476 if (!timer_pending(&blitq->poll_timer)) {
477 mod_timer(&blitq->poll_timer, jiffies + 1);
480 * Rerun handler to delete timer if engines are off, and
481 * to shorten abort latency. This is a little nasty.
484 via_dmablit_handler(dev, engine, 0);
493 * Workqueue task that frees data and mappings associated with a blit.
494 * Also wakes up waiting processes. Each of these tasks handles one
495 * blit engine only and may not be called on each interrupt.
500 via_dmablit_workqueue(struct work_struct *work)
502 drm_via_blitq_t *blitq = container_of(work, drm_via_blitq_t, wq);
503 struct drm_device *dev = blitq->dev;
504 unsigned long irqsave;
505 drm_via_sg_info_t *cur_sg;
509 DRM_DEBUG("Workqueue task called for blit engine %ld\n",(unsigned long)
510 (blitq - ((drm_via_private_t *)dev->dev_private)->blit_queues));
512 spin_lock_irqsave(&blitq->blit_lock, irqsave);
514 while(blitq->serviced != blitq->cur) {
516 cur_released = blitq->serviced++;
518 DRM_DEBUG("Releasing blit slot %d\n", cur_released);
520 if (blitq->serviced >= VIA_NUM_BLIT_SLOTS)
523 cur_sg = blitq->blits[cur_released];
526 spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
528 DRM_WAKEUP(&blitq->busy_queue);
530 via_free_sg_info(dev->pdev, cur_sg);
533 spin_lock_irqsave(&blitq->blit_lock, irqsave);
536 spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
541 * Init all blit engines. Currently we use two, but some hardware have 4.
546 via_init_dmablit(struct drm_device *dev)
549 drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
550 drm_via_blitq_t *blitq;
552 pci_set_master(dev->pdev);
554 for (i=0; i< VIA_NUM_BLIT_ENGINES; ++i) {
555 blitq = dev_priv->blit_queues + i;
557 blitq->cur_blit_handle = 0;
558 blitq->done_blit_handle = 0;
562 blitq->num_free = VIA_NUM_BLIT_SLOTS - 1;
563 blitq->num_outstanding = 0;
564 blitq->is_active = 0;
566 spin_lock_init(&blitq->blit_lock);
567 for (j=0; j<VIA_NUM_BLIT_SLOTS; ++j) {
568 DRM_INIT_WAITQUEUE(blitq->blit_queue + j);
570 DRM_INIT_WAITQUEUE(&blitq->busy_queue);
571 INIT_WORK(&blitq->wq, via_dmablit_workqueue);
572 setup_timer(&blitq->poll_timer, via_dmablit_timer,
573 (unsigned long)blitq);
578 * Build all info and do all mappings required for a blit.
583 via_build_sg_info(struct drm_device *dev, drm_via_sg_info_t *vsg, drm_via_dmablit_t *xfer)
585 int draw = xfer->to_fb;
588 vsg->direction = (draw) ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
589 vsg->bounce_buffer = NULL;
591 vsg->state = dr_via_sg_init;
593 if (xfer->num_lines <= 0 || xfer->line_length <= 0) {
594 DRM_ERROR("Zero size bitblt.\n");
599 * Below check is a driver limitation, not a hardware one. We
600 * don't want to lock unused pages, and don't want to incoporate the
601 * extra logic of avoiding them. Make sure there are no.
602 * (Not a big limitation anyway.)
605 if ((xfer->mem_stride - xfer->line_length) > 2*PAGE_SIZE) {
606 DRM_ERROR("Too large system memory stride. Stride: %d, "
607 "Length: %d\n", xfer->mem_stride, xfer->line_length);
611 if ((xfer->mem_stride == xfer->line_length) &&
612 (xfer->fb_stride == xfer->line_length)) {
613 xfer->mem_stride *= xfer->num_lines;
614 xfer->line_length = xfer->mem_stride;
615 xfer->fb_stride = xfer->mem_stride;
620 * Don't lock an arbitrary large number of pages, since that causes a
624 if (xfer->num_lines > 2048 || (xfer->num_lines*xfer->mem_stride > (2048*2048*4))) {
625 DRM_ERROR("Too large PCI DMA bitblt.\n");
630 * we allow a negative fb stride to allow flipping of images in
634 if (xfer->mem_stride < xfer->line_length ||
635 abs(xfer->fb_stride) < xfer->line_length) {
636 DRM_ERROR("Invalid frame-buffer / memory stride.\n");
641 * A hardware bug seems to be worked around if system memory addresses start on
642 * 16 byte boundaries. This seems a bit restrictive however. VIA is contacted
643 * about this. Meanwhile, impose the following restrictions:
647 if ((((unsigned long)xfer->mem_addr & 3) != ((unsigned long)xfer->fb_addr & 3)) ||
648 ((xfer->num_lines > 1) && ((xfer->mem_stride & 3) != (xfer->fb_stride & 3)))) {
649 DRM_ERROR("Invalid DRM bitblt alignment.\n");
653 if ((((unsigned long)xfer->mem_addr & 15) ||
654 ((unsigned long)xfer->fb_addr & 3)) ||
655 ((xfer->num_lines > 1) &&
656 ((xfer->mem_stride & 15) || (xfer->fb_stride & 3)))) {
657 DRM_ERROR("Invalid DRM bitblt alignment.\n");
662 if (0 != (ret = via_lock_all_dma_pages(vsg, xfer))) {
663 DRM_ERROR("Could not lock DMA pages.\n");
664 via_free_sg_info(dev->pdev, vsg);
668 via_map_blit_for_device(dev->pdev, xfer, vsg, 0);
669 if (0 != (ret = via_alloc_desc_pages(vsg))) {
670 DRM_ERROR("Could not allocate DMA descriptor pages.\n");
671 via_free_sg_info(dev->pdev, vsg);
674 via_map_blit_for_device(dev->pdev, xfer, vsg, 1);
681 * Reserve one free slot in the blit queue. Will wait for one second for one
682 * to become available. Otherwise -EBUSY is returned.
686 via_dmablit_grab_slot(drm_via_blitq_t *blitq, int engine)
689 unsigned long irqsave;
691 DRM_DEBUG("Num free is %d\n", blitq->num_free);
692 spin_lock_irqsave(&blitq->blit_lock, irqsave);
693 while(blitq->num_free == 0) {
694 spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
696 DRM_WAIT_ON(ret, blitq->busy_queue, DRM_HZ, blitq->num_free > 0);
698 return (-EINTR == ret) ? -EAGAIN : ret;
701 spin_lock_irqsave(&blitq->blit_lock, irqsave);
705 spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
711 * Hand back a free slot if we changed our mind.
715 via_dmablit_release_slot(drm_via_blitq_t *blitq)
717 unsigned long irqsave;
719 spin_lock_irqsave(&blitq->blit_lock, irqsave);
721 spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
722 DRM_WAKEUP( &blitq->busy_queue );
726 * Grab a free slot. Build blit info and queue a blit.
731 via_dmablit(struct drm_device *dev, drm_via_dmablit_t *xfer)
733 drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
734 drm_via_sg_info_t *vsg;
735 drm_via_blitq_t *blitq;
738 unsigned long irqsave;
740 if (dev_priv == NULL) {
741 DRM_ERROR("Called without initialization.\n");
745 engine = (xfer->to_fb) ? 0 : 1;
746 blitq = dev_priv->blit_queues + engine;
747 if (0 != (ret = via_dmablit_grab_slot(blitq, engine))) {
750 if (NULL == (vsg = kmalloc(sizeof(*vsg), GFP_KERNEL))) {
751 via_dmablit_release_slot(blitq);
754 if (0 != (ret = via_build_sg_info(dev, vsg, xfer))) {
755 via_dmablit_release_slot(blitq);
759 spin_lock_irqsave(&blitq->blit_lock, irqsave);
761 blitq->blits[blitq->head++] = vsg;
762 if (blitq->head >= VIA_NUM_BLIT_SLOTS)
764 blitq->num_outstanding++;
765 xfer->sync.sync_handle = ++blitq->cur_blit_handle;
767 spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
768 xfer->sync.engine = engine;
770 via_dmablit_handler(dev, engine, 0);
776 * Sync on a previously submitted blit. Note that the X server use signals extensively, and
777 * that there is a very big probability that this IOCTL will be interrupted by a signal. In that
778 * case it returns with -EAGAIN for the signal to be delivered.
779 * The caller should then reissue the IOCTL. This is similar to what is being done for drmGetLock().
783 via_dma_blit_sync( struct drm_device *dev, void *data, struct drm_file *file_priv )
785 drm_via_blitsync_t *sync = data;
788 if (sync->engine >= VIA_NUM_BLIT_ENGINES)
791 err = via_dmablit_sync(dev, sync->sync_handle, sync->engine);
801 * Queue a blit and hand back a handle to be used for sync. This IOCTL may be interrupted by a signal
802 * while waiting for a free slot in the blit queue. In that case it returns with -EAGAIN and should
803 * be reissued. See the above IOCTL code.
807 via_dma_blit( struct drm_device *dev, void *data, struct drm_file *file_priv )
809 drm_via_dmablit_t *xfer = data;
812 err = via_dmablit(dev, xfer);