2 * Copyright (C) 2012 Avionic Design GmbH
3 * Copyright (C) 2012-2013 NVIDIA CORPORATION. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
11 #define HOST1X_DRM_H 1
13 #include <uapi/drm/tegra_drm.h>
14 #include <linux/host1x.h>
17 #include <drm/drm_crtc_helper.h>
18 #include <drm/drm_edid.h>
19 #include <drm/drm_fb_helper.h>
20 #include <drm/drm_fixed.h>
27 struct drm_framebuffer base;
28 struct tegra_bo **planes;
29 unsigned int num_planes;
32 #ifdef CONFIG_DRM_TEGRA_FBDEV
34 struct drm_fb_helper base;
40 struct drm_device *drm;
42 struct iommu_domain *domain;
45 struct mutex clients_lock;
46 struct list_head clients;
48 #ifdef CONFIG_DRM_TEGRA_FBDEV
49 struct tegra_fbdev *fbdev;
52 unsigned int pitch_align;
55 struct tegra_drm_client;
57 struct tegra_drm_context {
58 struct tegra_drm_client *client;
59 struct host1x_channel *channel;
60 struct list_head list;
63 struct tegra_drm_client_ops {
64 int (*open_channel)(struct tegra_drm_client *client,
65 struct tegra_drm_context *context);
66 void (*close_channel)(struct tegra_drm_context *context);
67 int (*is_addr_reg)(struct device *dev, u32 class, u32 offset);
68 int (*submit)(struct tegra_drm_context *context,
69 struct drm_tegra_submit *args, struct drm_device *drm,
70 struct drm_file *file);
73 int tegra_drm_submit(struct tegra_drm_context *context,
74 struct drm_tegra_submit *args, struct drm_device *drm,
75 struct drm_file *file);
77 struct tegra_drm_client {
78 struct host1x_client base;
79 struct list_head list;
81 const struct tegra_drm_client_ops *ops;
84 static inline struct tegra_drm_client *
85 host1x_to_drm_client(struct host1x_client *client)
87 return container_of(client, struct tegra_drm_client, base);
90 int tegra_drm_register_client(struct tegra_drm *tegra,
91 struct tegra_drm_client *client);
92 int tegra_drm_unregister_client(struct tegra_drm *tegra,
93 struct tegra_drm_client *client);
95 int tegra_drm_init(struct tegra_drm *tegra, struct drm_device *drm);
96 int tegra_drm_exit(struct tegra_drm *tegra);
98 struct tegra_dc_soc_info;
102 struct host1x_client client;
106 struct drm_crtc base;
111 struct reset_control *rst;
115 struct tegra_output *rgb;
117 struct list_head list;
119 struct drm_info_list *debugfs_files;
120 struct drm_minor *minor;
121 struct dentry *debugfs;
123 /* page-flip handling */
124 struct drm_pending_vblank_event *event;
126 const struct tegra_dc_soc_info *soc;
128 struct iommu_domain *domain;
131 static inline struct tegra_dc *
132 host1x_client_to_dc(struct host1x_client *client)
134 return container_of(client, struct tegra_dc, client);
137 static inline struct tegra_dc *to_tegra_dc(struct drm_crtc *crtc)
139 return crtc ? container_of(crtc, struct tegra_dc, base) : NULL;
142 static inline void tegra_dc_writel(struct tegra_dc *dc, u32 value,
143 unsigned long offset)
145 writel(value, dc->regs + (offset << 2));
148 static inline u32 tegra_dc_readl(struct tegra_dc *dc, unsigned long offset)
150 return readl(dc->regs + (offset << 2));
153 struct tegra_dc_window {
166 unsigned int bits_per_pixel;
169 unsigned int stride[2];
170 unsigned long base[3];
173 struct tegra_bo_tiling tiling;
177 void tegra_dc_enable_vblank(struct tegra_dc *dc);
178 void tegra_dc_disable_vblank(struct tegra_dc *dc);
179 void tegra_dc_cancel_page_flip(struct drm_crtc *crtc, struct drm_file *file);
181 struct tegra_output_ops {
182 int (*enable)(struct tegra_output *output);
183 int (*disable)(struct tegra_output *output);
184 int (*setup_clock)(struct tegra_output *output, struct clk *clk,
185 unsigned long pclk, unsigned int *div);
186 int (*check_mode)(struct tegra_output *output,
187 struct drm_display_mode *mode,
188 enum drm_mode_status *status);
189 enum drm_connector_status (*detect)(struct tegra_output *output);
192 enum tegra_output_type {
199 struct tegra_output {
200 struct device_node *of_node;
203 const struct tegra_output_ops *ops;
204 enum tegra_output_type type;
206 struct drm_panel *panel;
207 struct i2c_adapter *ddc;
208 const struct edid *edid;
209 unsigned int hpd_irq;
212 struct drm_encoder encoder;
213 struct drm_connector connector;
216 static inline struct tegra_output *encoder_to_output(struct drm_encoder *e)
218 return container_of(e, struct tegra_output, encoder);
221 static inline struct tegra_output *connector_to_output(struct drm_connector *c)
223 return container_of(c, struct tegra_output, connector);
226 static inline int tegra_output_enable(struct tegra_output *output)
228 if (output && output->ops && output->ops->enable)
229 return output->ops->enable(output);
231 return output ? -ENOSYS : -EINVAL;
234 static inline int tegra_output_disable(struct tegra_output *output)
236 if (output && output->ops && output->ops->disable)
237 return output->ops->disable(output);
239 return output ? -ENOSYS : -EINVAL;
242 static inline int tegra_output_setup_clock(struct tegra_output *output,
243 struct clk *clk, unsigned long pclk,
246 if (output && output->ops && output->ops->setup_clock)
247 return output->ops->setup_clock(output, clk, pclk, div);
249 return output ? -ENOSYS : -EINVAL;
252 static inline int tegra_output_check_mode(struct tegra_output *output,
253 struct drm_display_mode *mode,
254 enum drm_mode_status *status)
256 if (output && output->ops && output->ops->check_mode)
257 return output->ops->check_mode(output, mode, status);
259 return output ? -ENOSYS : -EINVAL;
263 int tegra_dc_rgb_probe(struct tegra_dc *dc);
264 int tegra_dc_rgb_remove(struct tegra_dc *dc);
265 int tegra_dc_rgb_init(struct drm_device *drm, struct tegra_dc *dc);
266 int tegra_dc_rgb_exit(struct tegra_dc *dc);
269 int tegra_output_probe(struct tegra_output *output);
270 int tegra_output_remove(struct tegra_output *output);
271 int tegra_output_init(struct drm_device *drm, struct tegra_output *output);
272 int tegra_output_exit(struct tegra_output *output);
278 struct tegra_dpaux *tegra_dpaux_find_by_of_node(struct device_node *np);
279 enum drm_connector_status tegra_dpaux_detect(struct tegra_dpaux *dpaux);
280 int tegra_dpaux_attach(struct tegra_dpaux *dpaux, struct tegra_output *output);
281 int tegra_dpaux_detach(struct tegra_dpaux *dpaux);
282 int tegra_dpaux_enable(struct tegra_dpaux *dpaux);
283 int tegra_dpaux_disable(struct tegra_dpaux *dpaux);
284 int tegra_dpaux_prepare(struct tegra_dpaux *dpaux, u8 encoding);
285 int tegra_dpaux_train(struct tegra_dpaux *dpaux, struct drm_dp_link *link,
289 struct tegra_bo *tegra_fb_get_plane(struct drm_framebuffer *framebuffer,
291 bool tegra_fb_is_bottom_up(struct drm_framebuffer *framebuffer);
292 int tegra_fb_get_tiling(struct drm_framebuffer *framebuffer,
293 struct tegra_bo_tiling *tiling);
294 int tegra_drm_fb_prepare(struct drm_device *drm);
295 void tegra_drm_fb_free(struct drm_device *drm);
296 int tegra_drm_fb_init(struct drm_device *drm);
297 void tegra_drm_fb_exit(struct drm_device *drm);
298 #ifdef CONFIG_DRM_TEGRA_FBDEV
299 void tegra_fbdev_restore_mode(struct tegra_fbdev *fbdev);
302 extern struct platform_driver tegra_dc_driver;
303 extern struct platform_driver tegra_dsi_driver;
304 extern struct platform_driver tegra_sor_driver;
305 extern struct platform_driver tegra_hdmi_driver;
306 extern struct platform_driver tegra_dpaux_driver;
307 extern struct platform_driver tegra_gr2d_driver;
308 extern struct platform_driver tegra_gr3d_driver;
310 #endif /* HOST1X_DRM_H */